Voltage management circuit and driving method therefor, and display module

Abstract

A voltage management circuit and a driving method therefor, and a display module. In the voltage management circuit, an output control sub-circuit (10) is coupled to a first node (N1), a signal end (V) to be managed and a ground signal input end, and is used for controlling said signal end (V) to be electrically connected to or disconnected from the ground signal input end; a first node control sub-circuit (20) is coupled to the first node (N1), a second node (N2) and said signal end (V), and is used for controlling the first node (N1) to be electrically connected to or disconnected from the second node (N2); and a second node control sub-circuit (30) is coupled to the second node (N2), said signal end (V) and the ground signal input end, and is used for controlling the second node (N2) to be electrically connected to or disconnected from said signal end (V).

Description

Voltage management circuit, driving method thereof and display module

[0001] Cross-reference to related applications

[0002] The present application claims priority from Chinese Patent Application No. 202411372654.7 filed on September 29, 2024 in China, the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0003] The present disclosure relates to the technical field of display, and in particular, to a voltage management circuit, a driving method thereof and a display module. BACKGROUND

[0004] In the process from production to terminal use of an organic light-emitting diode (OLED) display module, a lighting device uses a lighting machine power supply or a boost conversion circuit of a power IC (Power IC) as an external direct supply voltage source, and outputs a required operating voltage to a driver IC (Driver IC) in the OLED display module through the external direct supply voltage source. Almost all lighting machine power supplies and part of the Power ICs do not have a power-off output voltage state management function, so that after power-off, the voltage output end of the external direct supply voltage source is in a suspended state, causing an abnormal potential at the voltage output end, which is particularly serious when the voltage output end is used to provide a negative operating voltage. When the lighting device is subjected to secondary lighting, the Driver IC power-on logic and voltage are not controlled, and the abnormal Driver IC power-on will further cause the OLED display module to display abnormally, resulting in production and verification loss. SUMMARY

[0005] The purpose of the present disclosure is to provide a voltage management circuit, a driving method thereof and a display module.

[0006] In order to achieve the above-mentioned purpose, the present disclosure provides the following technical solutions:

[0007] A first aspect of the present disclosure provides a voltage management circuit, comprising:

[0008] An output control sub-circuit coupled with a first node, a to-be-managed signal terminal and a ground signal input terminal respectively; for controlling the electrical connection between the to-be-managed signal terminal and the ground signal input terminal to be turned on or turned off under the control of the potential of the first node;

[0009] A first node control sub-circuit coupled with the first node, a second node and the to-be-managed signal terminal respectively; for controlling the electrical connection between the first node and the second node to be turned on or turned off under the control of the potential of the to-be-managed signal terminal;

[0010] The second node control sub-circuit is coupled with the second node, the signal terminal to be managed and the ground signal input terminal respectively, and is configured to control the electrical connection between the second node and the signal terminal to be managed to be turned on or turned off under the control of the potential of the signal terminal to be managed.

[0011] Optionally, the second node control sub-circuit comprises:

[0012] The voltage division module is coupled with the signal terminal to be managed, the ground signal input terminal and a third node respectively, and is configured to control the potential of the third node.

[0013] The storage module has a first end coupled with the second node and a second end coupled with the ground signal input terminal.

[0014] The unidirectional conduction module has a first end coupled with the third node and a second end coupled with the second node.

[0015] Optionally, the voltage division module comprises a first resistor and a second resistor, the first end of the first resistor is coupled with the signal terminal to be managed, and the second end of the first resistor is coupled with the third node; the first end of the second resistor is coupled with the third node, and the second end of the second resistor is coupled with the ground signal input terminal.

[0016] The storage module comprises a storage capacitor, the first end of the storage capacitor is coupled with the second node, and the second end of the storage capacitor is coupled with the ground signal input terminal.

[0017] The unidirectional conduction module comprises a diode, the first pole of the diode is coupled with the third node, and the second pole of the diode is coupled with the second node.

[0018] Optionally, the first node control sub-circuit comprises a first transistor, the gate of the first transistor is coupled with the signal terminal to be managed, the first pole of the first transistor is coupled with the second node, and the second pole of the first transistor is coupled with the first node.

[0019] Optionally, the output control sub-circuit comprises a second transistor, the gate of the second transistor is coupled with the first node, the first pole of the second transistor is coupled with the signal terminal to be managed, and the second pole of the second transistor is coupled with the ground signal input terminal.

[0020] Optionally, the to-be-managed signal terminal comprises a to-be-managed negative voltage signal terminal, the first transistor comprises an N-type transistor, the second transistor comprises a P-type transistor, the first electrode of the diode comprises a cathode, and the second electrode of the diode comprises an anode.

[0021] Optionally, the to-be-managed signal terminal comprises a to-be-managed positive voltage signal terminal, the first transistor comprises a P-type transistor, the second transistor comprises an N-type transistor, the first electrode of the diode comprises an anode, and the second electrode of the diode comprises a cathode.

[0022] Optionally, the voltage management circuit further comprises:

[0023] a load sub-circuit, the first node control sub-circuit being coupled to the to-be-managed signal terminal through the load sub-circuit; and / or,

[0024] a first discharge sub-circuit, a first end of the first discharge sub-circuit being coupled to the first node, and a second end of the first discharge sub-circuit being coupled to the ground signal input terminal; and / or,

[0025] a second discharge sub-circuit, the output control sub-circuit being coupled to the to-be-managed signal terminal through the second discharge sub-circuit.

[0026] Optionally, the load sub-circuit comprises a third resistor, a first end of the third resistor being coupled to the to-be-managed signal terminal, and a second end of the third resistor being coupled to the first node control sub-circuit.

[0027] the first discharge sub-circuit comprises a fourth resistor, a first end of the fourth resistor being coupled to the first node, and a second end of the fourth resistor being coupled to the ground signal input terminal.

[0028] the second discharge sub-circuit comprises a fifth resistor, a first end of the fifth resistor being coupled to the to-be-managed signal terminal, and a second end of the fifth resistor being coupled to the output control sub-circuit.

[0029] Based on the technical solution of the above voltage management circuit, the second aspect of the present disclosure provides a display module comprising the above voltage management circuit; and further comprising a driving circuit, the driving circuit comprising a voltage signal input terminal, the voltage signal input terminal being coupled to the to-be-managed signal terminal of the voltage management circuit.

[0030] Optionally, the display module comprises a display panel and a flexible circuit board, the flexible circuit board being bound in a non-display area of the display panel.

[0031] the driving circuit is located in the non-display area of the display panel, and the voltage management circuit is located on the flexible circuit board.

[0032] Optionally, the display module comprises a display panel and a flexible circuit board, the flexible circuit board is bound in a non-display area of the display panel; the driving circuit and the voltage management circuit are both located in the non-display area of the display panel.

[0033] Optionally, the flexible circuit board comprises a first pin and a second pin, the non-display area of the display panel comprises a third pin and a fourth pin, the first pin is coupled with the third pin, and the second pin is coupled with the fourth pin.

[0034] The first pin is coupled with a voltage output end of an external direct voltage source, and the second pin is coupled with a ground signal input end.

[0035] A to-be-managed signal end coupled with the voltage management circuit is coupled with the third pin, and an output control sub-circuit and a second node control sub-circuit in the voltage management circuit are coupled with the fourth pin.

[0036] Optionally, the non-display area comprises a peripheral area, a bending area and a binding area; the peripheral area is closest to a display area of the display panel, and the bending area is located between the peripheral area and the binding area.

[0037] The driving circuit, the third pin and the fourth pin are located in the binding area, and the voltage management circuit is located in the peripheral area.

[0038] Optionally, the resistance in the voltage management circuit comprises a resistance active layer, a first conductive pattern and a second conductive pattern; the first conductive pattern is coupled with a first end of the resistance active layer, and the second conductive pattern is coupled with a second end of the resistance active layer.

[0039] Optionally, the display panel comprises, in a direction away from a substrate base plate, a first active layer, a first gate insulating layer, a first gate metal layer, a second gate insulating layer, a second active layer, a third gate insulating layer, a third gate metal layer, an interlayer insulating layer and a first source-drain metal layer which are sequentially stacked; the resistance active layer is provided in the same layer and of the same material as the first active layer or the second active layer; the first conductive pattern and the second conductive pattern are provided in the same layer and of the same material as the first source-drain metal layer.

[0040] Optionally, the diode in the voltage management circuit comprises a diode active layer, a diode anode pattern and a diode cathode pattern; the diode anode pattern is coupled with a first end of the diode active layer, and the diode cathode pattern is coupled with a second end of the diode active layer; the diode active layer forms a PN junction of the diode.

[0041] Optionally, the display panel comprises, in sequence from the direction away from the substrate base plate, a first active layer, a first gate insulating layer, a first gate metal layer, a second gate insulating layer, a second active layer, a third gate insulating layer, a third gate metal layer, an interlayer insulating layer, and a first source-drain metal layer; the diode active layer is arranged in the same layer and of the same material as the first active layer or the second active layer; the diode anode pattern and the diode cathode pattern are arranged in the same layer and of the same material as the first source-drain metal layer.

[0042] Optionally, the display panel comprises, in sequence from the direction away from the substrate base plate, a first active layer, a first gate insulating layer, a first gate metal layer, a second gate insulating layer, a second active layer, a third gate insulating layer, a third gate metal layer, an interlayer insulating layer, and a first source-drain metal layer.

[0043] The P-type transistor in the voltage management circuit comprises a P-type active layer, a first gate layer, a first source, and a first drain; the P-type active layer is arranged in the same layer and of the same material as the first active layer; the first gate layer is arranged in the same layer and of the same material as the first gate metal layer; the first source and the first drain are arranged in the same layer and of the same material as the first source-drain metal layer.

[0044] Optionally, the display panel comprises, in sequence from the direction away from the substrate base plate, a first active layer, a first gate insulating layer, a first gate metal layer, a second gate insulating layer, a second active layer, a third gate insulating layer, a third gate metal layer, an interlayer insulating layer, and a first source-drain metal layer.

[0045] The N-type transistor in the voltage management circuit comprises an N-type active layer, a second gate layer, a second source, and a second drain; the N-type active layer is arranged in the same layer and of the same material as the second active layer; the second gate layer is arranged in the same layer and of the same material as the third gate metal layer; the second source and the second drain are arranged in the same layer and of the same material as the first source-drain metal layer.

[0046] Based on the technical solutions of the above voltage management circuit, the third aspect of the present disclosure provides a driving method of a voltage management circuit, for driving the above voltage management circuit; the driving method comprises:

[0047] In the normal output stage, the output control sub-circuit controls to disconnect the electrical connection between the signal to be managed end and the ground signal input end under the control of the potential of the first node; the first node control sub-circuit controls to disconnect the electrical connection between the first node and the second node under the control of the potential of the signal to be managed end; the second node control sub-circuit controls to turn on the electrical connection between the second node and the signal to be managed end under the control of the potential of the signal to be managed end.

[0048] In the discharging phase, the output control sub-circuit controls the electrical connection between the to-be-managed signal end and the ground signal input end to be conducted under the control of the potential of the first node; the first node control sub-circuit controls the electrical connection between the first node and the second node to be conducted under the control of the potential of the to-be-managed signal end; and the second node control sub-circuit controls the electrical connection between the second node and the to-be-managed signal end to be disconnected under the control of the potential of the to-be-managed signal end.

[0049] Optionally, the driving method further comprises:

[0050] After the discharging phase ends, the output control sub-circuit controls the electrical connection between the to-be-managed signal end and the ground signal input end to be disconnected under the control of the potential of the first node; and the first node control sub-circuit controls the electrical connection between the first node and the second node to be disconnected under the control of the potential of the to-be-managed signal end.

[0051] Optionally, the second node control sub-circuit comprises a voltage division module, a storage module and a one-way conduction module, the voltage division module is coupled with the to-be-managed signal end, the ground signal input end and a third node respectively, and is configured to control the potential of the third node; the first end of the storage module is coupled with the second node, and the second end of the storage module is coupled with the ground signal input end; the first end of the one-way conduction module is coupled with the third node, and the second end of the one-way conduction module is coupled with the second node.

[0052] In the normal output phase, the one-way conduction module controls the electrical connection between the third node and the second node to be conducted under the control of the potential of the third node.

[0053] In the discharging phase, the one-way conduction module controls the electrical connection between the third node and the second node to be disconnected under the control of the potential of the third node.

[0054] Optionally, the first node control sub-circuit comprises a first transistor, the gate of the first transistor is coupled with the to-be-managed signal end, the first pole of the first transistor is coupled with the second node, and the second pole of the first transistor is coupled with the first node; and the output control sub-circuit comprises a second transistor, the gate of the second transistor is coupled with the first node, the first pole of the second transistor is coupled with the to-be-managed signal end, and the second pole of the second transistor is coupled with the ground signal input end.

[0055] In the normal output phase, the second transistor is closed under the control of the potential of the first node, and the first transistor is closed under the control of the potential of the to-be-managed signal end.

[0056] In the discharging phase, the second transistor is turned on under the control of the potential of the first node; the first transistor is turned on under the control of the potential of the signal terminal to be managed.

[0057] After the discharging phase, the second transistor is turned off under the control of the potential of the first node; the first transistor is turned off under the control of the potential of the signal terminal to be managed. BRIEF DESCRIPTION OF DRAWINGS

[0058] The accompanying drawings, which are included to provide a further understanding of the present disclosure and constitute a part of the present disclosure, illustrate the exemplary embodiments of the present disclosure and serve to explain the present disclosure together with the description. In the drawings:

[0059] Fig. 1 is a first module schematic diagram of a voltage management circuit provided by an embodiment of the present disclosure;

[0060] Fig. 2 is a second module schematic diagram of a voltage management circuit provided by an embodiment of the present disclosure;

[0061] Fig. 3 is a third module schematic diagram of a voltage management circuit provided by an embodiment of the present disclosure;

[0062] Fig. 4 is a first circuit structure schematic diagram of a voltage management circuit provided by an embodiment of the present disclosure;

[0063] Fig. 5 is a schematic diagram of voltage values of nodes of the circuit structure of Fig. 4 in a normal output phase;

[0064] Fig. 6 is a schematic diagram of voltage values of nodes of the circuit structure of Fig. 4 in a discharging phase;

[0065] Fig. 7 is a schematic diagram of voltage values of nodes of the circuit structure of Fig. 4 after the discharging phase;

[0066] Fig. 8 is a second circuit structure schematic diagram of a voltage management circuit provided by an embodiment of the present disclosure;

[0067] Fig. 9 is a signal waveform diagram of a signal terminal to be managed when connected to a voltage management circuit and not connected to a voltage management circuit provided by an embodiment of the present disclosure;

[0068] Fig. 10 is a schematic diagram of a display module connection lighting device provided by an embodiment of the present disclosure;

[0069] Fig. 11 is a schematic diagram of an overall structure of a display module provided by an embodiment of the present disclosure;

[0070] Fig. 12 is a third circuit structure schematic diagram of a voltage management circuit provided by an embodiment of the present disclosure;

[0071] Fig. 13 is a fourth circuit structure schematic diagram of a voltage management circuit provided by an embodiment of the present disclosure;

[0072] FIG. 14 is a structural schematic diagram of a resistor provided by an embodiment of the present disclosure;

[0073] FIG. 15 is a structural schematic diagram of a diode provided by an embodiment of the present disclosure;

[0074] FIG. 16 is a structural schematic diagram of a P-type transistor provided by an embodiment of the present disclosure;

[0075] FIG. 17 is a structural schematic diagram of an N-type transistor provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0076] In order to further illustrate the voltage management circuit and the driving method thereof, and the display module provided by the embodiments of the present disclosure, the following will be described in detail in combination with the accompanying drawings of the specification.

[0077] It is found through research that after the power supply of the lighting device is powered off, the voltage output end of the external direct voltage source is in a suspended state, causing the potential of the voltage output end to be abnormal, and the time and state of the point cannot be determined. This abnormality is particularly serious when the voltage output end is used to provide a negative working voltage, especially when one end of a capacitor is used as the voltage output end, or there is a parasitic capacitor in the power supply loop. When the lighting device is re-lit, the Driver IC power-on logic and voltage are not controlled, and the abnormal Driver IC power-on will further cause the OLED display module to display abnormally, resulting in production and verification losses.

[0078] In order to avoid the above losses, at present, only manual grounding shorting of the lighting device can be performed after the power supply of the lighting device is powered off, or the device can be modified, or a Power IC with power-off management function can be purchased; the types of lighting devices involved in the production end to the terminal are various, and the quantity is huge, and a large amount of human resources is consumed for device identification and manual rapid discharge, and a great cost is spent on device modification in terms of improvement period and cost, and the selection range of the Power IC is small, so there is an urgent need for an improvement method for automatic and rapid discharge when the external direct voltage is powered off, so that the external direct voltage scheme is highly related to the OLED display module scheme, and the scheme is flexible, and is used to solve the problem that the voltage signal received by the driving integrated circuit in the display module is abnormal, which easily causes the driving integrated circuit to be powered on and the voltage to be not controlled, and further causes the display module to display abnormally, resulting in production and verification losses and other problems.

[0079] Referring to FIG. 1, the present disclosure provides a voltage management circuit, comprising:

[0080] The output control sub-circuit 10 is coupled with the first node N1, the to-be-managed signal end V, and the ground signal input end respectively, and is used to control the conduction or disconnection of the electrical connection between the to-be-managed signal end V and the ground signal input end under the control of the potential of the first node N1.

[0081] The first node control sub-circuit 20 is coupled with the first node N1, the second node N2 and the to-be-managed signal terminal V respectively, and is configured to control the electrical connection between the first node N1 and the second node N2 to be conducted or disconnected under the control of the potential of the to-be-managed signal terminal V.

[0082] The second node control sub-circuit 30 is coupled with the second node N2, the to-be-managed signal terminal V and the ground signal input terminal respectively, and is configured to control the electrical connection between the second node N2 and the to-be-managed signal terminal V to be conducted or disconnected under the control of the potential of the to-be-managed signal terminal V.

[0083] For example, when the voltage management circuit is applied to a display module, the to-be-managed signal terminal V is coupled with a voltage signal input terminal Vin included in a driving circuit of the display module. The voltage signal input terminal Vin included in the driving circuit is configured to receive a required operating voltage.

[0084] For example, when the display module is used in cooperation with a lighting device, the voltage signal input terminal Vin included in the driving circuit is coupled with a voltage output terminal Vout of an external direct supply voltage source in the lighting device, and is configured to receive an operating voltage output by the voltage output terminal Vout of the external direct supply voltage source. The to-be-managed signal terminal V coupled with the voltage management circuit can be coupled with the voltage output terminal Vout of the external direct supply voltage source. It is worth noting that the types of the external direct supply voltage source in the lighting device are not limited to the capacitor output voltage type and the power supply output circuit with parasitic capacitance type, and the external direct supply voltage of the lighting device is not limited, and can be flexibly increased or reduced, and the scheme structure can be matched with the external direct supply voltage management circuit.

[0085] For example, the ground signal input terminal is configured to input a ground signal, and the voltage value of the ground signal is 0V.

[0086] The specific driving method of the voltage management circuit includes:

[0087] In the normal output stage, i.e. the voltage output terminal Vout of the external direct voltage source in the lighting device provides the working voltage for the Driver IC, the voltage management circuit is coupled to the signal terminal V in the stage of the Driver IC powered by the working voltage, and the potential of the signal terminal V is the same as the working voltage. In this stage, the second node control sub-circuit 30 controls the electrical connection between the second node N2 and the signal terminal V to be turned on under the control of the potential of the signal terminal V, the first node control sub-circuit 20 controls the electrical connection between the first node N1 and the second node N2 to be turned off under the control of the potential of the signal terminal V, and the output control sub-circuit 10 controls the electrical connection between the signal terminal V and the ground signal input terminal to be turned off under the control of the potential of the first node N1, so as to keep the potential of the signal terminal V in the current state and meet the normal working requirement.

[0088] In the discharge stage, i.e. the external direct voltage source in the lighting device is powered off, the Driver IC is powered off, in this stage, the second node control sub-circuit 30 controls the electrical connection between the second node N2 and the signal terminal V to be turned off under the control of the potential of the signal terminal V, the first node control sub-circuit 20 controls the electrical connection between the first node N1 and the second node N2 to be turned on under the control of the potential of the signal terminal V, and the output control sub-circuit 10 controls the electrical connection between the signal terminal V and the ground signal input terminal to be turned on under the control of the potential of the first node N1, so as to discharge the signal terminal V.

[0089] As shown in FIG. 9, the signal waveform diagram of the signal terminal V in the case of connecting the voltage management circuit and not connecting the voltage management circuit when the external direct voltage source in the lighting device is powered off is shown. The solid line in FIG. 9 represents the signal waveform diagram of the signal terminal V when the external direct voltage source in the lighting device is powered off without connecting the voltage management circuit, and it can be seen that the signal is in an abnormal state. The dotted line in FIG. 9 represents the signal waveform diagram of the signal terminal V after discharging when the external direct voltage source in the lighting device is powered off with the voltage management circuit connected, and it can be seen that the signal has the same potential as the ground signal.

[0090] According to the specific structure of the voltage management circuit, the voltage management circuit provided by the embodiment of the present disclosure can control the electrical connection between the second node N2 and the to-be-managed signal end V to be turned on, control the electrical connection between the first node N1 and the second node N2 to be turned off, and control the electrical connection between the to-be-managed signal end V and the ground signal input end to be turned off, thereby keeping the potential of the to-be-managed signal end V in the current state and meeting the normal working requirement.

[0091] In the voltage management circuit provided by the embodiment of the present disclosure, the electrical connection between the second node N2 and the to-be-managed signal end V can be controlled to be turned on, the electrical connection between the first node N1 and the second node N2 can be controlled to be turned off, and the electrical connection between the to-be-managed signal end V and the ground signal input end can be controlled to be turned off in the normal output stage, thereby keeping the potential of the to-be-managed signal end V in the current state and meeting the normal working requirement; in the discharging stage, the electrical connection between the second node N2 and the to-be-managed signal end V can be controlled to be turned off, the electrical connection between the first node N1 and the second node N2 can be controlled to be turned on, and the electrical connection between the to-be-managed signal end V and the ground signal input end can be controlled to be turned on, thereby achieving rapid discharging of the to-be-managed signal end V and controlling the potential of the to-be-managed signal end V to be stable ground potential.

[0092] Therefore, in the voltage management circuit provided by the embodiment of the present disclosure, whether the to-be-managed signal end V is in the floating state can be automatically identified, when the to-be-managed signal end V is not in the floating state, the normal output stage is entered, and when the to-be-managed signal end V is in the floating state, the discharging stage is automatically entered, thereby achieving rapid discharging. The voltage management circuit provided by the embodiment of the present disclosure can automatically manage the power-off state of the to-be-managed signal end V, thereby solving the problem that the voltage signal received by the driving integrated circuit in the display module is abnormal, which easily leads to uncontrolled power-on logic and voltage of the driving integrated circuit and further causes display abnormality of the display module, resulting in production and verification loss and other problems.

[0093] The voltage management circuit provided by the embodiment of the present disclosure can achieve power-on and power-off according to the timing voltage requirement of the Driver IC when the display module is powered on and powered off in different lighting devices and modes, thereby ensuring that the optimal power-on and power-off mode can be obtained under different Driver IC external direct supply voltage source schemes and different lighting device conditions, and the display effect of the display module is improved.

[0094] In addition, the voltage management circuit provided by the embodiment of the present disclosure does not need to introduce an additional control signal, and the overall power consumption is controllable.

[0095] As shown in FIG. 2, in some embodiments, the second node control sub-circuit 30 comprises:

[0096] a voltage division module 301, coupled with the signal end V to be managed, the ground signal input end and a third node N3 respectively, for controlling the potential of the third node N3;

[0097] a storage module 302, a first end of the storage module 302 being coupled with the second node N2, and a second end of the storage module 302 being coupled with the ground signal input end;

[0098] a unidirectional conduction module 303, a first end of the unidirectional conduction module 303 being coupled with the third node N3, and a second end of the unidirectional conduction module 303 being coupled with the second node N2.

[0099] As shown in FIG. 4 and FIG. 8, the voltage division module 301 comprises a first resistor R1 and a second resistor R2, for example. A first end of the first resistor R1 is coupled with the signal end V to be managed, and a second end of the first resistor R1 is coupled with the third node N3. A first end of the second resistor R2 is coupled with the third node N3, and a second end of the second resistor R2 is coupled with the ground signal input end. For example, the resistance value of the first resistor R1 is between 1.5KΩ and 2.5KΩ, and can be specifically 1.5KΩ, 1.7KΩ, 1.9KΩ, 2.0KΩ, 2.2KΩ, 2.4KΩ, 2.5KΩ, etc., but is not limited thereto. For example, the resistance value of the second resistor R2 is between 30KΩ and 36KΩ, and can be specifically 30KΩ, 31KΩ, 32KΩ, 33KΩ, 34KΩ, 35KΩ, 36KΩ, etc., but is not limited thereto.

[0100] As shown in FIG. 4 and FIG. 8, the storage module 302 comprises a storage capacitor C1, for example. A first end of the storage capacitor C1 is coupled with the second node N2, and a second end of the storage capacitor C1 is coupled with the ground signal input end. For example, the capacitance value of the storage capacitor C1 is between 80μF and 120μF, and can be specifically 80μF, 90μF, 100μF, 110μF, 120μF, etc.

[0101] As shown in FIG. 4 and FIG. 8, the unidirectional conduction module 303 comprises a diode D, for example. A first pole of the diode D is coupled with the third node N3, and a second pole of the diode D is coupled with the second node N2.

[0102] The second node control sub-circuit 30 includes a voltage division module 301, a storage module 302, and a unidirectional conduction module 303, so that the voltage division module 301 can control the potential of the third node N3, the unidirectional conduction module 303 can be turned on or off according to the potential of the third node N3, thereby realizing the control of the potential of the second node N2; the storage module 302 can store the electrical signal written to the third node N3 through the unidirectional conduction module 303, and maintain the potential of the third node N3.

[0103] As shown in FIG. 4 and FIG. 8, in some embodiments, the first node control sub-circuit 20 includes a first transistor T1, a gate of the first transistor T1 is coupled with the signal end V to be managed, a first electrode of the first transistor T1 is coupled with the second node N2, and a second electrode of the first transistor T1 is coupled with the first node N1.

[0104] In some embodiments, the output control sub-circuit 10 includes a second transistor T2, a gate of the second transistor T2 is coupled with the first node N1, a first electrode of the second transistor T2 is coupled with the signal end V to be managed, and a second electrode of the second transistor T2 is coupled with the ground signal input end.

[0105] For example, in the first electrode and the second electrode of each transistor, one is a source electrode and the other is a drain electrode.

[0106] As shown in FIG. 3, in some embodiments, the voltage management circuit further includes:

[0107] a load sub-circuit 40, the first node control sub-circuit 20 is coupled with the signal end V to be managed through the load sub-circuit 40; and / or,

[0108] a first discharge sub-circuit 50, a first end of the first discharge sub-circuit 50 is coupled with the first node N1, and a second end of the first discharge sub-circuit 50 is coupled with the ground signal input end; and / or,

[0109] a second discharge sub-circuit 60, the output control sub-circuit 10 is coupled with the signal end V to be managed through the second discharge sub-circuit 60.

[0110] As shown in FIG. 4 and FIG. 8, for example, the load sub-circuit 40 includes a third resistor R3, a first end of the third resistor R3 is coupled with the signal end V to be managed, and a second end of the third resistor R3 is coupled with the first node control sub-circuit 20. For example, the resistance value of the third resistor R3 is between 30KΩ and 36KΩ, which can be specifically 30KΩ, 31KΩ, 32KΩ, 33KΩ, 34KΩ, 35KΩ, 36KΩ, etc., but is not limited thereto.

[0111] As shown in FIG. 4 and FIG. 8, the first discharging circuit 50 includes a fourth resistor R4, a first end of the fourth resistor R4 is coupled with the first node N1, and a second end of the fourth resistor R4 is coupled with the ground signal input end. For example, the fourth resistor R4 has a resistance value between 18KΩ and 22KΩ, and can be specifically 18KΩ, 19KΩ, 20KΩ, 21KΩ, 22KΩ, etc., but is not limited thereto.

[0112] As shown in FIG. 4 and FIG. 8, the second discharging circuit 60 includes a fifth resistor R5, a first end of the fifth resistor R5 is coupled with the to-be-managed signal end V, and a second end of the fifth resistor R5 is coupled with the output control sub-circuit 10. For example, the fifth resistor R5 has a resistance value between 18KΩ and 22KΩ, and can be specifically 18KΩ, 19KΩ, 20KΩ, 21KΩ, 22KΩ, etc., but is not limited thereto.

[0113] The voltage management circuit further includes a load sub-circuit 40, a first discharging circuit 50, and / or a second discharging circuit 60. The load sub-circuit 40 and the second discharging circuit 60 function to limit current, and the first discharging circuit 50 can limit the discharging speed of the N1 node to avoid too fast discharging of the N1 node.

[0114] As shown in FIG. 4 to FIG. 7 and FIG. 12, in some embodiments, the to-be-managed signal end V includes a to-be-managed negative voltage signal end V1, the first transistor T1 includes an N-type transistor, the second transistor T2 includes a P-type transistor, a first pole of the diode D includes a cathode, and a second pole of the diode D includes an anode.

[0115] The specific working process of the voltage management circuit is as follows:

[0116] In the normal output stage, i.e. the voltage of the negative voltage signal terminal V1 is the same as the working voltage of the Driver IC, as shown in FIG. 5, taking the voltage of the negative voltage signal terminal V1 as-10V for example, in this stage, the voltage of the negative voltage signal terminal V1 is written into the first end of the storage capacitor C1 through the first resistor R1 and the diode D, and the voltage of the first electrode (e.g. source electrode) of the first transistor T1 is less than the voltage of the gate of the first transistor T1 written through the third resistor R3 due to the voltage drop of the first resistor R1 and the diode D, the gate voltage of the first transistor T1 is about-10V, the gate-source voltage Vgs of the first transistor T1 is less than 0, at this time, the first transistor T1 is in the closed state, the voltage of the first node N1 is about equal to the voltage of the ground signal due to the fourth resistor R4, the voltage of the first electrode (e.g. source electrode) of the second transistor T2 is-10V, the gate-source voltage Vgs of the second transistor T2 is greater than 0, at this time, the second transistor T2 is in the closed state, which ensures that the voltage of the negative voltage signal terminal V1 is the same as the working voltage of the Driver IC, and ensures that the Driver IC is normally powered on.

[0117] In the discharging stage, as shown in FIG. 6, the negative voltage signal terminal V1 is in the suspended state, and the absolute value of the voltage of the negative voltage signal terminal V1 gradually decreases (illustrated as-5V), the voltage of the negative voltage signal terminal V1 cannot pass through the diode D due to the action of the diode D, the voltage of the first electrode (e.g. source electrode) of the first transistor T1 remains unchanged, the voltage of the negative voltage signal terminal V1 is written into the gate of the first transistor T1 through the third resistor R3, the gate voltage of the first transistor T1 is greater than the voltage of the first electrode of the first transistor T1, at this time, the gate-source voltage Vgs of the first transistor T1 is greater than Vth and is greater than 0, the Vth is the threshold voltage of the first transistor T1, at this time, the first transistor T1 is in the open state, which ensures that the suspended state of the negative voltage signal terminal V1 is accurately identified. The voltage of the first node N1 is about equal to the voltage of the first electrode of the first transistor T1, the storage capacitor C1 continuously discharges to maintain the voltage of the first node N1, the voltage of the first node N1 is less than the voltage of the first electrode (e.g. source electrode) of the second transistor T2, the absolute value of the gate-source voltage Vgs of the second transistor T2 is greater than the absolute value of the threshold voltage Vth of the second transistor T2, at this time, the second transistor T2 is in the open state, which ensures that the abnormal voltage value of the suspended negative voltage signal terminal V1 is quickly discharged through the fifth resistor R5.

[0118] After the discharging stage ends, as shown in FIG. 7, the gate voltage and the source voltage of the first transistor T1 and the second transistor T2 are both about equal to the voltage of the ground signal, and the gate-source voltage of the two transistors does not satisfy the opening threshold value, so the first transistor T1 and the second transistor T2 are both closed.

[0119] It should be noted that the voltage values of the nodes obtained in the current state by the voltage source test in FIGS. 5-7 are only the voltage values obtained at the time of testing, which can change over time. For example, as shown in FIG. 5, the first node N1 is continuously discharged through the fourth resistor R4, and the final potential can be approximately equal to the potential of the ground signal.

[0120] As shown in FIGS. 8 and 13, in some embodiments, the to-be-managed signal terminal V includes a to-be-managed positive voltage signal terminal V2, the first transistor T1 includes a P-type transistor, the second transistor T2 includes an N-type transistor, the first electrode of the diode D includes an anode, and the second electrode of the diode D includes a cathode.

[0121] In the normal output stage, that is, the voltage of the to-be-managed positive voltage signal terminal V2 is the same as the working voltage of the Driver IC, in this stage, the first transistor T1 and the second transistor T2 are both in the closed state, which ensures that the voltage of the to-be-managed positive voltage signal terminal V2 is the same as the working voltage of the Driver IC, and guarantees that the Driver IC is normally powered on.

[0122] In the discharging stage, the to-be-managed positive voltage signal terminal V2 is in a suspended state, at this time, the first transistor T1 is in the open state, and the second transistor T2 is in the open state, which ensures that the abnormal voltage value of the to-be-managed positive voltage signal terminal V2 in the suspended state is quickly discharged through the fifth resistor R5.

[0123] After the discharging stage ends, the first transistor T1 and the second transistor T2 are both closed.

[0124] As shown in FIG. 10, the embodiment of the present disclosure further provides a display module, which includes the voltage management circuit provided by the above-mentioned embodiments; and further includes a driving circuit, the driving circuit includes a voltage signal input terminal Vin, and the voltage signal input terminal Vin is coupled with the to-be-managed signal terminal V of the voltage management circuit.

[0125] For example, the display module includes a display panel and a flexible circuit board MFPC, the flexible circuit board MFPC is bound to a non-display area of the display panel; the driving circuit is located in the non-display area of the display panel, and the voltage management circuit is located on the flexible circuit board MFPC.

[0126] As shown in FIGS. 4 and 8, for example, the first transistor and the second transistor include field effect transistors, but are not limited thereto.

[0127] As shown in FIG. 10, the display area AA of the display panel and the shift register GOA located in the non-display area are shown.

[0128] It should be noted that the display module is applied to a display device, and the display device can be any product or component with a display function, such as a television, a display, a digital photo frame, a mobile phone, a tablet computer, and the like. The display device further includes a flexible circuit board MFPC, a printed circuit board, a back plate, and the like.

[0129] The voltage management circuit provided in the above embodiment can automatically identify whether the to-be-managed signal end V is in a floating state, enter the normal output stage when the to-be-managed signal end V is not in the floating state, and enter the discharging stage when the to-be-managed signal end V is in the floating state. The voltage management circuit provided in the above embodiment can automatically manage the power-off state of the to-be-managed signal end V, thereby solving the problem that the voltage signal received by the driving integrated circuit in the display module is abnormal and easily leads to uncontrolled power-on logic and voltage of the driving integrated circuit. Therefore, the display module provided in the embodiment of the present disclosure can ensure the display quality of the display module and avoid display abnormalities when the display module includes the above voltage management circuit.

[0130] The voltage management circuit is arranged in the display module, is not limited by a lighting device, can avoid power-on and power-off abnormalities in any lighting environment, and can flexibly manage the external direct voltage source scheme of the Driver IC, so that the external device does not need to be changed when the external direct voltage source scheme is changed, and only the working state of the voltage management circuit in the display module needs to be changed.

[0131] As shown in FIG. 11, in some embodiments, the display module includes a display panel and a flexible circuit board MFPC, the flexible circuit board MFPC is bound to a non-display area of the display panel, and the driving circuit (for example, a Driver IC) and the voltage management circuit are located in the non-display area of the display panel.

[0132] As shown in FIGS. 12 and 13, the first transistor and the second transistor include thin film transistors, but are not limited thereto.

[0133] As shown in FIG. 11, the flexible circuit board includes a first pin 76 and a second pin 75, the non-display area of the display panel includes a third pin (not shown in the figure, located directly below the first pin 76) and a fourth pin (not shown in the figure, located directly below the second pin 75), the first pin 76 is coupled with the third pin, and the second pin 75 is coupled with the fourth pin; the first pin 76 is coupled with the voltage output end Vout of the external direct voltage source, and the second pin 75 is coupled with the ground signal input end; the voltage management circuit coupled with the to-be-managed signal end V is coupled with the third pin, and the output control sub-circuit and the second node control sub-circuit in the voltage management circuit are coupled with the fourth pin.

[0134] The ground signal input end is coupled with the power supply boosting circuit, and the ground signal is provided by the power supply boosting circuit, but is not limited thereto. For example, the ground signal input end can also be coupled with the Driver IC, and the ground signal is provided by the Driver IC; the ground signal input end can also be provided with the ground signal by the circuit structure in the flexible circuit board MFPC.

[0135] The power supply boosting circuit can be an external direct voltage source located in the lighting device, or can be part of the display module, for example, the power supply boosting circuit is integrated in the Driver IC, but is not limited thereto.

[0136] The non-display area includes a peripheral area 71, a bending area 73 and a binding area 74; the peripheral area 71 is closest to the display area AA of the display panel, the bending area 73 is located between the peripheral area 71 and the binding area 74; the driving circuit Driver IC, the third pin and the fourth pin are located in the binding area 74; and the voltage management circuit is located in the peripheral area 71. It should be noted that the upper boundary of the binding area 74 in FIG. 11 is located directly below the flexible circuit board MPFC, that is, it is covered by the flexible circuit board MPFC, and the third pin and the fourth pin are both covered by the flexible circuit board MPFC.

[0137] The voltage management circuit provided in the above embodiment can automatically identify whether the to-be-managed signal end V is in a suspended state, enter the normal output stage when it is not in the suspended state, and enter the discharging stage when it is in the suspended state. The voltage management circuit provided in the above embodiment can automatically manage the power-off state of the to-be-managed signal end V, thereby solving the problem that the voltage signal received by the driving circuit in the display module is abnormal, which easily leads to uncontrollable power-on logic and voltage of the driving circuit. Therefore, when the display module provided in the embodiment of the present disclosure includes the above voltage management circuit, the display quality of the display module can be ensured, and display abnormalities can be avoided.

[0138] Further, the voltage management circuit is arranged in the display module, which is not limited by the lighting device, and can avoid power-on and power-off abnormalities in any lighting environment. Further, the voltage management circuit is arranged in the display module, which can flexibly manage the external direct voltage source scheme of the Driver IC, so that when the external direct voltage source scheme changes, the external device does not need to be changed, and only the working state of the voltage management circuit in the display module needs to be changed.

[0139] In addition, the voltage management circuit is arranged in the non-display area of the display panel, that is, the voltage management circuit is integrated on the driving backboard of the display panel. Not only the management of the external direct voltage source is realized, but also the layout space occupied by the voltage management circuit is small, the cost is low, the flexible integration is realized, and the management of the multiple external direct voltage of the Driver IC is realized.

[0140] As shown in FIG. 14, in some embodiments, the resistance R (such as R1, R2, R3, R4, R5) in the voltage management circuit includes a resistance active layer 81, a first conductive pattern 82 and a second conductive pattern 83; the first conductive pattern 82 is coupled with a first end of the resistance active layer 81, and the second conductive pattern 83 is coupled with a second end of the resistance active layer 81.

[0141] For example, the resistance of the resistance can be adjusted by changing the size of the resistance active layer 81, such as changing the length, width, thickness, etc. of the resistance active layer 81.

[0142] For example, the display panel includes a first active layer Poly, a first gate insulating layer GI1, a first gate metal layer Gate1, a second gate insulating layer GI2, a second active layer IGZO, a third gate insulating layer GI3, a third gate metal layer Gate3, an interlayer insulating layer ILD and a first source-drain metal layer SD which are sequentially stacked in a direction away from the substrate. The resistance active layer 81 is arranged in the same layer and material as the first active layer Poly or the second active layer IGZO. The first conductive pattern 82 and the second conductive pattern 83 are arranged in the same layer and material as the first source-drain metal layer SD. The planarization layer PLN is also shown in FIG. 4.

[0143] The above arrangement enables the manufacturing process of the resistance R to be compatible with the manufacturing process of the driving backboard in the display panel, and the resistance R is formed at the same time as the backboard, without increasing additional equipment and cost.

[0144] It should be noted that the driving backboard includes an array substrate in the display panel, which includes an array of sub-pixel driving circuit structures, but is not limited thereto.

[0145] As shown in FIG. 15, in some embodiments, the diode D in the voltage management circuit includes a diode active layer 84, a diode anode pattern 85 and a diode cathode pattern 86; the diode anode pattern 85 is coupled with a first end of the diode active layer 84, and the diode cathode pattern 86 is coupled with a second end of the diode active layer 84; the diode active layer 84 forms a PN junction of the diode.

[0146] For example, the PN junction can realize the one-way conduction characteristic of the diode by changing the doping amount of the two ends, for example, setting a higher doping amount on one end and a lower doping amount on the other end, and the doping ions can be the same or different, and can be doped by an independent mask, but are not limited thereto.

[0147] For example, the first gate metal layer Gate1 can also be selected as a mask for lightly doping one end of the PN junction, that is, the first gate metal layer Gate1 covers the other end of the PN junction in the mask design. It should be noted that the first gate metal layer Gate1 as a mask is an independent mask pattern, and the gate signal needs to be disconnected. This design is compatible with the existing process, saves costs, and realizes the one-way conduction characteristic of the diode by changing the doping amount of the two ends.

[0148] For example, the display panel includes a first active layer Poly, a first gate insulating layer GI1, a first gate metal layer Gate1, a second gate insulating layer GI2, a second active layer IGZO, a third gate insulating layer GI3, a third gate metal layer Gate3, an interlayer insulating layer ILD and a first source-drain metal layer SD which are sequentially stacked in a direction away from the substrate. The diode active layer 84 is provided in the same layer and the same material as the first active layer Poly or the second active layer IGZO. The diode anode pattern 85 and the diode cathode pattern 86 are provided in the same layer and the same material as the first source-drain metal layer SD.

[0149] The above setting mode enables the manufacturing process of the diode D to be compatible with the manufacturing process of the driving backplane in the display panel, and the diode D is formed at the same time as the backplane is manufactured, without increasing additional equipment and costs.

[0150] As shown in FIG. 16, in some embodiments, the display panel includes, in a direction away from the substrate base, a first active layer Poly, a first gate insulating layer GI1, a first gate metal layer Gate1, a second gate insulating layer GI2, a second active layer IGZO, a third gate insulating layer GI3, a third gate metal layer Gate3, an interlayer insulating layer ILD, and a first source-drain metal layer SD, which are sequentially stacked; the P-type transistor PTFT in the voltage management circuit includes a P-type active layer 87, a first gate layer 80, a first source 88, and a first drain 89; the P-type active layer 87 is of the same layer and material as the first active layer Poly; the first gate layer 80 is of the same layer and material as the first gate metal layer Gate1; the first source 88 and the first drain 89 are of the same layer and material as the first source-drain metal layer SD.

[0151] The above arrangement enables the manufacturing process of the P-type transistor PTFT to be compatible with the manufacturing process of the driving backplane in the display panel, and the P-type transistor PTFT is formed at the same time as the backplane, without increasing additional equipment and costs.

[0152] As shown in FIG. 17, in some embodiments, the display panel includes, in a direction away from the substrate base, a first active layer Poly, a first gate insulating layer GI1, a first gate metal layer Gate1, a second gate insulating layer GI2, a second active layer IGZO, a third gate insulating layer GI3, a third gate metal layer Gate3, an interlayer insulating layer ILD, and a first source-drain metal layer SD, which are sequentially stacked; the N-type transistor NTFT in the voltage management circuit includes an N-type active layer 92, a second gate layer 91, a second source 93, and a second drain 94; the N-type active layer 92 is of the same layer and material as the second active layer IGZO; the second gate layer 91 is of the same layer and material as the third gate metal layer Gate3; the second source 93 and the second drain 94 are of the same layer and material as the first source-drain metal layer SD. It should be noted that a buffer layer BUF is also shown in FIG. 17.

[0153] The above arrangement enables the manufacturing process of the N-type transistor NTFT to be compatible with the manufacturing process of the driving backplane in the display panel, and the N-type transistor NTFT is formed at the same time as the backplane, without increasing additional equipment and costs.

[0154] The present disclosure also provides a driving method of a voltage management circuit, for driving the voltage management circuit provided in the above embodiments; the driving method includes:

[0155] In the normal output stage, the output control sub-circuit 10 controls to disconnect the electrical connection between the to-be-managed signal end V and the ground signal input end under the control of the potential of the first node N1; the first node control sub-circuit 20 controls to disconnect the electrical connection between the first node N1 and the second node N2 under the control of the potential of the to-be-managed signal end V; and the second node control sub-circuit 30 controls to connect the electrical connection between the second node N2 and the to-be-managed signal end V under the control of the potential of the to-be-managed signal end V.

[0156] In the discharging stage, the output control sub-circuit 10 controls to connect the electrical connection between the to-be-managed signal end V and the ground signal input end under the control of the potential of the first node N1; the first node control sub-circuit 20 controls to connect the electrical connection between the first node N1 and the second node N2 under the control of the potential of the to-be-managed signal end V; and the second node control sub-circuit 30 controls to disconnect the electrical connection between the second node N2 and the to-be-managed signal end V under the control of the potential of the to-be-managed signal end V.

[0157] When the driving method provided by the embodiment of the present disclosure is used to drive the voltage management circuit, the electrical connection between the second node N2 and the to-be-managed signal end V can be controlled to be connected, the electrical connection between the first node N1 and the second node N2 can be controlled to be connected, and the electrical connection between the to-be-managed signal end V and the ground signal input end can be controlled to be disconnected in the normal output stage according to the potential state of the to-be-managed signal end V, so as to keep the potential of the to-be-managed signal end V in the current state and meet the normal working requirement; the electrical connection between the second node N2 and the to-be-managed signal end V can be controlled to be disconnected, the electrical connection between the first node N1 and the second node N2 can be controlled to be connected, and the electrical connection between the to-be-managed signal end V and the ground signal input end can be controlled to be connected in the discharging stage, so as to realize the rapid discharging of the to-be-managed signal end V and control the potential of the to-be-managed signal end V to be stable at the ground potential.

[0158] Therefore, when the driving method provided by the embodiment of the present disclosure is used to drive the voltage management circuit, the to-be-managed signal end V can be automatically identified as being in the floating state or not, the normal output stage is entered when the to-be-managed signal end V is not in the floating state, and the discharging stage is entered when the to-be-managed signal end V is in the floating state. When the driving method provided by the embodiment of the present disclosure is used to drive the voltage management circuit, the to-be-managed signal end V can be automatically managed in the power-off state, so as to solve the problem that the voltage signal received by the driving integrated circuit in the display module is abnormal, which easily leads to the uncontrolled power-on logic and voltage of the driving integrated circuit and further causes the display abnormality of the display module, resulting in production and verification loss and other problems.

[0159] In some embodiments, the driving method further comprises:

[0160] After the end of the discharging phase, the output control sub-circuit 10 controls to disconnect the electrical connection between the signal to be managed V and the ground signal input terminal under the control of the potential of the first node N1; the first node control sub-circuit 20 controls to disconnect the electrical connection between the first node N1 and the second node N2 under the control of the potential of the signal to be managed V.

[0161] In some embodiments, the second node control sub-circuit 30 comprises a voltage division module 301, a storage module 302 and a unidirectional conduction module 303, the voltage division module 301 is coupled with the signal to be managed V, the ground signal input terminal and the third node N3 respectively, for controlling the potential of the third node N3; the first end of the storage module 302 is coupled with the second node N2, and the second end of the storage module 302 is coupled with the ground signal input terminal; the first end of the unidirectional conduction module 303 is coupled with the third node N3, and the second end of the unidirectional conduction module 303 is coupled with the second node N2;

[0162] In the normal output phase, the unidirectional conduction module 303 turns on the electrical connection between the third node N3 and the second node N2 under the control of the potential of the third node N3;

[0163] In the discharging phase, the unidirectional conduction module 303 disconnects the electrical connection between the third node N3 and the second node N2 under the control of the potential of the third node N3.

[0164] In some embodiments, the first node control sub-circuit 20 comprises a first transistor T1, the gate of the first transistor T1 is coupled with the signal to be managed V, the first pole of the first transistor T1 is coupled with the second node N2, and the second pole of the first transistor T1 is coupled with the first node N1; the output control sub-circuit 10 comprises a second transistor T2, the gate of the second transistor T2 is coupled with the first node N1, the first pole of the second transistor T2 is coupled with the signal to be managed V, and the second pole of the second transistor T2 is coupled with the ground signal input terminal;

[0165] In the normal output phase, the second transistor T2 is turned off under the control of the potential of the first node N1; the first transistor T1 is turned off under the control of the potential of the signal to be managed V;

[0166] In the discharging phase, the second transistor T2 is turned on under the control of the potential of the first node N1; the first transistor T1 is turned on under the control of the potential of the signal to be managed V;

[0167] After the end of the discharging phase, the second transistor T2 is closed under the control of the potential of the first node N1, and the first transistor T1 is closed under the control of the potential of the signal end V to be managed.

[0168] In the method embodiments of the present disclosure, the serial numbers of the steps do not serve to limit the sequence of the steps, and for those skilled in the art, the sequence of the steps can be changed without creative effort, which is within the protection scope of the present disclosure.

[0169] It should be noted that each of the embodiments in the present specification is described in a progressive manner, and the same or similar parts between the embodiments can be mutually referred to, and each of the embodiments mainly describes the differences from other embodiments. In particular, for the method embodiments, since they are basically similar to the product embodiments, the description is relatively simple, and the relevant parts can be referred to the part of the description of the product embodiments.

[0170] Unless otherwise defined, technical terms or scientific terms used in the present disclosure should be understood as having the same meaning as commonly understood by one of ordinary skill in the art to which the present disclosure belongs. The terms "first", "second", and similar terms used in the present disclosure do not denote any order, quantity, or importance, but are used to distinguish different components. The terms "include", "contain", and similar terms mean that the elements or objects before the terms encompass the elements or objects listed after the terms and their equivalents, and do not exclude other elements or objects. The terms "connect", "couple", or "link" and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms "upper", "lower", "left", "right", and the like are used only to represent relative positional relationships, and when the absolute positions of the described objects are changed, the relative positional relationships can also be changed accordingly.

[0171] It can be understood that when an element such as a layer, a film, a region, or a substrate is referred to as being "on" or "under" another element, it can be "directly" on or under the other element, or an intermediate element can be present.

[0172] In the description of the above-described embodiments, specific features, structures, materials, or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0173] The above description is merely specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present disclosure, which should be covered by the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.

Claims

1. A voltage management circuit, comprising: an output control sub-circuit coupled to a first node, a signal to be managed, and a ground signal input, respectively; a first node control sub-circuit coupled to the first node, a second node, and the signal to be managed, respectively; and a second node control sub-circuit coupled to the second node, the signal to be managed, and the ground signal input, respectively. The second node control sub-circuit comprises:

2. The voltage management circuit of claim 1, wherein, a voltage dividing module coupled to the signal to be managed, the ground signal input, and a third node, respectively; and a storage module having a first end coupled to the second node and a second end coupled to the ground signal input. The voltage dividing module comprises a first resistor having a first end coupled to the signal to be managed and a second end coupled to the third node, and a second resistor having a first end coupled to the third node and a second end coupled to the ground signal input. The storage module comprises a storage capacitor having a first end coupled to the second node and a second end coupled to the ground signal input. The second node control sub-circuit further comprises a unidirectional conduction module having a first end coupled to the third node and a second end coupled to the second node. The first node control sub-circuit comprises a first transistor having a gate coupled to the signal to be managed, a first pole coupled to the second node, and a second pole coupled to the first node. The output control sub-circuit comprises a second transistor having a gate coupled to the first node, a first pole coupled to the signal to be managed, and a second pole coupled to the ground signal input. The signal to be managed comprises a negative voltage signal to be managed, the first transistor comprises an N-type transistor, the second transistor comprises a P-type transistor, the unidirectional conduction module comprises a diode having a first pole comprising a cathode and a second pole comprising an anode.

4. The voltage management circuit of claim 3, wherein, The signal to be managed comprises a positive voltage signal to be managed, the first transistor comprises a P-type transistor, the second transistor comprises an N-type transistor, the unidirectional conduction module comprises a diode having a first pole comprising an anode and a second pole comprising a cathode.

5. The voltage management circuit of claim 4, wherein, The voltage management circuit further comprises:

6. The voltage management circuit of claim 5, wherein, a first node control sub-circuit coupled to the first node, a second node, and the signal to be managed, respectively; and 7. The voltage management circuit of claim 5, wherein, a second node control sub-circuit coupled to the second node, the signal to be managed, and the ground signal input, respectively.

8. The voltage management circuit of any one of claims 1-7, wherein, The second node control sub-circuit comprises: a voltage dividing module coupled to the signal to be managed, the ground signal input, and a third node, respectively; and a storage module having a first end coupled to the second node and a second end coupled to the ground signal input. The voltage dividing module comprises a first resistor having a first end coupled to the signal to be managed and a second end coupled to the third node, and a second resistor having a first end coupled to the third node and a second end coupled to the ground signal input. The storage module comprises a storage capacitor having a first end coupled to the second node and a second end coupled to the ground signal input. The second node control sub-circuit further comprises a unidirectional conduction module having a first end coupled to the third node and a second end coupled to the second node. The first node control sub-circuit comprises a first transistor having a gate coupled to the signal to be managed, a first pole coupled to the second node, and a second pole coupled to the first node. The output control sub-circuit comprises a second transistor having a gate coupled to the first node, a first pole coupled to the signal to be managed, and a second pole coupled to the ground signal input. The signal to be managed comprises a negative voltage signal to be managed, the first transistor comprises an N-type transistor, the second transistor comprises a P-type transistor, the unidirectional conduction module comprises a diode having a first pole comprising a cathode and a second pole comprising an anode. The signal to be managed comprises a positive voltage signal to be managed, the first transistor comprises a P-type transistor, the second transistor comprises an N-type transistor, the unidirectional conduction module comprises a diode having a first pole comprising an anode and a second pole comprising a cathode. a load sub-circuit, the first node control sub-circuit being coupled to the signal terminal to be managed through the load sub-circuit; and / or, a first discharge sub-circuit, a first end of the first discharge sub-circuit being coupled to the first node, and a second end of the first discharge sub-circuit being coupled to the ground signal input terminal; and / or, a second discharge sub-circuit, the output control sub-circuit being coupled to the signal terminal to be managed through the second discharge sub-circuit.

9. The voltage management circuit according to claim 8, wherein the load sub-circuit comprises a third resistor, a first end of the third resistor being coupled to the signal terminal to be managed, and a second end of the third resistor being coupled to the first node control sub-circuit; the first discharge sub-circuit comprises a fourth resistor, a first end of the fourth resistor being coupled to the first node, and a second end of the fourth resistor being coupled to the ground signal input terminal; the second discharge sub-circuit comprises a fifth resistor, a first end of the fifth resistor being coupled to the signal terminal to be managed, and a second end of the fifth resistor being coupled to the output control sub-circuit.

10. A display module comprising the voltage management circuit according to any one of claims 1 to 9; and further comprising a driving circuit, the driving circuit comprising a voltage signal input terminal, the voltage signal input terminal being coupled to the signal terminal to be managed of the voltage management circuit.

11. The display module of claim 10, wherein, the display module comprises a display panel and a flexible circuit board, the flexible circuit board being bound to a non-display region of the display panel; the driving circuit is located in the non-display region of the display panel, and the voltage management circuit is located on the flexible circuit board.

12. The display module of claim 10, wherein, the display module comprises a display panel and a flexible circuit board, the flexible circuit board being bound to a non-display region of the display panel; the driving circuit and the voltage management circuit are both located in the non-display region of the display panel.

13. The display module of claim 12, wherein, the flexible circuit board comprises a first pin and a second pin, the non-display region of the display panel comprises a third pin and a fourth pin, the first pin is coupled to the third pin, and the second pin is coupled to the fourth pin; the first pin is coupled to a voltage output terminal of an external direct voltage source, and the second pin is coupled to a ground signal input terminal; the signal terminal to be managed of the voltage management circuit is coupled to the third pin, and the output control sub-circuit and the second node control sub-circuit in the voltage management circuit are coupled to the fourth pin.

14. The display module of claim 13, wherein, the non-display region comprises a peripheral region, a bending region and a binding region; the peripheral region is closest to a display region of the display panel, and the bending region is located between the peripheral region and the binding region; the driving circuit, the third pin and the fourth pin are located in the binding region, and the voltage management circuit is located in the peripheral region.

15. The display module of claim 12, wherein, the resistor in the voltage management circuit comprises a resistor active layer, a first conductive pattern and a second conductive pattern; the first conductive pattern is coupled to a first end of the resistor active layer, and the second conductive pattern is coupled to a second end of the resistor active layer.

16. The display module of claim 15, wherein, The display panel comprises, in sequence from the direction away from the substrate base plate, a first active layer, a first gate insulating layer, a first gate metal layer, a second gate insulating layer, a second active layer, a third gate insulating layer, a third gate metal layer, an interlayer insulating layer and a first source-drain metal layer. The resistance active layer is arranged in the same layer and same material as the first active layer or the second active layer; the first conductive pattern and the second conductive pattern are arranged in the same layer and same material as the first source-drain metal layer.

17. The display module of claim 12, wherein, The diode in the voltage management circuit comprises a diode active layer, a diode anode pattern and a diode cathode pattern; the diode anode pattern is coupled with a first end of the diode active layer, and the diode cathode pattern is coupled with a second end of the diode active layer; the diode active layer forms a PN junction of the diode.

18. The display module of claim 17, wherein, The display panel comprises, in sequence from the direction away from the substrate base plate, a first active layer, a first gate insulating layer, a first gate metal layer, a second gate insulating layer, a second active layer, a third gate insulating layer, a third gate metal layer, an interlayer insulating layer and a first source-drain metal layer. The diode active layer is arranged in the same layer and same material as the first active layer or the second active layer; the diode anode pattern and the diode cathode pattern are arranged in the same layer and same material as the first source-drain metal layer.

19. The display module of claim 12, wherein, The display panel comprises, in sequence from the direction away from the substrate base plate, a first active layer, a first gate insulating layer, a first gate metal layer, a second gate insulating layer, a second active layer, a third gate insulating layer, a third gate metal layer, an interlayer insulating layer and a first source-drain metal layer. The P-type transistor in the voltage management circuit comprises a P-type active layer, a first gate layer, a first source and a first drain; the P-type active layer is arranged in the same layer and same material as the first active layer; the first gate layer is arranged in the same layer and same material as the first gate metal layer; the first source and the first drain are arranged in the same layer and same material as the first source-drain metal layer.

20. The display module of claim 12, wherein, The display panel comprises, in sequence from the direction away from the substrate base plate, a first active layer, a first gate insulating layer, a first gate metal layer, a second gate insulating layer, a second active layer, a third gate insulating layer, a third gate metal layer, an interlayer insulating layer and a first source-drain metal layer. The N-type transistor in the voltage management circuit comprises an N-type active layer, a second gate layer, a second source and a second drain; The N-type active layer is arranged in the same layer and same material as the second active layer; the second gate layer is arranged in the same layer and same material as the third gate metal layer; the second source and the second drain are arranged in the same layer and same material as the first source-drain metal layer.

21. A driving method of a voltage management circuit for driving the voltage management circuit according to any one of claims 1 to 9. The driving method comprises: In the normal output stage, the output control sub-circuit controls to disconnect the electrical connection between the to-be-managed signal end and the ground signal input end under the control of the potential of the first node; the first node control sub-circuit controls to disconnect the electrical connection between the first node and the second node under the control of the potential of the to-be-managed signal end; and the second node control sub-circuit controls to connect the electrical connection between the second node and the to-be-managed signal end under the control of the potential of the to-be-managed signal end. In the discharging stage, the output control sub-circuit controls to connect the electrical connection between the to-be-managed signal end and the ground signal input end under the control of the potential of the first node; the first node control sub-circuit controls to connect the electrical connection between the first node and the second node under the control of the potential of the to-be-managed signal end; and the second node control sub-circuit controls to disconnect the electrical connection between the second node and the to-be-managed signal end under the control of the potential of the to-be-managed signal end.

22. The driving method of voltage management circuit according to claim 21, wherein, The driving method further comprises: After the discharging stage ends, the output control sub-circuit controls to disconnect the electrical connection between the to-be-managed signal end and the ground signal input end under the control of the potential of the first node; and the first node control sub-circuit controls to disconnect the electrical connection between the first node and the second node under the control of the potential of the to-be-managed signal end.

23. The driving method of voltage management circuit according to claim 21, wherein, The second node control sub-circuit comprises a voltage division module, a storage module and a one-way conduction module; the voltage division module is coupled with the to-be-managed signal end, the ground signal input end and a third node respectively, and is configured to control the potential of the third node; the first end of the storage module is coupled with the second node, and the second end of the storage module is coupled with the ground signal input end; the first end of the one-way conduction module is coupled with the third node, and the second end of the one-way conduction module is coupled with the second node. In the normal output stage, the one-way conduction module connects the electrical connection between the third node and the second node under the control of the potential of the third node. In the discharging stage, the one-way conduction module disconnects the electrical connection between the third node and the second node under the control of the potential of the third node.

24. The driving method of voltage management circuit according to claim 22, wherein, The first node control sub-circuit comprises a first transistor, the gate of the first transistor is coupled with the to-be-managed signal end, the first pole of the first transistor is coupled with the second node, and the second pole of the first transistor is coupled with the first node. The output control sub-circuit comprises a second transistor, the gate of the second transistor is coupled with the first node, the first pole of the second transistor is coupled with the to-be-managed signal end, and the second pole of the second transistor is coupled with the ground signal input end. In the normal output stage, the second transistor is closed under the control of the potential of the first node. The first transistor is closed under the control of the potential of the to-be-managed signal end. In the discharging stage, the second transistor is connected under the control of the potential of the first node. The first transistor is connected under the control of the potential of the to-be-managed signal end. After the end of the discharging phase, under the control of the potential of the first node, the second transistor is closed; Under the control of the potential of the signal terminal to be managed, the first transistor is closed.

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