Triangle counting implementation method and apparatus for graphics processing unit

Abstract

The present application relates to the technical field of computers, and particularly relates to a triangle counting implementation method and apparatus for a graphics processing unit (GPU). The method comprises: acquiring graphics data of a GPU; identifying neighbor lists of all vertices in the graphics data, constructing hash trees in a lock-free manner and on the basis of the neighbor lists of all the vertices, and establishing an index array of the hash trees corresponding to all the vertices; when a target graph vertex is accessed, traversing in parallel all neighbor graph nodes of the target graph vertex, and mapping neighbor lists of all the neighbor graph nodes to a contiguous memory region; and on the basis of the index array and the contiguous memory region, implementing triangle counting. Thus, the problems in the relevant art, e.g., insufficient GPU computing capability, low GPU computational efficiency and poor GPU memory access efficiency, during triangle counting are solved.

Description

Triangle counting implementation method and device of graphics processor

[0001] Cross-reference to Related Applications

[0002] The present application claims priority to the Chinese patent application No. 202411375676.9, filed on September 29, 2024, and entitled "Triangle counting implementation method and device of graphics processor", the entire contents of which are incorporated herein by reference. TECHNICAL FIELD

[0003] The present application relates to the technical field of computers, and in particular relates to a triangle counting implementation method and device of a graphics processor. BACKGROUND

[0004] A triangle is composed of three mutually connected vertices in a graph, if G=(V,E) is used to represent a graph, where V and E are vertex set and edge set respectively, {s,v,t}∈V and {(s,v),(s,t),(v,t)}∈E. Triangle counting (TC) is one of the basic graph mining tasks widely used in social network analysis and pattern recognition applications, which is also regarded as a special case of computing short cycles or small groups.

[0005] Due to the increasing number of edges in real-world graphs, some important methods are currently being studied to improve the efficiency of parallel algorithms to calculate the exact and approximate number of triangles. Most of the current state-of-the-art works focus on processing large-scale graphs and utilizing shared memory platforms to improve algorithm performance. Previous methods divide triangle counting algorithms into four categories, such as set intersection, matrix multiplication, wedge sampling, and approximate methods.

[0006] In order to realize triangle counting on large-scale graph data, GPUs (Graphics Processing Units) are widely used. However, due to the existence of a large number of branch divergence operations in the triangle counting process, there are a large number of thread waits in the execution process on the GPU, which seriously limits the computing power and efficiency of the GPU. In addition, the GPU can only reach its performance peak in the regular memory data model, but there are a large number of irregular memory accesses in the triangle counting process, which seriously affects the memory efficiency of the GPU. SUMMARY

[0007] The present application provides a triangle counting implementation method and device of a graphics processor to solve the problems of poor GPU computing power, computing efficiency and memory efficiency in triangle counting in related technologies.

[0008] The first aspect embodiment of the present application provides a triangle counting implementation method of a graphics processor, comprising the following steps: obtaining graphics data of the graphics processor; identifying a neighbor list of all vertices in the graphics data, constructing a hash tree in a lock-free manner according to the neighbor list of all vertices, and establishing an index array of the hash tree corresponding to all vertices; when a target graph vertex is accessed, all neighbor graph nodes of the target graph vertex are traversed in parallel, and the neighbor list of all neighbor graph nodes is mapped to a continuous memory area; and triangle counting is implemented based on the index array and the continuous memory area.

[0009] Optionally, the step of mapping the neighbor list of all neighbor graph nodes to the continuous memory area comprises: constructing at least one group of vertex pairs based on the target graph vertex and all neighbor graph nodes, and mapping the neighbor list of the target graph vertex and the corresponding neighbor graph node in each group of vertex pairs to the continuous memory area.

[0010] Optionally, the step of implementing triangle counting based on the index array and the continuous memory area comprises: determining the hash tree of each group of vertex pairs based on the index array; searching whether the neighbor list of each group of vertex pairs has the same neighbor based on the hash tree; if the same neighbor exists, taking the same neighbor and the target graph vertex and the neighbor graph node corresponding to the vertex pair as a triple, and implementing triangle counting based on the triple.

[0011] Optionally, the step of constructing the hash tree in a lock-free manner according to the neighbor list of all vertices comprises: obtaining a target number of nodes of the hash tree; calculating the hash value of the vertex and the hash value of the neighbor graph node in the neighbor list of the vertex, and inserting the vertex and the neighbor graph node into the storage bucket of the corresponding node of the hash tree; if there are multiple neighbor graph nodes with the same hash value in the neighbor graph node of the vertex, sequentially placing the multiple neighbor graph nodes in the next position of the node of the hash tree until the number of storage of the current node of the hash tree reaches the target number; and if the number of storage of the current node of the hash tree reaches the target number, placing the multiple neighbor graph nodes with the same hash value into a new storage bucket of the current node of the hash tree.

[0012] Optionally, the step of establishing the index array of the hash tree corresponding to all vertices comprises: obtaining the permutation order of all vertices and the address of the node of the target level of the hash tree corresponding to all vertices; and constructing the index array based on the permutation order and the address of the node of the target level of the hash tree corresponding to all vertices, wherein each element in the index array is a pointer to the node of the target level of the hash tree.

[0013] Optionally, the retrieving whether there is the same neighbor in the neighbor list of each group of vertex pairs based on the hash tree comprises: obtaining the neighbor list of the corresponding neighbor graph node in each group of vertex pairs; loading the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node into an array; judging the length of the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node; constructing a hash tree based on the neighbor list with shorter length, and determining the neighbor list with longer length as a search space; enumerating each element in the search space, and retrieving whether there is the same element based on the hash tree, wherein the same element is the same neighbor.

[0014] The second aspect embodiment of the present application provides a triangle counting implementation device of a graphics processor, comprising: an obtaining module, configured to obtain graphics data of the graphics processor; an establishing module, configured to identify the neighbor list of all vertices in the graphics data, construct a hash tree in a lock-free manner according to the neighbor list of all vertices, and establish an index array of the hash tree corresponding to all vertices; a mapping module, configured to, when a target graph vertex is accessed, parallel traverse all neighbor graph nodes of the target graph vertex, and map the neighbor list of all neighbor graph nodes to a continuous memory area; and an implementation module, configured to implement triangle counting based on the index array and the continuous memory area.

[0015] Optionally, the mapping module is further configured to: construct at least one group of vertex pairs based on the target graph vertex and all neighbor graph nodes, and map the neighbor list of the target graph vertex and the corresponding neighbor graph node in each group of vertex pairs to the continuous memory area.

[0016] Optionally, the implementation module is further configured to: determine the hash tree of each group of vertex pairs based on the index array; retrieve whether there is the same neighbor in the neighbor list of each group of vertex pairs based on the hash tree; if there is the same neighbor, take the same neighbor, the target graph vertex and the neighbor graph node corresponding to the vertex pair as a triple, and implement triangle counting based on the triple.

[0017] Optionally, the establishing module is further configured to: obtain the target number of nodes of the hash tree; calculate the hash value of the vertex and the hash value of the neighbor graph node in the neighbor list of the vertex, and insert the vertex and the neighbor graph node into the storage bucket of the corresponding node of the hash tree; if there are multiple neighbor graph nodes with the same hash value in the neighbor graph node of the vertex, sequentially put the multiple neighbor graph nodes into the next position of the node of the hash tree until the number of storage of the current node of the hash tree reaches the target number; and if the number of storage of the current node of the hash tree reaches the target number, put the multiple neighbor graph nodes with the same hash value into a new storage bucket of the current node of the hash tree.

[0018] Optionally, the establishing module is further configured to: obtain the arrangement order of all the vertices and the address of the node of the target level of the corresponding hash tree of all the vertices; and construct an index array based on the arrangement order and the address of the node of the target level of the corresponding hash tree of all the vertices, wherein each element in the index array is a pointer to the node of the target level of the hash tree.

[0019] Optionally, the mapping module is further configured to: obtain the neighbor list of the corresponding neighbor graph node in each group of vertex pairs; load the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node into an array; determine the length of the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node; construct a hash tree based on the neighbor list with a shorter length, and determine the neighbor list with a longer length as a search space; and enumerate each element in the search space, and search whether there is a same element based on the hash tree, wherein the same element is a same neighbor.

[0020] The third aspect of the present application provides a graphics processor, comprising: a memory, a processor and a computer program stored in the memory and executable on the processor, the processor executes the program to implement the triangle counting method of the graphics processor according to the above-mentioned embodiments.

[0021] The fourth aspect of the present application provides a computer readable storage medium, which stores a computer program or instructions, the computer program or instructions are executed by a processor to implement the triangle counting method of the graphics processor according to the above-mentioned embodiments.

[0022] The fifth aspect of the present application provides a computer program product, which comprises a computer program or instructions, the computer program or instructions are executed to implement the triangle counting method of the graphics processor according to the above-mentioned embodiments.

[0023] Therefore, the present application has at least the following beneficial effects:

[0024] The embodiment of the present application can obtain graphics data in a graphics processor, identify a neighbor list of all vertices, and construct a hash tree in a lock-free manner according to the neighbor list of all vertices, thereby avoiding performance bottlenecks caused by lock competition in a multi-thread or multi-GPU environment, relieving branch divergence in execution, fully considering the size and high parallelism of memory space on a GPU, and quickly accessing the neighbor list of each vertex by establishing an index array of the hash tree corresponding to all vertices, thereby improving the efficiency of subsequent operations. When accessing a target graph vertex, all neighbor vertices of the target vertex are traversed in parallel, and the neighbor list is mapped to a continuous memory region, thereby improving memory access efficiency and reducing memory access delay. Triangular counting is implemented based on the index array and the continuous memory region, effectively improving the computing capacity, computing efficiency, and memory access efficiency of the GPU when applied to triangular counting. Thus, the technical problems of poor GPU computing capacity, computing efficiency, and memory access efficiency in triangular counting in the related art are solved.

[0025] Additional aspects and advantages of the present application will be made apparent by the following description and the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0026] The above and / or additional aspects and advantages of the present application will become apparent and be readily appreciated from the following description, including the accompanying drawings, wherein:

[0027] FIG. 1 is a flowchart of a triangular counting implementation method of a graphics processor according to an embodiment of the present application;

[0028] FIG. 2 is a flowchart of a triangular counting method according to an embodiment of the present application;

[0029] FIG. 3 is a schematic diagram of lock-free hash tree construction according to an embodiment of the present application;

[0030] FIG. 4 is a schematic diagram of an index array according to an embodiment of the present application;

[0031] FIG. 5 is an example diagram of a triangular counting implementation device of a graphics processor according to an embodiment of the present application;

[0032] FIG. 6 is a schematic diagram of the structure of a graphics processor according to an embodiment of the present application. DETAILED DESCRIPTION

[0033] Embodiments of the present application are described in detail below with reference to the accompanying drawings, examples of which are shown in the drawings, wherein the same or similar notations represent the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to explain the present application, and cannot be understood as limiting the present application.

[0034] The triangle counting implementation method and device of the graphics processor of the embodiment of the present application are described below with reference to the accompanying drawings. In view of the problem that the execution process on the GPU is accompanied by a large number of thread waits due to a large number of branch divergence operations in the triangle counting process, which seriously limits the computing capacity and efficiency of the GPU, and the GPU can only reach its performance peak in a regular memory access data model, but a large number of irregular memory accesses exist in the triangle counting process, thereby seriously affecting the memory access efficiency of the GPU, the present application provides a triangle counting implementation method of a graphics processor. In the method, the graphics data in the graphics processor can be obtained, and the neighbor list of all vertices can be identified, and a hash tree can be constructed in a lock-free manner according to the neighbor list of all vertices, thereby avoiding the performance bottleneck caused by lock competition in a multi-thread or multi-GPU environment, relieving the branch divergence in execution, fully considering the size and high parallelism of the memory space on the GPU, and through establishing an index array of the hash tree corresponding to all vertices, the neighbor list of each vertex can be quickly accessed, thereby improving the efficiency of subsequent operations. When accessing the target graph vertex, all neighbor vertices of the target vertex are traversed in parallel, and the neighbor list is mapped to a continuous memory region, thereby improving the memory access efficiency and reducing the memory access delay, and the triangle counting is realized based on the index array and the continuous memory region. Thus, the problems of poor GPU computing capacity, computing efficiency and memory access efficiency in the related art are solved.

[0035] Specifically, FIG. 1 is a flowchart of a triangle counting implementation method of a graphics processor provided by an embodiment of the present application.

[0036] As shown in FIG. 1, the triangle counting implementation method of the graphics processor includes the following steps:

[0037] In step S101, the graphics data of the graphics processor is obtained.

[0038] The graphics can be a polygon, the graphics data can be a vertex of the graphics, and the neighbor list of the vertex.

[0039] In step S102, the neighbor list of all vertices in the graphics data is identified, a hash tree is constructed in a lock-free manner according to the neighbor list of all vertices, and an index array of the hash tree corresponding to all vertices is established.

[0040] It can be understood that the embodiment of the present application can identify the neighbor list of all vertices in the graphics data, and then construct a hash tree in a lock-free manner according to the neighbor list of all vertices, and establish an index array of the hash tree corresponding to all vertices. The hash tree is constructed in a lock-free manner to reduce hash conflicts, thereby relieving the branch divergence in subsequent execution. The specific method of constructing the hash tree is as follows.

[0041] For example, the vertices of a graph are A, B, C, D, E, the neighbor list of A is {B, C, D}, and then a hash tree is constructed according to [B, C, D].

[0042] In the embodiment of the present application, the hash tree is constructed in a lock-free manner according to the neighbor list of all vertices, including: obtaining a target number of paths of a node of the hash tree; calculating a hash value of a vertex and hash values of neighbor graph nodes in the neighbor list of the vertex, and inserting the vertex and the neighbor graph nodes into a storage bucket of the node of the corresponding hash tree; if there are multiple neighbor graph nodes with the same hash value in the neighbor graph nodes of the vertex, the multiple neighbor graph nodes are sequentially placed in a next position of the node of the hash tree until the number of stored quantities of the current node of the hash tree reaches the target number of paths; and if the number of stored quantities of the current node of the hash tree reaches the target number of paths, the multiple neighbor graph nodes with the same hash value are placed into a new storage bucket of the current node of the hash tree.

[0043] wherein the target number of paths is a bucket of the number of vertices that each hash tree can store, denoted as H, the hash tree is a 32-way trie by default (i.e. H = 32), and the width of the hash tree can also be set according to the number of CTA threads in different CTA thread organization modes, which is not specifically limited.

[0044] It can be understood that the embodiment of the present application can calculate a hash value of a vertex and neighbor graph nodes in a neighbor list of the vertex, insert the vertex and the neighbor graph nodes into a storage bucket of a node of a corresponding hash tree, if there are multiple neighbor graph nodes with the same hash value in the neighbor graph nodes of the vertex, the multiple neighbor graph nodes are sequentially placed in a next position of the node of the hash tree until the number of stored quantities of the current node of the hash tree reaches the target number of paths, and if the number of stored quantities of the current node of the hash tree reaches the target number of paths, the multiple neighbor graph nodes with the same hash value are placed into a new storage bucket of the current node of the hash tree.

[0045] That is, the embodiment of the present application adopts an optimistic strategy to handle the conflicts occurring when constructing the hash trie in a lock-free manner. This strategy places the conflict items in the next position of the same node next to the original item without lock operation until the hash trie node is full, avoiding the performance bottleneck caused by lock competition in a multi-thread or multi-GPU environment.

[0046] In the embodiment of the present application, an index array of the hash trees corresponding to all vertices is established, including: obtaining a permutation order of all vertices and addresses of nodes of a target level of the hash trees corresponding to all vertices; and constructing the index array based on the permutation order and the addresses of the nodes of the target level of the hash trees corresponding to all vertices, wherein each element in the index array is a pointer to the node of the target level of the hash tree.

[0047] It can be understood that the embodiment of the present application can construct an index array based on the arrangement order of all vertices and the address of the node of the target level of the corresponding hash tree of all vertices, wherein each element in the index array is a pointer to the node of the target level of the hash tree, so that the neighbor list of each vertex can be quickly accessed based on the index array subsequently, and the efficiency of subsequent operations is improved.

[0048] The embodiment of the present application uses an index array to compactly organize the index of the hash tree, and each element in the array is a pointer to the node of a certain level of the hash tree.

[0049] In step S103, when the target graph vertex is accessed, all neighbor graph nodes of the target graph vertex are traversed in parallel, and the neighbor list of all neighbor graph nodes is mapped to a continuous memory area.

[0050] The target graph vertex is a graph vertex that is intended or required to be accessed, such as the A vertex in the graph.

[0051] It can be understood that the embodiment of the present application can traverse all neighbor graph nodes of the graph vertex in parallel when the target graph vertex is accessed, and map the neighbor list of all neighbor graph nodes to a continuous memory area, thereby improving the memory access efficiency, reducing the memory access delay, and facilitating subsequent triangle counting.

[0052] In the embodiment of the present application, the parallel traversal of all neighbor graph nodes of the target graph vertex can adopt a CTA thread organization technique, including three strategies: Block Degree, Block Index and Warp Index, to adapt to different graphs.

[0053] In Block Degree (thread organization based on thread block, with degree-based workload division), the vertex v with degree d(v) is allocated blocks;

[0054] In Block Index (thread organization based on block, with index-based workload division), the vertex v associated with the target index of the index array is allocated blocks;

[0055] In Warp Index (thread organization based on thread warp, with index-based workload division), the vertex v associated with the target index of the horizontal array is allocated warp.

[0056] In the embodiment of the present application, before mapping the neighbor list of all neighbor graph nodes to the continuous memory region, the method further comprises: based on the target graph vertex and all neighbor graph nodes, constructing at least one group of vertex pairs, and mapping the target graph vertex and the neighbor list of the corresponding neighbor graph node in each group of vertex pairs to the continuous memory region.

[0057] It can be understood that the embodiment of the present application can construct vertex pairs based on the target access graph vertex and the neighbor graph node of the target graph vertex, and map the neighbor list of the target access graph vertex and the neighbor list of the corresponding neighbor graph node in each group of vertex pairs to the continuous memory region.

[0058] For example, there is a graph including vertices A, B, C and D, and the neighbor graph node of vertex A is [B, C, D]. Parallel traversal is performed on each neighbor in the neighbor graph node of vertex A, and the neighbor list of each pair of vertices is mapped to the continuous memory region.

[0059] For example, the target graph vertex is A, the neighbor graph node of vertex A includes B, C and D, that is, the neighbor list N A of vertex A is [B, C, D], vertex pairs (A, B), (A, C) and (A, D) are formed, and parallel traversal is performed on all neighbor graph nodes, such as neighbor graph node B, to obtain the neighbor list N B of B. For neighbor graph node C, the neighbor list N C of C is obtained. For neighbor graph node D, the neighbor list N D of D is obtained. The neighbor list of each pair of vertices is mapped to the continuous memory region. For example, for vertex pair (A, B), the neighbor list N A of vertex A and the neighbor list N B of vertex B are mapped to the continuous memory region.

[0060] In step S104, triangle counting is implemented based on the index array and the continuous memory region.

[0061] It can be understood that the embodiment of the present application can implement triangle counting based on the index array and the continuous memory region, and the specific steps are as follows.

[0062] In the embodiment of the present application, triangle counting is implemented based on the index array and the continuous memory region, which comprises: determining a hash tree of each group of vertex pairs based on the index array; based on the hash tree, searching whether the neighbor list of each group of vertex pairs has the same neighbor; if there is the same neighbor, taking the same neighbor and the target graph vertex and the neighbor graph node corresponding to the vertex pair as a triple, and implementing triangle counting based on the triple.

[0063] It is understood that the embodiments of this application can determine the hash tree of each pair of vertices based on the index array, and search the neighbor list of each pair of vertices based on the hash tree to see if there are common neighbors. Then, the common neighbors and the target graph vertex and the neighbor graph node corresponding to the vertex pair are taken as triples, and triangle counting is realized based on the triples. That is, the search of the neighbor list of two vertices based on the hash tree is to see if there are common neighbors, and the common neighbors and the two vertices currently traversed are taken as triples and put into the answer set, thereby realizing triangle counting. Here, the triple is a triangle. Searching the neighbor list based on the hash tree to see if there are common neighbors improves the search efficiency.

[0064] In this embodiment of the application, the method of retrieving the neighbor list of each vertex pair based on a hash tree to determine whether there are common neighbors includes: obtaining the neighbor list of the corresponding neighbor graph node in each vertex pair; loading the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node into an array; determining the length of the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node; constructing a hash tree based on the shorter neighbor list and determining the longer neighbor list as the search space; enumerating each element in the search space and retrieving whether there are common elements based on the hash tree, wherein common elements are common neighbors.

[0065] It is understood that, in the embodiments of this application, the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node can be loaded into an array, a hash tree can be constructed using the shorter neighbor list, and the longer neighbor list can be regarded as the search space. Each element in the search space is enumerated, and the existence of the same element is searched based on the hash tree.

[0066] For example, to obtain the neighbor list N of vertex A. A The neighbor list N of vertex B A , will N A and N B The neighbor lists are loaded into a temporary array, which can be a one-dimensional array or a buffer, to store the neighbor lists. These two neighbor lists are mapped to contiguous memory regions to improve memory access efficiency. The shorter neighbor list is used to build the hash tree, while the longer neighbor list is considered the search space. For example, if N... A If it is shorter, use N. A Construct a hash tree and enumerate the longer list of neighbors N. B For each element in the hash tree, check if there are any duplicate elements.

[0067] If N A = [B, C], N B = [A, C, E], using the shorter neighbor list N A = [B, C] to construct a hash tree.

[0068] Enumerate N B For each element b in N, for b = A, compute the hash value, find whether A exists in the hash tree, for b = C, compute the hash value, find whether C exists in the hash tree, for b = E, compute the hash value, find whether E exists in the hash tree.

[0069] For b = C, compute the hash value, find whether C exists in the hash tree, if C is found, it indicates that there is a common neighbor C, so A, B, C form a triangle.

[0070] The following will be described through a specific embodiment of the triangle counting method of the present application, and the flow is shown in FIG. 2, including the following steps:

[0071] Step S10: Construct a hash tree in a lock-free manner based on the neighbor list of all vertices in the graph, and organize the index of all vertices corresponding to the hash tree into an index array.

[0072] Specifically, the embodiment of the present application will traverse all vertices, take out the neighbor list, and construct a hash tree in a lock-free manner. The hash tree is stored in the form of a linked list, and each hash tree is a bucket that can store H vertices. In order to improve the GPU memory throughput, the Skiff in the embodiment of the present application will adopt a 32-way hash tree (i.e. H = 32) to organize the neighbor vertices.

[0073] Further, the step of constructing the hash tree further includes:

[0074] An optimistic strategy is adopted to handle the conflicts that occur when constructing the hash trie in a lock-free manner. As shown in FIG. 3, when a hash conflict occurs, the conflict item is placed in the next position of the original item without lock operation (as shown by the black curve in FIG. 3). If the conflicts are too many until the trie node is full, and the conflict item is further placed in the next node under the protection of the CAS operation (as shown by the gray curve in FIG. 3). Once the current storage bucket is full and there are more conflicts, a new storage bucket will be allocated, and a pointer from the last item of the current storage bucket to the first item of the new storage bucket is used to link the two storage buckets. By using this strategy, most of the lock operations are reduced.

[0075] Further, organizing the index of all vertices corresponding to the hash tree into an index array includes:

[0076] Specifically, an embodiment of the present application gives a H=4 diagram as shown in FIG. 4. First, a level array is used as an index of the hash tree to ensure that the algorithm can quickly locate the active node. Each item in the array holds a pointer to a node at a certain level of the hash tree. The level array is a compact structure with limited space occupation. By using the level array to index the hash tree, the tree can be quickly loaded into memory instead of the entire hash tree, and there are no empty buckets in the hash tree (using virtual buckets to represent buckets without elements), which can reduce the pressure on the GPU memory allocator.

[0077] Step S20: When accessing a certain graph vertex, all its neighbor graph nodes are traversed in parallel, and the neighbor list of each pair of points is mapped to a continuous memory area.

[0078] Using CTA thread organization technology, three strategies are provided: Block Degree, Block Index and Warp Index to adapt to different graphs.

[0079] In Block Degree (block-based thread organization with degree-based workload partitioning), a vertex v with a degree of d(v) is assigned to blocks.

[0080] In Block Index (block-based thread organization with index-based workload partitioning), a vertex v associated with a target index of an index array is assigned to blocks.

[0081] In Warp Index (warp-based thread organization with index-based workload partitioning), a vertex v associated with a target index of a horizontal array is assigned to warps.

[0082] Step S30: Based on the hash tree, it is determined whether the neighbor lists of two vertices have the same neighbor. The same element and the two vertices currently traversed are put into the answer set as a triple.

[0083] Specifically, the neighbor lists of the source vertex and the destination vertex of the active edge are loaded into an array, and then a hash tree is constructed using the shorter neighbor list, while the longer neighbor list is regarded as a search space. Enumerate each element in the search space, and find whether there is the same element based on the hash tree.

[0084] Wherein, the Skiff algorithm is used to traverse the search space as follows:

[0085] Input: neighbor list B, hash tree bucket;

[0086] Output: Triangle triplets.

[0087] First step: Calculate the hash value based on B in parallel according to the width of B and the hash function;

[0088] Second step: Find the position of the hash value of the current element b in B in the temporary storage bucket bucket;

[0089] Third step: If the hash value of b in the temporary storage bucket bucket is greater than the position i of the current thread and is odd; Store b to the hash position corresponding to the hash+H-1-i position; And return the triangle (u, v, b).

[0090] The embodiments of the present application will explain the counting principle of the triangle in combination with the above Skiff algorithm, and the hash is the hash value of the element b. By traversing the elements with the same hash value, a triangle can be found in O(1) time complexity.

[0091] In summary, the embodiments of the present application fully consider the size of the memory space and the characteristics of high parallelism on the GPU, organize the graph data through the hash tree, eliminate the branch divergence in triangle counting, and reduce the hash conflict through the lock-free operation when constructing the hash tree, thereby alleviating the branch divergence in execution. In addition, the compact storage format improves the GPU cache utilization rate while reducing the memory access frequency, effectively improving the problem of poor memory efficiency caused by irregular memory access.

[0092] According to the triangle counting implementation method of the graphics processor provided by the embodiments of the present application, the graph data in the graphics processor can be obtained, and the neighbor list of all vertices can be identified. The hash tree is constructed in a lock-free manner according to the neighbor list of all vertices, thereby avoiding the performance bottleneck caused by lock competition in a multi-thread or multi-GPU environment, alleviating the branch divergence in execution, fully considering the size of the memory space and the characteristics of high parallelism on the GPU, and quickly accessing the neighbor list of each vertex by establishing the index array of the hash tree corresponding to all vertices, thereby improving the efficiency of subsequent operations. When accessing the target graph vertex, all neighbor vertices of the target vertex are traversed in parallel, and the neighbor list is mapped to a continuous memory region, thereby improving the memory access efficiency and reducing the memory access delay. The triangle counting is realized based on the index array and the continuous memory region, thereby effectively improving the computing ability, computing efficiency and memory efficiency of the GPU when applied to triangle counting.

[0093] Second, the triangle counting implementation device of the graphics processor according to the embodiments of the present application is described with reference to the accompanying drawings.

[0094] FIG. 5 is a block schematic diagram of the triangle counting implementation device of the graphics processor according to the embodiments of the present application.

[0095] As shown in FIG. 5, the triangle counting implementation device 10 of the graphics processor includes an obtaining module 100, a building module 200, a mapping module 300 and an implementing module 400.

[0096] The obtaining module 100 is configured to obtain graphics data of the graphics processor; the building module 200 is configured to identify a neighbor list of all vertices in the graphics data, build a hash tree in a lock-free manner according to the neighbor list of all vertices, and establish an index array of the hash tree corresponding to all vertices; the mapping module 300 is configured to, when a target graph vertex is accessed, traverse all neighbor graph nodes of the target graph vertex in parallel, and map the neighbor list of all neighbor graph nodes to a continuous memory region; and the implementing module 400 is configured to implement triangle counting based on the index array and the continuous memory region.

[0097] In the embodiments of the present application, the mapping module 300 is further configured to: build at least one group of vertex pairs based on the target graph vertex and all neighbor graph nodes, and map the neighbor list of the target graph vertex and the corresponding neighbor graph node in each group of vertex pairs to a continuous memory region.

[0098] In the embodiments of the present application, the implementing module 400 is further configured to: determine the hash tree of each group of vertex pairs based on the index array; retrieve whether the neighbor list of each group of vertex pairs has the same neighbor based on the hash tree; if there is the same neighbor, take the same neighbor and the target graph vertex and the neighbor graph node corresponding to the vertex pair as a triple, and implement triangle counting based on the triple.

[0099] In the embodiments of the present application, the building module 200 is further configured to: obtain a target number of nodes of the hash tree; calculate the hash value of the vertex and the hash value of the neighbor graph node in the neighbor list of the vertex, and insert the vertex and the neighbor graph node into the storage bucket of the corresponding node of the hash tree; if there are multiple neighbor graph nodes with the same hash value in the neighbor graph node of the vertex, sequentially put the multiple neighbor graph nodes into the next position of the node of the hash tree in order until the number of storage of the current node of the hash tree reaches the target number; and if the number of storage of the current node of the hash tree reaches the target number, put the multiple neighbor graph nodes with the same hash value into a new storage bucket of the current node of the hash tree.

[0100] In the embodiments of the present application, the building module 200 is further configured to: obtain the arrangement order of all vertices and the address of the node of the target level of the hash tree corresponding to all vertices; and build the index array based on the arrangement order and the address of the node of the target level of the hash tree corresponding to all vertices, wherein each element in the index array is a pointer to the node of the target level of the hash tree.

[0101] In the embodiment of the present application, the mapping module 300 is further configured to: obtain a neighbor list of the corresponding neighbor graph node in each group of vertex pairs; load the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node into an array; determine the lengths of the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node; construct a hash tree based on the neighbor list with a shorter length, and determine the neighbor list with a longer length as a search space; and enumerate each element in the search space, and search whether there is a same element based on the hash tree, wherein the same element is a same neighbor.

[0102] It should be noted that the above description of the embodiment of the triangle counting implementation method of the graphics processor also applies to the embodiment of the triangle counting implementation device of the graphics processor, which will not be described here.

[0103] According to the embodiment of the present application, the triangle counting implementation device of the graphics processor is provided, which can obtain the graphics data in the graphics processor, identify the neighbor list of all vertices, and construct a hash tree in a lock-free manner based on the neighbor list of all vertices, thereby avoiding the performance bottleneck caused by lock competition in a multi-thread or multi-GPU environment, relieving the branch divergence in execution, fully considering the size and high parallelism of the memory space on the GPU, and quickly accessing the neighbor list of each vertex by establishing an index array of the hash tree corresponding to all vertices, thereby improving the efficiency of subsequent operations. When accessing the target graph vertex, all neighbor vertices of the target vertex are traversed in parallel, and the neighbor list is mapped to a continuous memory region, thereby improving the memory access efficiency and reducing the memory access delay. The triangle counting is implemented based on the index array and the continuous memory region, which effectively improves the computing capability, computing efficiency and memory access efficiency of the GPU when applied to triangle counting.

[0104] FIG. 6 is a structural schematic diagram of a graphics processor provided by an embodiment of the present application. The graphics processor can include:

[0105] The memory 601, the processor 602, and a computer program stored on the memory 601 and executable on the processor 602.

[0106] The processor 602 implements the triangle counting implementation method of the graphics processor provided in the above embodiments when executing the program.

[0107] Further, the graphics processor further includes:

[0108] The communication interface 603 is configured to communicate between the memory 601 and the processor 602.

[0109] The memory 601 is configured to store a computer program executable on the processor 602.

[0110] The memory 601 can include a high-speed RAM memory, and can also include a non-volatile memory, such as at least one disk memory.

[0111] If the memory 601, the processor 602 and the communication interface 603 are implemented independently, the communication interface 603, the memory 601 and the processor 602 can be connected to each other through a bus and complete communication between each other. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For convenience of representation, only one thick line is used in FIG. 6, but it does not mean that there is only one bus or only one type of bus.

[0112] Optionally, in a specific implementation, if the memory 601, the processor 602 and the communication interface 603 are integrated on a chip, the memory 601, the processor 602 and the communication interface 603 can complete communication between each other through an internal interface.

[0113] The processor 602 can be a central processing unit (CPU), or an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of the present application.

[0114] The embodiments of the present application also provide a computer readable storage medium, which stores a computer program or instructions, and the computer program or instructions are executed by a processor to implement the above-mentioned triangle counting implementation method of a graphics processor.

[0115] The embodiments of the present application also provide a computer program product, which includes a computer program or instructions, and the computer program or instructions are executed to implement the above-mentioned triangle counting implementation method of a graphics processor.

[0116] In the description of the application, reference to "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" etc. means that a particular feature, structure, material or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. The illustrative appearances of the above-mentioned terms in various places in the specification are not necessarily referred to the same embodiment or example. Moreover, specific features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples. Furthermore, in non-contradictory cases, those skilled in the art can combine and combine the features of different embodiments or examples described in the specification and the features of different embodiments or examples.

[0117] In addition, the terms "first", "second" are only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first", "second" can explicitly or implicitly include at least one of the features. In the description of the application, the meaning of "N" is at least two, for example, two, three, etc., unless otherwise specifically limited.

[0118] Any process or method descriptions or descriptions of the flow diagrams in the specification can be understood as representing code modules, segments or portions of code which include one or more executable instructions for implementing the specified logic function(s) or process(es) and the preferred embodiments of the application include additional implementations in which the order of execution or the functions are not the same as those illustrated and described. It is therefore intended that the application embraces all such variations and modifications. The application also includes the combinations of the individual features recited in the claims.

[0119] It should be understood that parts of the application can be implemented in hardware, software, firmware or combinations thereof. In the above embodiments, the N steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. As in another embodiment, if implemented in hardware, any of the following technologies known in the art can be used in combination of one or more: discrete logic circuit with logic gate circuit for implementing logic functions on data signals, application specific integrated circuit with suitable combination logic gate circuit, programmable gate array (PGA), field programmable gate array (FPGA) and the like.

[0120] Those skilled in the art of the present technology can understand that all or part of the steps carried out by the above-mentioned embodiment method can be completed by program instructions to the relevant hardware, and the program can be stored in a computer readable storage medium. The program, when executed, includes one or a combination of steps of the method embodiment.

Claims

1. A method of triangle count implementation for a graphics processor, the method comprising: The method comprises the following steps: obtaining graphics data of a graphics processor; identifying a neighbor list of all vertices in the graphics data, constructing a hash tree in a lock-free manner according to the neighbor list of all vertices, and establishing an index array of the hash tree corresponding to all vertices; when a target graph vertex is accessed, all neighbor graph nodes of the target graph vertex are traversed in parallel, and neighbor lists of the all neighbor graph nodes are mapped to a continuous memory region; based on the index array and the continuous memory region, triangle counting is implemented.

2. The method of claim 1, wherein, Before the neighbor lists of the all neighbor graph nodes are mapped to the continuous memory region, the method further comprises: based on the target graph vertex and the all neighbor graph nodes, at least one group of vertex pairs is constructed, and a target graph vertex and a neighbor list of a corresponding neighbor graph node in each group of vertex pairs are mapped to a continuous memory region.

3. The method of claim 2, wherein, The triangle counting based on the index array and the continuous memory region comprises: determining a hash tree of each group of vertex pairs based on the index array; based on the hash tree, it is determined whether the neighbor lists of each group of vertex pairs have the same neighbor; if the same neighbor exists, the same neighbor and the target graph vertex and the neighbor graph node corresponding to the vertex pair are taken as a triple, and triangle counting is implemented based on the triple.

4. The method of claim 1, wherein, The hash tree is constructed in a lock-free manner according to the neighbor list of all vertices, and the method comprises: obtaining a target number of nodes of the hash tree; calculating a hash value of the vertex and a hash value of a neighbor graph node in the neighbor list of the vertex, and inserting the vertex and the neighbor graph node into a storage bucket of a corresponding node of the hash tree; if there are multiple neighbor graph nodes with the same hash value in the neighbor graph nodes of the vertex, the multiple neighbor graph nodes are sequentially and orderly placed in a next position of the node of the hash tree until the number of nodes stored in the current node of the hash tree reaches the target number; if the number of nodes stored in the current node of the hash tree reaches the target number, the multiple neighbor graph nodes with the same hash value are placed in a new storage bucket of the current node of the hash tree.

5. The method of claim 1, wherein, The index array of the hash tree corresponding to all vertices is established, and the method comprises: obtaining a permutation order of the all vertices and an address of a node of a target level of the hash tree corresponding to the all vertices; based on the permutation order and the address of the node of the target level of the hash tree corresponding to the all vertices, the index array is constructed, wherein each element in the index array is a pointer to the node of the target level of the hash tree.

6. The method of claim 3, wherein, Based on the hash tree, it is determined whether the neighbor lists of each group of vertex pairs have the same neighbor, and the method comprises: obtaining a neighbor list of a corresponding neighbor graph node in each group of vertex pairs; loading the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node into an array; judging lengths of the neighbor list of the target graph vertex and the neighbor list of the corresponding neighbor graph node; based on the neighbor list with a shorter length, a hash tree is constructed, and the neighbor list with a longer length is determined as a search space; Enumerating each element in the search space, based on the hash tree to retrieve whether there is the same element, wherein the same element is the same neighbor.

7. A triangle count implementation apparatus of a graphics processor, characterized by: Comprising: An obtaining module, configured to obtain graphics data of a graphics processor; An establishing module, configured to identify a neighbor list of all vertices in the graphics data, to construct a hash tree in a lock-free manner according to the neighbor list of all the vertices, and to establish an index array of the hash tree corresponding to all the vertices; A mapping module, configured to, when a target graph vertex is accessed, parallelly traverse all neighbor graph nodes of the target graph vertex, and to map neighbor lists of the all neighbor graph nodes to a continuous memory area; An implementing module, configured to implement triangle counting based on the index array and the continuous memory area.

8. A graphics processor, comprising: Comprising: A memory, a processor, and a computer program stored in the memory and executable on the processor, the processor executing the program to implement the triangle counting implementation method of the graphics processor according to any one of claims 1-6.

9. A computer readable storage medium having stored thereon a computer program or instructions, characterized in that, The computer program or instructions are executed by the processor to implement the triangle counting implementation method of the graphics processor according to any one of claims 1-6.

10. A computer program product comprising computer programs or instructions, characterized in that, The computer program or instructions are executed to implement the triangle counting implementation method of the graphics processor according to any one of claims 1-6.

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