Unit cell arrangement and printed circuit board

Abstract

The invention relates to a unit cell arrangement and a printed circuit board. The unit cell arrangement has a first unit cell assembly, a dielectric layer arranged on the first unit cell assembly so as to make contact in the vertical direction, and a second unit cell assembly arranged on the dielectric layer so as to make contact in the vertical direction, wherein a first unit cell of the first unit cell assembly is electrically connected to a third unit cell of the second unit cell assembly by means of at least one first electrically conductive connecting element on a first contacting element arranged on the first unit cell and the third unit cell, and wherein a second unit cell of the first unit cell assembly is electrically connected to a fourth unit cell of the second unit cell assembly by means of at least one second electrically conductive connecting element on a second contacting element arranged on the second unit cell and the fourth unit cell.

Description

[0001] Unit cell arrangement and printed circuit board

[0002]

[0001] The invention relates to a unit cell arrangement and a printed circuit board.

[0003]

[0002] Printed circuit boards are used in most high-speed / frequency or sensitive electronic systems. In recent decades, the data rate and operating frequency of such electronic systems have steadily increased. This increase has brought with it qualitative challenges, in particular the prevention of noise to ensure optimal operation of the electrical system and to prevent interference with the environment.

[0004]

[0003] To realize high-quality electronic systems, electromagnetic compatibility (EMC / EMI), power supply integrity (PI), and signal integrity (SI) are evaluated in particular. A large proportion of electronic circuits are implemented on printed circuit boards (PCBs), and electronic systems often have a large number and / or different types of PCBs. It is important to note that electronic circuits and enclosures should not only not emit electromagnetic radiation into the environment but should also be robust against incoming signals. The presence of simultaneous switching noise (SSN), also known as noise, ground bounce noise (GBN), or delta-I noise, is unavoidable in power distribution and supply networks (PDNs) that utilize power and ground planes, although the overall noise should be as low as possible.

[0005]

[0004] Since the power supply and ground planes used in printed circuit boards in the prior art form a cavity structure, any change in current or the presence of external or internal noise can lead to resonant modes in this cavity and / or excite it to vibrations, which in turn increases the noise, which can additionally propagate between the power supply and ground planes. Furthermore, the noise propagation between the power and ground planes can cause undesirable radiation emissions from the edges of the printed circuit board, which can disrupt the operation of external systems.

[0006]

[0005] The above problem is further exacerbated in the case of multilayer printed circuit boards used in the prior art, on which a large number of housings and electronic components are installed. As a result, the known printed circuit boards cannot achieve the required robustness against external disturbances and interference and / or the desired performance in many applications.

[0007]

[0006] One of the most common solutions for reducing noise, especially SSN, and eliminating the resulting radiation emissions is the use of decoupling capacitors. It should be noted that the inductance resulting from the metal connections and the resistance that occurs in series with these capacitors lead to an increase in impedance at high frequencies, which is why these capacitors are ineffective. Therefore, this method is limited to the frequency range of a few hundred MHz and does not provide a satisfactory solution.

[0008]

[0007] The use of embedded capacitors is another effective method for reducing noise, but this is not practical due to the high manufacturing costs of the corresponding printed circuit boards.

[0009]

[0008] Another known solution for reducing noise is the use of electromagnetic bandgap structures (EBGs). EBGs are typically implemented in planar and mushroom forms. The three-layer mushroom form is difficult to manufacture and expensive. In the planar form, the design and the cutting of power or ground planes can lead to interruptions in the signal return path, resulting in problems with signal integrity or increased radiation from the layers. Furthermore, planar EBGs cannot be used in layers mounted on metallic housings. Consequently, the signal quality decreases compared to the reference structure. Another disadvantage of the EBG structure is that metal feedthroughs between the metal layers are required for optimal response, which can lead to further complexity.

[0009] The use of absorbing material at the edges of a printed circuit board or a printed circuit board segment is another known solution for reducing noise, which is not practical due to the high production costs.

[0010]

[0010] Another approach to reducing noise is the use of seams and short circuits across connections. This solution reduces noise at the edges of a printed circuit board or a printed circuit board segment, but not between the power and ground planes, which is why the performance cannot be significantly increased in this way.

[0011]

[0011] Another known solution space for reducing noise at the edges is the placement of resistors between the power and ground plates at the edges of the printed circuit board. Such systems are described in DE 10 2006 031 037 B3, DE 10 2007 036 698 B4, US 7 674 988 B2 of fenbart, in which a solution is proposed using special structures for shielding printed circuit boards and reducing radiation emissions, and also in US 7 786 621 B2, DE 10 2005 050 147 B4, DE 10 2005 050 147 B8, in which the use of nonlinear or time-variable elements between the power supply and grounding levels is proposed, which shifts the noise power to higher frequencies and reduces the noise power within the frequency range of the EMI standard.

[0012]

[0012] The general technical background of the invention also includes DE 10 2015 004 339 Al, which discloses an embodiment of electrical circuit boards for producing an LED puzzle; US 7 355 562 B2, which discloses an electronic graphics panel with modular, pluggable and lockable components; DE 10 2013 113 001 Al, which discloses a module designed as an organic light-emitting diode with a light-emitting front on a substrate and a back; DE 38 22 071 C2, which discloses a method for producing multilayer rigid-flexible circuit boards; WO 2008 / 134809 Al, which discloses a system for connecting circuit boards; and WO 93 / 11652 Al, which discloses a circuit board combination and a corresponding method.

[0013]

[0013] No efficient solution for the assembly of printed circuit boards or printed circuit board segments is known by the known methods and devices, which adequately considers all aspects of electromagnetic compatibility (EMC / EMI), power supply integrity (PI), and signal integrity (SI). In particular, it is important that the noise and EMC / EMI of the printed circuit boards are as low as possible without significantly impairing power supply integrity and signal integrity.

[0014]

[0014] The object of the invention is to improve the state of the art.

[0015]

[0015] The problem is solved by a

[0016] Unit cell arrangement, comprising a first

[0017] Unit cell assembly, a dielectric layer arranged in a vertical direction contacting the first unit cell assembly, and a second unit cell assembly arranged in a vertical direction contacting the dielectric layer, wherein the first unit cell assembly comprises a first unit cell, which is configured as a power supply cell, and a second unit cell, which is configured as a ground cell, arranged at a distance to the side of the first unit cell, wherein the second unit cell assembly comprises a third unit cell, which is configured as a power supply cell, and a fourth unit cell, which is configured as a ground cell, arranged at a distance to the side of the third unit cell, wherein the first unit cell is arranged in a vertical direction above the fourth unit cell and the second unit cell is arranged in a vertical direction above the third unit cell, characterized in thatthat the first unit cell is electrically connected to the third unit cell by means of at least one electrically conductive connecting element on a first contacting element arranged on the first unit cell and the third unit cell, and that the second unit cell is electrically connected to the fourth unit cell by means of at least one electrically conductive connecting element on a second contacting element arranged on the second unit cell and the fourth unit cell.

[0018]

[0016] The unit cell arrangement, also called a printed circuit board segment, is characterized in particular by a new structure for the power distribution and power supply network. Advantageously, the unit cell arrangement according to the invention reduces radiation emission emanating from the unit cell arrangement, in particular far- and near-field interference emission, also called noise, and increases the robustness of the unit cell arrangement against external emissions.

[0019]

[0017] By means of the device according to the invention, electromagnetic interference is advantageously reduced by the specific design reducing far-field and near-field radiation from edges of the unit cell arrangement.

[0020]

[0018] In addition, the inventive design of the unit cell arrangement advantageously increases the resistance of the unit cell arrangement and of a printed circuit board constructed from unit cell arrangements according to the invention to external disturbances, such as radiation emissions.

[0021]

[0019] The inventive design of the unit cell arrangement advantageously achieves the required functionality without significantly increasing the complexity of the construction process, thereby avoiding unnecessary increase in manufacturing costs.

[0022]

[0020] The inventive design of the unit cell arrangement advantageously has only very minor negative effects on signal integrity (SI), switching noise (SSN), and power supply integrity (PI), and in some cases even improves them.

[0021] A key aspect of the invention is that the power supply is routed through a multilayer printed circuit board made up of printed circuit board segments in such a way as to reduce noise.

[0023]

[0022] The following terms are explained:

[0024]

[0023] A “unit cell arrangement” is understood to be, in particular, an element which can be used alone or in combination with a plurality of unit cell arrangements as a printed circuit board (PCB).

[0025]

[0024] Electrically conductive tracks can be applied to, or are already applied to, the unit cell arrangement or the unit cell arrangements. Additionally or alternatively, electrical components can be arranged on the unit cell arrangement or the unit cell arrangements.

[0026]

[0025] The unit cell arrangement has, in particular, three layers: a first unit cell assembly, a dielectric layer arranged in a vertical direction and contacting the first unit cell assembly, and a second unit cell assembly arranged in a vertical direction and contacting the dielectric layer. The dielectric layer has a permittivity, also called relative permittivity, s r from 2 to 6, in particular 4.3 and a loss factor loss level of 0.001 to 0.5, in particular 0.02.

[0027]

[0026] Additional layers, in particular adhesive layers or the like, can be arranged between or supplementarily between the layers of the unit cell assembly. The direction of the arrangement of the layers is essentially irrelevant.

[0028]

[0027] The “first unit cell assembly” is understood in particular to mean an arrangement of a first unit cell and a second unit cell spaced apart laterally next to the first unit cell.

[0029]

[0028] The first unit cell of the first unit cell assembly is, in particular, configured as a power supply cell. The second unit cell of the first unit cell assembly is, in particular, configured as a ground cell.

[0030]

[0029] The “second unit cell assembly” refers in particular to an arrangement of a third unit cell and a fourth unit cell spaced apart laterally next to the third unit cell.

[0031]

[0030] In one embodiment, the first, second, third, and / or fourth unit cells each have a base plate. The base plate has at least three edges. The base plate can be made of a plastic, a fiber composite material, or the like. Advantageously, the base plate provides dimensional stability. In one embodiment, the base plate of the first, second, third, and fourth unit cells is made of an electrically conductive material, in particular copper. Conductivity is thus advantageously achieved.

[0032]

[0031] In one embodiment, each base plate of the first, second, third, and fourth unit cell has a rectangular, and in particular a square, shape. The base plate can have an edge length of 15 mm to 30 mm, in particular 21.25 mm, and a thickness of 20 pm to 50 pm, in particular 35 pm. Using such base plates for the unit cells, an optimal size of the unit cell arrangement can advantageously be achieved.

[0033]

[0032] The third unit cell of the second unit cell assembly is, in particular, configured as a power supply cell. The fourth unit cell of the second unit cell assembly is, in particular, configured as a ground cell.

[0034]

[0033] In the unit cell arrangement, the first unit cell of the first unit cell assembly is electrically connected, in particular, to the third unit cell of the second unit cell assembly, in particular by means of at least one electrically conductive connecting element, in particular comprising copper. The first electrically conductive connecting element is in particular arranged on at least one contacting element of the first unit cell and on at least one contacting element of the third unit cell.

[0035]

[0034] Additionally or alternatively, the first electrically conductive connecting element penetrates the dielectric layer which is located between the at least one contacting element of the first unit cell and the at least one contacting element of the third unit cell.

[0036]

[0035] In the unit cell arrangement, the second unit cell of the first unit cell assembly is additionally or alternatively electrically connected to the fourth unit cell of the second unit cell assembly, in particular by means of at least one second electrically conductive connecting element. The second electrically conductive connecting element is in particular arranged on at least one contacting element of the second unit cell and on at least one contacting element of the fourth unit cell. Additionally or alternatively, the second electrically conductive connecting element penetrates the dielectric layer that exists between the at least one contacting element of the second unit cell and the at least one contacting element of the fourth unit cell.

[0037]

[0036] A second form of the second unit cell, which is characterized in particular by an arrangement of the at least one contacting element on the second unit cell and / or which comprises the at least one contacting element of the second unit cell, corresponds in particular to a fourth form of the fourth unit cell, which is characterized in particular by an arrangement of the at least one contacting element on the fourth unit cell and / or which comprises the at least one contacting element of the fourth unit cell such that the at least one

[0038] Due to their shape, the contacting elements of the second unit cell and the fourth unit cell in the unit cell arrangement are advantageously at least partially overlapping.

[0039]

[0037] The shape of the first unit cell and the third unit cell correspond in particular to the shape of the second unit cell and the fourth unit cell such that the at least one contacting element of the first unit cell and the third unit cell in the unit cell assembly advantageously do not substantially cover the at least one contacting element of the second unit cell and the fourth unit cell.

[0040]

[0038] The at least one contacting element of the first unit cell projects from at least one edge surface of the first unit cell. Additionally or alternatively, a plurality of contacting elements can project from the edge surface of the first unit cell, a further contacting element from at least one further edge surface of the first unit cell, and / or at least one contacting element each from a plurality of edge surfaces of the first unit cell, and / or a plurality of contacting elements from the plurality of edge surfaces of the first unit cell. The same applies to the second unit cell, the third unit cell, the fourth unit cell, and / or further units.

[0041] Unit cells.

[0039] Advantageously, unit cells can be implemented as first standard elements which, for arrangement at an edge of a printed circuit board, have no contact elements at least on one edge surface and / or on two edge surfaces, and / or as second standard elements which are designed for arrangement far from the edge and, in particular, have contact elements on all edge surfaces. In this way, simple production-related manufacturability is achievable.

[0042]

[0040] According to one embodiment, at least one respective sub-element of the first contacting element projects from a respective first edge of the base plate of the first unit cell and / or the third unit cell. Additionally or alternatively, at least one respective sub-element of the second contacting element projects from a respective first edge of the base plate of the second unit cell and / or the fourth unit cell.

[0043]

[0041] In one embodiment, at least one sub-element of the first contacting element and / or at least one sub-element of the second contacting element each has a width of 0.5 mm to 2 mm, in particular 1 mm, and a length of 0.5 mm to 2 mm, in particular 1 mm. Additionally or alternatively, a through-hole is arranged on at least one sub-element of the first contacting element and at least one sub-element of the second contacting element. The through-hole has, in particular, a radius of 0.1 mm to 0.5 mm, in particular 0.25 mm. A secure connection of the unit cells can advantageously be achieved by inserting a connecting element into the through-holes.

[0044]

[0042] In one embodiment, more than three, in particular more than five, possibly exactly nine sub-elements of the first contacting element are arranged to project from at least the first edge of the first unit cell and / or at least the first edge of the third unit cell. Additionally or alternatively, more than three, in particular more than five, possibly exactly nine sub-elements of the second contacting element are arranged to project from at least the first edge of the second unit cell and / or at least the first edge of the fourth unit cell. Embodiments with more than the aforementioned number of sub-elements are also conceivable. In the unit cell arrangement, the edges of the unit cells that are in close proximity to one another have, in particular, a corresponding number of projecting sub-elements of the contacting elements.Designing the edges of the unit cells with three, five, or nine sub-elements advantageously achieves optimal connectivity of the unit cells and, additionally or alternatively, optimal tiling.

[0045]

[0043] A different number of sub-elements per edge located in close proximity in a unit cell arrangement is also possible, particularly if the geometric design of the sub-elements is essentially identical. The sub-elements of the first contacting element or the second contacting element arranged at the first edge of the first unit cell, the second unit cell, the third unit cell and / or the fourth unit cell have, in one embodiment, a respective distance of 1 mm to 2 mm, in particular 1.35 mm. The distance of the sub-elements corresponds in particular to a width of the corresponding sub-elements.To create a tiling of the unit cells, the sub-elements are each shifted along their edges such that adjacent edges of the unit cells lie essentially flush with each other after the unit cells have been arranged in the unit cell arrangement. This advantageously allows for a compact design of the unit cell arrangement.

[0046]

[0044] A contour of a first unit cell, second unit cell, third unit cell and / or fourth unit cell is defined in particular by a shape of the base plate and by an outer contour. A contour also includes in particular a projecting part element of a contacting element.

[0047]

[0045] In the unit cell arrangement, the sub-elements of the first contacting element are arranged, in particular, facing each other and at least partially overlapping each other. Additionally or alternatively, the sub-elements of the second contacting element in the unit cell arrangement are also facing each other and at least partially overlapping each other. This results in a form-related overlap of the sub-elements of the contacting elements along the stacking direction, so that a simple electrical contact can advantageously be achieved.

[0048]

[0046] A contour, also called shape, of the first unit cell, which is characterized in particular by an arrangement of the at least one contacting element at an edge of the first unit cell and / or which includes the at least one contacting element of the first unit cell, corresponds in particular to a third shape of the third unit cell, which is characterized in particular by an arrangement of the at least one contacting element at an edge of the third unit cell and / or which includes the at least one contacting element of the third unit cell, such that the at least one contacting element of the first unit cell and the third unit cell are advantageously at least partially overlapping in the unit cell arrangement due to the shape.

[0049]

[0047] In one embodiment, a first slot, in particular having a predefined shape, is realized as a spacer between the adjacent first unit cell and the second unit cell by means of a contouring. Additionally or alternatively, a second slot, in particular having a predefined shape, is realized as a spacer between the adjacent third unit cell and the fourth unit cell by means of a further contouring. The contouring of the first unit cell, the second unit cell, the third unit cell and / or the fourth unit cell can be polygonal. The contouring of the first unit cell and / or the third unit cell corresponds in particular to a contouring of the second unit cell and / or fourth unit cell, wherein the corresponding contourings advantageously realize a spaced tessellation.In other words, a predefined spacing of the unit cells is advantageously achieved by means of the first slot and / or the second slot.

[0050]

[0048] In one embodiment, the first slot and / or the second slot have a width of 0.001 mm to 0.01 mm. This advantageously allows for an optimal fit of the adjacent unit cells. Additionally or alternatively, the first slot and / or the second slot has a zigzag shape. A mounting position can advantageously be defined by means of a zigzag shape.

[0051]

[0049] In another aspect, the problem is solved by a printed circuit board according to claim 10.

[0052]

[0050] The printed circuit board has, in particular, a plurality of unit cell arrangements according to the invention. The unit cells of adjacent unit cell arrangements, which are designed as power supply cells, are electrically connected to each other, in particular by means of electrically conductive connecting elements and using contact elements arranged on the unit cells. Additionally or alternatively, the unit cells of adjacent unit cell arrangements, which are designed as ground cells, are electrically connected to each other, in particular by means of further electrically conductive connecting elements and further contact elements arranged on the unit cells.

[0053]

[0051] In one application of the printed circuit board, a current source is applied to the printed circuit board to simulate an external interference source, thereby initiating a magnetic current Ms at the edges of the printed circuit board, which, according to Huygens' law, leads to interference emission radiated from the edges of the printed circuit board. It holds that r where Ms is the magnetic current at the edges of the structure is and and The corresponding radiated electric and magnetic fields are present. The simulated external interference source initiates a specific polarity in each unit cell. In a circuit board corresponding to the prior art, with essentially parallel current-carrying traces, the interference source generates polarities acting essentially in the same direction, thereby increasing the intensity of the entire electric field and thus the noise or interference emission.

[0037] In the case of a similar interference source applied to a circuit board according to the invention, the "wound" circuit board structure realized by the arrangement of the unit cells results in a change of the induced polarity between the power supply and ground individual cells in each unit cell from the upper layer to the lower layer.In other words, due to the alternating arrangement of the power supply and grounding plates in a main observation unit cell, an adjacent interference source generates a different polarity than in all neighboring cells of the main observation unit cell. This interaction of opposing polarities reduces noise, also known as resulting radiation emission. In particular, the radiated emission in the far field and / or near field is reduced.

[0054]

[0052] It should be noted that the interference source can act at any position on the printed circuit board and / or at a multitude of positions on the printed circuit board. Additionally or alternatively, a current applied to the current-carrying unit cells can be the same size and / or different in size from a current applied as an interference source.

[0055]

[0053] In addition, the direct connection of the decoupling capacitors between the current-carrying and ground-carrying unit cells (without vias) advantageously reduces the series impedance of the capacitors, which lowers the impedance of a power network of the printed circuit board at very high frequencies.

[0054] In this way, a power distribution and power supply network of the printed circuit board is realized by means of the structure and arrangement of the unit cell arrangements, resulting in a printed circuit board which advantageously emits low interference and is robust against the influence of external interference.

[0056]

[0055] Further combinations of features and advantages correspond to the descriptions of the first-mentioned aspect.

[0057]

[0056] The invention will now be described with reference to

[0058] Examples of implementation are explained. They show

[0059] Figure 1 is a schematic representation of a first

[0060] A unit of 11 combined s,

[0061] Figure 2 is a schematic representation of a

[0062] Side view of a first

[0063] Unit cell arrangement,

[0064] Figure 3 is a schematic representation of a

[0065] Top view of the first

[0066] Unit cell arrangement,

[0067] Figure 4 is a schematic representation of a

[0068] Top view of a printed circuit board,

[0069] Figure 5 is a schematic representation of a

[0070] Side view of the circuit board, and

[0071] Figure 6 shows a diagram of an interference emission measurement.

[0072]

[0057] A unit cell array 101 has a first

[0073] Unit cell 103 and a second unit cell 105. The first unit cell 103 and the second unit cell 105 contain copper, with a copper thickness of 35 pm. The length and width of the first unit cell 103 and the second unit cell 105 are 22 mm.

[0074]

[0058] The first unit cell 103 is designed to carry current and has six first contact tongues 107a arranged at a right edge. A first bore 109a is arranged at each of the first contact tongues 107a. The second unit cell 105 is designed to carry ground and has five second contact tongues 107b arranged at a left edge. A second bore 109b is arranged at each of the second contact tongues 107b. The shapes of the first unit cell 103 and the second unit cell 105 correspond such that the adjacent unit cells 103, 105 do not touch each other, but the first bores 109a and second bores 109b essentially intersect a common central axis.

[0075]

[0059] The first unit cell arrangement 100 comprises the first unit cell assembly 101, a dielectric layer 113 arranged beneath the first unit cell assembly 101, and a second unit cell arrangement 201 arranged beneath the dielectric layer 113. The dielectric layer 113 is an FR4 dielectric having a permeability coefficient of 4.3 and a loss tangent of 0.02. The thickness of the first unit cell arrangement 100 is 1 mm.

[0076]

[0060] The second unit cell assembly 201 comprises a third unit cell 203 and a fourth unit cell 205. The third unit cell 203 has three contact tongues 107c and is essentially designed like the first unit cell 103, and the fourth unit cell 205 has four contact tongues (not shown) and is essentially designed like the second unit cell 105.

[0077]

[0061] The width of each contact tongue 107a, 107b, 107c is substantially 1 mm and the length of each contact tongue 107a, 107b, 107c is substantially 1 mm. The distance between adjacent contact tongues 107a, 107b, 107c is 2.8 mm. The first and second bores 109a, 109b are arranged substantially centrally on the contact tongues 107a, 107b, 107c. The radius of the first and second bores 109a, 109b is 0.25 mm.

[0078]

[0062] All dimensions mentioned can vary depending on the application and conditions. The disclosed dimensions correspond in particular to one possible embodiment. Scaling can be carried out, in particular, taking into account a substantially similar ratio of the dimensions to each other, whereby scaling without maintaining the ratios is also not limiting for the invention. In particular, a change in the number of contact tongues can lead to dimensions that exhibit a significant deviation from the scaled dimensions of the dimensions shown in the embodiment.

[0079]

[0063] The unit cells 103, 203 are electrically connected by means of first connecting elements Illa at the respective overlapping first contact tongues 107a of the first unit cell 103 and third contact tongues 107c of the third unit cell 203. The plurality of first connecting elements Illa are arranged within the first bore 109a and the third bores (not shown) arranged on the third unit cell 203 and each penetrates the dielectric layer 113 between the first contact tongues 107a of the first unit cell 101 and the third contact tongues 107c of the third unit cell 203.

[0080]

[0064] The second unit cell 105 and the fourth unit cell 205 are electrically connected to each other at the overlapping third contact tongues 107b and fourth contact tongues (not shown) by means of second connecting elements 111b. The plurality of second connecting elements 111b are arranged within the second bore 109b of the second unit cell 105 and in the fourth bores (not shown) arranged at the contact tongues of the fourth unit cell 205 and each penetrates the dielectric layer 113 between the second contact tongues 107b of the second unit cell 105 and the four contact tongues of the fourth unit cell 205.

[0081]

[0065] A printed circuit board 301 has an upper layer with 16 unit cells 303, 305, 313, 315, 323, 325, a dielectric layer 113, and a lower layer with 16 unit cells 303, 305, 313, 315, 323, 325. The layers are bonded together. The printed circuit board 301 has a width and length of 88 mm and a thickness of 1 mm. The dimensions of the printed circuit board 301 are the same as those of the unit cell assembly 101.

[0082]

[0066] The plurality of unit cells 303, 305, 313, 315, 323, 325 are designed as current-carrying corner element unit cell 303, mass-carrying edge element unit cell 305, current-carrying edge element unit cell 313, mass-carrying corner element unit cell 315, current-carrying central element unit cell 323 or mass-carrying central element unit cell 325 and are arranged relative to each other such that in a layer each current-carrying unit cell 303, 313, 323 is only adjacent to mass-carrying unit cells 305, 315, 325 and each mass-carrying unit cell 305, 315, 325 is only adjacent to current-carrying unit cells 303, 313, 323. In addition, the unit cells 303, 305, 313, 315, 323, 325 of the lower layer are arranged such that a mass-carrying unit cell 305, 315, 325 is located under a current-carrying unit cell 303, 313, 323 and a current-carrying unit cell 303, 313, 323 is located under a mass-carrying unit cell 305, 315, 325.Finally, the unit cells 303, 305, 313, 315, 323, 325 are arranged such that contact tongues 107a, 107b, 107c are present at the edges of adjacent unit cells 303, 305, 313, 315, 323, 325 and no contact tongues protrude from the outer edge of the circuit board 301.

[0083]

[0067] In particular, at all contact tongues of the unit cells 303, 305, 313, 315, 323, 325 of the printed circuit board 301, the respective current-carrying unit cells 303, 313, 323 are electrically connected to each other and the respective ground-carrying unit cells 305, 315, 325 are electrically connected to each other by means of connecting elements that penetrate the dielectric layer 113. In this way, current is conducted along a predefined path through the printed circuit board 301.

[0084]

[0068] The effectiveness of the printed circuit board 301 according to the invention is demonstrated by the diagram in Figure 6. The ordinate shows the sensor-determined maximum noise E at a distance of 3 meters (far field range) in dB, and the abscissa shows the frequency in Hz. Graph 1 shows the measurement results of a printed circuit board 301 exposed to an interference source generated by a CST Studio Suite 3D full-wave electromagnetic simulator. Graph 2 shows the measurement results of a conventional printed circuit board according to the prior art exposed to an interference source generated by a CST Studio Suite 3D full-wave electromagnetic simulator in the same way as the printed circuit board 301. The diagram demonstrates a reduction in interference emissions for the printed circuit board according to the invention.

[0085] Reference character list

[0086] 100 first unit cell arrangement

[0087] 101 unit cell cluster

[0088] 103 first unit cell

[0089] 105 second unit cell

[0090] 107a first contact tongue

[0091] 107b second contact tongue

[0092] 107c third contact tongue

[0093] 109a first borehole

[0094] 109b second borehole

[0095] I l la first connecting element

[0096] 111b second connecting element

[0097] 113 dielectric layer

[0098] 201 Unit cell arrangement

[0099] 203 third unit cell

[0100] 205 fourth unit cell

[0101] 301 circuit board

[0102] 303 current-carrying corner element unit cell

[0103] 305 mass-bearing edge element unit cell

[0104] 313 current-carrying edge element unit cell

[0105] 315 mass-carrying corner element unit cell

[0106] 323 current-carrying central element unit cell

[0107] 325 mass-carrying central element unit cell

Claims

Patent claims:

1. Unit cell arrangement (100) comprising a first unit cell assembly (101), a dielectric layer (113) arranged in a vertical direction contacting the first unit cell assembly (101), and a second unit cell assembly (201) arranged in a vertical direction contacting the dielectric layer (113), wherein the first unit cell assembly (101) comprises a first unit cell (103) configured as a power supply cell and a second unit cell (105) arranged laterally spaced next to the first unit cell (103), configured as a ground cell, wherein the second unit cell assembly (201) comprises a third unit cell (203) configured as a power supply cell and a fourth unit cell (205) configured as a ground cell arranged laterally spaced next to the third unit cell (203).wherein the first unit cell (103) is arranged vertically above the fourth unit cell (205) and the second unit cell (105) is arranged vertically above the third unit cell (203), characterized in that the first unit cell (103) is electrically connected to the third unit cell (203) by means of at least one first electrically conductive connecting element (Illa) on a first contacting element (107a, 107c) arranged on the first unit cell (103) and the third unit cell (203), and the second, The unit cell (105) is electrically connected to the fourth unit cell (205) by means of at least a second electrically conductive connecting element (111b) on a second contacting element (107b) arranged on the second unit cell (105) and the fourth unit cell (205).

2. Unit cell arrangement (100) according to the preceding claim, wherein each of the first unit cell (103), the second unit cell (105), the third unit cell (203) and the fourth unit cell (205) each has a base plate with at least three edges, wherein at least one partial element of the first contacting element (107a, 107c) is arranged to project from at least a first edge of the base plate of the first unit cell (103) and from a first edge of the base plate of the third unit cell (203), and wherein at least one partial element of the second contacting element (107b) is arranged to project from a first edge of the base plate of the second unit cell (105) and from a first edge of the base plate of the fourth unit cell (205), wherein the partial elements of the first contacting element (107a, 107c) are in the The unit cell arrangement (100) is arranged facing each other and overlapping at least partially, and the sub-elements of the second contacting element (107b) in the unit cell arrangement (100) are arranged facing each other and overlapping at least partially.

3. Unit cell arrangement (100) according to the above Claim, wherein a contour of the first unit cell (103) corresponds to a contour of the second unit cell (105) such that a first slot with a predefined shape is realized between the adjacent first unit cell (103) and second unit cell (105), and wherein a contour of the third unit cell (203) corresponds to a contour of the fourth unit cell (205) such that a second slot with a predefined shape is realized between the adjacent third unit cell (203) and fourth unit cell (205).

4. Unit cell arrangement (100) according to the preceding claim, wherein the first slot and / or the second slot has a width of 0.001 mm to 0.01 mm and is particularly zigzag-shaped.

5. Unit cell arrangement (100) according to claim 2, wherein the respective base plate of the first unit cell (103), the second unit cell (105), the third unit cell (203) and the fourth unit cell (205) comprises an electrically conductive material, in particular copper.

6. Unit cell arrangement (100) according to claim 2 or 5, wherein the respective base plate of the first unit cell (103), the second unit cell (105), the third unit cell (203) and / or the fourth unit cell (205) is square, in particular with an edge length of 15 mm to 30 mm, in particular 21.25 mm, and has a thickness of 20 pm to 50 pm, in particular 35 pm.

7. Unit cell arrangement (100) according to claim 2, wherein the Sub-elements of the first contacting element (107a, 107c) and / or the sub-elements of the second The contacting element (107b) each has a width of 0.5 mm to 2 mm, in particular 1 mm and a length of 0.5 mm to 2 mm, in particular 1 mm, and a through hole (109a, 109b) with a radius of 0.1 mm to 0.5 mm, in particular 0.25 mm.

8. Unit cell arrangement (100) according to claim 2 or 7, wherein at least on the first edge of the first unit cell (103) and / or at least on the first edge of the third unit cell (203) more than three, in particular more than five, possibly exactly nine sub-elements of the first contacting element (107a, 107b) project and / or wherein at least on the first edge of the second unit cell (105) and / or at least on the first edge of the fourth unit cell (205) more than three, in particular more than five, possibly exactly nine sub-elements of the second Detach contact element (107c).

9. Unit cell arrangement (100) according to the preceding claim, wherein the partial elements of the first contacting element (107a, 107b) or the second unit cell (105) arranged respectively at the first edge of the first unit cell (103), the second unit cell (105), the third unit cell (203) and / or the fourth unit cell (205) The contacting elements (107c) have a distance of 1 mm to 2 mm, in particular 1.35 mm, from each other.

10. Printed circuit board (301) comprising a plurality of unit cell arrangements (100) according to one of the preceding claims, wherein unit cells (103, 203) configured as power supply cells adjacent Unit cell arrangements (100) are electrically connected to each other by means of electrically conductive connecting elements (Illa, 111b) and contacting elements (107a, 107b), wherein unit cells (105, 205) designed as ground cells are adjacent Unit cell arrangements (100) are electrically connected to each other by means of further electrically conductive connecting elements (111c) and further contacting elements (107c).

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