Semiconductor device

Abstract

A semiconductor device according to an embodiment of the present invention includes: a nitride semiconductor layer; a first insulating film provided on the nitride semiconductor layer; a first electrode located on the first insulating film and electrically connected to the nitride semiconductor layer; a second electrode located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer; a third electrode having a first portion located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer and a second portion located on the first portion and having a length in a first direction in which the first electrode and the second electrode are arranged that is longer than the length of the first portion in the first direction; and a single-layer second insulating film provided on the nitride semiconductor layer and in contact with a surface of the first portion facing the first-electrode side and a surface of the second portion facing the nitride-semiconductor-layer side.

Description

Semiconductor equipment

[0001] Embodiments of the present invention relate to semiconductor devices.

[0002] Semiconductor elements such as transistors and diodes are used in circuits such as switching power supply circuits and inverter circuits. These semiconductor elements require high voltage resistance and low on-resistance. There is a trade-off relationship between voltage resistance and on-resistance, which is determined by the element material.

[0003] Thanks to advances in technological development, semiconductor devices have achieved extremely low on-resistance, close to the limits of silicon, the primary device material. To further improve voltage resistance or reduce on-resistance, it is necessary to change the device material. By using nitride semiconductors such as gallium nitride and aluminum gallium nitride as the device material for semiconductor devices, the trade-off relationship determined by the device material can be improved. This makes it possible to dramatically increase the voltage resistance and lower the on-resistance of semiconductor devices.

[0004] Patent No. 6270572, Patent No. 6879662

[0005] The problem that this invention aims to solve is to provide a semiconductor device with excellent characteristics.

[0006] The semiconductor device of the embodiment includes a nitride semiconductor layer, a first insulating film provided on the nitride semiconductor layer, a first electrode located on the first insulating film and electrically connected to the nitride semiconductor layer, a second electrode located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer, a third electrode located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer, a first part located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer, a second part located on the first part and having a length in the first direction, which is the direction in which the first electrode and the second electrode are aligned, that is longer than the length of the first part in the first direction, and a second insulating film provided on the nitride semiconductor layer and in contact with the surface of the first part facing the first electrode and the surface of the second part facing the nitride semiconductor layer.

[0007] Schematic diagram of the semiconductor device according to the embodiment. Schematic diagram of the semiconductor device according to the embodiment. Schematic diagram of the semiconductor device according to the embodiment. Schematic diagram of the semiconductor device according to the embodiment. Schematic diagram of the semiconductor device according to the embodiment. Schematic diagram of the semiconductor device according to the embodiment. Schematic diagram of the semiconductor device according to the embodiment. Schematic diagram of the semiconductor device according to the embodiment. Schematic diagram of the semiconductor device according to the embodiment. Schematic diagram of the manufacturing method of the semiconductor device according to the embodiment. Schematic diagram of the manufacturing method of the semiconductor device according to the embodiment. Schematic diagram of the manufacturing method of the semiconductor device according to the embodiment. Schematic diagram of the manufacturing method of the semiconductor device according to the embodiment. Schematic diagram of the manufacturing method of the semiconductor device according to the embodiment. Schematic diagram of the manufacturing method of the semiconductor device according to the embodiment.

[0008] Embodiments of the present invention will be described below with reference to the drawings. In the following description, the same or similar components will be denoted by the same reference numerals, and components that have already been described may be omitted from the description.

[0009] In this specification, "nitride semiconductor layer" includes "GaN-based semiconductor." "GaN-based semiconductor" is a general term for semiconductors comprising gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), and intermediate compositions thereof.

[0010] In this specification, "undopped" means an impurity concentration of 2 × 10⁻⁶ １６ cm －３ This means the following:

[0011] In this specification, the upper direction in a drawing is referred to as "up" and the lower direction in a drawing as "down" to indicate the positional relationship of parts, etc. In this specification, the concepts of "up" and "down" do not necessarily refer to a relationship with the direction of gravity.

[0012] (First Embodiment) The semiconductor device of the first embodiment comprises a substrate 1A, a nitride semiconductor layer 1 including a buffer layer 1B, a channel layer 1C (first nitride semiconductor layer) and a barrier layer 1D (second nitride semiconductor layer), a gate insulating film (first insulating film) 2, a gate electrode (first electrode) 3, a gate field plate electrode (third field plate electrode) 4, a source electrode (second electrode) 5, a first source field plate electrode (first field plate electrode) 6, a second source field plate electrode (fourth field plate electrode) 7, a drain electrode (third electrode) 8, a drain field plate electrode (second field plate electrode) 9, a drain electrode side insulating film (second insulating film) 10, and an interlayer insulating film (fifth insulating film) 11.

[0013] In embodiments that include modifications of the first embodiment, some or all of the modified or added configurations can be adopted in other embodiments.

[0014] Figure 1 is a schematic diagram of a semiconductor device according to the first embodiment. The semiconductor device is, for example, a HEMT (High Electron Mobility Transistor) 100 using a GaN-based semiconductor. Figure 2 is a schematic diagram including the A-A' cross-section of the semiconductor device 100 of Figure 1. The following description primarily concerns the configuration within the element region.

[0015] The substrate 1A is formed from, for example, silicon (Si). In addition to silicon, for example, sapphire (Al ２ O ３ It is also possible to apply materials such as ) or silicon carbide (SiC).

[0016] A buffer layer 1B is provided on the substrate 1A. The buffer layer 1B has the function of mitigating lattice mismatch between the substrate 1A and the channel layer 1C. The buffer layer 1B is made of, for example, aluminum gallium nitride (Al Ｗ Ga １－Ｗ It is formed in a multilayer structure of N (0 < W ≤ 1).

[0017] The channel layer 1C is provided on the buffer layer 1B. The channel layer 1C is also called the electron transport layer. The channel layer 1C is made of, for example, undoped aluminum gallium nitride (Al Ｘ Ga１－Ｘ N (0 ≤ X < 1)). More specifically, for example, it is undoped gallium nitride (GaN). The thickness of the channel layer 1C is, for example, 0.1 [μm] or more and 10 [μm] or less. In an embodiment, the thickness is the length (height) of each member in the stacking direction (Y direction) of the channel layer 1C and the barrier layer 1D including the channel layer 1C.

[0018] The barrier layer 1D is provided on the channel layer 1C. The barrier layer 1D is also referred to as an electron supply layer. The bandgap of the barrier layer 1D is larger than the bandgap of the channel layer 1C. The barrier layer 1D is, for example, undoped aluminum gallium nitride (Al Ｙ Ga １－Ｙ N (0 < Y ≤ 1, X < Y)). More specifically, for example, it is undoped Al ０．２５ Ga ０．７５ N. The thickness of the barrier layer 1D is, for example, 2 nm or more and 100 nm or less.

[0019] Between the channel layer 1C and the barrier layer 1D is a hetero-junction interface. A two-dimensional electron gas (2DEG) is formed at the hetero-junction interface and becomes the carrier of the HEMT100.

[0020] The gate insulating film 2 is provided between the source electrode 5 and the drain electrode 8. The gate insulating film 2 may be in direct contact with the source electrode 5 or may be separated from the source electrode 5 in the first direction X. The gate insulating film 2 is not in direct contact with the drain electrode 8 and is separated from the drain electrode 8 in the first direction X. The nitride semiconductor layer 1 and the gate insulating film 2 are stacked in the second direction. The gate insulating film 2 is, for example, an oxide or a nitride. The gate insulating film 2 is, for example, silicon nitride (SiN), aluminum oxide, silicon oxynitride, or aluminum oxynitride. The gate insulating film 2 is a dense insulating film. The density of the gate insulating film 2 is, for example, 2 [g / cm ３ or more and 3.16 [g / cm ３ or less is preferable. The thickness of the gate insulating film 2 is, for example, 10 [nm] or more and 100 [nm] or less.

[0021] The gate electrode 3 is located on the gate insulating film 2. The gate electrode 3 is provided between the source electrode 5 and the drain electrode 8.

[0022] The gate electrode 3 is an electrode having a plurality of fingers extending in the third direction (Z direction). Each comb-shaped finger of the gate electrode 3 extends in the third direction, and the fingers are arranged in the first direction (X direction). The gate electrode 3 is an electrode provided on the gate insulating film 2 provided on the channel layer 1C and the barrier layer 1D. The gate electrode 3 is connected to the channel layer 1C and the barrier layer 1D via the gate insulating film 2. The gate electrode 3 is, for example, in direct contact with the gate insulating film 2. The gate electrode 3 is provided between the source electrode 5 and the drain electrode 8 in the first direction. It is preferable that a gate field plate electrode 4 is provided on the gate electrode 3.

[0023] The third direction intersects the first and second directions. The first direction intersects the third and second directions. Preferably, the third direction is orthogonal to the plane formed by the first and second directions, the first direction is orthogonal to the plane formed by the third and second directions, and the second direction is orthogonal to the plane formed by the third and first directions.

[0024] The gate electrode 3 is, for example, titanium nitride (TiN).

[0025] A gate insulating film 2 is provided between the gate electrode 3 and the barrier layer 1D, and the semiconductor device 100 can be made into a MIS (Metal Insulator Semiconductor) type HEMT.

[0026] The gate field plate electrode 4 is electrically and directly connected to the gate electrode 3. The gate field plate electrode 4 is mainly made of aluminum, for example. The gate field plate electrode 4 includes, for example, a columnar portion that contacts the gate electrode 3 and a plate-shaped portion that contacts the columnar portion. The columnar portion is sandwiched between the plate-shaped portion and the gate electrode 3. The plate-shaped portion of the gate field plate electrode 4 is the portion that protrudes from the columnar portion on both sides of the source electrode 5 and the drain electrode 8. Preferably, the width of the plate-shaped portion of the gate field plate electrode 4 in the first direction is longer than the width of the gate electrode 3 in the first direction. Preferably, the width of the columnar portion of the gate field plate electrode 4 in the first direction is shorter than the width of the gate electrode 3 in the first direction. Other gate field plate electrodes (not shown) that connect to the gate electrode 3 can be provided. Preferably, the end face of the gate field plate electrode 4 (including any gate field plate electrodes (not shown) that are used optionally) on the drain electrode 8 side is located on the source electrode 5 side of the drain field plate electrode 9 in the first direction.

[0027] The source electrode 5 is an electrode having a plurality of fingers extending in a third direction. Each comb-shaped finger of the source electrode 5 extends in the third direction, and each finger is aligned in the first direction (X direction). For example, the fingers of the source electrode 5 are sandwiched between the fingers of the gate electrode 3. The source electrode 5 is provided on the nitride semiconductor layer 1, and more specifically, on the channel layer 1C and the barrier layer 1D. The source electrode 5 is electrically connected to the channel layer 1C and the barrier layer 1D.

[0028] The source electrode 5 is, for example, a metal electrode. The source electrode 5 is, for example, an aluminum film mainly composed of aluminum and containing 50 wt% or more of aluminum, or a laminated structure of titanium (Ti) and aluminum (Al). It is desirable that there be an ohmic contact between the source electrode 5 and the barrier layer 1D.

[0029] The cross-section of the source electrode 5 on the element region has, for example, a T shape. The source electrode 5 includes, for example, a bottom portion which is a columnar portion in contact with the barrier layer 1D and an upper portion which is a plate-like portion in contact with the columnar portion. The plate-like portion of the source electrode 5 is a portion protruding from the columnar portion in the direction of the gate electrode 3. The plate-like portion and the barrier layer 1D sandwich the columnar portion. The source electrode 5 preferably has a bottom portion and an upper portion whose lateral length is longer than the lateral length of the bottom portion.

[0030] The semiconductor device 100 preferably includes a first source field plate electrode 6. The first source field plate electrode 6 is mainly made of, for example, aluminum. By providing the field plate electrode, the electric field concentration on the electrode can be alleviated. The first source field plate electrode 6 is directly and electrically connected to the source electrode 5.

[0031] The cross-section of the first source field plate electrode 6 on the element region has, for example, a T shape. The first source field plate electrode 6 includes, for example, a bottom portion which is a columnar portion in contact with the source electrode 5 and an upper portion which is a plate-like portion in contact with the columnar portion. The plate-like portion and the source electrode 5 sandwich the columnar portion. The width of the plate-like portion of the first source field plate electrode 6 in the first direction is preferably longer than the width of the source electrode 5 in the first direction. The width of the columnar portion of the first source field plate electrode 6 in the first direction is preferably shorter than the width of the source electrode 5 in the first direction. The end face of the first source field plate electrode 6 on the drain electrode 8 side is preferably located on the drain electrode 8 side more than the end face of the gate electrode 3 on the drain electrode 8 side in the first direction.

[0032] The semiconductor device 100 preferably includes a second source field plate electrode 7. The second source field plate electrode 7 is mainly made of, for example, aluminum. By providing the field plate electrode, the electric field concentration on the electrode can be alleviated. The second source field plate electrode 7 is directly and electrically connected to the source electrode 5. The end face of the second source field plate electrode 7 on the gate electrode 3 side is preferably located on the drain electrode 8 side more than the end face of the gate electrode 3 on the drain electrode 8 side in the first direction.

[0033] The drain electrode 8 is provided on the channel layer 1C and the barrier layer 1D. The drain electrode 8 is electrically connected to the channel layer 1C and the barrier layer 1D. The drain electrode 8 is in contact with, for example, the barrier layer 1D.

[0034] The drain electrode 8 is, for example, a metal electrode. The drain electrode 8 is, for example, a laminated structure of titanium (Ti) and aluminum (Al). It is desirable that there be an ohmic contact between the drain electrode 8 and the barrier layer 1D.

[0035] The cross-section of the drain electrode 8 on the element region is, for example, T-shaped. The drain electrode 8 includes, for example, a first portion 8a which is a columnar portion in contact with the barrier layer 1D and a second portion 8b which is a plate-shaped portion in contact with the columnar portion. The first portion 8a is electrically connected to the nitride semiconductor layer 1. The second portion 8b is located on the first portion 8a, and its length in the first direction, which is the direction in which the gate electrode 3 and the source electrode 5 are aligned, is longer than the length of the first portion 8a in the first direction. The first portion 8a is sandwiched between the second portion 8b and the barrier layer 1D. It is preferable that the first portion 8a and the second portion 8b are directly electrically connected.

[0036] The drain electrode 8 may be a multi-stage electrode having multiple columnar and plate-shaped portions. Including the multi-stage drain electrode 8, the second part 8b is positioned closest to the nitride semiconductor layer 1 and is a portion that protrudes 0.01 [μm] or more toward the gate electrode 3 side from the columnar portion in the first direction X.

[0037] The semiconductor device 100 preferably includes a drain field plate electrode 9. The drain field plate electrode 9 is mainly made of, for example, aluminum. By providing a field plate electrode, electric field concentration on the electrode can be mitigated. The drain field plate electrode 9 is directly and electrically connected to the drain electrode 8.

[0038] The cross-section of the drain field plate electrode 9 on the element region is, for example, T-shaped. The drain field plate electrode 9 includes, for example, a columnar portion and a plate-shaped portion that are in contact with the drain electrode 8. Preferably, the end face of the drain field plate electrode 9 on the first source field plate electrode 6 side is located closer to the gate electrode 3 than the end face of the drain electrode 8 on the gate electrode 3 side in the first direction.

[0039] In Figure 1, the drain field plate electrode 9 has a single-stage T-shaped configuration, but it can be a multi-stage field plate electrode by stacking T-shaped members in a second direction. When the drain field plate electrode 9 is multi-stage, the uppermost columnar portion becomes the plate-shaped portion of the drain field plate electrode 9.

[0040] The drain electrode side insulating film 10 is an insulating film that sandwiches the side surface of the drain electrode 8. The drain electrode side insulating film 10 is provided between the gate insulating film 2 and the drain electrode 8 in the first direction X. The drain electrode side insulating film 10 is provided on the side surface of the first part 8a of the drain electrode 8 (the surface facing the gate electrode 3), the bottom surface of the second part 8b of the drain electrode 8 (the surface facing the nitride semiconductor layer 1), and the surface of the nitride semiconductor layer 1 facing the second part 8b of the drain electrode 8 between the gate insulating film 2 and the drain electrode 8 in the first direction X. Preferably, the drain electrode side insulating film 10 is in direct contact with the side surface of the first part 8a of the drain electrode 8, in direct contact with the bottom surface of the second part 8b of the drain electrode 8, and in contact with the surface of the nitride semiconductor layer 1 facing the second part b of the drain electrode 8 between the gate insulating film 2 and the drain electrode 8 in the first direction X.

[0041] It is preferable that the drain electrode side insulating film 10 is provided on the entire surface of the side surface of the first portion 8a of the drain electrode 8, the entire bottom surface of the second portion 8b of the drain electrode 8, and the entire surface of the nitride semiconductor layer 1 facing the second portion b side of the drain electrode 8 between the gate insulating film 2 and the drain electrode 8 in the first direction X. It is preferable that the drain electrode side insulating film 10 is in direct contact with the entire surface of the side surface of the first portion 8a of the drain electrode 8, in direct contact with the entire bottom surface of the second portion 8b of the drain electrode 8, and in contact with the entire surface of the nitride semiconductor layer 1 facing the second portion b side of the drain electrode 8 between the gate insulating film 2 and the drain electrode 8 in the first direction X.

[0042] It is preferable that the drain electrode side insulating film 10 is provided over the entire region sandwiched between the second part 8b of the drain electrode 8 and the nitride semiconductor layer 1 in the second direction Y.

[0043] The drain electrode side insulating film 10 is preferably a single-layer insulating film. The single-layer drain electrode side insulating film 10 is provided on the side surface of the first portion 8a of the drain electrode 8, the bottom surface of the second portion 8b of the drain electrode 8, and the surface of the nitride semiconductor layer 1 facing the second portion b side of the drain electrode 8 between the gate insulating film 2 and the drain electrode 8 in the first direction X. The single-layer drain electrode side insulating film 10 is preferably in direct contact with the side surface of the first portion 8a of the drain electrode 8, in direct contact with the bottom surface of the second portion 8b of the drain electrode 8, and in contact with the surface of the nitride semiconductor layer 1 facing the second portion b side of the drain electrode 8 between the gate insulating film 2 and the drain electrode 8 in the first direction X.

[0044] Preferably, the single-layer drain electrode-side insulating film 10 is provided on the entire surface of the side surface of the first portion 8a of the drain electrode 8, the entire bottom surface of the second portion 8b of the drain electrode 8, and the entire surface of the nitride semiconductor layer 1 facing the second portion b side of the drain electrode 8 between the gate insulating film 2 and the drain electrode 8 in the first direction X. Preferably, the single-layer drain electrode-side insulating film 10 is in direct contact with the entire surface of the side surface of the first portion 8a of the drain electrode 8, in direct contact with the entire bottom surface of the second portion 8b of the drain electrode 8, and in direct contact with the entire surface of the nitride semiconductor layer 1 facing the second portion b side of the drain electrode 8 between the gate insulating film 2 and the drain electrode 8 in the first direction X.

[0045] The drain electrode side insulating film 10 is preferably an insulating film of a single compound. The drain electrode side insulating film 10, which is an insulating film of a single compound, is provided on the side surface of the first part 8a of the drain electrode 8, the bottom surface of the second part 8b of the drain electrode 8, and the surface of the nitride semiconductor layer 1 facing the second part b side of the drain electrode 8 between the gate insulating film 2 and the drain electrode 8 in the first direction X. The drain electrode side insulating film 10, which is an insulating film of a single compound, is preferably in direct contact with the side surface of the first part 8a of the drain electrode 8, in direct contact with the bottom surface of the second part 8b of the drain electrode 8, and in direct contact with the surface of the nitride semiconductor layer 1 facing the second part b side of the drain electrode 8 between the gate insulating film 2 and the drain electrode 8 in the first direction X.

[0046] It is preferable that the drain electrode side insulating film 10, which is an insulating film of one type of compound, is provided on the entire surface of the side surface of the first part 8a of the drain electrode 8, the entire surface of the bottom surface of the second part 8b of the drain electrode 8, and the entire surface of the nitride semiconductor layer 1 facing the second part b side of the drain electrode 8 between the gate insulating film 2 and the drain electrode 8 in the first direction X. It is preferable that the drain electrode side insulating film 10, which is an insulating film of one type of compound, is in direct contact with the entire surface of the side surface of the first part 8a of the drain electrode 8, in direct contact with the entire surface of the bottom surface of the second part 8b of the drain electrode 8, and in direct contact with the entire surface of the nitride semiconductor layer 1 facing the second part b side of the drain electrode 8 between the gate insulating film 2 and the drain electrode 8 in the first direction X.

[0047] The drain electrode side insulating film 10 is preferably a single layer insulating film of one type of compound. The drain electrode side insulating film 10, which is a single layer insulating film of one type of compound, is provided on the side surface of the first part 8a of the drain electrode 8, the bottom surface of the second part 8b of the drain electrode 8, and the surface of the nitride semiconductor layer 1 facing the second part b side of the drain electrode 8 between the gate insulating film 2 and the drain electrode 8 in the first direction X. The drain electrode side insulating film 10, which is a single layer insulating film of one type of compound, is preferably in direct contact with the side surface of the first part 8a of the drain electrode 8, in direct contact with the bottom surface of the second part 8b of the drain electrode 8, and in direct contact with the surface of the nitride semiconductor layer 1 facing the second part b side of the drain electrode 8 between the gate insulating film 2 and the drain electrode 8 in the first direction X.

[0048] The drain electrode side insulating film 10, which is an insulating film of one type of compound in a single layer, is preferably provided on the entire surface of the side surface of the first part 8a of the drain electrode 8, the entire surface of the bottom of the second part 8b of the drain electrode 8, and the entire surface of the nitride semiconductor layer 1 facing the second part b side of the drain electrode 8 between the gate insulating film 2 and the drain electrode 8 in the first direction X.

[0049] The drain electrode side insulating film 10 is made of silicon oxide (SiO ２） Preferably, the insulating film is a compound selected from the group consisting of silicon nitride (SiN) and silicon oxynitride (SiON), ２ Or, more preferably, an insulating film of SiN, SiO ２ It is even more preferable that the insulating film is of a certain type.

[0050] The height of the drain electrode side insulating film 10 in the second direction Y (the distance in the second direction Y from the surface of the drain electrode side insulating film 10 on the nitride semiconductor layer 1 side (the surface of the barrier layer 1D) to the surface of the drain electrode side insulating film 10 facing the second part 8b) is preferably 0.05 [μm] or more and 0.5 [μm] or less, more preferably 0.05 [μm] or more and 0.4 [μm] or less, and even more preferably 0.1 [μm] or more and 0.3 [μm] or less.

[0051] In Figure 1, the insulating film 10 on the drain electrode side sandwiches the drain electrode 8, as well as the gate electrode 3, the gate field plate electrode 4, and the source electrode 5.

[0052] The drain electrode side insulating film 10 in Figure 1 is also provided between the gate insulating film 2 and the interlayer insulating film 11.

[0053] Referring to the schematic diagram of the semiconductor device 100 in Figure 3, the distance relationship between the gate insulating film 2 and the drain electrode 8, and the distance relationship between the drain electrode side insulating film 10 and the drain electrode 8 will be explained. The schematic diagram shown in Figure 3 is a partial schematic diagram of the area around the drain electrode 8 of the semiconductor device 100.

[0054] The distance d1 between the gate insulating film 2 and the drain electrode 8 is the distance between the gate insulating film 2 and the drain electrode 8 in the first direction X (in Figures 1 and 3, the direction from the gate electrode 3 towards the drain electrode 8). The distance d1 is also the length in the first direction X where the nitride semiconductor layer 1 and the drain electrode side insulating film 10 are in contact between the gate insulating film 2 and the drain electrode 8.

[0055] The distance d2 is the length by which the second portion 8b of the drain electrode 8 protrudes from the first portion 8a toward the gate electrode 3 in the first direction X. The distance d2 is also the length in the first direction X by which the second portion 8b of the drain electrode 8 is in contact with the drain electrode side insulating film 10.

[0056] From the viewpoint of suppressing collapses occurring near the drain electrode 8, d1 is preferably 0.05 [μm] or more and 5 [μm] or less, more preferably 0.05 [μm] or more and 4 [μm] or less, and even more preferably 0.1 [μm] or more and 3 [μm] or less.

[0057] From the viewpoint of suppressing collapses occurring near the drain electrode 8, d1-d2 is preferably 0.2 [μm] or more and 10 [μm] or less, more preferably 0.2 [μm] or more and 5 [μm] or less, and even more preferably 0.2 [μm] or more and 3 [μm] or less.

[0058] From the viewpoint of suppressing the collapse that occurs near the drain electrode 8, (d1-d2) is preferably 1 to 50 times d2, more preferably 1 to 30 times d2, and even more preferably 1 to 10 times d2.

[0059] The distance d3 is defined as the distance between the first part 8a of the drain electrode 8 and the first source field plate electrode 6 in the first direction X.

[0060] The distance between d3 and d1 is preferably 1 μm or more and 20 μm or less, more preferably 1 μm or more and 15 μm or less, and even more preferably 3 μm or more and 12 μm or less.

[0061] Let the distance between the drain field plate electrode 9 and the gate insulating film 2 in the first direction X be distance d4.

[0062] d4 is preferably -3 [μm] to 5 [μm], more preferably -2 [μm] to 4 [μm], and even more preferably -1 [μm] to 2 [μm]. When d4 takes a negative value, the gate insulating film 2 and the drain field plate electrode 9 overlap in the Y direction, and d4 is the distance at which the gate insulating film 2 and the drain field plate electrode 9 overlap.

[0063] The distance between the source electrode 5 and the drain electrode 8 (the terminal distance between the source electrode 5 and the drain electrode 8) is, for example, 5 [μm] or more and 30 [μm] or less.

[0064] Furthermore, the source electrode 5 and drain electrode 8 can also be configured to be in direct contact with the channel layer 1C.

[0065] The interlayer insulating film 11 is, for example, an oxide or a nitride. ２Examples include silicon nitride (SiN), silicon oxynitride (SiON), or high-dielectric constant (high-k) materials. Examples of high-k materials include hafnium oxide (HfO2). ２ Examples include the following. The interlayer insulating film 11 is preferably a multilayer insulating film. When the interlayer insulating film 11 is a multilayer insulating film, each layer of insulating film may be of a different type. Each insulating film constituting the interlayer insulating film 11 is independently made of silicon oxide (SiO ２ Preferably, one selected from the group consisting of silicon nitride (SiN) and silicon oxynitride (SiON).

[0066] It is preferable that the interlayer insulating film 11 is in direct contact with the side surface of the first portion 8a of the drain electrode 8. It is also preferable that the interlayer insulating film 11 is in direct contact with the side surface of the drain field plate electrode 9.

[0067] By providing the drain electrode side insulating film 10, one layer or SiO is formed below the eaves portion which is the second part 8b of the drain electrode 8 (on the side from the second part 8b toward the nitride semiconductor layer 1 in the second direction Y). ２ By providing the insulating film 10 on the drain electrode side, current collapse that tends to occur next to the drain electrode 8 can be suppressed.

[0068] (Second Embodiment) The second embodiment relates to a semiconductor device. The semiconductor device of the second embodiment is a modified example of the semiconductor device 100 of the first embodiment. The description of the contents common to the first and second embodiments will be omitted. The configuration of the second embodiment is applicable to other embodiments. Some of the description of the second embodiment is also applicable to the description of other embodiments.

[0069] Figure 4 shows a schematic diagram of the semiconductor device 101 according to the second embodiment. Figure 5 is a schematic diagram of the semiconductor device 101 in Figure 4, including the B-B' cross section. Figure 6 is a schematic diagram of the semiconductor device 101. The following explanation primarily concerns the configuration within the element region. Figure 6 is a schematic diagram of a portion of the semiconductor device 101 near the drain electrode 8.

[0070] The semiconductor device 101 comprises a substrate 1A, a nitride semiconductor layer 1 including a buffer layer 1B, a channel layer 1C (first nitride semiconductor layer), and a barrier layer 1D (second nitride semiconductor layer), a gate insulating film (first insulating film) 2, a gate electrode (first electrode) 3, a gate field plate electrode (third field plate electrode) 4, a source electrode (second electrode) 5, a first source field plate electrode (first field plate electrode) 6, a second source field plate electrode (fourth field plate electrode) 7, a drain electrode (third electrode) 8, a drain field plate electrode (second field plate electrode) 9, a drain electrode side insulating film (second insulating film) 10, an interlayer insulating film (fifth insulating film) 11, a gate FP-source FP side insulating film (third insulating film) 12, and a source electrode side insulating film (fourth insulating film) 13.

[0071] The semiconductor device 101 differs from the semiconductor device 100 in its drain electrode side insulating film 10, gate FP-source FP side insulating film 12, and source electrode side insulating film 13.

[0072] The drain electrode side insulating film 10 of the semiconductor device 100 is divided into the drain electrode side insulating film 10, the gate FP-source FP side insulating film 12, and the source electrode side insulating film 13 in the semiconductor device 101. The drain electrode side insulating film 10 sandwiches the drain electrode 8, the gate FP-source FP side insulating film 12 is provided between the gate insulating film 2 and the interlayer insulating film 11, and the source electrode side insulating film 13 sandwiches the source electrode 5.

[0073] The drain electrode side insulating film 10 is sandwiched between the drain electrode 8 and the gate FP-source FP side insulating film 12 in the first direction X. The drain electrode side insulating film 10 is sandwiched between the drain electrode 8 and the gate insulating film 2 in the first direction X. The surface of the drain electrode side insulating film 10 on the gate electrode 3 side faces the surface of the gate FP-source FP side insulating film 12 on the drain electrode 8 side and the surface of the gate insulating film 2 on the drain electrode 8 side. It is preferable that the surface of the drain electrode side insulating film 10 on the gate electrode 3 side is in direct contact with the surface of the gate FP-source FP side insulating film 12 on the drain electrode 8 side and the surface of the gate insulating film 2 on the drain electrode 8 side.

[0074] The gate FP-source FP side insulating film 12 is sandwiched between the drain electrode side insulating film 10 and the source electrode 5 in the first direction X.

[0075] The surface of the gate FP-source FP side insulating film 12 facing the drain electrode 8 side faces the surface of the drain electrode side insulating film 10 facing the gate electrode 3 side. Preferably, the surface of the gate FP-source FP side insulating film 12 facing the drain electrode 8 side is in direct contact with the surface of the drain electrode side insulating film 10 facing the gate electrode 3 side.

[0076] The surface of the gate FP-source FP-side insulating film 12 facing the source electrode 5 is facing the surface of the source electrode 5 facing the gate electrode 3, or the surface of the source electrode 5 facing the gate electrode 3 and the surface of the source electrode-side insulating film 13 facing the gate electrode 3. Preferably, the surface of the gate FP-source FP-side insulating film 12 facing the source electrode 5 is in direct contact with the surface of the source electrode 5 facing the gate electrode 3, or the surface of the source electrode-side insulating film 13 facing the gate electrode 3.

[0077] The gate FP-source FP side insulating film 12 is sandwiched between the gate insulating film 2 and the interlayer insulating film 11 in the second direction Y.

[0078] The gate FP-source FP side insulating film 12 sandwiches the columnar portions of the gate electrode 3 and the gate field plate electrode 4 in the first direction X. It is preferable that the gate FP-source FP side insulating film 12, which sandwiches the columnar portions of the gate electrode 3 and the gate field plate electrode 4 in the first direction X, is in direct contact with the gate electrode 3 and the gate field plate electrode 4.

[0079] The surface of the gate FP-source FP side insulating film 12 on the interlayer insulating film 11 side is preferably facing the surface of the interlayer insulating film 11 on the nitride semiconductor layer 1 side, the surface of the gate field plate electrode 4 on the nitride semiconductor layer 1 side, and the surface of the second source field plate electrode 7 on the nitride semiconductor layer 1 side. The surface of the gate FP-source FP side insulating film 12 on the interlayer insulating film 11 side is preferably in direct contact with the surface of the interlayer insulating film 11 on the nitride semiconductor layer 1 side, the surface of the gate field plate electrode 4 on the nitride semiconductor layer 1 side, and the surface of the second source field plate electrode 7 on the nitride semiconductor layer 1 side.

[0080] The surface of the gate FP-source FP side insulating film 12 on the nitride semiconductor layer 1 side is preferably facing the surface of the gate insulating film 2 on the interlayer insulating film 11 side and the surface of the gate electrode 3 on the interlayer insulating film 11 side. The surface of the gate FP-source FP side insulating film 12 on the nitride semiconductor layer 1 side is preferably in direct contact with the surface of the gate insulating film 2 on the interlayer insulating film 11 side and the surface of the gate electrode 3 on the interlayer insulating film 11 side.

[0081] The gate FP-source FP side insulating film 12 is preferably an insulating film of a different compound than the drain electrode side insulating film 10. ２ The insulating film is preferably made of SiN, and it is preferable that the gate insulating film 2 and the gate FP-source FP side insulating film 12 are SiN insulating films. The gate FP-source FP side insulating film 12 may have a multilayer structure depending on the shape of the gate electrode 3 and the gate field plate electrode 4. It is preferable that the gate FP-source FP side insulating film 12 is an insulating film with a lower density than the gate insulating film 2.

[0082] The height of the gate FP-source FP side insulating film 12 (the distance in the second direction Y from the nitride semiconductor layer 1 side surface of the gate FP-source FP side insulating film 12 (the surface of the barrier layer 1D) to the interlayer insulating film 11 side surface of the gate FP-source FP side insulating film 12) is preferably 0.05 [μm] or more and 0.5 [μm] or less, more preferably 0.05 [μm] or more and 0.4 [μm] or less, and even more preferably 0.05 [μm] or more and 0.3 [μm] or less.

[0083] The source electrode-side insulating film 13 is sandwiched between the gate FP and the source FP-side insulating film 12 in the first direction X, sandwiching the source electrode 5. The source electrode-side insulating film 13 is sandwiched between the nitride semiconductor layer 1 and the interlayer insulating film 11 in the second direction Y.

[0084] The surface of the source electrode-side insulating film 13 on the terminal electrode 3 side faces the surface of the gate FP-source FP-side insulating film 12 on the source electrode 5 side and the surface of the gate insulating film 2 on the source electrode 5 side. Preferably, the surface of the source electrode-side insulating film 13 on the terminal electrode 3 side is in direct contact with the surface of the gate FP-source FP-side insulating film 12 on the source electrode 5 side and the surface of the gate insulating film 2 on the source electrode 5 side.

[0085] The surface of the source electrode-side insulating film 13 facing the interlayer insulating film 11 is preferably facing the surface of the plate-shaped portion of the source electrode 5 facing the nitride semiconductor layer 1, or the surface of the plate-shaped portion of the source electrode 5 facing the nitride semiconductor layer 1 and the surface of the interlayer insulating film 11 facing the nitride semiconductor layer 1. The surface of the source electrode-side insulating film 13 facing the interlayer insulating film 11 is preferably in direct contact with the surface of the plate-shaped portion of the source electrode 5 facing the nitride semiconductor layer 1, or the surface of the plate-shaped portion of the source electrode 5 facing the nitride semiconductor layer 1 and the surface of the interlayer insulating film 11 facing the nitride semiconductor layer 1.

[0086] The surface of the source electrode-side insulating film 13 facing the nitride semiconductor layer 1 is preferably facing the surface of the nitride semiconductor layer 1 facing the interlayer insulating film 11. The surface of the source electrode-side insulating film 13 facing the nitride semiconductor layer 1 is preferably in direct contact with the surface of the nitride semiconductor layer 1 facing the interlayer insulating film 11.

[0087] The source electrode side insulating film 13 is made of SiO ２ Preferably, the insulating film is a compound selected from the group consisting of SiN and SiON. ２ Or, more preferably, an insulating film of SiN, SiO ２ It is even more preferable that the insulating film is of a certain type.

[0088] The insulating film 13 on the source electrode side is preferably an insulating film of the same compound as the insulating film 10 on the drain electrode side.

[0089] The source electrode side insulating film 13 is preferably an insulating film of a different compound than the gate FP-source FP side insulating film 12.

[0090] The height of the source electrode-side insulating film 13 (the distance in the second direction Y from the surface of the source electrode-side insulating film 13 on the nitride semiconductor layer 1 side (the surface of the barrier layer 1D) to the surface of the source electrode-side insulating film 13 facing the plate-like portion of the source electrode 5) is preferably 0.05 [μm] or more and 0.5 [μm] or less, more preferably 0.05 [μm] or more and 0.4 [μm] or less, and even more preferably 0.05 [μm] or more and 0.35 [μm] or less.

[0091] As shown in the schematic diagram of Figure 6, even when the drain electrode side insulating film 10 of the first embodiment is divided into the drain electrode side insulating film 10 and the gate FP-source FP side insulating film 12, the relationship between d1 and d4 is the same as in the first embodiment.

[0092] In the first embodiment, the drain electrode side insulating film 10 is divided into the drain electrode side insulating film 10 and the gate FP-source FP side insulating film 12, wherein the drain electrode side insulating film 10 is an insulating film of a different compound than the drain electrode side insulating film 10 (preferably, the drain electrode side insulating film 10 is SiO ２ Since the insulating film is made of SiN (and the gate FP-source FP side insulating film 12 is a SiN insulating film), when a source field plate electrode (for example, a second source field plate electrode 7) is provided at a close distance from the nitride semiconductor layer 1, current collapses that tend to occur next to the drain electrode 8 and between the source field plate electrode and the nitride semiconductor layer 1 can be suppressed, thereby suppressing an increase in Ron.

[0093] (Third Embodiment) The third embodiment relates to a semiconductor device. The semiconductor device of the third embodiment is a modification of the semiconductor device 100 of the first embodiment and the semiconductor device 101 of the second embodiment. The description of the contents common to the first to third embodiments will be omitted. The configuration of the third embodiment is applicable to the other embodiments. Some of the description of the third embodiment is also applicable to the description of the other embodiments.

[0094] Figure 7 shows a schematic diagram of the semiconductor device 102 according to the third embodiment. Figure 8 is a schematic diagram of the semiconductor device 102 in Figure 7, including the C-C' cross-section. The following explanation primarily concerns the configuration within the element region.

[0095] The semiconductor device 101 comprises a substrate 1A, a nitride semiconductor layer 1 including a buffer layer 1B, a channel layer 1C (first nitride semiconductor layer), and a barrier layer 1D (second nitride semiconductor layer), a gate insulating film (first insulating film) 2, a gate electrode (first electrode) 3, a gate field plate electrode (third field plate electrode) 4, a source electrode (second electrode) 5, a first source field plate electrode (first field plate electrode) 6, a second source field plate electrode (fourth field plate electrode) 7, a drain electrode (third electrode) 8, a drain field plate electrode (second field plate electrode) 9, a drain electrode side insulating film (second insulating film) 10, an interlayer insulating film (fifth insulating film) 11, and a third source field plate electrode 14.

[0096] The insulating film 10 on the drain electrode side, the insulating film 12 on the gate FP-source FP side, and the third source field plate electrode 14 of the semiconductor device 102 are different from those of the semiconductor device 100.

[0097] The insulating film 10 on the drain electrode side of the semiconductor device 100 is divided into the drain electrode side insulating film 10 and the gate FP-source FP side insulating film 12.

[0098] The surface of the gate insulating film 2 on the source electrode 5 side is in direct contact with the surface of the source electrode 5 on the gate electrode 3 side.

[0099] The surface of the gate FP-source FP-side insulating film 12 on the source electrode 5 side is in direct contact with the surface of the source electrode 5 on the gate electrode 3 side.

[0100] The gate FP-source FP side insulating film 12 sandwiches the columnar portions of the gate electrode 3 and the gate field plate electrode 4 in the first direction X. It is preferable that the gate FP-source FP side insulating film 12, which sandwiches the columnar portions of the gate electrode 3 and the gate field plate electrode 4 in the first direction X, is in direct contact with the gate electrode 3 and the gate field plate electrode 4.

[0101] The surface of the gate FP-source FP side insulating film 12 on the interlayer insulating film 11 side is preferably facing the nitride semiconductor layer 1 side surface of the interlayer insulating film 11, the nitride semiconductor layer 1 side surface of the gate field plate electrode 4, the nitride semiconductor layer 1 side surface of the second source field plate electrode 7, and the nitride semiconductor layer 1 side surface of the plate-shaped portion of the source electrode 5. The surface of the gate FP-source FP side insulating film 12 on the interlayer insulating film 11 side is preferably in direct contact with the nitride semiconductor layer 1 side surface of the interlayer insulating film 11, the nitride semiconductor layer 1 side surface of the gate field plate electrode 4, the nitride semiconductor layer 1 side surface of the second source field plate electrode 7, and the nitride semiconductor layer 1 side surface of the plate-shaped portion of the source electrode 5.

[0102] The surface of the gate FP-source FP side insulating film 12 on the nitride semiconductor layer 1 side is preferably facing the surface of the gate insulating film 2 on the interlayer insulating film 11 side and the surface of the gate electrode 3 on the interlayer insulating film 11 side. The surface of the gate FP-source FP side insulating film 12 on the nitride semiconductor layer 1 side is preferably in direct contact with the surface of the gate insulating film 2 on the interlayer insulating film 11 side and the surface of the gate electrode 3 on the interlayer insulating film 11 side.

[0103] It is preferable that a third source field plate electrode 14 is provided in the interlayer insulating film 11. The third source field plate electrode 14 is located between the first source field plate electrode 6 and the second source field plate electrode 7 in the first direction X. The third source field plate electrode 14 is located between the first source field plate electrode 6 and the second source field plate electrode 7 in the second direction Y.

[0104] By providing the drain electrode side insulating film 10, one layer or SiO is formed below the eaves portion which is the second part 8b of the drain electrode 8 (on the side from the second part 8b toward the nitride semiconductor layer 1 in the second direction Y). ２ By providing the insulating film 10 on the drain electrode side, current collapse that tends to occur next to the drain electrode 8 can be suppressed.

[0105] In the first embodiment, the drain electrode side insulating film 10 is divided into the drain electrode side insulating film 10 and the gate FP-source FP side insulating film 12, wherein the drain electrode side insulating film 10 is an insulating film of a different compound than the drain electrode side insulating film 10 (preferably, the drain electrode side insulating film 10 is SiO ２ Since the insulating film is made of SiN (and the gate FP-source FP side insulating film 12 is a SiN insulating film), when a source field plate electrode (for example, a second source field plate electrode 7) is provided at a close distance from the nitride semiconductor layer 1, current collapses that tend to occur next to the drain electrode 8 and between the source field plate electrode and the nitride semiconductor layer 1 can be suppressed, thereby suppressing an increase in Ron.

[0106] (Fourth Embodiment) The fourth embodiment relates to a semiconductor device. The semiconductor device of the fourth embodiment is a modification of the semiconductor devices 100 to 102 of the first to third embodiments. The description of the contents common to the first to fourth embodiments will be omitted. The configuration of the fourth embodiment is applicable to the other embodiments. Some of the description of the fourth embodiment is also applicable to the descriptions of the other embodiments.

[0107] Figure 9 shows a schematic diagram of the semiconductor device 103 according to the fourth embodiment. The following description primarily concerns the configuration within the element region.

[0108] The device comprises a substrate 1A, a nitride semiconductor layer 1 including a buffer layer 1B, a channel layer 1C (first nitride semiconductor layer), and a barrier layer 1D (second nitride semiconductor layer), a gate insulating film (first insulating film) 2, a gate electrode (first electrode) 3, a gate field plate electrode (third field plate electrode) 4, a source electrode (second electrode) 5, a first source field plate electrode (first field plate electrode) 6, a second source field plate electrode (fourth field plate electrode) 7, a drain electrode (third electrode) 8, a drain field plate electrode (second field plate electrode) 9, a drain electrode side insulating film (second insulating film) 10, and an interlayer insulating film (fifth insulating film) 11.

[0109] The source electrode 5, second source field plate electrode 7, drain electrode 8, and drain electrode side insulating film 10 of semiconductor device 103 are different from those of semiconductor device 100.

[0110] The plate-shaped portion of the source electrode 5 and / or the drain electrode 8 may be positioned offset from the second source field plate electrode 7 in the second direction Y, either on the nitride semiconductor layer 1 side or on the opposite side from the nitride semiconductor layer 1 side.

[0111] The second source field plate electrode 7 may be a multi-stage field plate electrode. It is also preferable to provide a source field plate electrode with a shape other than multi-stage on the gate FP-source FP side insulating film 12.

[0112] The distance from the surface of the drain electrode side insulating film 10 on the interlayer insulating film 11 side to the nitride semiconductor layer 1 may be different from the distance from the surface of the gate FP-source FP side insulating film 12 on the interlayer insulating film 11 side to the nitride semiconductor layer 1.

[0113] The distance d5 is defined as the distance in the second direction Y from the surface of the columnar portion of the source electrode 5 on the gate electrode 3 side to the surface of the gate FP-source FP side insulating film 12 on the source electrode 5 side. The distance d5 is defined as the distance in the second direction Y from the surface of the plate-shaped portion of the source electrode 5 on the gate electrode 3 side to the surface of the gate FP-source FP side insulating film 12 on the source electrode 5 side.

[0114] d5 may be greater than or equal to d6, or less than or equal to d6. If d6 is greater than d5, d6-d5 is preferably 0.05 [μm] or more and 2 [μm] or less, more preferably 0.05 [μm] or more and 1 [μm] or less, and even more preferably 0.05 [μm] or more and 0.5 [μm] or less.

[0115] By providing the drain electrode side insulating film 10, one layer or SiO is formed below the eaves portion which is the second part 8b of the drain electrode 8 (on the side from the second part 8b toward the nitride semiconductor layer 1 in the second direction Y). ２ By providing the insulating film 10 on the drain electrode side, current collapse that tends to occur next to the drain electrode 8 can be suppressed.

[0116] In the first embodiment, the drain electrode side insulating film 10 is divided into the drain electrode side insulating film 10 and the gate FP-source FP side insulating film 12, wherein the drain electrode side insulating film 10 is an insulating film of a different compound than the drain electrode side insulating film 10 (preferably, the drain electrode side insulating film 10 is SiO ２ Since the insulating film is made of SiN (and the gate FP-source FP side insulating film 12 is a SiN insulating film), when a source field plate electrode (for example, a second source field plate electrode 7) is provided at a close distance from the nitride semiconductor layer 1, current collapses that tend to occur next to the drain electrode 8 and between the source field plate electrode and the nitride semiconductor layer 1 can be suppressed, thereby suppressing an increase in Ron.

[0117] (Fifth Embodiment) The fifth embodiment relates to a semiconductor device. The semiconductor device of the fifth embodiment is a modification of the semiconductor devices 100 to 103 of the first to fourth embodiments. The description of the contents common to the first to fifth embodiments will be omitted. The configuration of the fifth embodiment is applicable to the other embodiments. Some of the description of the fifth embodiment is also applicable to the descriptions of the other embodiments.

[0118] Figure 10 shows a schematic diagram of the semiconductor device 104 according to the fifth embodiment. The following description primarily concerns the configuration within the element region.

[0119] The semiconductor material comprises a substrate 1A, a nitride semiconductor layer 1 including a buffer layer 1B, a channel layer 1C (first nitride semiconductor layer), and a barrier layer 1D (second nitride semiconductor layer), a gate insulating film (first insulating film) 2, a gate electrode (first electrode) 3, a gate field plate electrode (third field plate electrode) 4, a source electrode (second electrode) 5, a first source field plate electrode (first field plate electrode) 6, a second source field plate electrode (fourth field plate electrode) 7, a drain electrode (third electrode) 8, a drain field plate electrode (second field plate electrode) 9, a drain electrode side insulating film (second insulating film) 10, and an interlayer insulating film (fifth insulating film) 11. A barrier layer 15 is present on the drain electrode side insulating film 10 side of the gate field plate electrode 4, on the drain electrode side insulating film 10 side of the source electrode 5, and on the drain electrode side insulating film 10 side of the second part 8b of the drain electrode 8.

[0120] The semiconductor device 104 differs from the semiconductor device 100 in that it has a barrier layer 15 and does not have a second source field plate electrode 7. The barrier layer 15 is, for example, one or more nitrides selected from the group consisting of Ti, W, Ta, Nb, V, and Zr.

[0121] The barrier layer 15 of the gate field plate electrode 4 is part of the gate field plate electrode 4. The barrier layer 15 of the gate field plate electrode 4 is, for example, a TiN layer. The barrier layer 15 of the gate field plate electrode 4 is in direct contact with the drain electrode side insulating film 10.

[0122] The barrier layer 15 of the source electrode 5 is part of the source electrode 5. The barrier layer 15 of the source electrode 5 is, for example, a TiN layer. The barrier layer 15 of the source electrode 5 is in direct contact with the drain electrode side insulating film 10.

[0123] The barrier layer 15 of the drain electrode 8 is part of the drain electrode 8. The barrier layer 15 of the drain electrode 8 is, for example, a TiN layer. The barrier layer 15 of the drain electrode 8 is in direct contact with the drain electrode side insulating film 10.

[0124] The presence of the barrier layer 15 suppresses the diffusion of Al and other elements into the insulating film (in the fifth embodiment, the drain electrode side insulating film 10, in the fifth embodiment, the drain electrode side insulating film 10, the gate FP-source FP side insulating film 12, and the source electrode side insulating film 13) beneath the plate-shaped portion (under the overhang) of the gate field plate electrode 4, source electrode 5, and drain electrode 8 during heating when the gate field plate electrode 4, source electrode 5, and drain electrode 8 are alloyed. If the insulating film beneath the gate field plate electrode 4, source electrode 5, and drain electrode 8 is a SiN insulating film, the SiN film functions as a stopper film, making it difficult for Al and other elements to diffuse. ２ In the case of an insulating film, the barrier layer 15 can suppress the deterioration of the insulating film.

[0125] By providing the drain electrode side insulating film 10, one layer or SiO is formed below the eaves portion which is the second part 8b of the drain electrode 8 (on the side from the second part 8b toward the nitride semiconductor layer 1 in the second direction Y). ２ By providing the drain electrode side insulating film 10, current collapse that tends to occur next to the drain electrode 8 can be suppressed. For example, the drain electrode side insulating film 10 may be made of SiO ２ Even when using an insulating film, the deterioration of the insulating film 10 on the drain electrode side can be suppressed.

[0126] (Sixth Embodiment) The sixth embodiment relates to a semiconductor device. The semiconductor device of the sixth embodiment is a modified version of the semiconductor devices 100 to 104 of the first to fifth embodiments. The description of the contents common to the first to sixth embodiments will be omitted. The configuration of the sixth embodiment is applicable to the other embodiments. Some of the description of the sixth embodiment is also applicable to the descriptions of the other embodiments.

[0127] Figure 11 shows a schematic diagram of the semiconductor device 105 according to the sixth embodiment. The following description primarily concerns the configuration within the element region.

[0128] The semiconductor comprises a substrate 1A, a nitride semiconductor layer 1 including a buffer layer 1B, a channel layer 1C (first nitride semiconductor layer), and a barrier layer 1D (second nitride semiconductor layer), a gate insulating film (first insulating film) 2, a gate electrode (first electrode) 3, a gate field plate electrode (third field plate electrode) 4, a source electrode (second electrode) 5, a first source field plate electrode (first field plate electrode) 6, a second source field plate electrode (fourth field plate electrode) 7, a drain electrode (third electrode) 8, a drain field plate electrode (second field plate electrode) 9, a drain electrode side insulating film (second insulating film) 10, an interlayer insulating film (fifth insulating film) 11, a gate FP-source FP side insulating film (third insulating film) 12, and a source electrode side insulating film (fourth insulating film) 13. A barrier layer 15 is present on the drain electrode side insulating film 10 side of the source electrode 5 and on the drain electrode side insulating film 10 side of the second part 8b of the drain electrode 8.

[0129] The semiconductor device 105 differs from the semiconductor device 101 in that it does not have a barrier layer 15.

[0130] The surface of the gate FP-source FP side insulating film 12 on the source electrode 5 side and / or the surface on the drain electrode 8 side may have a tapered shape, for example, such that the length in the first direction X on the interlayer insulating film 11 side is shortened. Alternatively, the surface of the gate FP-source FP side insulating film 12 on the source electrode 5 side and / or the surface on the drain electrode 8 side may be stepped.

[0131] The barrier layer 15 of the source electrode 5 is part of the source electrode 5. The barrier layer 15 of the source electrode 5 is, for example, a TiN layer. The barrier layer 15 of the source electrode 5 is in direct contact with the drain electrode side insulating film 10.

[0132] The barrier layer 15 of the drain electrode 8 is part of the drain electrode 8. The barrier layer 15 of the drain electrode 8 is, for example, a TiN layer. The barrier layer 15 of the drain electrode 8 is in direct contact with the drain electrode side insulating film 10.

[0133] If the gate FP-source FP side insulating film 12 is, for example, a SiN insulating film, the gate FP-source FP side insulating film 12 functions as a stopper film, so diffusion of Al and the like can be prevented even without providing a barrier layer 15 under the plate-like portion of the gate field plate electrode 4 and under the second source field plate electrode 7.

[0134] The presence of the barrier layer 15 suppresses the diffusion of Al and other substances into the insulating film (in the sixth embodiment, the drain electrode side insulating film 10 and the source electrode side insulating film 13) beneath the plate-like portions of the source electrode 5 and drain electrode 8 (under the overhang) during heating when the gate field plate electrode 4, source electrode 5, and drain electrode 8 are alloyed, thereby suppressing the deterioration of the insulating film.

[0135] By providing the drain electrode side insulating film 10, one layer or SiO is formed below the eaves portion which is the second part 8b of the drain electrode 8 (on the side from the second part 8b toward the nitride semiconductor layer 1 in the second direction Y). ２ By providing the drain electrode side insulating film 10, current collapse that tends to occur next to the drain electrode 8 can be suppressed. For example, the drain electrode side insulating film 10 may be made of SiO ２ Even when using an insulating film, the deterioration of the insulating film 10 on the drain electrode side can be suppressed.

[0136] (Seventh Embodiment) The seventh embodiment relates to a method for manufacturing a semiconductor device. The method for describing the semiconductor device of the embodiment will be explained using the semiconductor device 100 of the first embodiment as an example. The description of the manufacturing method of the seventh embodiment also applies to the semiconductor devices 101 to 105 of the other embodiments.

[0137] The method for manufacturing the semiconductor device 100 will be described with reference to the schematic diagrams of the semiconductor device manufacturing method in Figures 12 and 13.

[0138] First, a nitride semiconductor layer 1 is formed, and an LP-SiN film is deposited on the nitride semiconductor layer 1 as a gate insulating film 2, for example, by a reduced-pressure CVD method. A TiN film is then deposited on the gate insulating film 2 as a gate electrode 3, and the gate electrode 3 is patterned to obtain the component shown in the schematic diagram of Figure 12.

[0139] Next, the gate insulating film 2 is patterned to form a precursor for the drain electrode side insulating film 10, SiO ２ Layers are formed to create vias for the gate field plate electrode 4, source electrode 5, and drain electrode 8. An Al / Ti layer is formed inside the vias and on the SiO2 layer, and a heat treatment is performed for alloying to produce the gate field plate electrode 4, source electrode 5, drain electrode 8, and second source field plate electrode 7, thereby obtaining the schematic component shown in Figure 13.

[0140] Next, the interlayer insulating film 11 is formed, via processing is performed, and the remaining electrodes are fabricated to create the semiconductor device 100 shown in Figure 1.

[0141] (Eighth Embodiment) The eighth embodiment relates to a method for manufacturing a semiconductor device. The method for describing the semiconductor device of the embodiment will be explained using the semiconductor device 101 of the second embodiment as an example. The description of the manufacturing method of the eighth embodiment also applies to the semiconductor devices 100, 102-105 of the other embodiments.

[0142] The manufacturing method of the semiconductor device 101 will be explained with reference to the schematic diagrams of the semiconductor device manufacturing method shown in Figures 12 and 14 to 17.

[0143] First, a nitride semiconductor layer 1 is formed, and an LP-SiN film is deposited on the nitride semiconductor layer 1 as a gate insulating film 2, for example, by a reduced-pressure CVD method. A TiN film is then deposited on the gate insulating film 2 as a gate electrode 3, and the gate electrode 3 is patterned to obtain the component shown in the schematic diagram of Figure 12.

[0144] Next, a P-SiN film is deposited as the gate FP-source FP side insulating film 12 by plasma CVD, and vias of the gate field plate electrode 4 are formed. The gate field plate electrode 4 and the second source field plate electrode 7 are then formed to obtain the schematic component shown in Figure 14.

[0145] Next, via processing is performed on the gate FP-source FP side insulating film 12 to obtain the component shown in the schematic diagram of Figure 15.

[0146] Next, in the schematic diagram of Figure 16, SiO is used as the drain electrode side insulating film 10 and the source electrode side insulating film 13 within the vias of the gate FP-source FP side insulating film 12 and on the gate FP-source FP side insulating film 12.２ A film is formed to obtain the component shown in the schematic diagram of Figure 16.

[0147] Next, SiO ２ The source electrode 5 and drain electrode 8 are formed by via processing on the film to obtain the component shown in the schematic diagram of Figure 17.

[0148] Next, the interlayer insulating film 11 is formed, via processing is performed, and the remaining electrodes are fabricated to create the semiconductor device 101 shown in Figure 2.

[0149] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be implemented in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. For example, components of one embodiment may be replaced or modified with components of another embodiment. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents.

[0150] 1: Nitride semiconductor layer 1A: Substrate 1B: Buffer layer 1C: Channel layer 1D: Barrier layer 2: Gate insulating film 3: Gate electrode 4: Gate field plate electrode 5: Source electrode 6: First source field plate electrode 7: Second source field plate electrode 8: Drain electrode 8a: First part 8b: Second part 9: Drain field plate electrode 10: Drain electrode side insulating film 11: Interlayer insulating film 12: Gate FP-source FP side insulating film 13: Source electrode side insulating film 14: Third source field plate electrode 15: Barrier layer 100: Semiconductor device 101: Semiconductor device 102: Semiconductor device 103: Semiconductor device 104: Semiconductor device 105: Semiconductor device

Claims

1. A semiconductor device comprising: a nitride semiconductor layer; a first insulating film provided on the nitride semiconductor layer; a first electrode located on the first insulating film and electrically connected to the nitride semiconductor layer; a second electrode located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer; a third electrode located on the nitride semiconductor layer and having a first portion located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer, and a second portion located on the first portion, the length in the first direction in which the first electrode and the second electrode are aligned being longer than the length of the first portion in the first direction; and a single layer of second insulating film provided on the nitride semiconductor layer and in contact with the surface of the first portion facing the first electrode and the surface of the second portion facing the nitride semiconductor layer.

2. A semiconductor device comprising: a nitride semiconductor layer; a first insulating film provided on the nitride semiconductor layer; a first electrode located on the first insulating film and electrically connected to the nitride semiconductor layer; a second electrode located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer; a third electrode located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer, having a first portion located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer, and a second portion located on the first portion, the length in the first direction in which the first electrode and the second electrode are aligned being longer than the length of the first portion in the first direction; and a second insulating film provided on the nitride semiconductor layer, in contact with the surface of the first portion facing the first electrode and the surface of the second portion facing the nitride semiconductor layer, and being an insulating film of one type of compound.

3. The semiconductor device according to claim 1, wherein the second insulating film is an insulating film of a compound.

4. The semiconductor device according to claim 1 or 2, wherein the third insulating film is an insulating film of a different compound from the second insulating film.

5. The second insulating film is SiO ２ The semiconductor device according to claim 4, wherein the third insulating film is an insulating film of SiN.

6. The second insulating film is SiO ２ A semiconductor device according to claim 1 or 2, wherein the insulating film is...

7. The semiconductor device according to any one of claims 1 to 6, wherein the stacking direction of the nitride semiconductor layer and the first insulating film is a second direction, and the second insulating film is provided over the entire region sandwiched between the second part and the nitride semiconductor layer in the second direction.

8. The semiconductor device according to any one of claims 4 or 5, wherein the stacking direction of the nitride semiconductor layer and the first insulating film is a second direction, the second insulating film sandwiches the side surface of the third electrode, and the second insulating film is provided between the first insulating film and the third insulating film in the first direction.

9. The semiconductor device according to any one of claims 1 to 8, wherein the second insulating film is in direct contact with the surface of the first part facing the first electrode, in direct contact with the surface of the second part facing the nitride semiconductor layer, and in direct contact with the surface of the nitride semiconductor layer facing the second part between the first insulating film and the third electrode in the first direction.

10. The semiconductor device according to any one of claims 1 to 9, wherein the second insulating film sandwiches the first electrode, the second electrode, and the third electrode.

11. The semiconductor device according to any one of claims 1 to 10, wherein the second insulating film is in direct contact with the entire surface of the first part facing the first electrode, in direct contact with the entire surface of the second part facing the nitride semiconductor layer, and in direct contact with the entire surface of the nitride semiconductor layer facing the second part between the first insulating film and the third electrode in the first direction.

12. The semiconductor device according to any one of claims 1 to 11, wherein the first insulating film is spaced apart from the second electrode and the third electrode.

13. The semiconductor device according to any one of claims 1 to 12, wherein d1 is the distance between the first insulating film and the third electrode in the first direction, d2 is the length of the second part that protrudes from the first part toward the first electrode in the first direction, and d1-d2 is 0.2 [μm] or more and 3 [μm] or less.

14. The semiconductor device according to claim 4 or 5, wherein the surface of the third insulating film facing the third electrode is in direct contact with the surface of the second insulating film facing the first electrode.

15. The semiconductor device according to claim 4, 5, or 14, wherein it has a fourth insulating film sandwiching the second electrode, the fourth insulating film being an insulating film of the same compound as the second insulating film, and the fourth insulating film being an insulating film of a different compound from the third insulating film.

16. The semiconductor device according to any one of claims 1 to 15, wherein the third electrode includes a barrier layer, and the barrier layer is in direct contact with the second insulating film.

17. The semiconductor device according to any one of claims 1 to 15, wherein the third electrode includes a barrier layer, the barrier layer is one or more nitrides selected from the group consisting of Ti, W, Ta, Nb, V, and Zr, and the barrier layer is in direct contact with the second insulating film.

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