Semiconductor device

Abstract

A semiconductor device (1) is provided with: an electrode (11a) on one electrode-forming surface (11) of an IGBT (10); a first conductive plate (31) in contact with an electrode (21a) on one electrode-forming surface (21) of a MOSFET (20); an electrode (12a) on the other electrode-forming surface (12) of the IGBT (10); a second conductive plate (32) in contact with an electrode (22a) on the other electrode-forming surface (22) of the MOSFET (20); a third conductive plate (33); and a conductive material (34) for connecting the second conductive plate (32) and the third conductive plate (33).

Description

Semiconductor equipment

[0001] This disclosure relates to semiconductor devices.

[0002] Patent Document 1 discloses a semiconductor device in which the electrodes of an IGBT and a conductive plate, which is a control element, are connected by bonding wires, and the electrodes of a MOSFET and the conductive plate are also connected by bonding wires.

[0003] International Publication No. 2023 / 223813

[0004] By the way, in the above-mentioned Patent Document 1, wires are directly connected to the electrodes of the IGBT and MOSFET. Therefore, in order to adjust the number and thickness of conductive materials such as wires that can be connected between the electrodes of the IGBT and MOSFET and the conductive plate, it is necessary to change the chip size of the IGBT and MOSFET.

[0005] The purpose of this disclosure is to enable adjustment of the number and thickness of conductive materials that can be connected between the electrodes of IGBTs and MOSFETs and the conductive plate, without changing the chip size of the IGBTs and MOSFETs.

[0006] A first aspect of the technology disclosed herein is an IGBT (10) having a pair of electrode-forming surfaces (11, 12) facing opposite directions, with electrodes (11a, 12a) formed on each of the pair of electrode-forming surfaces (11, 12), and a MOSFET (20) having a pair of electrode-forming surfaces (21, 22) facing opposite directions, with electrodes (21a, 22a) formed on each of the pair of electrode-forming surfaces (21, 22), and the electrode of one electrode-forming surface (11) of the IGBT (10) The semiconductor device comprises 11a), a first conductive plate (31) that abuts against the electrode (21a) of one electrode forming surface (21) of the MOSFET (20), an electrode (12a) of the other electrode forming surface (12) of the IGBT (10), a second conductive plate (32) that abuts against the electrode (22a) of the other electrode forming surface (22) of the MOSFET (20), a third conductive plate (33), and a conductive material (34) that connects the second conductive plate (32) and the third conductive plate (33).

[0007] In the first embodiment, the number and thickness of conductive material (34) that can be connected between the electrodes (12a, 22a) of the IGBT (10) and MOSFET (20) and the third conductive plate (33) can be adjusted by changing the size of the second and third conductive plates (32, 33) without changing the chip size of the IGBT (10) and MOSFET (20).

[0008] A second aspect of the technology disclosed herein is a specified condition in which, in the first aspect, the chip temperature of the IGBT (10) and the MOSFET (20) is set to 25°C, the rated current is passed through the IGBT (10) and the MOSFET (20), and the distance between the center (C2) of the connection region (R1) between the IGBT (10) and the electrode (12a) of the IGBT (10) on the second conductive plate (32) and the center (C1) of the connection region (R2) between the IGBT (10) and the conductive material (34) on the second conductive plate (32) is D1, the distance between the center (C3) of the connection region (R2) between the MOSFET (20) and the electrode (22a) of the MOSFET (20) on the second conductive plate (32) and the center (C1) of the connection region (C1) of the conductive material (34) on the second conductive plate (32) is D2, and the maximum value of the collector-emitter saturation voltage of the IGBT (10) under the specified conditions is V ＣＥ（ｍａｘ） V is the standard value of the drain-source on-voltage of the MOSFET (20) under the specified conditions, multiplied by the rated current. ＤＳ（ｔｙｐ） When this is the case, the following equation is satisfied.

[0009] D1 / D2 < V ＣＥ（ｍａｘ） / V ＤＳ（ｔｙｐ） In the second embodiment, compared to the case where the above equation is not satisfied, the ratio of current flowing through the IGBT (10) can be increased in the high-load region where the collector-emitter resistance of the IGBT (10) is smaller than the source-drain resistance of the MOSFET (20), thereby reducing the total power consumption in the IGBT (10) and the MOSFET (20).

[0010] A third aspect of the technology disclosed herein is, in the second aspect, the standard value of the collector-emitter saturation voltage of the IGBT(10) under the specified conditions is V ＣＥ（ｔｙｐ） When this is the case, the following equation is satisfied.

[0011] D1 / D2 < V ＣＥ（ｔｙｐ） / V ＤＳ（ｔｙｐ） In the third embodiment, compared to the case where the above formula is not satisfied, the ratio of current flowing to IGBT(10) can be increased in the high-load region, and the total power consumption in IGBT(10) and MOSFET(20) can be reduced.

[0012] A fourth aspect of the technology disclosed herein satisfies the following equation in any one of the first to third aspects, where D1 is the distance between the center (C2) of the connection region (R1) between the second conductive plate (32) and the electrode (12a) of the IGBT (10) and the second conductive plate (32) and the center (C1) of the connection region (R2) between the second conductive plate (32) and the conductive material (34), and D2 is the distance between the center (C3) of the connection region (R2) between the second conductive plate (32) and the electrode (22a) of the MOSFET (20) and the second conductive plate (32) and the center (C1) of the connection region (C1) between the second conductive plate (32) and the conductive material (34).

[0013] D1 / D2 < 1 In the fourth embodiment, compared to the case where the above equation is not satisfied, the ratio of current flowing to IGBT(10) in the high-load region can be increased, and the total power consumption in IGBT(10) and MOSFET(20) can be reduced.

[0014] A fifth aspect of the technology disclosed herein is that, in any one of the first to fourth aspects, the conductive material (34) is a wire, ribbon bonding, plated wire, or lead frame.

[0015] Figure 1 is a plan view of a semiconductor device according to Embodiment 1. Figure 2 is a cross-sectional view taken along line II-II in Figure 1. Figure 3 is a circuit diagram showing the connection relationship between the IGBT and MOSFET. Figure 4 is a graph showing the current-voltage characteristics of the IGBT and MOSFET. Figure 5 is a diagram corresponding to Figure 2 of Embodiment 2.

[0016] The embodiments of this disclosure will be described in detail below with reference to the drawings. However, this disclosure is not limited to the embodiments shown below, and various modifications are possible without departing from the technical idea of ​​this disclosure. Since the drawings are for conceptual illustration of this disclosure, dimensions, ratios, or numbers may be exaggerated or simplified as necessary for ease of understanding.

[0017] (Embodiment 1) Figures 1 and 2 show a semiconductor device (1) according to Embodiment 1 of the present disclosure. The semiconductor device (1) comprises an IGBT (insulated-gate bipolar transistor) (10), a MOSFET (metal-oxide-semiconductor field-effect transistor) (20), a first conductive plate (31), a second conductive plate (32), a third conductive plate (33), a conductive material (34), and a substrate (40).

[0018] The IGBT (10) has first and second IGBT electrode forming surfaces (11, 12) facing in opposite directions. A first IGBT electrode (11a) is formed on the first IGBT electrode forming surface (11). The first IGBT electrode (11a) is the collector electrode. A second IGBT electrode (12a) is formed on the second IGBT electrode forming surface (12). The second IGBT electrode (12a) is the emitter electrode.

[0019] The MOSFET (20) has first and second MOSFET electrode forming surfaces (21, 22) facing in opposite directions. A first MOSFET electrode (21a) is formed on the first MOSFET electrode forming surface (21). The first MOSFET electrode (21a) is the drain electrode. A second MOSFET electrode (22a) is formed on the second MOSFET electrode forming surface (22). The second MOSFET electrode (22a) is the source electrode.

[0020] The first to third conductive plates (31 to 33) are made of a conductive material. The first and third conductive plates (31, 33) are provided on the mounting surface of the substrate (40) with a gap between them. The first and third conductive plates (31, 33) are made, for example, by attaching a copper plate to a resin substrate and partially removing the copper plate. The substrate (40) is made of an insulating material such as ceramics or aluminum nitride.

[0021] The surface of the first conductive plate (31) that is not on the substrate (40) is in contact with the first IGBT electrode (11a) of the first IGBT electrode forming surface (11) of the IGBT (10) and the first MOSFET electrode (21a) of the first MOSFET electrode forming surface (21) of the MOSFET (20).

[0022] One surface of the second conductive plate (32) is in contact with the second IGBT electrode (12a) on the second IGBT electrode forming surface (12) of the IGBT (10) and the second MOSFET electrode (22a) on the second MOSFET electrode forming surface (22) of the MOSFET (20). The second conductive plate (32) is a lead frame. The second conductive plate (32) can be made of, for example, copper, aluminum, or gold.

[0023] The second conductive plate (32) and the third conductive plate (33) are connected by a conductive material (34). The conductive material (34) is a wire. The conductive material (34) is made of aluminum. The conductive material (34) is connected to the other side of the second conductive plate (32) (the side opposite to the IGBT (10) and MOSFET (20)) and to the side of the third conductive plate (33) that is not on the substrate (40) by wire bonding. The conductive material (34) is connected to the second and third conductive plates (32, 33) by ultrasonic welding. The conductive material (34) connecting the second conductive plate (32) and the third conductive plate (33) may be made of ribbon bonding, plated wire, or lead frame.

[0024] As described above, the IGBT (10) and MOSFET (20) are connected in parallel, as shown in Figure 3.

[0025] The IGBT (10) and the MOSFET (20) have current-voltage characteristics as shown in FIG. 4. In the high-load region, the resistance value between the collector and emitter of the IGBT (10) is smaller than the resistance value between the source and drain of the MOSFET (20). Therefore, it is preferable to set the connection position of the conductive material (34) with the second conductive plate (32) so that more current flows through the IGBT (10) than through the MOSFET (20).

[0026] Specifically, here, the chip temperatures of the IGBT (10) and the MOSFET (20) are set to 25° C., and the condition of flowing the rated current through the IGBT (10) and the MOSFET (20) is defined as the specified condition. The rated current is, for example, the current value described in the model name of a semiconductor device such as a power module. Also, the distance between the center (C2) of the connection region (R1) of the second IGBT electrode (12a) of the IGBT (10) in the second conductive plate (32) and the center (C1) of the connection region of the conductive material (34) in the second conductive plate (32) is D1, and the distance between the center (C3) of the connection region (R2) of the second MOSFET electrode (22a) of the MOSFET (20) in the second conductive plate (32) and the center (C1) of the connection region of the conductive material (34) in the second conductive plate (32) is D2. Also, the maximum value of the saturation voltage between the collector and emitter of the IGBT (10) under the specified condition is V ＣＥ（ｍａｘ） and the standard value of the drain-source voltage obtained by multiplying the standard value (typical value) of the on-voltage between the drain and source of the MOSFET (20) under the specified condition by the rated current is V ＤＳ（ｔｙｐ） is defined as such.

[0027] The connection position of the conductive material (34) with the second conductive plate (32) is preferably set so as to satisfy the following formula (1). Thereby, compared with the case where the formula (1) is not satisfied, in the high-load region where the resistance value between the collector and emitter of the IGBT (10) is smaller than the resistance value between the source and drain of the MOSFET (20), the ratio of the current flowing through the IGBT (10) can be increased, and the total power consumption in the IGBT (10) and the MOSFET (20) can be reduced.

[0028] D1 / D2 < V ＣＥ（ｍａｘ） / V ＤＳ（ｔｙｐ）... (1) Furthermore, it is preferable to set the connection position of the conductive material (34) with the second conductive plate (32) so as to further satisfy the following equation (2). This increases the ratio of current flowing to the IGBT (10) in the high-load region compared to the case where equation (2) is not satisfied, and reduces the total power consumption in the IGBT (10) and MOSFET (20).

[0029] Here, V is the standard value of the collector-emitter saturation voltage of the IGBT (10) under the specified conditions. ＣＥ（ｔｙｐ） Let's assume that.

[0030] D1 / D2 < V ＣＥ（ｔｙｐ） / V ＤＳ（ｔｙｐ） ... (2) The above V ＣＥ（ｍａｘ） , V ＣＥ（ｔｙｐ） and V ＤＳ（ｔｙｐ） This information is provided in the datasheets for IGBT (10) and MOSFET (20).

[0031] Furthermore, by setting the connection position of the conductive material (34) with the second conductive plate (32) to satisfy equation (3) below, the ratio of current flowing to the IGBT (10) in the high-load region can be increased compared to the case where equation (3) is not satisfied, thereby reducing the total power consumption in the IGBT (10) and MOSFET (20).

[0032] D1 / D2 < 1...(3) Therefore, according to this embodiment 1, even without changing the chip size of the IGBT (10) and MOSFET (20), the number and thickness of conductive material (34) that can be connected between the second IGBT electrode (12a) of the IGBT (10) and the second MOSFET electrode (22a) of the MOSFET (20) and the third conductive plate (33) can be adjusted by changing the size of the second and third conductive plates (32, 33).

[0033] Furthermore, since the second conductive plate (32) is a lead frame, it can carry a larger current than a wire. Also, because it has a large heat dissipation area, heat can be dissipated efficiently.

[0034] Also, by simply changing the connection position of the conductive material (34) in the second conductive plate (32), the inductance between the second IGBT electrode (12a) and the conductive material (34) and between the second MOSFET electrode (22a) and the conductive material (34) can be adjusted. For example, in Patent Document 1 mentioned above, since wires can only be bonded at limited positions, changing the layout is necessary to adjust the inductance. In the first embodiment, the inductance can be adjusted without changing the layout by simply changing the connection position of the conductive material (34).

[0035] Also, since the IGBT (10) and MOSFET (20) are directly connected to the second conductive plate (32), the inductance generated between the IGBT (10) and MOSFET (20) and the second conductive plate (32) can be reduced compared to the case of connecting via wires.

[0036] (Embodiment 2) FIG. 5 is a diagram corresponding to FIG. 2 of Embodiment 2. In the second embodiment, the third conductive plate (33) is separated from the substrate (40). The IGBT (10), MOSFET (20), first conductive plate (31), second conductive plate (32), third conductive plate (33), and conductive material (34) are sealed with resin (50) so as to be isolated from the outside.

[0037] Other configurations are the same as those in the first embodiment, so the same reference numerals are assigned to the same configuration parts and their detailed description is omitted.

[0038] As described above, although the embodiments and modified examples have been explained, it will be understood that various changes in form and details are possible without departing from the spirit and scope of the claims. Also, the above embodiments, modified examples, and other embodiments may be appropriately combined or substituted as long as the functions of the object of the present disclosure are not impaired.

[0039] As described above, the present disclosure is useful for semiconductor devices.

[0040] 10 IGBT 11 First IGBT electrode formation surface 11a First IGBT electrode 12 Second IGBT electrode formation surface 12a Second IGBT electrode 20 MOSFET 21 First MOSFET electrode formation surface 21a First MOSFET electrode 22 Second MOSFET electrode formation surface 22a Second MOSFET electrode 31 First conductive plate 32 Second conductive plate 33 Third conductive plate 34 Conductive material R1, R2 Connection region C1, C2, C3 Center

Claims

1. An IGBT (10) having a pair of electrode-forming surfaces (11, 12) facing opposite directions, with electrodes (11a, 12a) formed on each of the pair of electrode-forming surfaces (11, 12); a MOSFET (20) having a pair of electrode-forming surfaces (21, 22) facing opposite directions, with electrodes (21a, 22a) formed on each of the pair of electrode-forming surfaces (21, 22); a first conductive plate (31) in contact with the electrode (11a) of one electrode-forming surface (11) of the IGBT (10) and the electrode (21a) of one electrode-forming surface (21) of the MOSFET (20); A semiconductor device comprising: an electrode (12a) on the other electrode forming surface (12) of the IGBT (10); a second conductive plate (32) in contact with the electrode (22a) on the other electrode forming surface (22) of the MOSFET (20); a third conductive plate (33); and a conductive material (34) connecting the second conductive plate (32) and the third conductive plate (33).

2. In the semiconductor device according to claim 1, the chip temperature of the IGBT (10) and the MOSFET (20) is set to 25°C, and the rated current is flowed through the IGBT (10) and the MOSFET (20) as specified conditions, and the distance between the center (C2) of the connection region (R1) between the IGBT (10) and the electrode (12a) of the second conductive plate (32) and the center (C1) of the connection region (C1) between the second conductive plate (32) and the conductive material (34) is D1, the distance between the center (C3) of the connection region (R2) between the MOSFET (20) and the electrode (22a) of the second conductive plate (32) and the center (C1) of the connection region (C1) between the second conductive plate (32) and the conductive material (34) is D2, and the maximum value of the collector-emitter saturation voltage of the IGBT (10) under the specified conditions is V ＣＥ（ｍａｘ） The standard value of the drain-source on-voltage of the MOSFET (20) under the specified conditions is obtained by multiplying the standard value of the drain-source on-voltage by the rated current, which is V ＤＳ（ｔｙｐ） A semiconductor device that satisfies the following equation: D1 / D2 < V ＣＥ（ｍａｘ） / V ＤＳ（ｔｙｐ） 3. In the semiconductor device according to claim 2, the standard value of the collector-emitter saturation voltage of the IGBT (10) under the specified conditions is V ＣＥ（ｔｙｐ） A semiconductor device that satisfies the following equation: D1 / D2 < V ＣＥ（ｔｙｐ） / V ＤＳ（ｔｙｐ） 4. A semiconductor device according to any one of claims 1 to 3, wherein D1 is the distance between the center (C2) of the connection region (R1) between the second conductive plate (32) and the electrode (12a) of the IGBT (10), and the center (C1) of the connection region (R2) between the second conductive plate (32) and the conductive material (34), and D2 is the distance between the center (C3) of the connection region (R2) between the second conductive plate (32) and the electrode (22a) of the MOSFET (20), and the center (C1) of the connection region (R2) between the second conductive plate (32) and the conductive material (34), and the semiconductor device satisfies the following equation: D1 / D2 < 1 5. A semiconductor device according to any one of claims 1 to 4, wherein the conductive material (34) is a wire, ribbon bond, plated wire, or lead frame.

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