METHOD FOR PRODUCING SiC SUBSTRATE AND SiC SUBSTRATE HAVING GROWTH LAYER

Abstract

The present invention addresses the problem of providing a novel method for producing a SiC substrate in which warpage of the SiC substrate is suppressed. Provided is a method for producing a SiC substrate, said method comprising: a first treatment step that includes a first growth step in which, simultaneously with a first thermal etching step for heating a SiC substrate that has a first surface and a second surface opposite from the first surface so as to thermally etch one surface among the first surface and the second surface, a SiC growth layer is formed on the other surface; and a second treatment step that includes a second thermal etching step in which the surface on which the SiC growth layer was formed in the first growth step is thermally etched, simultaneously with a second growth step for forming a SiC growth layer on the surface thermally etched in the first thermal etching step.

Description

Method for manufacturing SiC substrates, SiC substrate with growth layer

[0001] This invention relates to a method for manufacturing a SiC substrate.

[0002] In the manufacturing of SiC semiconductor devices, it is extremely important to process the SiC substrate (As-slice substrate) cut from the ingot and to planarize the first surface of the substrate to the atomic level. Conventional processing of SiC substrates involved gradually reducing the surface roughness of the first surface through steps such as rapping and / or grinding and polishing.

[0003] However, it is known that mechanical damage remains in SiC substrates processed in this manner. This damage manifests not only as scratches on the first surface, but also as crystal distortion in the surface layer up to a certain depth from the first surface. Layers containing this damage are called "processed altered layers" and have a significant negative impact on the performance of SiC semiconductor devices.

[0004] The present inventors have invented a method for reducing the surface roughness of a substrate by non-contact processing, unlike the various stages of conventional processing. Patent Document 1 describes a method for reducing macrostep bunching on the first surface of a substrate by heating and etching a SiC substrate in an environment with vapor pressures of gaseous species containing Si and gaseous species containing C. Patent Document 2 describes a method for reducing the processed altered layer of a substrate by heating and etching a SiC substrate in an environment with vapor pressures of gaseous species containing Si and gaseous species containing C.

[0005] Thus, manufacturing SiC substrates with fewer defects and distortions is crucial for improving the yield of SiC semiconductor devices. On the other hand, suppressing substrate warping is also an important factor in improving yield.

[0006] There is a movement to increase the diameter of substrates in order to lower the manufacturing cost of SiC semiconductor devices. However, as the substrate diameter increases, the warping of the substrate becomes more pronounced. If the warping of the substrate is not reduced, the yield will decrease as a result, and a significant reduction in manufacturing costs due to the increase in diameter cannot be achieved.

[0007] International Publication No. 2020 / 179793, International Publication No. 2020 / 179794

[0008] In view of the above circumstances, the object of the present invention is to provide a novel method for manufacturing a SiC substrate that suppresses warping of the SiC substrate.

[0009] One embodiment of the present invention for achieving the above objectives is a method for manufacturing a SiC substrate, which is the following manufacturing method [1]-

[14] . Another embodiment of the present invention for achieving the above objectives is a SiC substrate with a growth layer

[15] -

[19] .

[0010] The manufacturing method [1] comprises a first processing step including a first thermal etching step in which a SiC substrate having a first surface and a second surface opposite to the first surface is thermally etched on either the first surface or the second surface, and a first growth step in which a SiC growth layer is formed on the other surface at the same time; and a second processing step including a second growth step in which a SiC growth layer is formed on the first surface thermally etched in the first thermal etching step, and a second thermal etching step in which the second surface on which the SiC growth layer was formed in the first growth step is thermally etched at the same time. With the above characteristic configuration, a SiC substrate with less warping can be manufactured by simultaneously performing thermal etching and growth layer formation on the first surface and the second surface, which are the main surfaces of the SiC substrate, and then performing the reverse processing on each main surface.

[0011] In manufacturing method [2], the second processing step is carried out such that a growth layer exists on the first surface and the second surface of the SiC substrate after the second processing step.

[0012] Manufacturing method [3] is manufacturing method [1] or [2], wherein the first surface is a Si polar surface and the second surface is a C polar surface.

[0013] Manufacturing method [4] is manufacturing method [3], wherein the first processing step includes a first thermal etching step of thermal etching the first surface which is a Si polar surface, and simultaneously a first growth step of forming a SiC growth layer on the second surface which is a C polar surface, and the second processing step includes a second thermal etching step of thermal etching the second surface simultaneously with the second growth step of forming a SiC growth layer on the first surface.

[0014] Manufacturing method [5] is any one of manufacturing methods [1] to [4], wherein the first thermal etching step and the second thermal etching step include arranging the SiC material opposite to one of the first and second surfaces of the SiC substrate and heating the SiC substrate so that a temperature difference is created in which one of the surfaces of the SiC substrate becomes relatively hot and the SiC material becomes relatively cold, thereby thermal etching the SiC substrate; and the first growth step and the second growth step include arranging the SiC material opposite to one of the surfaces of the SiC substrate and heating the SiC material so that a temperature difference is created in which one of the surfaces of the SiC substrate becomes relatively cold and the SiC material becomes relatively hot, thereby forming a SiC growth layer on one of the surfaces of the SiC substrate opposite to the SiC material.

[0015] Manufacturing method [6] is any one of manufacturing methods [1] to [5], wherein the first processing step and the second processing step include housing a SiC substrate in a first crucible made of SiC. By housing the SiC substrate in a first crucible made of SiC and carrying out the first processing step and / or the second processing step, processing can be performed while suppressing carbonization of the SiC substrate. Furthermore, by processing the SiC substrate in a SiC crucible, the strain layer of the SiC substrate can be removed, the SiC substrate can be planarized, and basal plane dislocations in the growth layer of the SiC substrate can be reduced.

[0016] Manufacturing method [7] is manufacturing method [6], wherein the first and second processing steps include housing the first crucible made of SiC in a second crucible which is composed of a C element storage material. With this configuration, carbonization of the first crucible made of SiC itself can be suppressed. In addition, the processing environment inside the first crucible can be maintained for a long time.

[0017] Manufacturing method [8] is any one of manufacturing methods [1] to [5], wherein the first and second processing steps include housing the SiC substrate in a second crucible composed of a C element storage material. With this configuration, the SiC substrate can be processed while preventing carbonization of the SiC substrate.

[0018] Manufacturing method [9] is one of manufacturing methods [1]-[8], wherein the diameter of the SiC substrate is 8 inches or more. According to the above configuration, it can be applied to SiC substrates of 8 inches or more, where warping becomes a significant problem.

[0019] Manufacturing method

[10] is one of manufacturing methods [1] to [9], wherein the first processing step and / or the second processing step are carried out under a doping gas atmosphere.

[0020] Manufacturing method

[11] is one of manufacturing methods [1] to

[10] , wherein the first and second processing steps are repeated until the thickness of the growth layer on the Si polar surface of the SiC substrate becomes 10 μm or more and Bow becomes -50 μm to +50 μm. According to manufacturing method

[11] , warpage can be controlled even when a thick growth layer of 10 μm or more is formed.

[0021] Manufacturing method

[12] is one of manufacturing methods [1] to

[11] , and further includes a classification step of classifying the SiC substrates based on the Bow value of the SiC substrates, and the first and second processing steps are performed simultaneously on a plurality of SiC substrates classified in the classification step. By performing the first and second processing steps for each group of SiC substrates classified based on the Bow value, SiC substrates with controlled warpage can be manufactured efficiently.

[0022] Manufacturing method

[13] is any one of manufacturing methods [1] to

[12] , wherein the classification step includes classifying SiC substrates with a positive Bow value from SiC substrates with a negative Bow value.

[0023] Manufacturing method

[14] is any one of manufacturing methods [1] to

[13] , wherein the classification step includes classifying the SiC substrates into predetermined numerical ranges based on the Bow value of the SiC substrates.

[0024] The present invention also relates to a SiC substrate with a growth layer

[15] . The SiC substrate with a growth layer

[15] has a first surface and a second surface opposite to the first surface, and has a SiC growth layer on the first surface and the second surface. The SiC substrate with a growth layer of the present invention has less warping because it has a SiC growth layer on both the first surface and the second surface.

[0025] The SiC substrate with growth layer

[16] is the SiC substrate with growth layer

[15] , and the Bow is -50 μm to +50 μm.

[0026] The SiC substrate with growth layer

[17] is the SiC substrate with growth layer

[15] or

[16] , wherein Bow is a negative value.

[0027] The SiC substrate with growth layer

[18] is any one of the SiC substrates with growth layer

[15] to

[17] , wherein the first surface is a Si polar surface and the thickness of the SiC growth layer on the first surface is 100 μm or more.

[0028] The SiC substrate with growth layer

[19] is one of the SiC substrates with growth layer

[15] -

[18] and has a diameter of 8 inches or more.

[0029] This is a conceptual diagram illustrating the process of the present invention. This is a conceptual diagram illustrating the principle of the present invention. This is a graph summarizing the factors affecting the SiC substrate. This is a diagram of the apparatus configuration according to Embodiment 1. This is a schematic diagram of the first processing step according to Embodiment 1. This is a schematic diagram of the second processing step according to Embodiment 1. This is a diagram of the apparatus configuration according to Embodiment 2. This is a schematic diagram of the first processing step according to Embodiment 2. This is a schematic diagram of the second processing step according to Embodiment 2. This is a diagram of the apparatus configuration according to Embodiment 3. This is a schematic diagram of the first processing step according to Embodiment 3. This is a schematic diagram of the second processing step according to Embodiment 3. This is a graph showing the change in Bow with respect to processing time according to Example 1. This is a graph showing the change in Bow with respect to processing time according to Example 2. This is a graph showing the change in Bow with respect to processing time according to Example 3. This is a contour plot and cross-sectional view showing the change in Bow of an 8-inch SiC substrate according to Example 4. This is a graph showing the difference in the trend of change in Bow during nitrogen introduction according to Example 5. This is a graph showing the Bow value with respect to the thickness of the growth layer on the Si polar surface according to Example 6.

[0030] <1> Method for manufacturing a SiC substrate The present invention comprises a first processing step including a first thermal etching step in which a SiC substrate having a first surface and a second surface opposite to the first surface is heated to thermally etch either the first surface or the second surface, and simultaneously a first growth step in which a SiC growth layer is formed on the other surface; and a second processing step including a second growth step in which a SiC growth layer is formed on the surface thermally etched in the first thermal etching step, and simultaneously a second thermal etching step in which the surface on which the SiC growth layer was formed in the first growth step is thermally etched.

[0031] Figure 1 shows a conceptual diagram illustrating the process of the present invention. The SiC substrate 10 has a first surface 11 which is the main surface and a second surface 12 which is the main surface opposite to the first surface 11. A first processing step S10 is performed on this SiC substrate 10. The first processing step S10 comprises a first thermal etching step S11 and a first growth step S12. In this embodiment, the first surface 11 is thermally etched by the first thermal etching step S11, and a growth layer is formed on the second surface 12 by the first growth step S12. In Figure 1, the shaded area indicates the growth layer.

[0032] Next, the SiC substrate 10 subjected to the first processing step S10 is subjected to the second processing step S20. The second processing step S20 comprises a second thermal etching step S21 and a second growth step S22. The second thermal etching step S21 is performed on the surface subjected to the first growth step S12. In the example shown in Figure 1, the second thermal etching step S21 is performed on the second surface 12. The second growth step S22 is performed on the surface subjected to the first thermal etching step S11. In the example shown in Figure 1, the second growth step S22 is performed on the first surface 11. In this embodiment, the second processing step is performed so that a growth layer exists on both the first surface 11 and the second surface 12. The SiC substrate 10 manufactured in this way, with a growth layer on both the first surface 11 and the second surface 12, is a SiC substrate with less warping.

[0033] While the principle by which the present invention enables the manufacture of SiC substrates with less warping is currently under active research, the principle of the present invention as currently estimated will be explained using Figures 2 and 3. In Figure 2, a SiC substrate 10 is shown as an example, in which the first surface 11 is the Si polar surface and the second surface is the C polar surface. Generally, a SiC substrate 10 is manufactured by slicing a SiC ingot and going through processing steps such as polishing, grinding, and chemical mechanical polishing. It is known that processing strain remains below the first surface of the SiC substrate 10 due to these processing steps (strain on the Si polar surface side 13a, strain on the C polar surface side 13b). Generally, it is known that the processing strain on the Si polar surface side is relatively small, and the processing strain on the C polar surface side is relatively large. In addition, although not shown, it is also known that thermal stress caused by SiC ingot growth, etc., remains inside the SiC substrate.

[0034] This SiC substrate requires an epitaxial growth layer (thin film) to be attached using chemical vapor deposition (CVD) in the next step. The problem was that attaching the epitaxial growth layer disrupted the balance between the residual stress on the first surface and the residual stress on the second surface, causing warping of the SiC substrate 10.

[0035] On the other hand, according to the present invention, the first surface (Si polar surface) is thermally etched, which eliminates the strain 13a on the Si polar surface side and relieves stress. At the same time, a growth layer is formed on the second surface (C polar surface), but the strain 13b on the C polar surface side is relatively larger than the strain 13a on the Si polar surface side, and defects and dislocations caused by this processing strain are generated in the growth layer. The generation of these defects and dislocations releases the strain 13b on the C polar surface side and relieves stress. In other words, the first processing step relieves stress on both the first and second surfaces of the SiC substrate. At this point, since the growth layer is formed only on the C polar surface side, the SiC substrate 10 is warped, but in the second processing step, a growth layer is also formed on the Si polar surface side, so a SiC substrate 10 with suppressed warping can be manufactured.

[0036] If the first and second surfaces are treated sequentially, there is a concern that plastic deformation may occur due to the significant stress difference between the first and second surfaces. According to the present invention, since the stress on the first and second surfaces, i.e., the Si polar surface and the C polar surface, can be relaxed simultaneously, the risk of plastic deformation is considered to be suppressed.

[0037] Figure 3 shows a graph summarizing the factors affecting the warpage of a SiC substrate. The vertical axis is Bow, and the horizontal axis is the growth thickness or etching amount. In this specification, Bow is the height of the center of the SiC substrate and the distance from the three-point reference plane on the Si polar surface side. When the Si polar surface is oriented upwards, if the height of the center of the SiC substrate is above the three-point reference plane, the value of Bow is positive. On the other hand, if the height of the center of the SiC substrate is below the three-point reference plane, the value of Bow is negative. The solid lines in (1) and (2) represent the residual stress due to subsurface damage on the Si polar surface side and the residual stress due to subsurface damage on the C polar surface side, respectively. The residual stress on the Si polar surface side in (1) is a factor that increases Bow, but by thermal etching the Si polar surface or forming a growth layer, the residual stress is relieved and no longer contributes to the change in Bow. (2) The residual stress on the C polar surface side is a factor that reduces Bow, but by thermal etching the C polar surface or forming a growth layer, the residual stress is relieved and no longer contributes to the change in Bow. (3) The dashed line represents the thermal stress remaining in the SiC substrate. This is generated during the SiC ingot manufacturing process before the SiC substrate is manufactured. The thermal stress in the SiC substrate hardly changes with processing. Therefore, although thermal stress is a factor that contributes to Bow, it is almost constant and therefore does not contribute to the change in Bow. (4) and (5) The dashed lines represent the thickness of the growth layer on the Si polar surface and the thickness of the growth layer on the C polar surface, respectively. (4) The greater the thickness of the growth layer on the Si polar surface, the more Bow changes in the positive direction. (5) The greater the thickness of the growth layer on the C polar surface, the more Bow changes in the negative direction.

[0038] That is, according to the processing method of the present invention, since the residual stress on each surface that affects the warp of the SiC substrate is removed, the influence of the residual stress on the warp is extremely small. In addition, the thermal stress generated during the ingot growth of SiC is invariant and is a factor that affects the warp but not a factor that affects the change in the warp. Therefore, the warp of the SiC substrate subjected to such processing will change depending on the thickness of the growth layer deposited on the first surface and the second surface, and it becomes possible to predict how the warp will change, and the warp can be easily controlled.

[0039] (Embodiment 1) Next, a specific configuration example for implementing the manufacturing method of the present invention will be described using FIGS. 4 to 6. First, the SiC substrate 10 having the first surface 11 and the second surface 12 is housed in the first crucible 20 made of SiC. The first crucible 20 includes a lid 21 and a base 22, and is configured such that a minute gap is formed when the lid 21 and the base 22 come into contact (the state where the first crucible 20 is closed). With such a configuration, in the first crucible 20 made of SiC, an environment can be created where gas can move in and out of the crucible, but not all gas moves in and out of the crucible. In this specification, such an environment is referred to as a "semi-closed space".

[0040] The SiC substrate 10 is installed at a distance from the bottom surface of the first crucible 20 by an installation tool 23. The installation tool 23 is preferably made of SiC. Further, the installation tool 23 may be separate from the first crucible 20 or may be integrated with the first crucible 20. For example, a convex portion is formed on the bottom surface of the first crucible 20, and when the convex portion is brought into contact with the SiC substrate 10 and arranged, the bottom surface of the first crucible 20 and the SiC substrate 10 are configured to be installed apart from each other except for the convex portion.

[0041] Next, the first crucible 20 is arranged in a second crucible 30 configured to contain a C element storage material. In the present embodiment, the second crucible 30 is a crucible made of TaC. The second crucible 30 includes a lid 31 and a base 32, and is configured such that a minute gap is formed when the lid 31 and the base 32 come into contact (the state where the second crucible 30 is closed), similar to the first crucible 20.

[0042] The second crucible 30 includes a Si vapor generation source 33 on the inner surface side of the container. In the present embodiment, the Si vapor generation source 33 is tantalum silicide. By disposing the first crucible 20 in such a second crucible 30, it is possible to prevent the SiC-made first crucible 20 from carbonizing, and to prevent a reduction in material life due to carbonization, thermal etching of the SiC substrate, and effects on growth. Also, the environment during the heat treatment in the first crucible 20 can be maintained for a long time.

[0043] The second crucible 30 is disposed in a heating furnace (not shown), and the first treatment step S10 is performed. In the present embodiment, as the first treatment step S10, an example in which a first thermal etching step S11 of performing thermal etching on the first surface 11 and a first growth step of forming a SiC growth layer on the second surface 12 are simultaneously performed will be described.

[0044] In the present embodiment, the top surface side (lid 21) of the first crucible 20 made of SiC facing the first surface 11 and the first surface 11 are heated with a temperature difference such that the first surface 11 is relatively on the high-temperature side and the top surface side of the first crucible 20 is relatively on the low-temperature side, thereby implementing the first thermal etching step S11. Also, simultaneously with the first thermal etching step, the bottom surface side (substrate 22) of the first crucible 20 made of SiC facing the second surface 12 and the second surface 12 are heated with a temperature difference such that the second surface 12 is relatively on the low-temperature side and the bottom surface side of the first crucible 20 is relatively on the high-temperature side, thereby implementing the first growth step S12. FIG. 5 is a conceptual diagram illustrating the above matters. Such a temperature difference can be realized by heating with a temperature gradient in which the lower side is high temperature and the upper side is low temperature as seen from the device configuration diagram shown in FIG. 4.

[0045] The above-described thermal etching step S11 and growth step S12 of SiC are considered to proceed as a result of the continuous occurrence of the following reactions 1) to 5).

[0046] 1) SiC(s) → Si(v) + C(s) 2) 2C(s) + Si(v) → SiC ２ (v) 3) C(s) + 2Si(v) → Si2C(v) 4) Si(v) + SiC ２ (v) → 2SiC(s) 5) Si ２C(v)→Si(v)+SiC(s)

[0047] 1) Explanation: When SiC(s) (substrate 22 or SiC substrate 10) is heated, Si atoms (Si(v)) are removed by thermal decomposition (Si atom sublimation process). 2) and 3) Explanation: After the Si atoms (Si(v)) are removed, the C(C(s)) remaining in the substrate 22 or SiC substrate 10 reacts with Si vapor (Si(v)) in the first crucible 20. As a result, C(C(s)) becomes Si ２ C or SiC ２ The sublimation occurs from the substrate 22 and the first surface 11 of the SiC substrate 10 (C atom sublimation process). Explanation of 4) and 5): Sublimated Si ２ C or SiC ２ These materials grow from the first surface 11 of the SiC substrate 10 to the lid 21, or from the base body 22 to the second surface 12 of the SiC substrate 10, due to the temperature difference (vapor pressure difference).

[0048] Next, a second processing step is performed on the SiC substrate 10. In this embodiment, the second processing step includes a second growth step S22 in which a SiC growth layer is formed on the first surface 11 subjected to the first thermal etching step, and a second thermal etching step S21 in which the second surface 12 subjected to the first growth step is thermally etched. That is, the second processing step includes a step of forming a growth layer on the main surface thermally etched in the first processing step, and a step of thermally etching the main surface on which the SiC growth layer has been formed. To realize this second processing step, the relationship between the temperature difference between each main surface of the SiC substrate 10 and the first crucible 20 facing it can be reversed. For example, if in the first processing step the SiC substrate 10 is positioned so that the first surface 11 faces upward and the second surface 12 faces downward, in the second processing step the SiC substrate 10 can be positioned so that the first surface 12 faces downward and the second surface 12 faces upward, and the same temperature gradient as in the first processing step can be applied for heating. In other words, the top-bottom relationship between the first surface 11 and the second surface 12 of the SiC substrate 10 should be reversed. Also, if in the first processing step a temperature gradient is provided where the lower side is hotter and the upper side is colder, then in the second processing step a temperature gradient should be provided where the lower side is colder and the upper side is hotter. In other words, the direction of the temperature gradient should be reversed.

[0049] Figure 6 shows an example where the direction of the temperature gradient is reversed. In this embodiment, the second processing step is carried out so that a SiC growth layer exists on both the first surface 11 and the second surface 12 of the SiC substrate.

[0050] (Embodiment 2) Figures 7 and 8 show an example configuration according to another embodiment. In the example in Figure 7, a plurality of SiC substrates 10a, 10b, and 10c are arranged in the first crucible 20. Figure 8 shows a conceptual diagram of the first processing step in the case of Figure 7.

[0051] First, the first surface 11a of the SiC substrate 10a is positioned opposite the second surface 12b of the SiC substrate 10b. When heated with the temperature gradient shown in Figure 7, the first surface 11a becomes relatively hotter, and the second surface 12b becomes relatively colder. Therefore, the first surface 11a is thermally etched, and the sublimated gas reaches the second surface 12b, forming a growth layer on the second surface 12b.

[0052] On the other hand, the second surface 12a of the SiC substrate 10a is positioned opposite the first surface 11c of the SiC substrate 10c. When heated with the temperature gradient shown in Figure 7, the first surface 11c becomes relatively hot, and the second surface 12a becomes relatively cold. Therefore, the first surface 11c is thermally etched, and the sublimated gas reaches the second surface 12a, forming a growth layer on the second surface 12a.

[0053] Furthermore, the first surface 11b of the SiC substrate 10b is positioned opposite the top surface (lid 21) of the first crucible 20. When heated with the temperature gradient shown in Figure 7, the first surface 11b becomes relatively hot, and the lid 21 becomes relatively cold. Consequently, the first surface 11b is thermally etched, and the sublimated gas reaches the lid 21.

[0054] Furthermore, the second surface 12c of the SiC substrate 10c is positioned opposite the bottom surface (substrate 22) of the first crucible 20. When heated with the temperature gradient shown in Figure 7, the substrate 22 becomes relatively hot, and the first surface 12c becomes relatively cold. Therefore, the substrate 22 is thermally etched, and the sublimated gas reaches the first surface 12c, forming a growth layer.

[0055] Next, Figure 9 shows a conceptual diagram of the second processing step according to this embodiment. In the second processing step, the direction of the high and low temperatures of the temperature gradient shown in Figure 7 is reversed. The first surface 11a of the SiC substrate 10a faces the second surface 12b of the SiC substrate 10b. The first surface 11a becomes relatively cold, and the second surface 12b becomes relatively hot. Therefore, the second surface 12b is thermally etched, and the sublimated gas reaches the first surface 11a, forming a growth layer.

[0056] On the other hand, the second surface 12a of the SiC substrate 10a faces the first surface 11c of the SiC substrate 10c. The first surface 11c is relatively cold, while the second surface 12a is relatively hot. Therefore, the second surface 12a is thermally etched, the sublimated gas reaches the first surface 11c, and a growth layer is formed.

[0057] Furthermore, the first surface 11b of the SiC substrate 10b faces the top surface (lid 21) of the first crucible 20. The first surface 11b becomes relatively cold, while the lid 21 becomes relatively hot. Therefore, the lid 21 is thermally etched, the sublimated gas reaches the first surface 11b, and a growth layer is formed.

[0058] Furthermore, the second surface 12c of the SiC substrate 10c faces the bottom surface (substrate 22) of the first crucible 20. The second surface 12c becomes relatively hot, while the substrate 22 becomes relatively cold. Therefore, the second surface 12c is thermally etched, and the sublimated gas reaches the substrate 22.

[0059] The manufacturing method of the present invention comprises a first processing step including a first thermal etching step of thermal etching one of the main surfaces of the first or second surface and a first growth step of forming a SiC growth layer on the other main surface simultaneously, and a second processing step including a second growth step of thermal etching the main surface on which the SiC growth layer was formed in the first growth step, simultaneously with a second growth step of thermal etching the main surface on which the SiC growth layer was formed in the first growth step. Embodiments 1 and 2 illustrate an embodiment in which, in the first processing step, the first surface, which is the main surface, is thermally etched and a growth layer is formed on the second surface, and then in the second processing step, a growth layer is formed on the first surface and the second surface is thermally etched. However, in the first processing step, the second surface may be thermally etched and a growth layer formed on the first surface, and then in the second processing step, the first surface may be thermally etched and a growth layer may be formed on the second surface.

[0060] In a preferred embodiment of the present invention, in the first processing step, the Si polar surface is thermally etched and a growth layer is formed on the C polar surface, and then in the second processing step, a growth layer is formed on the Si polar surface and the C polar surface is thermally etched. The inventors have proposed methods for removing the processed alteration layer of a SiC substrate and for planarizing the first surface of a SiC substrate by thermal etching the SiC substrate (see Patent Documents 1 and 2). By thermally etching the Si polar surface on which the device structure of a SiC semiconductor device is formed first to remove the processed alteration layer or planarize the first surface, and then forming a growth layer, a higher quality SiC substrate can be manufactured.

[0061] In a preferred embodiment of the present invention, the second processing step is carried out such that growth layers exist on both the first and second surfaces of the SiC substrate after the second processing step. Although the reason why the SiC substrate manufactured according to the present invention exhibits less warping is still under investigation, it is believed that the sandwich structure in which growth layers exist on both sides of the SiC substrate suppresses warping. Generally, the growth rate and etching rate depend on temperature and pressure. The higher the temperature, the faster the growth rate and etching rate, and the higher the pressure, the slower the growth rate and etching rate. If the growth rate and etching rate are known, the amount of growth and etching can be adjusted by adjusting the processing time, making it possible to carry out the second processing step so that SiC growth layers exist on both the first and second surfaces.

[0062] The heating temperature in the first processing step, which includes the first thermal etching step and the first growth step, is preferably 1400°C to 2300°C, and more preferably 1600°C to 2300°C. The heating time can be adjusted to achieve the desired etching amount or growth amount, but for example, it can be 30 seconds or more, 1 minute or more, 5 minutes or more, 10 minutes or more, 15 minutes or more, 20 minutes or more, 25 minutes or more, 30 minutes or more, 40 minutes or more, 50 minutes or more, or 1 hour or more. Alternatively, the heating time can be 5 hours or less, 4 hours or less, 3 hours or less, 2 hours or less, or 1 hour 30 minutes or less.

[0063] The first thermal etching process and the first growth process may be carried out under ultra-high vacuum or vacuum, and an inert gas may be introduced into the first crucible. A doping gas may also be used. Examples of inert gases or doping gases include Ar and N. ２、 Examples include boron-based gases and aluminum-based gases. This pressure can be 1 kPa or more (or greater than 1 kPa), 10 kPa or more (or greater than 10 kPa), or 100 kPa or more (or 100 kPa or less). There is no particular upper limit to this pressure, but it can be 300 kPa or less (or less than 300 kPa).

[0064] Also, in the first processing step, when using doping gas, the direction of the change in warp can be controlled according to its back pressure. Specifically, when the nitrogen back pressure is 1 Pa or more, the Si polar plane is etched, and the C polar plane is grown, the Bow changes in the positive direction. The greater the nitrogen back pressure is than 1 Pa, the greater the degree (slope) of the change. The nitrogen back pressure can be 1 Pa or more, 5 Pa or more, 10 Pa or more, 20 Pa or more, 30 Pa or more, 40 Pa or more, 50 Pa or more. Also, N ２ The back pressure of the gas can be 100 Pa or less, 90 Pa or less, 80 Pa or less, 70 Pa or less, 60 Pa or less. Conversely, when the Si polar plane is grown and the C polar plane is etched, the Bow changes in the negative direction.

[0065] Regarding the direction and degree of change in warp in a nitrogen atmosphere, it is considered to be the mechanism shown below. In the Jacobson model, the lattice change in the epitaxial growth layer is determined based on the difference in the size of the dopant and the size of the host atom. Since nitrogen (N) is smaller than carbon (C), when N substitutes for the C site, the lattice contracts. On the other hand, since aluminum (Al) is larger than silicon (Si), when Al substitutes for the Si site, the lattice expands.

[0066] It is considered that this lattice change affects the change in warp. The rate of change of Bow when the C polar plane side is grown under ultrahigh vacuum is negative, but when nitrogen is introduced as the doping gas, the rate of change of Bow changes in the positive direction according to the amount. On the other hand, when the Si polar plane side is grown under ultrahigh vacuum, the rate of change of Bow is positive, but when nitrogen is introduced as the doping gas, the rate of change of Bow changes in the negative direction according to the amount. From the above, by performing the first heat treatment step and / or the second treatment step in a doping gas atmosphere, the direction and degree of change in warp can be controlled according to the type and concentration of the doping gas.

[0067] The heating temperature in the second processing step, which includes the second thermal etching step and the second growth step, is preferably 1400°C to 2300°C, and more preferably 1600°C to 2300°C. The heating time can be adjusted to achieve the desired etching amount or growth amount, but for example, it can be 30 seconds or more, 1 minute or more, 5 minutes or more, 10 minutes or more, 15 minutes or more, 20 minutes or more, 25 minutes or more, 30 minutes or more, 40 minutes or more, 50 minutes or more, or 1 hour or more. Alternatively, the heating time can be 5 hours or less, 4 hours or less, 3 hours or less, 2 hours or less, or 1 hour 30 minutes or less.

[0068] The second thermal etching process and the second growth process may be carried out under ultra-high vacuum or vacuum, and an inert gas may be introduced into the first crucible. A doping gas may also be used. Examples of inert gases or doping gases include Ar and N. ２ Examples include boron-based gases and aluminum-based gases. This pressure can be 1 kPa or more (or greater than 1 kPa), 10 kPa or more (or greater than 10 kPa), or 100 kPa or more (or 100 kPa or less). There is no particular upper limit to this pressure, but it can be 300 kPa or less (or less than 300 kPa).

[0069] Furthermore, in the second processing step, if a doping gas is used, the direction and degree of change in Bow can be changed according to the back pressure, as described above.

[0070] In the second processing step, as described above, it is preferable to carry out the process such that a growth layer exists on the first surface and the second surface of the SiC substrate after the second processing step. The processing conditions such as heating temperature, heating time, and pressure in the first and second processing steps may be the same or different.

[0071] The first and second processing steps allow control over whether the phase equilibrium environment inside the SiC crucible during heating is a SiC-C equilibrium vapor pressure environment or a SiC-Si equilibrium vapor pressure environment, depending on whether or not a Si gas generating material is placed inside the SiC crucible. In this specification, "equilibrium vapor pressure environment" does not mean an equilibrium state in the strict sense, but rather a local thermodynamic equilibrium state.

[0072] Here, a SiC-C equilibrium vapor pressure environment refers to an environment where SiC (solid phase) and C (solid phase) are in phase equilibrium via the gas phase. If no Si gas generating material is placed inside a SiC crucible, and only a SiC substrate, or a SiC substrate and SiC components (for example, a fixture made of SiC) are placed inside, the inside of the crucible will become a SiC-C equilibrium vapor pressure environment due to the heat treatment.

[0073] Furthermore, a SiC-Si equilibrium vapor pressure environment refers to an environment where SiC (solid phase) and Si (liquid phase) are in equilibrium via the gas phase. When a Si gas generating material and a SiC substrate (and SiC components) are placed inside a lidded crucible made of SiC, the inside of the lidded crucible made of SiC becomes a SiC-Si equilibrium vapor pressure environment due to the heat treatment.

[0074] The inventors have proposed that when a SiC substrate is thermally etched under a SiC-C equilibrium vapor pressure environment, the strain layer of the SiC substrate can be removed. They have also proposed that when a SiC substrate is grown under a SiC-C equilibrium vapor pressure environment, basal plane dislocations are converted into through-edge dislocations, and a growth layer with fewer basal plane dislocations can be formed. Furthermore, they have proposed that when a SiC substrate is thermally etched under a SiC-Si equilibrium vapor pressure environment, macrostep bunching on the SiC substrate can be decomposed. In addition, they have proposed that when a SiC substrate is grown under a SiC-Si equilibrium vapor pressure environment, a growth layer with steps of one unit cell height arranged on the first surface can be formed.

[0075] The present invention makes it possible to manufacture a SiC substrate with less warping, regardless of whether the first processing step is performed under a SiC-C equilibrium vapor pressure environment or a SiC-Si equilibrium vapor pressure environment, or whether the second processing step is performed under a SiC-C equilibrium vapor pressure environment or a SiC-Si equilibrium vapor pressure environment. On the other hand, in order to obtain the various effects described above, the phase equilibrium environment in the first and second processing steps can be controlled. For example, the first processing step may be performed under a SiC-Si equilibrium vapor pressure environment, and the second processing step may be performed under a SiC-C equilibrium vapor pressure environment. Alternatively, the first processing step may be performed under a SiC-C equilibrium vapor pressure environment, and the second processing step may be performed under a SiC-Si equilibrium vapor pressure environment. Furthermore, the first processing step may be performed under a SiC-Si equilibrium vapor pressure environment, and the second processing step may be performed under a SiC-C equilibrium vapor pressure environment. In a preferred embodiment of the present invention, the first processing step is a process in a SiC-Si equilibrium vapor pressure environment in which the Si polar surface is etched and the C polar surface is grown, and the second processing step is a process in a SiC-C equilibrium vapor pressure environment in which the Si polar surface is grown and the C polar surface is etched. In this embodiment, the Si polar surface on which the semiconductor device structure is stacked is planarized by the first processing step. By performing growth in a SiC-C equilibrium vapor pressure environment on this planarized Si polar surface, a growth layer with extremely few basal plane dislocations can be grown on the Si polar surface.

[0076] In a preferred embodiment of the present invention, the first thermal etching step and the second thermal etching step include arranging the main surface of the SiC substrate opposite the SiC material and heating the SiC substrate so that a temperature difference is created, resulting in the main surface of the SiC substrate becoming relatively hot and the SiC material becoming relatively cold, thereby thermal etching the SiC substrate. The first growth step and the second growth step also include arranging the main surface of the SiC substrate opposite the SiC material and heating the SiC substrate so that a temperature difference is created, resulting in the main surface of the SiC substrate becoming relatively cold and the SiC material becoming relatively hot, thereby forming a SiC growth layer on the main surface. Examples of SiC materials include SiC crucibles, SiC single-crystal substrates, and SiC polycrystalline substrates. It is preferable that the SiC material be a monolithic material. By using a monolithic material, uniform etching or growth can be performed on the main surface of the SiC substrate. On the other hand, it is not advisable to use SiC powder as the SiC material. Using SiC powder may result in uneven etching and growth processes on the SiC substrate.

[0077] The present invention allows for the simultaneous execution of a first processing step on multiple SiC substrates, followed by the simultaneous execution of a second processing step.

[0078] In Embodiments 1 and 2, an example was given in which the first crucible 20 is housed in a second crucible 30 made of a carbon-absorbing material. While the use of the second crucible 30 is a preferred configuration, it is not essential. By using a second crucible made of a carbon-absorbing material, carbonization of the first crucible made of SiC can be prevented, and the lifespan of the first crucible can be extended. Furthermore, the environment inside the first crucible during heat treatment can be maintained for a long period of time.

[0079] Examples of carbon-adsorbing materials include Ta or TaC. The second crucible is preferably configured to include a Si vapor source. The term Si vapor source refers to a material that generates Si vapor when heated. Examples of Si vapor sources include solid Si and tantalum silicide. It is more preferable that substantially the entire inner wall of the second crucible, which is made of the carbon-adsorbing material, contains the Si vapor source. With this configuration, the inside of the second crucible, which is made of the carbon-adsorbing material, becomes an environment dominated by Si. As a result, the carbonization of the first crucible made of SiC can be further suppressed.

[0080] (Embodiment 3) Figure 10 shows Embodiment 3 of the present invention. In Embodiment 3, instead of using a first crucible 20 made of SiC, SiC substrates 10a, 10b, and 10c are directly placed inside a second crucible made of a C element storage material.

[0081] Figure 11 shows a conceptual diagram of the first processing step according to Embodiment 3. Similar to Embodiments 1 and 2, the first surface 11a of the SiC substrate 10a is at a relatively high temperature compared to the second surface 12b of the opposing SiC substrate 10b. Therefore, the first surface 11a is thermally etched, and the sublimated gas reaches the second surface 12b, forming a growth layer. Also, the second surface 12a of the SiC substrate 10a is at a relatively low temperature compared to the first surface 11c of the opposing SiC substrate 10c. Therefore, the first surface 11c is thermally etched, and the sublimated gas reaches the second surface 12a, forming a growth layer.

[0082] In Embodiment 3, a force acts near the second crucible 30 to draw C vapor from the gas phase into the second crucible. Unlike Embodiments 1 and 2, the second surface 12c of the SiC substrate 10c does not face the SiC material and therefore cannot receive the raw material gas for forming the SiC growth layer. Furthermore, the force of the second crucible drawing in C vapor results in etching of the second surface 12c.

[0083] Figure 12 shows a conceptual diagram of the second processing step, in which the temperature gradient is reversed from the first processing step. The phenomena occurring on the SiC substrate 10a are the same as in Embodiment 1 and Embodiment 2. On the other hand, the first surface 11b of the SiC substrate 10b is thermally etched for the reasons described above.

[0084] In other words, in Embodiment 3, for SiC substrates arranged so that the first and second surfaces of the SiC substrate face the SiC material, the same processing as in Embodiments 1 and 2 can be performed. On the other hand, for SiC substrates arranged at both ends as shown in Embodiment 3, that is, for SiC substrates arranged so that one of the first and second surfaces does not face the SiC material, the same processing cannot be performed.

[0085] The manufacturing method of the present invention can also be carried out by placing the SiC substrate in a second crucible composed of a carbon-adsorbing material. In this case, it is necessary to position the SiC substrate so that its first and second surfaces do not directly face the second crucible, but rather face another SiC substrate or other SiC material.

[0086] It is preferable to use poor-quality SiC substrates, such as dummy substrates, as the SiC substrates placed at both ends.

[0087] As described above, the manufacturing method of the present invention may be in either a form in which a SiC substrate is placed in a first crucible made of SiC, or a form in which a SiC substrate is placed in a second crucible made of a carbon-absorbing material, but the form in which a SiC substrate is placed in a first crucible made of SiC is preferred. The form using a first crucible made of SiC allows the first crucible itself to be used as the SiC material, resulting in good manufacturing efficiency. Furthermore, in the form in which the SiC substrate is placed in the second crucible, the phase equilibrium environment during heat treatment becomes more complex compared to the form using the first crucible, making it relatively difficult to control the environment. Therefore, the form using a first crucible made of SiC has the advantage of easier environmental control and higher reproducibility compared to the form using the second crucible.

[0088] Furthermore, the present invention may also perform an nth processing step (where n is an integer n > 3) on the SiC substrate after the second processing step, in which the first surface is thermally etched or grown, and the second surface is grown or thermally etched at the same time. That is, the nth processing step is a step in which either the first processing step or the second processing step is performed after the second processing step. The nth processing step may be performed multiple times. For example, the first processing step may be performed as the third processing step, and the second processing step may be performed as the fourth processing step. In the nth processing step, if n is odd, it is preferable to etch the same surface as etched in the first processing step and to form a growth layer on the same surface as the surface on which the growth layer was formed in the first processing step. Similarly, in the nth processing step, if n is even, it is preferable to etch the same surface as etched in the second processing step and to form a growth layer on the same surface as the surface on which the growth layer was formed in the second processing step. In other words, it is preferable to perform the second processing step after the first processing step, and the first processing step after the second processing step. Even in this case, the first processing step and the nth processing step (where n is odd), and the second processing step and the nth processing step (where n is even), may have different processing conditions, such as temperature, whether or not doping gas is introduced, and vapor pressure environment.

[0089] For example, as the nth processing step, a third processing step may be performed in which the Si polar surface of the SiC substrate is thermally etched and the C polar surface is grown in order to flatten the Si polar surface.

[0090] The nth processing step may be carried out in either the SiC-Si equilibrium vapor pressure environment or the SiC-C equilibrium vapor pressure environment described above. It is preferable to complete the nth processing step by processing in the SiC-Si equilibrium vapor pressure environment. By completing the processing in the SiC-Si equilibrium vapor pressure environment, the Si polar surface can be made into an extremely flat surface.

[0091] In the manufacturing method of the present invention, an epitaxial thin film may be formed on the Si polar surface by CVD after the second processing step. In this case, it is preferable that the warpage of the SiC substrate is adjusted to a desirable range after the formation of the epitaxial thin film. The inventors have confirmed that when etching of the Si polar surface and growth of the C polar surface are performed simultaneously on a SiC substrate having a Si polar surface as the first surface and a C polar surface as the second surface, the Bow of the SiC substrate decreases in proportion to the processing time (amount of etching of the Si polar surface or amount of growth of the C polar surface). Furthermore, they have confirmed that when growth of the Si polar surface and etching of the C polar surface are performed simultaneously, the Bow increases in proportion to the processing time (amount of growth of the Si polar surface or amount of etching of the C polar surface).

[0092] Therefore, when replacing the growth layer formed on the Si polar surface with an epitaxial growth layer produced by the conventional CVD method, that is, when using an epitaxial film-coated SiC substrate, the Bow of the SiC substrate should be adjusted in the second or nth processing step to be within a preferred range. In such cases, the Bow of the SiC substrate is more preferably -50 μm to +50 μm, more preferably -40 μm to +40 μm, more preferably -30 μm to +30 μm, more preferably -20 μm to +20 μm, more preferably -10 μm to +10 μm, and particularly preferably -5 μm to +5 μm.

[0093] When forming an epitaxial layer on a Si polar surface by CVD, Bow generally changes in the positive direction depending on the processing time (growth amount). Therefore, when growing an epitaxial layer on the Si polar surface side by CVD after the second or nth processing step, i.e., when creating an epiready SiC substrate, the Bow of the SiC substrate after epitaxial layer formation by CVD can be kept within a preferred range by keeping the Bow of the SiC substrate at a small negative or positive value in the second or nth processing step. In such cases, the Bow of the SiC substrate is preferably +5 μm or less, more preferably +3 μm or less, even more preferably +1 μm or less, and even more preferably 0 μm or less. It is also preferable to have a Bow of -1 μm or less, -3 μm or less, or -5 μm or less. Furthermore, in such cases, the Bow of the SiC substrate is preferably -50 μm to +5 μm, more preferably -50 μm to +1 μm, more preferably -50 μm to +0 μm, more preferably -40 μm to +0 μm, and even more preferably -30 μm to +0 μm. It is also preferable that the Bow be -30 μm to -1 μm or less, -30 μm to -3 μm, or -30 μm to -5 μm. In addition, it is preferable that the Bow be a negative value.

[0094] Each of the processing steps described above can be applied to SiC substrates immediately after slicing from an ingot, SiC substrates after polishing and grinding, SiC substrates after lapping, SiC substrates after chemical and mechanical polishing, and so on.

[0095] For example, when the above-described treatment is applied to a substrate whose first and second surfaces are still rough, such as a SiC substrate immediately after slicing or a SiC substrate after polishing and grinding, it is possible to suppress warping while improving the flatness of each surface. For such substrates with rough surfaces, it is preferable to apply an nth treatment step in addition to the first and second treatment steps.

[0096] Although SiC substrates that have undergone chemical mechanical polishing exhibit high surface flatness, strain remains beneath the substrate surface, resulting in residual stress. When epitaxial growth is performed on such a SiC substrate using the conventional CMP method, not only the thickness of the epitaxial layer but also the residual stress beneath the substrate surface becomes a factor that affects warping, making it difficult to control warping. By applying the above-described treatment to the SiC substrate after chemical mechanical polishing, residual stress is relieved, and SiC substrates with suppressed warping can be manufactured.

[0097] (Embodiment 4) In this embodiment, even when a SiC growth layer of 10 μm or more is grown on the Si polar surface side, Bow can be controlled to a preferred range.

[0098] In recent years, the practical application of SiC bipolar power devices such as PiN diodes and insulated-gate bipolar transistors, which can control ultra-high voltages of 10 kV or more, has been anticipated. Manufacturing these devices requires thick 4H-SiC epitaxial layers exceeding 100 μm. However, as the thickness of the epitaxial layer increases, wafer warping becomes greater, posing a challenge in transporting these wafers using automated systems.

[0099] In this embodiment, by performing the first and second processing steps, Bow can be controlled to a desirable range even when a SiC growth layer of 100 μm or more is grown on the Si polar surface side. In this embodiment, it is preferable to repeat the first and second processing steps until the thickness of the growth layer on the Si polar surface of the SiC substrate is 10 μm or more and Bow is between -50 μm and +50 μm. In a more preferable embodiment, the first and second processing steps are repeated until Bow is between -40 μm and +40 μm, -30 μm and +30 μm, -20 μm and +20 μm, -10 μm and +10 μm, -5 μm and +5 μm, -4 μm and +4 μm, or -3 μm and +3 μm. By repeating the first and second processing steps, Bow can be adjusted and controlled to a desirable range.

[0100] The thickness of the SiC growth layer can be set based on the performance required for the target SiC device. However, according to this embodiment, even when growing a SiC growth layer with a thickness exceeding 100 μm, Bow can be controlled within a desirable range. If the required withstand voltage for the SiC device is 1 kV or more, the thickness of the SiC growth layer can be 10 μm or more, and if a withstand voltage of 3.3 kV or more is required, the thickness of the SiC growth layer can be 33 μm or more. Therefore, the thickness of the SiC growth layer according to this embodiment can be, for example, 10 μm or more, 20 μm or more, 30 μm or more, 33 μm or more, 40 μm or more, 50 μm or more, 60 μm or more, 70 μm or more, 80 μm or more, 90 μm or more, or 100 μm or more. The upper limit of the SiC growth layer thickness is not particularly limited as long as it is mechanically tolerable, but for example it can be 500 μm or less, 400 μm or less, 300 μm or less, 200 μm or less, 190 μm or less, 180 μm or less, 170 μm or less, 160 μm or less, 150 μm or less, 140 μm or less, 130 μm or less, 120 μm or less, 110 μm or less, or 105 μm or less.

[0101] (Embodiment 5) This embodiment further includes a classification step of classifying the SiC substrates based on the Bow value of the SiC substrates. The classification step classifies, for example, SiC substrates with a positive Bow value and SiC substrates with a negative Bow value. In another example, the classification step classifies the SiC substrates into predetermined numerical ranges based on the Bow value of the SiC substrates. If the predetermined numerical ranges are set as -10 μm to less than -5 μm, -5 μm to less than 0 μm, 0 μm to less than 5 μm, and 5 μm to less than 10 μm, then a SiC substrate with a Bow value of -7 μm is classified into the -10 μm to less than -5 μm group, and a SiC substrate with a Bow value of 5 μm is classified into the 5 μm to less than 10 μm group.

[0102] In this embodiment, the first and second processing steps are performed simultaneously on multiple SiC substrates classified into the same category by the classification step. By simultaneously processing SiC substrates with similar Bow values, the Bow values ​​of the SiC substrates can be efficiently controlled.

[0103] As a method for simultaneously processing multiple SiC substrates classified in the same category, the methods described in Embodiments 2 and 3 can be used. That is, by placing multiple SiC substrates in the first crucible 20 or the second crucible 30 and heating them with a temperature gradient, the first and second processing steps can be performed simultaneously on multiple SiC substrates.

[0104] In this case, it is preferable to arrange multiple SiC substrates so that the Si polar surface of one SiC substrate faces the C polar surface of another SiC substrate. By arranging them in this way, the Bow value of each SiC substrate will change in the same trend.

[0105] In this embodiment, the first and / or second processing steps can be performed under different processing conditions for each group of SiC substrates classified by the classification step. For example, if the group has a large negative Bow value, the Bow value can be significantly changed in the positive direction by introducing a large amount of nitrogen in the first processing step to etch the Si polar surface and grow the C polar surface. On the other hand, if the group has a large positive Bow value, the Bow value can be significantly changed in the negative direction by etching the Si polar surface and growing the C polar surface under ultra-high vacuum in the first processing step. If the group has a Bow value close to 0, the Bow value can be suppressed while processing by introducing only a small amount of nitrogen in the first and second processing steps. The above is just one example, but according to the present invention, by controlling the trend of change in the Bow value through processing conditions, it is possible to manufacture SiC substrates with suppressed warping.

[0106] Furthermore, since the present invention can control the warping of the SiC substrate by heat, unlike conventional contact processing such as polishing, no new strain is introduced. Therefore, it has the advantage of being able to control warping while eliminating strain on the SiC substrate.

[0107] <2> SiC Substrate with Growth Layer The present invention relates to a SiC substrate with a growth layer. The SiC substrate with a growth layer of the present invention has a first surface and a second surface opposite to the first surface, and has a SiC growth layer on the first surface and the second surface. That is, the growth layer is provided on both sides of the main surface of the SiC substrate. The SiC substrate with a growth layer may be an epitaxial film-equipped SiC substrate as described later, or an epiready SiC substrate.

[0108] <2-1> SiC Substrate with Epitaxial Film This embodiment also relates to a SiC substrate with an epitaxial film. The SiC substrate with an epitaxial film of the present invention has a first surface and a second surface opposite to the first surface, and has a SiC growth layer on the first surface and the second surface. That is, the growth layer is provided on both sides of the main surface of the SiC substrate.

[0109] Typically, the doping concentration differs between the SiC substrate and the growth layer. Therefore, by examining SEM images, it is possible to confirm whether or not the growth layer is present on both sides of the main surface.

[0110] The SiC substrate with an epitaxial film of the present invention exhibits less warping because it has SiC growth layers on the first surface and the second surface.

[0111] The thickness of the growth layers on the first and second surfaces is not particularly limited, but can be any thickness acceptable for a substrate with a general SiC epitaxial thin film. For example, the thickness of the growth layer can be 600 μm or less, 500 μm or less, or 400 μm or less. Alternatively, the thickness of the growth layer can be 1 μm or more, 3 μm or more, 5 μm or more, 7 μm or more, 10 μm or more, 20 μm or more, 30 μm or more, 33 μm or more, 40 μm or more, 50 μm or more, 60 μm or more, 70 μm or more, 80 μm or more, 90 μm or more, 100 μm or more, 200 μm or more, or 300 μm or more. According to the present invention, even when a SiC growth layer of 100 μm or more is formed, Bow can be controlled within a desirable range.

[0112] The Bow of the SiC substrate with the epitaxial film is more preferably -50 μm to +50 μm, more preferably -40 μm to +40 μm, more preferably -30 μm to +30 μm, more preferably -20 μm to +20 μm, more preferably -10 μm to +10 μm, and particularly preferably -5 μm to +5 μm. It is also preferable to have a Bow of -4 μm to +4 μm or -3 μm to +3 μm.

[0113] The diameter of the SiC substrate with epitaxial film is preferably 6 inches or larger, and more preferably 8 inches or larger. It is known that, not limited to SiC substrates, controlling warpage becomes more difficult as the diameter of the substrate increases. This is because uniform polishing and chemical mechanical polishing become more difficult as the diameter of the substrate increases, and the way in which distortion is introduced differs from part of the substrate. According to this embodiment, even with a large diameter of 8 inches or more for the SiC substrate, warpage can be easily controlled.

[0114] <2-2> Epilady Substrate This embodiment relates to an epilady substrate. The epilady substrate has a first surface and a second surface opposite to the first surface, and has a SiC growth layer on the first surface and the second surface.

[0115] The Bow of the epitaxial SiC substrate is preferably -50 μm to +5 μm, more preferably -50 μm to +1 μm, more preferably -50 μm to +0 μm, more preferably -40 μm to +0 μm, and even more preferably -30 μm to +0 μm. It is also preferable that the Bow be -30 μm to -1 μm or less, -30 μm to -3 μm, or -30 μm to -5 μm. It is also preferable that the Bow be a negative value. For example, it is preferable that it be -1 μm or less, -3 μm or less, or -5 μm or less. The lower limit is not particularly limited, but it is preferable that it be -50 μm or more, -40 μm or more, -30 μm or more, -20 μm or more, or -10 μm or more. By adjusting the Bow to such a range, when an epitaxial film is further grown on the Si polar surface, the Bow can be kept within the preferred range.

[0116] (Example 1) The purchased SiC substrate was placed in a first crucible made of polycrystalline SiC. This first crucible was placed inside a second crucible made of TaC, and this second crucible was placed in a vacuum heating furnace. Heat treatments 1, 2, 3, and 4 were performed in that order under the conditions shown in Table 1. The Bow of the SiC substrate in its original state and the SiC substrate after each heat treatment was measured by a conventional method.

[0117]

[0118] Figure 13 shows a graph with Bow on the vertical axis and total heat treatment time on the horizontal axis. As is clear from Figure 13, when the Si polar surface is etched and the C polar surface is grown, Bow decreases in proportion to the treatment time (i.e., the amount of etching on the Si polar surface and the amount of growth on the C polar surface). Conversely, when the Si polar surface is grown and the C polar surface is etched, Bow increases. After heat treatment up to step 4, the thickness of the grown layer on the Si polar surface side was 4 μm, and the thickness of the grown layer on the C polar surface side was 17 μm.

[0119] (Examples 2 and 3) Next, using a SiC substrate with a Bow of +68 μm, heat treatments 1, 2, 3, 4, and 5 described in Table 2 were performed in that order. After each heat treatment, the Bow of the SiC substrate was measured (Example 2). Also, using a SiC substrate with a Bow of 0 μm, heat treatments 1, 2, 3, 4, 5, 6, and 7 described in Table 3 were performed in that order. After each heat treatment, the Bow of the SiC substrate was measured (Example 3).

[0120]

[0121] The results of Example 2 are shown in Figure 14, and the results of Example 3 are shown in Figure 15. As is clear from Examples 2 and 3, when the growth of the Si polar surface and etching of the C polar surface are performed simultaneously, Bow increases in proportion to the processing time (i.e., the amount of growth of the Si polar surface and the amount of etching of the C polar surface). In view of the results of Examples 1 to 3, it has become clear that when the etching of the Si polar surface and etching of the C polar surface are performed simultaneously, Bow decreases in proportion to the processing time, and when the growth of the Si polar surface and etching of the C polar surface are performed simultaneously, Bow increases in proportion to the processing time. In other words, according to the present invention, the behavior of warpage can be predicted by the processing time, i.e., the thickness of the grown layer and / or the amount of etching, so the warpage of the SiC substrate can be easily controlled. Specifically, when etching the Si polar surface and growing the C polar surface, it is possible to predict how much processing is needed to reduce Bow by how much. Also, when growing the Si polar surface and etching the C polar surface, it is possible to predict how much processing is needed to increase Bow.

[0122] (Example 4) An 8-inch SiC substrate (Bow: -11.96 μm) was placed in a first crucible made of polycrystalline SiC. This first crucible was placed in a second crucible made of TaC, and this second crucible was placed in a vacuum heating furnace. The Si polar surface was etched at 1900°C, and a growth layer was simultaneously formed on the C polar surface (first processing step). Subsequently, a growth layer was formed on the Si polar surface at 1900°C, and the C polar surface was etched (second processing step). Contour plots and cross-sectional views of the SiC substrate were obtained before processing, after the first processing step, and after the second processing step using a flatness measuring device (NIDEK "Flatness Tester"). The results are shown in Figure 16.

[0123] As shown in Figure 16, the Bow of the 8-inch SiC substrate before processing was -11.96 μm, while the Bow of the SiC substrate after the first processing step was -25.91 μm. Subsequently, after the second processing step, the Bow improved significantly to -0.37 μm. This result demonstrates that this method can control the Bow to a desirable range even for large-diameter SiC substrates such as 8 inches. It is known that substrates, not just SiC, become more susceptible to warping as their diameter increases. Conventional methods have controlled warping by adjusting the balance by polishing the Si polar surface and the C polar surface. However, as the size of the substrate increases, uniform polishing becomes difficult, resulting in in-plane variation in the amount of polishing. Furthermore, processing distortion is introduced into the substrate by polishing, making it difficult to control warping by polishing. On the other hand, according to the present invention, warping can be controlled by non-contact thermal processing, so there are no size limitations. In addition, it has the advantage of being easy to control because it can control warping while removing distortion without introducing new distortion.

[0124] (Example 5) In Example 5, the effect of nitrogen back pressure on the change in the Bow of a wafer was investigated. Three substrates were prepared with similar initial Bow values ​​and similar strains on the Si polar surface and C polar surface. Heat treatments 1-1, 1-2, and 1-3 were performed on each substrate under the conditions described in Table 4. Subsequently, heat treatment 2-1 was performed on the SiC substrate that underwent heat treatment 1-1, heat treatment 2-2 was performed on the SiC substrate that underwent heat treatment 1-2, and heat treatment 2-3 was performed on the SiC substrate that underwent heat treatment 1-3. Figure 17 shows graphs plotting the initial state and Bow after the first treatment process on the vertical axis and the growth layer thickness of the C polar surface on the horizontal axis, as well as graphs plotting the Bow after the first and second treatment processes on the vertical axis and the growth layer thickness of the Si polar surface on the horizontal axis.

[0125]

[0126] As shown in Figure 17, when the first processing step was performed under ultra-high vacuum, Bow changed in the negative direction. On the other hand, when the first processing step was performed under nitrogen back pressure conditions of 1.3 Pa or 13 Pa, Bow changed in the positive direction. Furthermore, it was shown that the rate of change of Bow was higher with increasing nitrogen back pressure (Figure 17 left).

[0127] Furthermore, when the first processing step was performed under ultra-high vacuum conditions, followed by the second processing step, Bow changed in the positive direction (Figure 17, right). On the other hand, when the first processing step was performed under a nitrogen back pressure of 1.3 Pa, followed by the second processing step at the same nitrogen back pressure, there was almost no change in Bow. Moreover, when the first processing step was performed under a nitrogen back pressure of 13 Pa, followed by the second processing step at the same nitrogen back pressure, Bow changed slightly in the negative direction.

[0128] These results show that Bow can be precisely controlled by adjusting whether or not doping gas is introduced and the amount of doping gas introduced in the first and / or second processing steps.

[0129] (Example 6) For a SiC substrate with a Bow of approximately -1 μm, the first processing step involved etching the Si polar surface and growing a SiC growth layer on the C polar surface. Next, the second processing step involved growing a SiC growth layer on the Si polar surface and etching the C polar surface. Then, the third processing step involved etching the Si polar surface in the same manner as the first processing step and further growing a SiC growth layer on the C polar surface. Finally, the fourth processing step involved forming a growth layer on the Si polar surface and etching the C polar surface in the same manner as the second processing step. The fourth processing step was interrupted to check the Bow value, and after checking the Bow value, it was repeated under the same conditions until a 133 μm SiC growth layer was formed on the Si polar surface. Figure 18 shows a graph with the Bow value in each processing step on the vertical axis and the thickness of the growth layer on the Si polar surface on the horizontal axis.

[0130] As shown in Figure 18, in the first processing step, the Si polar surface of the SiC substrate was etched, and the Bow value decreased to approximately -79 μm. Next, in the second processing step, a growth layer was formed on the Si polar surface, and the Bow value increased to approximately 30 μm. At this point, the growth layer on the Si polar surface side was approximately 83 μm. Next, in the third processing step, the Si polar surface was etched, and the Bow value decreased to approximately -90 μm. At this time, the growth layer on the Si polar surface side decreased to approximately 18 μm. Finally, in the fourth processing step, another growth layer was formed on the Si polar surface, and when the growth layer reached approximately 133 μm, the Bow value became approximately -0.5 μm.

[0131] Normally, an epitaxial growth layer of SiC is grown on one side of a SiC substrate using the CVD method. However, this method results in the growth layer being stacked on only one side, which can cause significant warping. In some cases, this can lead to stress so severe that the substrate cracks. On the other hand, according to the present invention, the Bow value can be controlled by simultaneously processing both the Si polar surface and the C polar surface. Therefore, even when a thick SiC growth layer of 100 μm or more is formed on the Si polar surface, it is possible to control the Bow value within an appropriate range.

[0132] It should be noted that, depending on the initial Bow value of the SiC substrate, it may be possible to control the Bow value appropriately while achieving thick film growth of 100 μm or more in the second processing step, without having to go through the third and fourth processing steps.

[0133] According to the present invention, warpage, which directly affects the yield of SiC devices, can be suppressed.

[0134] 10 SiC substrate 11 first surface 12 second surface 13a, 13b strain 20 first crucible 21 lid 22 base 23 installation tool 30 second crucible 31 lid 32 base 33 Si vapor generation source

Claims

1. A method for manufacturing a SiC substrate, comprising: a first processing step including a first thermal etching step in which a SiC substrate having a first surface and a second surface opposite to the first surface is heated to thermally etch either the first surface or the second surface, and simultaneously a first growth step in which a SiC growth layer is formed on the other surface; and a second processing step including a second thermal etching step in which a SiC growth layer is formed on the surface thermally etched in the first thermal etching step, and simultaneously a second thermal etching step in which the surface on which the SiC growth layer was formed in the first growth step is thermally etched.

2. The method for manufacturing a SiC substrate according to claim 1, wherein the second processing step is carried out such that a growth layer exists on both the first surface and the second surface of the SiC substrate after the second processing step.

3. The method for manufacturing a SiC substrate according to claim 1 or 2, wherein the first surface is a Si polar surface and the second surface is a C polar surface.

4. The method for manufacturing a SiC substrate according to claim 3, wherein the first processing step includes a first thermal etching step of thermal etching the first surface which is a Si polar surface, and simultaneously a first growth step of forming a SiC growth layer on the second surface which is a C polar surface, and the second processing step includes a second thermal etching step of thermal etching the second surface simultaneously with the second growth step of forming a SiC growth layer on the first surface.

5. The method for manufacturing an SiC substrate according to any one of claims 1 to 4, wherein the first thermal etching step and the second thermal etching step include arranging the SiC material opposite to one of the first and second surfaces of the SiC substrate, and heating the SiC substrate so that a temperature difference is created in which one of the surfaces of the SiC substrate opposite to the SiC material becomes relatively hot and the SiC material becomes relatively cold, and the first growth step and the second growth step include arranging the SiC material opposite to one of the first and second surfaces of the SiC substrate, and heating the SiC material so that a temperature difference is created in which one of the surfaces of the SiC substrate opposite to the SiC material becomes relatively cold and the SiC material becomes relatively hot, thereby forming the SiC growth layer on one of the surfaces of the SiC substrate opposite to the SiC material.

6. The method for manufacturing a SiC substrate according to claim 5, wherein the first processing step and the second processing step include housing the SiC substrate in a first crucible made of SiC.

7. The method for manufacturing a SiC substrate according to claim 6, wherein the first and second processing steps include housing the first crucible made of SiC in a second crucible which is composed of a carbon storage material.

8. The method for manufacturing a SiC substrate according to claim 5, wherein the first processing step and the second processing step include housing the SiC substrate in a second crucible composed of a C element storage material.

9. The method for manufacturing a SiC substrate according to any one of claims 1 to 4, wherein the diameter of the SiC substrate is 8 inches or more.

10. A method for manufacturing a SiC substrate according to any one of claims 1 to 4, wherein the first processing step and / or the second processing step are carried out under a doping gas atmosphere.

11. The method for manufacturing a SiC substrate according to claims 1 to 4, wherein the first processing step and the second processing step are repeated until the thickness of the growth layer on the Si polar surface of the SiC substrate becomes 10 μm or more and Bow becomes -50 μm to +50 μm.

12. A method for manufacturing an SiC substrate according to any one of claims 1 to 4, further comprising a classification step of classifying the SiC substrates based on the Bow value of the SiC substrates, wherein the first processing step and the second processing step are performed simultaneously on a plurality of SiC substrates classified in the classification step.

13. The manufacturing method according to claim 12, wherein the classification step includes classifying SiC substrates with a positive Bow value from SiC substrates with a negative Bow value.

14. The manufacturing method according to claim 12, wherein the classification step includes classifying the SiC substrates into predetermined numerical ranges based on the Bow value of the SiC substrates.

15. A SiC substrate with a growth layer, having a first surface and a second surface opposite to the first surface, and comprising a SiC growth layer on the first surface and the second surface.

16. The SiC substrate with a growth layer according to claim 15, wherein Bow is -50 μm to +50 μm.

17. The SiC substrate with a growth layer according to claim 15, wherein Bow is a negative value.

18. The SiC substrate with a growth layer according to claims 15 to 17, wherein the first surface is a Si polar surface and the thickness of the SiC growth layer on the first surface is 10 μm or more.

19. The SiC substrate with growth layer according to claims 15 to 17, wherein the diameter of the SiC substrate with growth layer is 8 inches or more.

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