Electronic device and method for preventing termination of process

Abstract

An electronic device according to various embodiments of the present disclosure may comprise: at least one memory including a volatile memory and a non-volatile memory; and at least one processor. The at least one memory may store instructions that may be executed by the at least one processor and, when executed, cause the electronic device to: detect an access to a page of a memory mapped file of a process being executed; store a first memory address for the page of the memory mapped file; in response to generation of a signal, identify whether the signal has been generated due to an error related to the page on the basis of a second memory address included in the signal and the stored first memory address; and if the signal has been generated due to the error related to the page, change an address value of the page to a predetermined third memory address. Various other embodiments are possible.

Description

Method for preventing termination of electronic devices and processes

[0001] This document relates to an electronic device, and, for example, to a method for an electronic device to prevent the unintended termination of a process.

[0002] Electronic devices can store various data in the form of files or databases. The operating system of an electronic device can allow an executed application (or process) to access a specific file and perform operations such as reading or writing.

[0003] Memory mapping is a file handling method provided by an operating system that refers to directly mapping at least a portion of a file into memory address space. For example, a specific page of a file can be mapped to a memory address in user space, allowing the processor to access file data using that memory address. A memory-mapped file refers to a file that has been directly mapped into memory address space through the memory mapping function. When using a memory-mapped file, a process can access the file without directly requesting file I / O, just as it handles data existing within its own address space. Utilizing memory-mapped files offers advantages in terms of file I / O performance and memory resource efficiency because it eliminates the process of copying memory from kernel space to user space.

[0004] When using memory-mapped files (or memory-mapped databases), a problem may arise where the application (or process) terminates if an error occurs during the file access process. For example, if a disk I / O error occurs due to hardware factors, such as storage failure, while an application attempts to access a specific file, the application may be forcibly terminated as a result of that error. When an application is forcibly terminated, it is difficult to identify the cause of the error because error handling logic cannot operate, and it may be impossible to execute response logic based on the cause of the error at the level of the application or database system.

[0005] An electronic device according to the present disclosure (or specification, invention) may include at least one memory including volatile memory and non-volatile memory, and at least one processor.

[0006] According to one embodiment, the at least one memory may be executed by at least one processor, and upon execution, the electronic device may detect access to a page of a memory-mapped file of a process being executed, store a first memory address for a page of the memory-mapped file, and in response to the occurrence of a signal, check whether the signal was caused by an error related to the page based on a second memory address included in the signal and the stored first memory address, and store instructions to change the address value of the page to a predetermined third memory address if the signal was caused by an error related to the page.

[0007] A method performed by an electronic device according to various embodiments of the present document may include: detecting access to a page of a memory-mapped file of a running process; storing a first memory address for a page of said memory-mapped file; in response to the occurrence of a signal, determining whether said signal was caused by an error related to said page based on a second memory address included in said signal and said stored first memory address; and if said signal was caused by an error related to said page, changing the address value of said page to a predetermined third memory address.

[0008] A computer-readable non-transient recording medium according to various embodiments of the present document may store instructions for performing operations such as detecting access to a page of a memory-mapped file of a running process, storing a first memory address for a page of said memory-mapped file, checking whether the signal was caused by an error related to said page based on a second memory address included in said signal and said stored first memory address in response to the occurrence of a signal, and changing the address value of said page to a predetermined third memory address if the signal was caused by an error related to said page.

[0009] According to various embodiments of this document, an electronic device and a method for preventing the termination of a process can be provided to improve the problem of forced process termination due to disk I / O errors when applying memory mapping technology.

[0010] FIG. 1 is a block diagram of an electronic device in a network environment according to various embodiments.

[0011] FIG. 2 is a block diagram of an electronic device according to various embodiments.

[0012] FIG. 3 illustrates the structure of a database management system of an electronic device according to one embodiment.

[0013] FIG. 4 illustrates the relationship between a memory map file, virtual memory, and physical memory according to one embodiment.

[0014] FIG. 5 illustrates the operation of each component when a disk I / O error occurs according to one embodiment.

[0015] FIG. 6 is a flowchart illustrating the operation of an electronic device when a disk I / O error occurs according to one embodiment.

[0016] FIG. 7 is a flowchart of a method for an electronic device according to one embodiment to prevent the termination of a process.

[0017] FIG. 8 is a flowchart of a method for an electronic device according to one embodiment to detect an error in a page of a memory-mapped file and restore it to an existing context.

[0018] FIG. 9 is a flowchart of a method for an electronic device according to one embodiment to switch to a normal read mode when an error occurs.

[0019] Hereinafter, embodiments of the present disclosure are described in detail with reference to the drawings so that those skilled in the art can easily practice them. However, the present disclosure may be embodied in various different forms and is not limited to the embodiments described herein. In relation to the description of the drawings, the same or similar reference numerals may be used for identical or similar components. Furthermore, in the drawings and related descriptions, descriptions of well-known functions and configurations may be omitted for clarity and brevity.

[0020] FIG. 1 is a block diagram of an electronic device (101) in a network environment (100) according to various embodiments.

[0021] Referring to FIG. 1, in a network environment (100), an electronic device (101) may communicate with an electronic device (102) through a first network (198) (e.g., a short-range wireless communication network) or with at least one of an electronic device (104) or a server (108) through a second network (199) (e.g., a long-range wireless communication network). According to one embodiment, the electronic device (101) may communicate with the electronic device (104) through a server (108). According to one embodiment, the electronic device (101) may include a processor (120), memory (130), input module (150), sound output module (155), display module (160), audio module (170), sensor module (176), interface (177), connection terminal (178), haptic module (179), camera module (180), power management module (188), battery (189), communication module (190), subscriber identification module (196), or antenna module (197). In some embodiments, at least one of these components (e.g., connection terminal (178)) may be omitted from the electronic device (101), or one or more other components may be added. In some embodiments, some of these components (e.g., sensor module (176), camera module (180), or antenna module (197)) may be integrated into a single component (e.g., display module (160)).

[0022] The processor (120) can control at least one other component (e.g., hardware or software component) of the electronic device (101) connected to the processor (120) by executing software (e.g., program (140)), for example, and can perform various data processing or operations. According to one embodiment, as at least part of the data processing or operations, the processor (120) can store commands or data received from other components (e.g., sensor module (176) or communication module (190)) in volatile memory (132), process the commands or data stored in volatile memory (132), and store the resulting data in non-volatile memory (134). According to one embodiment, the processor (120) may include a main processor (121) (e.g., central processing unit or application processor) or an auxiliary processor (123) that can operate independently or together with it (e.g., graphics processing unit, neural processing unit (NPU), image signal processor, sensor hub processor, or communication processor). For example, if the electronic device (101) includes a main processor (121) and an auxiliary processor (123), the auxiliary processor (123) may be configured to use lower power than the main processor (121) or to be specialized for a designated function. The auxiliary processor (123) may be implemented separately from the main processor (121) or as part thereof.

[0023] The auxiliary processor (123) may control at least some of the functions or states associated with at least one component of the electronic device (101) (e.g., display module (160), sensor module (176), or communication module (190)) on behalf of the main processor (121) while the main processor (121) is in an inactive (e.g., sleep) state, or together with the main processor (121) while the main processor (121) is in an active (e.g., application execution) state. According to one embodiment, the auxiliary processor (123) (e.g., image signal processor or communication processor) may be implemented as part of another functionally related component (e.g., camera module (180) or communication module (190)). According to one embodiment, the auxiliary processor (123) (e.g., neural network processing unit) may include a hardware structure specialized for processing an artificial intelligence model. The artificial intelligence model may be generated through machine learning. Such learning may be performed, for example, on the electronic device (101) itself where the artificial intelligence model is executed, or through a separate server (e.g., server (108)). The learning algorithm may include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but is not limited to the examples described above. The artificial intelligence model may include a plurality of artificial neural network layers.An artificial neural network may be a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to the hardware structure, the artificial intelligence model may include a software structure, either additionally or substantially.

[0024] The memory (130) can store various data used by at least one component of the electronic device (101) (e.g., processor (120) or sensor module (176)). The data may include, for example, input data or output data for software (e.g., program (140)) and related commands. The memory (130) may include volatile memory (132) or non-volatile memory (134).

[0025] The program (140) may be stored as software in memory (130) and may include, for example, an operating system (142), middleware (144), or an application (146).

[0026] The input module (150) can receive commands or data to be used for a component of the electronic device (101) (e.g., processor (120)) from outside the electronic device (101) (e.g., user). The input module (150) may include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).

[0027] The sound output module (155) can output a sound signal to the outside of the electronic device (101). The sound output module (155) may include, for example, a speaker or a receiver. The speaker may be used for general purposes, such as multimedia playback or recording playback. The receiver may be used to receive incoming calls. According to one embodiment, the receiver may be implemented separately from the speaker or as part thereof.

[0028] The display module (160) can visually provide information to an external (e.g., user) of the electronic device (101). The display module (160) may include, for example, a display, a holographic device, or a projector and a control circuit for controlling said device. According to one embodiment, the display module (160) may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of the force generated by said touch.

[0029] The audio module (170) can convert sound into an electrical signal or, conversely, convert an electrical signal into sound. According to one embodiment, the audio module (170) can acquire sound through the input module (150) or output sound through the sound output module (155) or an external electronic device (e.g., electronic device (102)) (e.g., speaker or headphones) connected directly or wirelessly to the electronic device (101).

[0030] The sensor module (176) can detect the operating state of the electronic device (101) (e.g., power or temperature) or the external environmental state (e.g., user state) and generate an electrical signal or data value corresponding to the detected state. According to one embodiment, the sensor module (176) may include, for example, a gesture sensor, a gyroscope sensor, a barometric pressure sensor, a magnetic sensor, an accelerometer sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biosensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0031] The interface (177) may support one or more specified protocols that can be used for the electronic device (101) to be connected directly or wirelessly to an external electronic device (e.g., electronic device (102)). According to one embodiment, the interface (177) may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

[0032] The connection terminal (178) may include a connector through which the electronic device (101) can be physically connected to an external electronic device (e.g., electronic device (102)). According to one embodiment, the connection terminal (178) may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0033] The haptic module (179) can convert an electrical signal into a mechanical stimulus (e.g., vibration or movement) or an electrical stimulus that can be perceived by the user through tactile or kinesthetic senses. According to one embodiment, the haptic module (179) may include, for example, a motor, a piezoelectric element, or an electric stimulation device.

[0034] The camera module (180) can capture still images and video. According to one embodiment, the camera module (180) may include one or more lenses, image sensors, image signal processors, or flashes.

[0035] The power management module (188) can manage power supplied to the electronic device (101). According to one embodiment, the power management module (188) can be implemented, for example, as at least part of a power management integrated circuit (PMIC).

[0036] The battery (189) can supply power to at least one component of the electronic device (101). According to one embodiment, the battery (189) may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0037] The communication module (190) can support the establishment of a direct (e.g., wired) communication channel or a wireless communication channel between an electronic device (101) and an external electronic device (e.g., electronic device (102), electronic device (104), or server (108)), and the performance of communication through the established communication channel. The communication module (190) may include one or more communication processors that operate independently of the processor (120) (e.g., application processor) and support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module (190) may include a wireless communication module (192) (e.g., cellular communication module, short-range wireless communication module, or GNSS (global navigation satellite system) communication module) or a wired communication module (194) (e.g., LAN (local area network) communication module, or power line communication module). The corresponding communication module among these communication modules can communicate with an external electronic device (104) through a first network (198) (e.g., a short-range communication network such as Bluetooth, WiFi (wireless fidelity) direct, or IrDA (infrared data association)) or a second network (199) (e.g., a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a LAN or WAN)). These various types of communication modules may be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (192) can identify or authenticate the electronic device (101) within a communication network such as the first network (198) or the second network (199) using subscriber information (e.g., International Mobile Subscriber Identifier (IMSI)) stored in the subscriber identification module (196).

[0038] The wireless communication module (192) can support 5G networks and next-generation communication technologies following 4G networks, for example, new radio access technology. NR access technology can support high-speed transmission of high-capacity data (enhanced mobile broadband (eMBB)), minimization of terminal power and connection of multiple terminals (massive machine type communications (mMTC)), or high reliability and low latency (ultra-reliable and low-latency communications (URLLC)). The wireless communication module (192) can support a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate, for example. The wireless communication module (192) can support various technologies for securing performance in the high-frequency band, such as beamforming, massive MIMO (multiple-input and multiple-output), full-dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large-scale antenna. The wireless communication module (192) can support various requirements specified in the electronic device (101), external electronic device (e.g., electronic device (104)), or network system (e.g., second network (199)). According to one embodiment, the wireless communication module (192) may support a Peak data rate (e.g., 20 Gbps or more) for eMBB realization, loss coverage (e.g., 164 dB or less) for mMTC realization, or U-plane latency (e.g., downlink (DL) and uplink (UL) each 0.5 ms or less, or round trip 1 ms or less) for URLLC realization.

[0039] An antenna module (197) can transmit a signal or power to or from an external source (e.g., an external electronic device). According to one embodiment, the antenna module (197) may include an antenna comprising a radiator made of a conductor or a conductive pattern formed on a substrate (e.g., a PCB). According to one embodiment, the antenna module (197) may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network, such as a first network (198) or a second network (199), may be selected from the plurality of antennas, for example, by a communication module (190). A signal or power may be transmitted or received between the communication module (190) and an external electronic device through the selected at least one antenna. According to some embodiments, in addition to the radiator, other components (e.g., a radio frequency integrated circuit (RFIC)) may be additionally formed as part of the antenna module (197).

[0040] According to various embodiments, the antenna module (197) may form a mmWave antenna module. According to one embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on or adjacent to a first surface (e.g., bottom surface) of the printed circuit board and capable of supporting a specified high frequency band (e.g., mmWave band), and a plurality of antennas (e.g., array antennas) disposed on or adjacent to a second surface (e.g., top surface or side surface) of the printed circuit board and capable of transmitting or receiving a signal of the specified high frequency band.

[0041] At least some of the above components can be connected to each other via a communication method between peripheral devices (e.g., bus, GPIO (general purpose input and output), SPI (serial peripheral interface), or MIPI (mobile industry processor interface)) and exchange signals (e.g., commands or data) with each other.

[0042] According to one embodiment, commands or data may be transmitted or received between an electronic device (101) and an external electronic device (104) through a server (108) connected to a second network (199). Each of the external electronic devices (102, or 104) may be the same or a different type of device as the electronic device (101). According to one embodiment, all or part of the operations performed on the electronic device (101) may be performed on one or more of the external electronic devices (102, 104, or 108). For example, if the electronic device (101) needs to perform a function or service automatically or in response to a request from a user or another device, the electronic device (101) may request one or more external electronic devices to perform at least part of the function or service instead of performing the function or service itself or additionally. One or more external electronic devices that receive the above request may execute at least part of the requested function or service, or additional function or service related to the request, and transmit the result of the execution to the electronic device (101). The electronic device (101) may provide the result as is or additionally processed as at least part of the response to the request. For this purpose, for example, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used. The electronic device (101) may provide ultra-low latency services using, for example, distributed computing or mobile edge computing. In one embodiment, the external electronic device (104) may include an Internet of Things (IoT) device. The server (108) may be an intelligent server using machine learning and / or neural networks. According to one embodiment, the external electronic device (104) or the server (108) may be included within a second network (199).The electronic device (101) can be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology and IoT-related technology.

[0043] FIG. 2 is a block diagram of an electronic device according to various embodiments.

[0044] Referring to FIG. 2, an electronic device (200) according to various embodiments may include a processor (210) and a memory (220). Various embodiments of this document may be implemented even if at least some of the illustrated configurations are omitted or replaced with other configurations. In addition to the illustrated configurations, the electronic device (200) may further include at least some of the configurations and / or functions of the electronic device (101) of FIG. 1. At least some of the configurations of each illustrated (or unillustrated) electronic device (200) (e.g., processor (210), memory (220)) may be placed within the housing of the electronic device (200), and at least some other configurations may be exposed to the outside of the housing. At least some of the configurations of each electronic device (200) may be operatively, functionally, and / or electrically connected to one another.

[0045] According to one embodiment, the memory (220) may include a volatile memory (230) and a non-volatile memory (240) to store various data temporarily or permanently. The memory (220) may include at least some of the configuration and / or functions of the memory (130) of FIG. 1 and may store the program (140) of FIG. 1. The memory (220) (or non-volatile memory (240)) may store various instructions that can be executed by the processor (210). Such instructions may include control commands such as arithmetic and logical operations, data movement, and input / output that can be recognized by the processor (210).

[0046] According to one embodiment, the volatile memory (230) can store data only while power is supplied, and random access memory (RAM) may be an example. The non-volatile memory (240) can retain data even when power is cut off and may include at least one of flash memory, a hard disk, or a solid-state disk (SSD). The non-volatile memory (240) may also be referred to as storage.

[0047] According to one embodiment, when an application is executed and intends to access a file stored in non-volatile memory (240), disk I / O (input / output) operations are performed, and part or all of the data of the file may be loaded into a specific physical address area of ​​volatile memory (230). The application may access the data of the file loaded in volatile memory (230).

[0048] According to one embodiment, the processor (210) may be configured to perform operations or data processing regarding the control and / or communication of each component of the electronic device (200), and may be composed of one or more processors. The processor (210) may include at least some of the configuration and / or functions of the processor (120) of FIG. 1. Although there are no limitations on the operations and data processing functions that the processor (210) can implement on the electronic device (200), this document describes various embodiments for analyzing and processing errors that occur when a disk I / O error occurs on a memory-mapped file, transmitting the error in a form that can be read by an application, and enabling the application to perform additional handling. The operations of the processor (210) described below may be performed by loading instructions stored in memory (220).

[0049] In this document, the description that a processor (210) can perform a certain operation (or function, task, or operation) may be interpreted substantially as meaning that an instruction (or command, computer program) causing the electronic device (200) (or processor (210)) to perform said operation is stored in memory (220) (e.g., non-volatile memory (240), storage). Additionally, the description that a processor (210) can perform a certain operation may be interpreted substantially as meaning that at least one processor, without a fixed number, can perform said operation.

[0050] According to one embodiment, the electronic device (200) may support a memory mapping function. Memory mapping is one of the file processing methods provided by an operating system and may mean directly mapping at least a portion of a file into a memory address space. The memory mapping function and the memory map file (or memory map database) will be described in more detail through FIG. 4. According to one embodiment, the memory map file stored in non-volatile memory (240) may be composed of a plurality of pages.

[0051] According to one embodiment, the processor (210) can detect access to pages of a memory-mapped file of a process of a running application. For example, when the running process makes a memory-mapping call (e.g., mmap()), pages of the requested size for the file are mapped to the process's virtual address, and when the process accesses the pages corresponding to the virtual address, said pages can be loaded into volatile memory (230) (e.g., RAM). According to one embodiment, a memory-mapping call may be performed only once for a specific file, and multiple pages of the file may be mapped at once according to the memory-mapping call. When the operating system updates the page table, the process's virtual address and the physical address of the volatile memory (230) where the pages are loaded may be mapped. According to one embodiment, the memory-mapped file may be a file of a memory-mapped database system.

[0052] According to one embodiment, the processor (210) may store a first memory address for a page of a memory-mapped file. For example, at least one page of a file may be mapped to a virtual address of a process according to a memory map call, and the processor (210) may store the virtual address to which the page is mapped as the first memory address. According to one embodiment, the processor (210) may store the first memory address in the form of a data structure in a library of a database management system. The processor (210) may store the first memory address in a location accessible by a signal handler, such as a global variable.

[0053] Signal handling technology is a technique for processing various signals generated by a system. A process registers a signal handler, and the signal handler can take appropriate action when a specific signal occurs. Examples of signals that may occur in memory-mapped files include SIGBUS, SIGSEGV, and SIGILL, but are not limited to these.

[0054] According to one embodiment, the processor (210) may call a page loading function. For example, the page loading function may include an LDR instruction. An LDR (load register) instruction may be used to load data from memory into a register. According to one embodiment, the LDR instruction may cause the address of a page of the memory-mapped file to be written to a fixed register of the process. For example, the basic form of the LDR instruction may be represented as "LDR [Destination], [Expression]", where [Destination] indicates the register to be loaded with data and [Expression] indicates the location of the data to be loaded. If [Destination] and [Expression] are defined as fixed values ​​in the LDR instruction, the address of a page of the memory-mapped file may be written to a fixed register of the process.

[0055] According to one embodiment, a signal may be generated when a page error occurs. For example, if a disk I / O error occurs due to a hardware cause, such as a storage failure, during memory access of a memory-mapped file by a process, the operating system may trigger and deliver a SIGBUS signal to the process.

[0056] According to one embodiment, when a signal occurs, the processor (210) can determine whether the signal is a SIGBUS signal. For example, a signal handler set by the process can receive a specific structure (e.g., siginfo_t) when the signal occurs and check memory information at the time the signal occurred. For example, the structure may include information related to a signal number, a memory address where an error occurred (e.g., a second memory address), and / or a register address.

[0057] According to one embodiment, if the generated signal is SIGBUS, the processor (210) can determine that the signal was generated by a page-related error based on a first memory address and a second memory address included in the signal. If the first memory address stored in the library and the second memory address included in SIGBUS are the same, the processor (210) can determine that SIGBUS was generated by an I / O error of a page that the process attempted to read.

[0058] According to one embodiment, if it is determined that SIGBUS has occurred due to an I / O error of a page that a process attempted to read, the processor (210) may perform a restoration technique to the existing context. Here, restoration to the existing context may mean restoring the process to the state prior to the occurrence of the signal.

[0059] According to one embodiment, the processor (210) can change the address of the page attempted to be read to a predetermined third memory address. For example, the processor (210) can change the address of the page written to the x0 register used in the LDR instruction to a third memory address. Here, the third memory address may be a valid memory address value internally set by the electronic device (200). It may be valid data that does not cause an error when loading data at the third memory address value.

[0060] According to one embodiment, the processor (210) may change the memory address written to the process's register to a third memory address and then call the page loading function again. In this case, data stored at the third memory address is loaded through the LDR instruction, and since the data stored at the third memory address is valid data, no signal may be generated when the page loading function is called. Accordingly, the context can be restored to the state prior to the generation of the signal.

[0061] According to one embodiment, the processor (210) can re-call the page loading function after restoring to the previous context. For example, since a predetermined third memory address is set in the x0 register used for the LDR instruction, when the LDR instruction is re-executed, the data at the predetermined address value recorded in the x0 register can be read into the process's register. The data stored at the third memory address may be valid data that does not cause errors, and when the page loading function is re-called, the I / O reads the data at the predetermined address value recorded in the process's register, rather than the address of the memory-mapped file where the error occurred, so the page loading function can terminate normally.

[0062] According to one embodiment, the processor (210) can check whether the memory address read from the page loading function is the same as the third memory address. The fact that the memory address read from the page loading function is the same as the third memory address may be because the page data acquisition failed due to a signal (e.g., SIGBUS) in the existing page loading operation, and accordingly, the existing context restoration operation was performed.

[0063] According to one embodiment, if the memory address read by the page loading function is the same as the third memory address, the processor (210) may attempt to read the page in normal read mode. Here, normal read mode may include an operation to read the page data of a file by calling a file operation (e.g., a read system call) directly on the file data. For example, regarding the data of a file page that failed to be acquired as a memory-mapped file, the process may access the page data by copying the data of the file page stored in non-volatile memory (240) through a file manager to a memory address in user space without using the memory-mapped file.

[0064] According to one embodiment, the processor (210) can acquire page data in normal read mode. Accordingly, the data of the intended page can be acquired through normal read mode without terminating the application even if SIGBUS occurs.

[0065] Instructions for performing the operation of the electronic device (200) (or processor (210)) described above may be stored in a computer-readable recording medium. The recording medium may be tangible and non-transitory. The recording medium may store one or more computer programs containing the instructions.

[0066] FIG. 3 illustrates the structure of a database management system of an electronic device according to one embodiment.

[0067] According to one embodiment, an electronic device (e.g., the electronic device (200) of FIG. 2) may include a database management system (320) (DBMS). An application (310) of the electronic device may utilize the database management system (320) for storing data. To execute the application (310) normally, the database management system (320) may protect data contained in the database, provide data integrity to maintain normal data in the database, and guarantee the atomicity of transactions for the database.

[0068] According to one embodiment, the database management system (320) may be SQLite, but is not limited thereto. Referring to FIG. 3, the database management system (320) operates in user space and may communicate with the kernel to access system resources provided by the kernel. The database management system (320) may interact with applications (310) running in user space and a file system (340) in kernel space.

[0069] According to one embodiment, the database management system (320) may include a framework (330) and a library (335). The framework (330) and the library (335) may store various elements necessary for the management of the database. For example, the framework (330) and / or the library (335) may store various codes related to database schemas and table structures, SQL queries, and transaction management. According to one embodiment, codes related to the main operations of the database management system (320) may be stored in the library (335), and at least some of them may be stored in the framework (330).

[0070] According to one embodiment, the application (310) can perform database-related operations (e.g., storing or retrieving data) using the framework (330).

[0071] According to one embodiment, the file system (340) may act as an intermediary between an application (310) in user space and a hardware device (e.g., storage (350)). For example, the file system (340) may provide the necessary functions for the kernel to manage data stored in storage (350) and to perform operations such as creating, deleting, reading, and / or writing files. The database management system (320) may request the file system (340) to store and manage database files (360) and database journal files (370).

[0072] According to one embodiment, the database file (360) and the database journal file (370) may be stored in storage (350) (storage) (e.g., non-volatile memory (240) of FIG. 2).

[0073] According to one embodiment, the database file (360) may include a plurality of pages. A page may have a fixed size (e.g., 4kb) as a basic unit constituting the database file (360), and its size may be changed according to the configuration. Page 1 of the database file (360) may include a database header and a database schema. For example, the database header may include metadata related to the structure and / or configuration of the database, such as a magic header string, page size, file format, and write / read version. The database schema may include information related to how the data stored in the database is organized and interacts. The remaining pages after Page 1 may include the contents of the database (or actual data) and data structures (e.g., index information) for fast searching of the database.

[0074] According to one embodiment, the database management system (320) can ensure the atomicity of a transaction by using a rollback journal method. A transaction refers to a unit of work in the database management system (320), and the transaction may have atomicity, consistency, isolation, and durability. The rollback journal method may be a method of reading pages from the database before they were changed according to the transaction and storing them in a separate file, a database journal file (370). If a problem occurs during the creation of a page, the database management system (320) may attempt recovery using the database journal file stored in a designated area of ​​storage (350). The database management system (320) may support persist, truncate, and / or delete methods depending on the method of invalidating the database journal file (370).

[0075] FIG. 4 illustrates the relationship between a memory map file, virtual memory, and physical memory according to one embodiment.

[0076] According to one embodiment, an electronic device (e.g., the electronic device (200) of FIG. 2) may support memory mapping. Memory mapping is one of the file processing methods provided by an operating system and may mean directly mapping at least a portion of a file into a memory address space. For example, a specific page of a file may be mapped to a memory address in user space, and a process may access file data using the memory address. A memory-mapped file may refer to a file that is directly mapped into a memory address space through a memory mapping function, and a database file that is directly mapped into a memory address space may be referred to as a memory-mapped database.

[0077] FIG. 4 illustrates the relationship between the physical address of the volatile memory (420) where page 2 (415) is loaded and the virtual address of the process (430) when the executed process (430) accesses page 2 (415) of the memory map file (410) in relation to the memory mapping function.

[0078] According to one embodiment, the memory map file (410) may be stored in storage (or non-volatile memory (420)). The memory map file (410) may consist of a plurality of pages, and page 2 (415) may correspond to a part of the memory map file (410).

[0079] According to one embodiment, when a process (430) attempts to access page 2 (415) of a memory-mapped file (410), data of page 2 (415) may be loaded into a specific physical address (425) area of ​​volatile memory (420) through memory mapping. The physical address (425) of volatile memory (420) may represent an actual physical location where data is temporarily stored. For example, when an executed process (430) makes a memory-mapped call (e.g., mmap()) for a specific file, at least one page containing page 2 (415) of that file is mapped to a virtual address (435) of the process (430), and when the process (430) accesses that virtual address (435), page 2 (415) may be loaded into a specific physical address area (425) of volatile memory (420) (e.g., RAM).

[0080] According to one embodiment, according to memory mapping, page 2 (415) loaded at a specific physical address (425) of volatile memory (420) may be mapped to a specific virtual address (435) of process (430). For example, when an operating system updates a page table, the virtual address (435) of process (430) and the physical address (425) of volatile memory (420) where page 2 (415) is loaded may be mapped.

[0081] The virtual address (435) is a logical address space used by the process (430), and the process (430) can obtain data loaded into volatile memory (420) through the virtual address (435).

[0082] When using a memory-mapped file (410) (or a memory-mapped database), the process (430) can access the file without directly requesting file input / output, just as it processes data existing within its own address space. Accordingly, there are advantages in terms of fast input / output performance and memory management efficiency, and it can be easy to process large-scale data.

[0083] According to one embodiment, when a process (430) accesses data through memory mapping, an error or a specific event may occur, and to notify of such error or event, the operating system may trigger a signal and transmit a signal to the process (430). For example, signals that may occur in a memory map file (410) may include SIGBUS, SIGSEGV, and SIGILL, but are not limited thereto.

[0084] According to one embodiment, signal handler technology refers to technology for handling various signals occurring in a system. Signals may primarily represent hardware interrupts or software exceptions, and may interfere with the normal execution of an application. Signal handler technology may be a technology that registers a handler for a signal in a process (430) and enables appropriate action to be taken regarding the signal when a specific signal occurs. For example, when a signal occurs, the signal handler may perform tasks such as logging and terminating the program or allocating additional memory.

[0085] FIG. 5 illustrates the operation of each component when a disk I / O error occurs according to one embodiment.

[0086] According to one embodiment, the executed application (310) may attempt to access a memory-mapped file (or memory-mapped database). The application (310) may send a query containing a request for necessary data to the framework (320) or library (330) of the database management system.

[0087] According to one embodiment, the library (330) can access the data of the page using a virtual memory address to which the file requested by the application (310) is mapped.

[0088] According to one embodiment, a disk I / O error may occur in relation to a requested page. For example, when an application (310) requests access to a memory-mapped file through a library (330), it may attempt to read data, and if access to the page fails due to a hardware cause such as a storage failure (360), a SIGBUS may occur due to a disk I / O error.

[0089] According to one embodiment, an I / O signal handler (input / output signal handler) (510) can detect disk I / O errors. For example, the I / O signal handler (510) can detect errors at the hardware level while performing a read operation on the disk and transmit the detected errors to a library (330) and / or an application (310). According to one embodiment, the I / O signal handler (510) can detect an I / O error on a memory-mapped file page by checking the SIGBUS that occurred and perform signal processing so that the process can normally transmit the I / O error to the application.

[0090] FIG. 6 is a flowchart illustrating the operation of an electronic device when a disk I / O error occurs according to one embodiment.

[0091] According to one embodiment, the illustrated method (600) may be performed by an electronic device (e.g., the electronic device (200) of FIG. 2), and the technical features described above may be omitted from the description below.

[0092] According to one embodiment, in operation 610, a process executed on an electronic device may attempt to access a memory-mapped file. For example, when the executed process makes a memory-mapped call (e.g., mmap()), pages of the requested size for the file are mapped to the process's virtual address, and when the process accesses the pages corresponding to the virtual address, said pages may be loaded into volatile memory (e.g., RAM). When the operating system updates the page table, the process's virtual address may be mapped to the physical address of the volatile memory where the page is loaded.

[0093] According to one embodiment, if access is successful in operation 620, in operation 630, the process can obtain data of the page of the corresponding memory-mapped file.

[0094] According to one embodiment, if access is not successful in operation 620, the electronic device may generate a specific signal in operation 640. For example, if an I / O error occurs due to a hardware cause, such as a storage failure, during memory access of a memory-mapped file, the operating system may trigger a SIGBUS signal and deliver it to the process.

[0095] According to one embodiment, in operation 650, the electronic device can terminate the process. For example, when a signal such as SIGBUS occurs, the process registers a signal handler for the signal, and the signal handler logs and can terminate the process or application.

[0096] According to one embodiment, a signal such as SIGBUS is caused by untrusted memory access, and the electronic device may terminate the process or application to prevent threats to the stability of the system. When an application is forcibly terminated as in the embodiment of FIG. 6, the error handling logic cannot operate, making it difficult to identify the cause of the error, and the application (or database management system) level may not be able to execute response logic based on the cause of the error.

[0097] According to one embodiment, instructions for performing each operation constituting the method may be stored on a tangible and non-transitory computer-readable recording medium.

[0098] Hereinafter, various embodiments for solving problems caused by forced termination will be described through FIGS. 7 to 9 by restoring to the existing context without terminating the process or application when a signal occurs, and / or switching to a normal read mode.

[0099] FIG. 7 is a flowchart of a method for an electronic device according to one embodiment to prevent the termination of a process.

[0100] According to one embodiment, the illustrated method (700) may be performed by an electronic device (e.g., the electronic device (200) of FIG. 2), and the technical features described above may be omitted from the description below.

[0101] According to one embodiment, in operation 710, the electronic device can detect access to a page of a memory-mapped file of a process. For example, the memory-mapped file may be a file of a memory-mapped database system. The memory-mapped file may include a plurality of pages.

[0102] According to one embodiment, when an application is executed, the application's process may attempt to access a specific page of a memory-mapped file. For example, when the executed process makes a memory-map call (e.g., mmap()), pages of the requested size for the file are mapped to the process's virtual address, and when the process accesses the pages corresponding to the virtual address, said pages may be loaded into volatile memory (e.g., RAM). When the operating system updates the page table, the process's virtual address and the physical address of the volatile memory where the page is loaded may be mapped.

[0103] According to one embodiment, in operation 720, the electronic device may store a first memory address for a page of a memory-mapped file. For example, at least one page of a file may be mapped to a virtual address of a process according to a memory-mapped call, and the electronic device may store the virtual address to which the page is mapped as the first memory address. According to one embodiment, the electronic device may store the first memory address in the form of a data structure in a library of a database management system. The electronic device may store the first memory address in a location accessible by a signal handler, such as a global variable.

[0104] According to one embodiment, in operation 730, the electronic device may call a page loading function. For example, the page loading function may include an LDR instruction. The LDR (load register) instruction may be used to load data from memory into a register. According to one embodiment, the LDR instruction may cause the address of a page of the memory-mapped file to be written to a fixed register of the process.

[0105] According to one embodiment, in operation 740, the electronic device may trigger the occurrence of a SIGNAL. For example, if a disk I / O error occurs due to a hardware cause, such as a storage failure, during memory access of a memory-mapped file, the operating system may trigger and deliver a SIGBUS signal to the process. In addition to SIGBUS, which occurs due to an I / O error of a memory-mapped file, the possible signals may be any one of various signals such as SIGSEGV, SIGAVRT, and SIGKILL.

[0106] According to one embodiment, in operation 750, the electronic device can determine that the signal was generated by a page-related error based on the first memory address and the second memory address included in the signal. According to one embodiment, in operation 720, if the first memory address stored and the second memory address included in the signal are the same, the electronic device can determine that the signal is generated by a page-related error (e.g., SIGBUS).

[0107] According to one embodiment, in operation 760, the electronic device can change the address value of the page to a predetermined third memory address. The electronic device can change the address value of the page recorded in the register of the process to a third memory address, which is a predetermined address value. For example, the third memory address may be a normal memory address value internally set by the electronic device. The data at the third memory address value may be valid data that does not cause an error when loaded.

[0108] According to one embodiment, the electronic device may change the memory address recorded in the process register to a third memory address and then call the page loading function again. In this case, data stored at the third memory address is loaded through the LDR instruction, and since the data stored at the third memory address is valid data, no signal may be generated when the page loading function is called.

[0109] According to one embodiment, in operation 770, the electronic device may perform a restoration to the existing context operation. Here, restoration to the existing context may mean that the process is restored to a state prior to the occurrence of a signal.

[0110] According to one embodiment, instructions for performing each operation constituting the method may be stored on a tangible and non-transitory computer-readable recording medium.

[0111] FIG. 8 is a flowchart of a method for an electronic device according to one embodiment to detect an error in a page of a memory-mapped file and restore it to an existing context.

[0112] According to one embodiment, the illustrated method (800) may be performed by an electronic device (e.g., the electronic device (200) of FIG. 2), and the technical features described above may be omitted from the description below.

[0113] According to one embodiment, in operation 805, the electronic device may store the memory address value of a page of a memory-mapped file (e.g., a first memory address). For example, when an application is executed and a memory-mapped call is made for a specific file, a specific page of the memory-mapped file is mapped to a virtual address of the process, and when the process accesses the page, the page may be loaded to a specific physical address in volatile memory.

[0114] According to one embodiment, an electronic device may store the memory address value of a page of a memory-mapped file in the form of a data structure within a library of a database management system. For example, the electronic device may store the memory address value of the page in a location accessible by a signal handler, such as a global variable.

[0115] According to one embodiment, in operation 810, the electronic device may call a page loading function. For example, loading a specific memory address may be performed through an LDR instruction in ARM assembly language. An LDR (load register) instruction may be used to load data from memory into a register. The basic form of an LDR instruction may be represented as "LDR [Destination], [Expression]", where [Destination] indicates the register to receive the data, and [Expression] indicates the location of the data to be loaded. For example, when an LDR instruction such as "LDR x0, =0x12345678" is executed, the value at the address 0x12345678 in volatile memory can be read and stored in the x0 register. If the page to be accessed through the page loading function is a bad page with an error, executing the LDR instruction may repeatedly generate a SIGBUS signal.

[0116] Table 1 is an example of page loading function code.

[0117] static void page_memory_loading_function(u8* page_address){asm volatile ("mov x0, %0;""ldr x1, [x0];"::"r"(page_address):);}

[0118] In the code of Table 1 above, "%0" corresponds to the address of a page in virtual memory, and "MOV x0, %0" may be an instruction to store the address of the page in the x0 register. [x0] may be the memory address stored in the x0 register, that is, the virtual memory address of the page of the memory-mapped file. "LDR x1, [x0]" may be an instruction to read data from the address stored in the x0 register and store it in the x1 register. In this case, the process of reading data may be performed by the operating system, for example, by reading a page from storage, copying the data of the corresponding page to a location at a physical address in volatile memory, and linking the virtual address of the process with the physical address. According to one embodiment, if an access error occurs in the x0 area, a signal (e.g., SIGBUS) may be generated, and the processing context of the signal handler may be executed.

[0119] According to one embodiment, the electronic device may allow the signal to be processed in the context of a signal handler when a signal error occurs. The electronic device may specify that the page loading function be operated through fixed ARM registers. For example, the code "LDR x1, [x0]" may be fixed so that the memory address value of the page that the process intends to access becomes the memory address value stored in the x0 register.

[0120] According to one embodiment, in operation 820, if an error occurs during the process of accessing a page of a memory-mapped file, a signal may be generated. For example, if a disk I / O error occurs due to a hardware cause, such as a storage failure, during memory access of a memory-mapped file, the operating system may trigger and deliver a SIGBUS signal to the process. In addition to SIGBUS, which is generated due to an I / O error of a memory-mapped file, possible signals may be any one of various signals such as SIGSEGV, SIGAVRT, and SIGKILL.

[0121] According to one embodiment, in operation 830, the electronic device can determine whether the generated signal is SIGBUS. For example, a signal handler set by a process can receive a specific structure (e.g., siginfo_t) upon the generation of the signal to determine information regarding the cause of the signal generation. For example, the structure may include information related to the signal number, the memory address where the error occurred, and / or the register address.

[0122] According to one embodiment, if the generated signal is SIGBUS, in operation 840, the electronic device can determine whether the address where the error occurred (or fault address) is the same as the address of the memory map page that the process attempted to read. Here, the address of the memory map page that the process attempted to read may be the memory address value (or first memory address) of the page of the memory map file stored in operation 805. The signal handler can determine whether the memory address value of the page of the memory map file stored in the library is the same as the memory address value where the error occurred (or second memory address) contained in SIGBUS.

[0123] According to one embodiment, if the signal generated as a result of checking operation 830 is SIGBUS, and the address where the error occurred and the address that the process attempted to read are the same as the result of checking operation 840, it can be confirmed that the SIGBUS signal was generated during the process of accessing the memory-mapped file.

[0124] According to one embodiment, if the signal generated as a result of checking operation 830 is not SIGBUS, and / or if the address where the error occurred and the address that the process attempted to read are not the same as the result of checking operation 840, it can be confirmed that the generated signal did not occur during the process of accessing a memory-mapped file. In this case, in operation 870, the electronic device can perform an operation corresponding to the generated signal through a signal handler.

[0125] According to one embodiment, if the address where an error occurred and the address that the process attempted to read are the same as the result of checking operation 840, in operation 850, the electronic device may change the address value of the register specified in the page loading function to a predetermined address value. Here, the predetermined address value may be a valid memory address value (e.g., a valid memory address) internally set by the database management system.

[0126] Table 2 is an example of code to restore the existing context by changing the address value of a specified register in the page loading function.

[0127] static int mmap_failure_point = 0;static int restore_user_context(struct sigcontext *sc) {sc->regs[0] = (unsigned long) &mmap_failure_point;}

[0128] In Table 2 above, mmap_failure_point corresponds to a valid memory address value (e.g., valid memory address) internally set by the database management system and can be set as a global variable. The memory address value of mmap_failure_point is set in the x0 register used for the LDR instruction specified in the page loading function, and the signal handler can be terminated. According to one embodiment, if the address value of the register specified in the page loading function is changed to a predetermined address value as in operation 840, the existing context can be restored in operation 850. Here, restoration to the existing context may mean restoring the process to the state prior to the occurrence of the signal. According to one embodiment, if the LDR instruction is executed after the termination of the signal handler, the data at that address value can be loaded because the memory address value of register x0 has been changed to a predetermined address value (e.g., mmap_failure_point) according to operation 850. The data at a predetermined address value may be valid data that does not cause errors, and accordingly, memory loading can be performed normally without a signal when the LDR instruction is executed.

[0129] In this way, by changing the specified register value in the page loading function to a valid memory address value, the LDR instruction can successfully terminate based on the valid memory address value, and the process can be restored to the previous context without terminating in the event of SIGBUS.

[0130] According to one embodiment, instructions for performing each operation constituting the method may be stored on a tangible and non-transitory computer-readable recording medium.

[0131] FIG. 9 is a flowchart of a method for an electronic device according to one embodiment to switch to a normal read mode when an error occurs.

[0132] According to one embodiment, the illustrated method (900) may be performed by an electronic device (e.g., the electronic device (200) of FIG. 2), and the technical features described above may be omitted from the description below.

[0133] According to one embodiment, in operation 910, the electronic device may terminate the signal handler after performing a predetermined operation when a signal occurs. For example, when SIGBUS occurs during the process of a process accessing a page of a memory-mapped file, the electronic device may change the address value of a register specified in the page loading function to a predetermined address value (e.g., operation 850 of FIG. 8), restore it to the existing context (e.g., operation 860 of FIG. 8), and then terminate the signal handler.

[0134] According to one embodiment, in operation 920, the electronic device may call the page loading function again. For example, since a predetermined address value (e.g., mmap_failure_point) (e.g., a third memory address) is set in the x0 register used for the LDR instruction, when the LDR instruction is re-executed, the data of the predetermined address value written in the x0 register can be read into the process's register.

[0135] According to one embodiment, in operation 930, the page loading function may be terminated normally. For example, the data at a predetermined address value may be valid data that does not cause an error, and the page loading function may be terminated normally because, when the page loading function is recalled, I / O reads the data at the predetermined address value written in the process's register, rather than the address of the memory-mapped file where the error occurred.

[0136] According to one embodiment, in operation 940, the electronic device can check whether the memory address read from the page loading function is the same as a predetermined address value. For example, the electronic device can check whether the address value loaded from the page loading function corresponds to a predetermined address value changed in operation 850, rather than the address value of a page in a memory-mapped file. The predetermined memory address value is set as a global variable so that its value can be maintained even after the signal handler is terminated.

[0137] According to one embodiment, if the memory address read in the page loading function is the same as a predetermined address value, it may mean that the acquisition of page data failed due to a signal (e.g., SIGBUS) in the existing page loading operation.

[0138] According to one embodiment, if the memory address read in the page loading function is the same as a predetermined address value, in operation 950, the electronic device may attempt to read the page in normal read mode. Here, normal read mode may include an operation to read page data of a file by calling a file operation (e.g., a read system call) directly on the file data. For example, regarding the data of a file page that failed to be acquired from a memory-mapped file, the process may access the page data by copying the data of the file page stored in non-volatile memory through a file manager to a memory address in user space, without using the memory-mapped file.

[0139] According to one embodiment, if page reading in normal reading mode is successful as a result of checking operation 960, in operation 970, the electronic device can acquire page data.

[0140] According to one embodiment, if, as a result of checking operation 940, the memory address read by the page loading function is not the same as a predetermined address value, or if the page reading in normal read mode fails in operation 960, the electronic device may transmit relevant information about the error that occurred to the process in operation 980. In this case, an operation such as the termination of an application corresponding to the error that occurred may be performed.

[0141] According to one embodiment, instructions for performing each operation constituting the method may be stored on a tangible and non-transitory computer-readable recording medium.

[0142] An electronic device according to various embodiments of the present document may include at least one memory including volatile memory and non-volatile memory, and at least one processor.

[0143] According to one embodiment, the at least one memory may be executed by at least one processor, and upon execution, the electronic device may detect access to a page of a memory-mapped file of a process being executed, store a first memory address for a page of the memory-mapped file, and in response to the occurrence of a signal, check whether the signal was caused by an error related to the page based on a second memory address included in the signal and the stored first memory address, and store instructions to change the address value of the page to a predetermined third memory address if the signal was caused by an error related to the page.

[0144] According to one embodiment, the memory map file may be a memory mapped database file.

[0145] According to one embodiment, the memory may store instructions that cause the electronic device to store the first memory address in a library of a database management system.

[0146] According to one embodiment, the memory may store instructions that cause the electronic device to call a page loading function to write the address of the page loaded in the volatile memory to the register of the process.

[0147] According to one embodiment, the page loading function includes an LDR (load register) instruction, and the LDR instruction can write the address of the page to a fixed register of the process.

[0148] According to one embodiment, the memory may allow the electronic device to determine that the signal was generated by an error related to the page if the second memory address included in the signal is the same as the stored first memory address.

[0149] According to one embodiment, the signal may be a SIGBUS that occurs when an input / output error occurs on the page.

[0150] According to one embodiment, when the page loading function is called after changing to the third memory address, the signal may not occur.

[0151] According to one embodiment, the memory may store instructions that cause the electronic device to switch to a normal read mode and load the page when the signal does not occur.

[0152] A method performed by an electronic device according to various embodiments of the present document may include: detecting access to a page of a memory-mapped file of a running process; storing a first memory address for a page of said memory-mapped file; in response to the occurrence of a signal, determining whether said signal was caused by an error related to said page based on a second memory address included in said signal and said stored first memory address; and if said signal was caused by an error related to said page, changing the address value of said page to a predetermined third memory address.

[0153] According to one embodiment, the memory map file may be a memory mapped database file.

[0154] According to one embodiment, the operation of storing the first memory address may include the operation of storing the first memory address in a library of a database management system.

[0155] According to one embodiment, the method may further include the operation of calling a page loading function to write the address of the page loaded in the volatile memory to a register of the process.

[0156] According to one embodiment, the page loading function includes an LDR (load register) instruction, and the LDR instruction can write the address of the page to a fixed register of the process.

[0157] According to one embodiment, the operation of determining whether the signal was generated by an error related to the page may include the operation of determining that the signal was generated by an error related to the page if the second memory address included in the signal is the same as the stored first memory address.

[0158] According to one embodiment, the signal may be a SIGBUS that occurs when an input / output error occurs on the page.

[0159] According to one embodiment, when the page loading function is called after changing to the third memory address, the signal may not occur.

[0160] According to one embodiment, the method may further include the operation of switching to a normal reading mode and loading the page when the signal does not occur.

[0161] A computer-readable non-transient recording medium according to various embodiments of the present document may store instructions for performing operations such as detecting access to a page of a memory-mapped file of a running process, storing a first memory address for a page of said memory-mapped file, checking whether the signal was caused by an error related to said page based on a second memory address included in said signal and said stored first memory address in response to the occurrence of a signal, and changing the address value of said page to a predetermined third memory address if the signal was caused by an error related to said page.

[0162] The electronic device according to the various embodiments disclosed in this document may be of various forms. The electronic device may include, for example, a portable communication device (e.g., a smartphone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, or a consumer electronics device. The electronic device according to the embodiments of this document is not limited to the devices described above.

[0163] The various embodiments of this document and the terms used therein are not intended to limit the technical features described in this document to specific embodiments, and should be understood to include various modifications, equivalents, or substitutions of said embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of said items unless the relevant context clearly indicates otherwise. In this document, phrases such as "A or B," "at least one of A and B," "at least one of A or B," "A, B or C," "at least one of A, B and C," and "at least one of A, B, or C" may each include any one of the items listed together in the corresponding phrase, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used simply to distinguish said components from other said components and do not limit said components in any other aspect (e.g., importance or order). Where any (e.g., 1st) component is referred to as “coupled” or “connected” to another (e.g., 2nd) component, with or without the terms “functionally” or “communicationly,” it means that said any component may be connected to said other component directly (e.g., via a wire), wirelessly, or through a third component.

[0164] The term “module” as used in the various embodiments of this document may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit, for example. A module may be a component formed integrally, or a minimum unit of said component or a part thereof that performs one or more functions. For example, according to one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0165] Various embodiments of the present document may be implemented as software (e.g., program (140)) comprising one or more instructions stored in a storage medium (e.g., internal memory (136) or external memory (138)) readable by a machine (e.g., electronic device (101)). For example, a processor (e.g., processor (120)) of the machine (e.g., electronic device (101)) may call at least one of the one or more instructions stored in the storage medium and execute it. This enables the machine to be operated to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code that can be executed by an interpreter. The storage medium readable by the machine may be provided in the form of a non-transitory storage medium. Here, 'non-temporary' simply means that the storage medium is a tangible device and does not contain a signal (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently and cases where it is stored temporarily.

[0166] According to one embodiment, the method according to the various embodiments disclosed herein may be provided by being included in a computer program product. The computer program product may be traded between a seller and a buyer as a product. The computer program product may be distributed in the form of a device-readable storage medium (e.g., compact disc read-only memory (CD-ROM)) or an application store (e.g., Play Store). TM It can be distributed online (e.g., downloaded or uploaded) through ) or directly between two user devices (e.g., smartphones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily created on a device-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or a relay server.

[0167] According to various embodiments, each component (e.g., module or program) of the components described above may include a singular or multiple entities, and some of the multiple entities may be separated and placed in other components. According to various embodiments, one or more of the components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Generally or additionally, multiple components (e.g., module or program) may be integrated into a single component. In this case, the integrated component may perform one or more functions of each of the multiple components in the same or similar manner as those performed by the corresponding component among the multiple components prior to integration. According to various embodiments, operations performed by the module, program, or other components may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

Claims

1. In an electronic device, At least one memory including volatile memory and non-volatile memory; It includes at least one processor, The above at least one memory can be executed by at least one processor, and at the time of execution, the electronic device, Detect access to pages of a memory-mapped file by a running process, and A first memory address for a page of the above memory map file is stored, and In response to the occurrence of a signal, based on the second memory address included in the signal and the stored first memory address, determine whether the signal was generated by an error associated with the page, and An electronic device that stores instructions to change the address value of the page to a predetermined third memory address when the above signal is generated by an error related to the page.

2. In Paragraph 1, The above memory map file is an electronic device that is a memory mapped database file.

3. In Paragraph 1 or 2, The above memory is, the electronic device, An electronic device that stores instructions for storing the above-mentioned first memory address in a library of a database management system.

4. In any one of paragraphs 1 to 3, The above memory is, the electronic device, An electronic device that stores instructions for calling a page loading function to write the address of the page loaded in the volatile memory to the register of the process.

5. In Paragraph 4, The above page loading function includes an LDR (load register) instruction, and the LDR instruction is an electronic device that writes the address of the page to a fixed register of the process.

6. In any one of paragraphs 1 through 5, The above memory is, the electronic device, An electronic device storing instructions that determine that the signal was generated by an error related to the page when the second memory address included in the signal is the same as the first memory address stored above.

7. In any one of paragraphs 1 through 6, The above signal is an electronic device that is a SIGBUS generated when an input / output error occurs on the above page.

8. In any one of paragraphs 1 through 7, An electronic device in which the above signal is not generated when a page loading function is called after changing to the above third memory address.

9. In Paragraph 8, The above memory is, the electronic device, An electronic device that stores instructions to switch to normal read mode and load the page when the above signal does not occur.

10. In a method performed by an electronic device, An operation to detect access to pages of a memory-mapped file by a running process; An operation to store a first memory address for a page of the above memory map file; An operation to determine whether the signal was generated by an error related to the page, based on the second memory address included in the signal and the stored first memory address in response to the generation of the signal; and A method including the operation of changing the address value of the page to a predetermined third memory address when the above signal is generated by an error related to the page.

11. In Paragraph 10, The above memory map file is a memory mapped database file.

12. In Paragraph 10 or 11, The operation of storing the first memory address above is, A method including the operation of storing the above-mentioned first memory address in a library of a database management system.

13. In any one of Paragraphs 10 through 12, A method further comprising the operation of calling a page loading function to write the address of the page loaded in the volatile memory to the register of the process.

14. In Paragraph 13, The above page loading function includes an LDR (load register) instruction, and the LDR instruction is a method for writing the address of the page to a fixed register of the process.

15. In a computer-readable non-transient recording medium, An operation to detect access to pages of a memory-mapped file by a running process; An operation to store a first memory address for a page of the above memory map file; An operation to determine whether the signal was generated by an error related to the page, based on the second memory address included in the signal and the stored first memory address in response to the generation of the signal; and A recording medium storing instructions that perform an operation to change the address value of the page to a predetermined third memory address when the above signal is generated by an error related to the page.

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