Printed circuit board including fiducial mark and electronic device including same

Abstract

The electronic device of the present disclosure comprises: a first printed circuit board having a plurality of components mounted on a first surface; and a second printed circuit board having a fiducial mark and at least one component mounted on a second surface thereof, the second surface being spaced apart from and facing the first surface, wherein conductive portions of a first component and a second component among the plurality of components mounted on the first printed circuit board are disposed to face the fiducial mark of the second printed circuit board, and the fiducial mark may include a segmented region at a position corresponding to a spacing section between the conductive portions of the first component and the second component.

Description

A printed circuit board including a recognition mark and an electronic device including the same

[0001] The present disclosure relates to a printed circuit board comprising a fiducial mark and an electronic device comprising the same.

[0002] Generally, components can be mounted on the surface of a printed circuit board using SMT (surface mount technology). At this time, the components mounted on the surface of the PCB may be referred to as SMD (surface mount device).

[0003] SMD identification marks, or fiducial marks, can perform the function of verifying the location of parts in manufacturing and assembly processes and helping automated or inspection equipment operate correctly.

[0004] The recognition mark has a geometric shape and can be formed by removing a solder mask on a PCB to expose a metal layer (e.g., a copper layer).

[0005] The information described above may be provided as related art for the purpose of aiding understanding of the present disclosure. No claim or determination is made as to whether any of the foregoing may be applied as prior art related to the present disclosure.

[0006] The electronic device of the present disclosure may include a first printed circuit board on which a plurality of components are mounted on a first surface.

[0007] The electronic device of the present disclosure may include a second printed circuit board having a fiducial mark and at least one component installed on a second surface that is spaced apart from and facing the first surface.

[0008] The electronic device of the present disclosure has conductive portions of a first component and a second component among a plurality of components installed on a first printed circuit board arranged to face each other with a recognition mark on a second printed circuit board, and the recognition mark may include a segmented area at a position corresponding to a gap between the first component and the conductive portion of the second component.

[0009] A printed circuit board including the recognition mark of the present disclosure may include a recognition mark comprising a plurality of segmented recognition marks on a surface facing another printed circuit board with a plurality of components installed thereon.

[0010] A printed circuit board comprising the recognition marks of the present disclosure may have at least a portion of the plurality of segmented recognition marks facing the plurality of components.

[0011] In a printed circuit board including recognition marks of the present disclosure, the segmented region between the plurality of segmented recognition marks may correspond to the spacing between the plurality of components.

[0012] In relation to the description of the drawings, the same or similar reference numerals may be used for identical or similar components.

[0013] FIG. 1 is a block diagram of an exemplary electronic device capable of performing the operations described in the present disclosure.

[0014] FIG. 2 is a drawing showing an electronic device comprising a first printed circuit board and a second printed circuit board including a first fiducial mark according to one embodiment of the present disclosure.

[0015] FIG. 3 is a drawing showing an electronic device including a first printed circuit board according to one embodiment of the present disclosure.

[0016] FIG. 4 is a drawing specifically illustrating an electronic device including the first printed circuit board of FIG. 3 according to one embodiment of the present disclosure.

[0017] FIG. 5 is a drawing showing an electronic device including a first printed circuit board according to one embodiment of the present disclosure.

[0018] FIG. 6 is a drawing specifically illustrating an electronic device including the first printed circuit board of FIG. 5 according to one embodiment of the present disclosure.

[0019] FIG. 7 is a drawing specifically illustrating an electronic device including the first printed circuit board of FIG. 5 according to one embodiment of the present disclosure.

[0020] FIG. 8 is a drawing showing an electronic device including a first printed circuit board according to one embodiment of the present disclosure.

[0021] FIG. 9 shows a layout diagram of a first printed circuit board including wiring according to one embodiment of the present disclosure.

[0022] FIG. 10 shows a schematic diagram of a first printed circuit board including the wiring of FIG. 9 according to one embodiment of the present disclosure.

[0023] FIG. 11 shows a circuit diagram of a first printed circuit board according to one embodiment of the present disclosure.

[0024] FIG. 12 shows a layout diagram of a second printed circuit board including the wiring of FIG. 11 according to one embodiment of the present disclosure.

[0025] FIG. 13 shows a circuit diagram of a first printed circuit board according to one embodiment of the present disclosure.

[0026] FIG. 14 shows a layout diagram of a second printed circuit board (220) including a sixth recognition mark according to one embodiment of the present disclosure.

[0027] FIG. 15 is a drawing showing an eighth recognition mark according to one embodiment of the present disclosure.

[0028] FIG. 16 is a drawing showing a ninth recognition mark according to one embodiment of the present disclosure.

[0029] FIG. 17 is a drawing showing recognition marks according to one embodiment of the present disclosure.

[0030] FIG. 18 is a drawing showing the 18th recognition mark according to one embodiment of the present disclosure.

[0031] FIG. 19 is a drawing showing recognition marks according to one embodiment of the present disclosure.

[0032] FIG. 20 is a drawing showing recognition marks according to one embodiment of the present disclosure.

[0033] An electronic device may include multiple PCBs spaced apart and / or stacked. There is a risk that a short circuit may occur between SMDs when a PCB containing a recognition mark comes into contact with an SMD included in another layer.

[0034] A printed circuit board including the recognition mark of the present disclosure and an electronic device including the same may include a recognition mark segmented by a distance corresponding to the spacing between SMDs included in another layer.

[0035] A printed circuit board including the recognition mark of the present disclosure and an electronic device including the same may have the recognition mark segmented by a distance corresponding to the spacing between SMDs included in another layer, thereby allowing the recognition mark to reduce electrical influence on the SMDs.

[0036] A printed circuit board including the recognition mark of the present disclosure and an electronic device including the same can prevent malfunction, heat generation, leakage current, or a combination thereof by reducing the electrical influence of the recognition mark on SMDs.

[0037] FIG. 1 is a block diagram of an exemplary electronic device (100) capable of performing the operations described in the present disclosure.

[0038] Referring to FIG. 1, the electronic device (100) may be one of various forms of electronic devices, such as a notebook (190), smartphones (191) having various form factors (e.g., a bar-type smartphone (191-1), a foldable-type smartphone (191-2), or a sliderable (or rollable)-type smartphone (191-3)), a tablet (192), a cellular phone (not shown), and other similar computing devices (not shown). The components, their relationships, and their functions illustrated in FIG. 1 are illustrative only and are not intended to limit the implementations described or claimed in this disclosure. The electronic device (100) may be referred to as a mobile device, a user device, a multifunction device, a portable device, or a server.

[0039] The electronic device (100) may include components comprising at least one processor (110) (hereinafter referred to as processor (110)), at least one memory (120) (hereinafter referred to as memory (120)), at least one display (140) (hereinafter referred to as display (140)), at least one image sensor (150) (hereinafter referred to as image sensor (150)), at least one communication circuit (160) (hereinafter referred to as communication circuit (160)), and / or at least one sensor (170) (hereinafter referred to as sensor (170)). The components are merely exemplary. For example, the electronic device (100) may include other components (e.g., power management integrated circuitry (PMIC), audio processing circuit, antenna, rechargeable battery, or input / output interface). For example, some components may be omitted from the electronic device (100). For example, some components may be integrated into a single component.

[0040] The processor (110) may be implemented as one or more IC (integrated circuit (or circuitry)) chips and may perform various data processing operations. The processor (110) may include at least one electrical circuit and may process instructions (or programs, data, etc.) stored in memory (120) individually or collectively in a distributed manner. The processor (110) may include a processor assembly comprising one or more processing circuits. The processor (110) may include any processing circuit that is operative to control the performance and operations of one or more components of the electronic device (100) (e.g., memory (120), display (140), image sensor (150), communication circuit (160), and / or sensor (170)). For example, the processor (110) (e.g., application processor (AP)) may be implemented as a system on chip (SoC) (e.g., a single chip or chipset). For example, the processor (110) may be implemented with a plurality of cores (or at least one core circuit), a plurality of chips, or a plurality of chipsets. For example, the processor (110) may include one or more processing circuits. For example, the processor (110) may include one or more processing circuits configured to perform the various functions of the present disclosure individually and / or collectively. As an example without limitation, at least a portion of the processor (110) may be included in a first chip of the electronic device (100), and at least another portion of the processor (110) may be included in a second chip of the electronic device (100) different from the first chip of the electronic device (100).

[0041] For example, the processor (110) may include a central processing unit (111), a graphics processing unit (112), a neural processing unit (113), an image signal processor (114), a display controller (115), a memory controller (116), a storage controller (117), a communication processor (118), and / or a sensor interface (119). These components of the processor (110) are merely exemplary. For example, the processor (110) may include other components. For example, some components of the processor (110) may be omitted from the processor (110). For example, some components of the processor (110) may be included as separate components of the electronic device (100) outside of the processor (110). For example, some components of the processor (110) (e.g., memory controller (116)) may be included in other components (e.g., at least part of memory (120), an interface (e.g. available for connection to at least one component of the electronic device (100)), a display (140) and / or an image sensor (150)).

[0042] The processor (110) may cause other components of the electronic device (100) to perform various operations by executing instructions stored in memory (120). The CPU (111) (or central processing circuit) may be configured to control the components of the processor (110) based on the execution of instructions stored in memory (120) (e.g., volatile memory (121) and / or non-volatile memory (122)). The GPU (112) (or graphics processing circuit) may be configured to execute parallel operations (e.g., rendering). The NPU (113) (or neural processing circuit, or AI (artificial intelligence) chip) may be configured to execute operations for an artificial intelligence model (e.g., convolution computation). An ISP (114) (or image signal processing circuit) may be configured to process a raw image acquired through an image sensor (150) into a format suitable for a component within the electronic device (100) or a component of the processor (110). A display controller (115) (or display control circuit, or DPU (display processing unit)) may be configured to process an image acquired from a CPU (111), GPU (112), ISP (114), or memory (120) (e.g., volatile memory (121)) into a format suitable for a display (140). A memory controller (116) (or memory control circuit) may be configured to control reading data from the volatile memory (121) and writing data to the volatile memory (121). A storage controller (117) (or storage control circuit) may be configured to control reading data from the non-volatile memory (122) and writing data to the non-volatile memory (122).The CP (118) (communication processing circuit) may be configured to process data obtained from a component of the processor (110) into a format suitable for transmitting to another electronic device via the communication circuit (160), or to process data obtained from another electronic device via the communication circuit (160) into a format suitable for processing by the component of the processor (110). For example, the communication circuit (160) may include one or more communication circuits. The sensor interface (119) (or sensing data processing circuit, sensor hub) may be configured to process data regarding the state of the electronic device (100) and / or the state around the electronic device (100), obtained through the sensor (170), into a format suitable for the component of the processor (110).

[0043] Memory (120) may include one or more storage media (or one or more storage devices). For example, memory (120) may include a memory assembly comprising one or more storage media. For example, the one or more storage media may include a hard drive, a permanent memory such as flash memory, read-only memory (ROM) (e.g., non-volatile memory (122)), a semi-permanent memory such as random access memory (RAM) (e.g., volatile memory (121)), any other suitable type of storage (or storage assembly), or any combination thereof. Memory (120) may include a cache memory, which is one or more different types of memory used to temporarily store data for a function or feature of the electronic device (100). As an example not limited to, the cache memory may be included within the processor (110). The memory (120) may be fixedly embedded within the electronic device (100) or incorporated into one or more suitable types of components (e.g., a SIM (subscriber identity module) card and / or an SD (secure digital) card) that can be repeatedly inserted into and removed from the electronic device (100).

[0044] For example, memory (120) may store one or more software applications, such as operating system (or system) software applications, firmware software applications, driver software applications, plugin (e.g., add-in, add-on, and / or applet) software applications, and / or any other suitable software applications. For example, the one or more software applications may include instructions executable by the processor (110). For example, memory (120) may store instructions that can be called by an application programming interface (API). For example, memory (120) may store instructions within a library.

[0045] FIG. 2 is a drawing showing an electronic device (100) including a first printed circuit board (210) and a second printed circuit board (220) including a first fiducial mark (230) according to one embodiment of the present disclosure.

[0046] FIG. 3 is a drawing showing an electronic device (100) including a first printed circuit board (210) according to one embodiment of the present disclosure.

[0047] FIG. 4 is a drawing specifically showing an electronic device (100) including the first printed circuit board (210) of FIG. 3 according to one embodiment of the present disclosure.

[0048] FIG. 2 is a drawing showing a stacked state of a first printed circuit board (210) and a second printed circuit board (220), and FIG. 3 and FIG. 4 are drawings showing the first printed circuit board (210) in a flat state after removing the second printed circuit board (220). FIG. 3 and FIG. 4 separately show only the first recognition mark (230) of the second printed circuit board (220) at a position corresponding to the first printed circuit board (210) shown in a flat state, and the first recognition mark (230) is not included in the first printed circuit board (210).

[0049] Referring to FIGS. 2, 3 and 4, the electronic device (100) may include a first printed circuit board (210), a second printed circuit board (220), and an interposer (240).

[0050] In one embodiment, the first printed circuit board (210) may have a plurality of components (211, 212, 213) installed on the first surface (201).

[0051] For example, the first part (211), the second part (212), and the third part (213) may include a surface mount device (SMD) mounted on the surface of the first printed circuit board (210) using surface mount technology (SMT).

[0052] In one embodiment, the first component (211) may be mounted on the surface of the first printed circuit board (210) at a distance (D1) from the second component (212). The second component (212) may be mounted on the surface of the first printed circuit board (210) at a distance (D1) from the first component (211).

[0053] In one embodiment, the first surface (201) of the first printed circuit board (210) may face the second surface (202) of the second printed circuit board (220).

[0054] In one embodiment, the first surface (201) of the first printed circuit board (210) may be laminated with the second surface (202) of the second printed circuit board (220) spaced apart.

[0055] In one embodiment, the first printed circuit board (210) may be stacked spaced apart from the second printed circuit board (220).

[0056] In one embodiment, the interposer (240) may include at least one interposer (241, 242).

[0057] In one embodiment, the interposer (240) can support the first printed circuit board (210) and the second printed circuit board (220) so that they can be physically separated.

[0058] In one embodiment, the interposer (240) may include wiring.

[0059] In one embodiment, the interposer (240) can electrically connect the first printed circuit board (210) and the second printed circuit board (220) through wiring.

[0060] In one embodiment, the second printed circuit board (220) may include a first fiducial mark (230) on a second surface (202) facing the first surface (201).

[0061] In one embodiment, the first recognition mark (230) may include a plurality of segmented recognition marks (231, 232) and a segmented region (233). The segmented region (233) may correspond to the spacing between the plurality of segmented recognition marks (231, 232).

[0062] In one embodiment, the first printed circuit board (210) and the second printed circuit board (220) may include a solder mask covering the metal layer (e.g., a copper layer) that is deposited on the base material.

[0063] In one embodiment, the first recognition mark (230) may include a metal layer exposed by removing at least a portion of the solder mask of the second side (202) of the second printed circuit board (220).

[0064] In one embodiment, the first recognition mark (230) may include at least one of a metal layer, a solder mask, and a clearance area.

[0065] For example, the first segmented recognition mark (231) and the second segmented recognition mark (232) may include a metal layer exposed by removing at least a portion of the solder mask. The segmented region (233) may include the solder mask.

[0066] In one embodiment, the first recognition mark (230) can perform the function of identifying the location of a part in a manufacturing and assembly process and helping the automated equipment or inspection equipment to work correctly.

[0067] For example, the process of mounting a component on a printed circuit board (e.g., a first printed circuit board (210), or a second printed circuit board (220)) using automated equipment is described as follows. The automated equipment can apply solder paste to the printed circuit board (e.g., a first printed circuit board (210), or a second printed circuit board (220)), then recognize a recognition mark (e.g., a first recognition mark (230)) on the printed circuit board (e.g., a first recognition mark (230)) using optical equipment (e.g., a camera), place a component corresponding to the recognized recognition mark (e.g., a first recognition mark (230)), and heat it so that the solder paste melts and the component is fixed on the printed circuit board (e.g., a first printed circuit board (210), or a second printed circuit board (220)).

[0068] For example, the first segmented recognition mark (231) may be spaced apart from the second segmented recognition mark (232) by the segmentation area (233). The second segmented recognition mark (232) may be spaced apart from the first segmented recognition mark (231) by the segmentation area (233).

[0069] In one embodiment, the first segmented recognition mark (231) and the second segmented recognition mark (232) may be spaced apart from a plurality of components (211, 212) included in the first printed circuit board (210).

[0070] In one embodiment, the components mounted on the surface of the first printed circuit board (210) may be spaced apart so as not to come into contact with at least a portion of the second printed circuit board (220).

[0071] In one embodiment, at least a portion of the first segmented recognition mark (231) may face the first component (211). At least a portion of the second segmented recognition mark (232) may face the second component (212). The segmented region (233) between the first segmented recognition mark (231) and the second segmented recognition mark (232) on the second printed circuit board (220) may correspond to a separation distance (e.g., a first designated distance (D1)) between the first component (211) and the second component (212) mounted on the first printed circuit board (210).

[0072] In one embodiment, the segmented region (233) may correspond to the outlines of the first part (211) and the second part (212). At least a portion of the edge of the first segmented recognition mark (231) may be set to match the outline of the first part (211) and placed on the second printed circuit board (220). At least a portion of the edge of the second segmented recognition mark (232) may be set to match the outline of the second part (212) and placed on the second printed circuit board (220).

[0073] However, it is not limited thereto, and at least a portion of the end of the first segmented recognition mark (231) may be set to extend beyond the contour of the first part (211) and placed on the second printed circuit board (220). At least a portion of the end of the second segmented recognition mark (232) may be set to extend beyond the contour of the second part (212) and placed on the second printed circuit board (220).

[0074] In one embodiment, the segment area (233) may correspond to a first designated distance (D1). The first designated distance (D1) may include a separation interval.

[0075] In one embodiment, the segment area (233) may correspond to a design distance for preventing short circuits. For example, the design distance may include about 0.15 mm to about 2 mm.

[0076] In one embodiment, the segmentation area (233) may include a maximum distance at which the automated equipment can recognize the first recognition mark (230) as a single mark through the optical equipment at a minimum distance that prevents short circuits, and segmented recognition marks (e.g., the first segmented recognition mark (231) and the second segmented recognition mark (232)).

[0077] In one embodiment, even if at least a portion of the first printed circuit board (210) and the second printed circuit board (220) come into contact due to an external force, the first recognition mark (230) is segmented so that at least one of a short circuit, leakage current, capacitor burnout, malfunction, or heat generation can be prevented.

[0078] FIG. 5 is a drawing showing an electronic device (100) including a first printed circuit board (210) according to one embodiment of the present disclosure.

[0079] FIG. 6 is a drawing specifically showing an electronic device (100) including the first printed circuit board (210) of FIG. 5 according to one embodiment of the present disclosure.

[0080] FIG. 2 is a drawing showing a stacked state of a first printed circuit board (210) and a second printed circuit board (220), and FIG. 5 and FIG. 6 are drawings showing the first printed circuit board (210) in a flat state after removing the second printed circuit board (220). FIG. 5 and FIG. 6 separately show only the second recognition mark (530) of the second printed circuit board (220) at a position corresponding to the first printed circuit board (210) shown in a flat state, and the second recognition mark (530) is not included in the first printed circuit board (210).

[0081] Referring to FIGS. 2, 5 and 6, a first printed circuit board (210) may have a plurality of components (511, 512) installed on a first surface (201).

[0082] For example, the fourth part (511), the fifth part (512), and the sixth part (513) may include a surface mount device (SMD) mounted on the surface of the first printed circuit board (210) using surface mount technology (SMT).

[0083] In one embodiment, the fourth part (511) may be mounted on the surface of the first printed circuit board (210) at a distance (D2) from the fifth part (512).

[0084] In one embodiment, the fifth part (512) may be mounted on the surface of the first printed circuit board (210) by being spaced apart from the fourth part (511) by a second designated distance (D3) and spaced apart from the sixth part (513) by a third designated distance (D3).

[0085] In one embodiment, the sixth part (513) may be mounted on the surface of the first printed circuit board (210) at a third designated distance (D2) from the fifth part (512).

[0086] In one embodiment, the fourth part (511) and the sixth part (513) may be spaced apart from each other and mounted on the surface of the first printed circuit board (210).

[0087] In one embodiment, the first surface (201) of the first printed circuit board (210) may face the second surface (202) of the second printed circuit board (220).

[0088] In one embodiment, the first surface (201) of the first printed circuit board (210) may be laminated with the second surface (202) of the second printed circuit board (220) spaced apart.

[0089] In one embodiment, the first printed circuit board (210) may be stacked spaced apart from the second printed circuit board (220).

[0090] In one embodiment, the second recognition mark (530) may include a plurality of segmented recognition marks (531, 532, 533) and segmented regions (534, 535).

[0091] In one embodiment, the second recognition mark (530) may include at least one of a metal layer, a solder mask, and a clearance area.

[0092] For example, the third segmented recognition mark (531), the fourth segmented recognition mark (532), and the fifth segmented recognition mark (533) may include a metal layer exposed by removing at least a portion of the solder mask. The segmented regions (534, 535) may include the solder mask.

[0093] In one embodiment, the third segmented recognition mark (531) may be spaced apart from the fourth segmented recognition mark (532) by the first segmented area (534). The fourth segmented recognition mark (532) may be spaced apart from the third segmented recognition mark (531) by the first segmented area (534), and the fourth segmented recognition mark (532) may be spaced apart from the fifth segmented recognition mark (533) by the second segmented area (535).

[0094] In one embodiment, the first segmented recognition mark (231) and the second segmented recognition mark (232) may be spaced apart from a plurality of components (511, 512, 513) included in the first printed circuit board (210).

[0095] In one embodiment, the components mounted on the surface of the first printed circuit board (210) may be spaced apart so as not to come into contact with at least a portion of the second printed circuit board (220).

[0096] In one embodiment, at least a portion of the third segmented recognition mark (531) may face the fourth part (511). At least a portion of the fourth segmented recognition mark (532) may face the fifth part (512). At least a portion of the fifth segmented recognition mark (533) may face the sixth part (513).

[0097] In one embodiment, the first segmented area (534) between the third segmented recognition mark (531) and the fourth segmented recognition mark (532) on the second printed circuit board (220) may correspond to a separation interval (e.g., a second designated distance (D2)) between the fourth component (511) and the fifth component (512) mounted on the first printed circuit board (210).

[0098] In one embodiment, the first segmented area (534) between the third segmented recognition mark (531) and the fourth segmented recognition mark (532) on the second printed circuit board (220) may correspond to a separation interval (e.g., a second designated distance (D2)) between the fourth component (511) and the fifth component (512) mounted on the first printed circuit board (210).

[0099] In one embodiment, the second segmented area (535) between the fourth segmented recognition mark (532) and the fifth segmented recognition mark (533) on the second printed circuit board (220) may correspond to the separation distance (e.g., the third designated distance (D3)) between the fifth component (512) and the sixth component (513) mounted on the first printed circuit board (210).

[0100] In one embodiment, the first segment area (534) or the second segment area (535) may correspond to the distance between components placed on the first printed circuit board (210) (e.g., the second designated distance (D2) or the third designated distance (D3)).

[0101] In one embodiment, the first segmented region (534) may correspond to the outlines of the fourth part (511) and the fifth part (512). At least a portion of the edge of the third segmented recognition mark (531) may be set to match the outline of the fourth part (511) and placed on the second printed circuit board (220). At least a portion of the edge of the fourth segmented recognition mark (532) may be set to match the outline of the fifth part (512) and placed on the second printed circuit board (220). At least a portion of the edge of the fifth segmented recognition mark (533) may be set to match the outline of the sixth part (513) and placed on the second printed circuit board (220).

[0102] However, it is not limited thereto, and at least a portion of the edge of the third segmented recognition mark (531) may be set to extend beyond the contour of the fourth part (511) and placed on the second printed circuit board (220). At least a portion of the edge of the fourth segmented recognition mark (532) may be set to extend beyond the contour of the fifth part (512) and placed on the second printed circuit board (220). At least a portion of the edge of the fifth segmented recognition mark (533) may be set to extend beyond the contour of the sixth part (513) and placed on the second printed circuit board (220).

[0103] FIG. 7 is a drawing specifically showing an electronic device (100) including the first printed circuit board (210) of FIG. 5 according to one embodiment of the present disclosure.

[0104] FIG. 7 is a drawing showing the first printed circuit board (210) in a flat plane after removing the second printed circuit board (220).

[0105] FIG. 7 shows only the second recognition mark (530) of the second printed circuit board (220) separately displayed at a position corresponding to the first printed circuit board (210) shown as a plane, and the second recognition mark (530) is not included in the first printed circuit board (210).

[0106] The spacing or segmentation area between the segmented recognition marks (531, 532, 533) in FIG. 7 may differ from that in FIG. 6. In describing FIG. 7, descriptions that overlap with FIG. 5 and FIG. 6 may be omitted.

[0107] Referring to FIG. 6, the first segment area (534) or the second segment area (535) may correspond to the distance between components placed on the first printed circuit board (210) (e.g., the second designated distance (D2) or the third designated distance (D3)).

[0108] However, this is not limited thereto, and referring to FIG. 7, the first segment area (534) or the third segment area (536) may correspond to a design distance for preventing short circuits. For example, the design distance may include about 0.15 mm to about 2 mm.

[0109] In FIG. 6, the second segmented area (535) between the fourth segmented recognition mark (532) and the fifth segmented recognition mark (533) on the second printed circuit board (220) may correspond to the separation distance (e.g., the third designated distance (D3)) between the fifth component (512) and the sixth component (513) mounted on the first printed circuit board (210).

[0110] However, in FIG. 7, the third segment area (536) between the fourth segment recognition mark (532) and the fifth segment recognition mark (533) on the second printed circuit board (220) may correspond to a design distance for preventing short circuits. For example, the design distance may include about 0.15 mm to about 2 mm.

[0111] In one embodiment, the first segmented region (534) may correspond to the outlines of the fourth part (511) and the fifth part (512). At least a portion of the edge of the third segmented recognition mark (531) may be set to match the outline of the fourth part (511) and placed on the second printed circuit board (220). At least a portion of the edge of the fourth segmented recognition mark (532) may be set to match the outline of the fifth part (512) and placed on the second printed circuit board (220). At least a portion of the edge of the fifth segmented recognition mark (534) may be set to match the outline of the sixth part (513) and placed on the second printed circuit board (220).

[0112] However, it is not limited thereto, and at least a portion of the edge of the third segmented recognition mark (531) may be set to extend beyond the contour of the fourth part (511) and placed on the second printed circuit board (220). At least a portion of the edge of the fourth segmented recognition mark (532) may be set to extend beyond the contour of the fifth part (512) and placed on the second printed circuit board (220). At least a portion of the edge of the fifth segmented recognition mark (534) may be set to extend beyond the contour of the sixth part (513) and placed on the second printed circuit board (220).

[0113] FIG. 8 is a drawing showing an electronic device (100) including a first printed circuit board (210) according to one embodiment of the present disclosure.

[0114] FIG. 8 is a drawing specifically showing an electronic device (100) including the first printed circuit board (210) of FIG. 3 according to one embodiment of the present disclosure.

[0115] FIG. 2 is a drawing showing a stacked state of a first printed circuit board (210) and a second printed circuit board (220), and FIG. 3 and FIG. 8 are drawings showing the first printed circuit board (210) in a flat state after removing the second printed circuit board (220). FIG. 3 and FIG. 8 show only the third recognition mark (830) of the second printed circuit board (220) separately displayed at a position corresponding to the first printed circuit board (210) shown in a flat state, and the third recognition mark (830) is not included in the first printed circuit board (210).

[0116] In describing Fig. 8, descriptions of content that overlaps with Fig. 2 or Fig. 3 may be omitted.

[0117] In one embodiment, the second printed circuit board (220) may include a third fiducial mark (830) on the second surface (202) facing the first surface (201).

[0118] In one embodiment, the third recognition mark (830) may include a plurality of segmented recognition marks (831, 832) and a fourth segmented region (833).

[0119] In one embodiment, the third recognition mark (830) may include a metal layer exposed by removing at least a portion of the solder mask of the second side (202) of the second printed circuit board (220).

[0120] In one embodiment, the third recognition mark (830) may include at least one of a metal layer, a solder mask, and a clearance area.

[0121] For example, the sixth segmented recognition mark (831) and the seventh segmented recognition mark (832) may include a metal layer exposed by removing at least a portion of the solder mask. The fourth segmented region (833) may include the solder mask.

[0122] In one embodiment, the sixth segmented recognition mark (831) may be spaced apart from the seventh segmented recognition mark (832) by the fourth segmented area (833).

[0123] In one embodiment, the sixth segmented recognition mark (831) and the seventh segmented recognition mark (832) may be spaced apart from the third component (213) included in the first printed circuit board (210).

[0124] In one embodiment, the components mounted on the surface of the first printed circuit board (210) may be spaced apart so as not to come into contact with at least a portion of the second printed circuit board (220).

[0125] In one embodiment, at least a portion of the sixth segmented recognition mark (831) may face the third part (213). At least a portion of the seventh segmented recognition mark (832) may face the third part (213).

[0126] In one embodiment, the fourth segment area (833) may correspond to a design distance for preventing short circuits. For example, the design distance may include about 0.15 mm to about 2 mm.

[0127] In one embodiment, the third recognition mark (830) may be placed on the second printed circuit board (220) at a position corresponding to one part (e.g., the third part). The third recognition mark (830) may be placed on the second printed circuit board (220) at a position facing one part (e.g., the third part).

[0128] FIG. 9 shows a layout diagram of a first printed circuit board (210) including wiring (910) according to one embodiment of the present disclosure.

[0129] FIG. 10 shows a schematic diagram of a first printed circuit board (210) including the wiring (910) of FIG. 9 according to one embodiment of the present disclosure.

[0130] FIG. 2 is a drawing showing a stacked state of a first printed circuit board (210) and a second printed circuit board (220), and FIG. 9 and FIG. 10 are drawings showing the first printed circuit board (210) in a flat state after removing the second printed circuit board (220). FIG. 9 and FIG. 10 separately show only the fourth recognition mark (930) of the second printed circuit board (220) at a position corresponding to the first printed circuit board (210) shown in a flat state, and the fourth recognition mark (930) is not included in the first printed circuit board (210).

[0131] Referring to FIGS. 2, 9, and 10, the first printed circuit board (210) may have wiring (910) mounted on the first surface (201). The first printed circuit board (210) may include wiring (910) on the first surface (201).

[0132] In one embodiment, the wiring (910) may include wiring for an RF (radio frequency) signal or a clock signal. The wiring (910) may transmit a signal sensitive to noise. For example, the wiring (910) may transmit an RF (radio frequency) signal or a clock signal.

[0133] In one embodiment, the wiring (910) may include a clearance area around the wiring (910) to reduce electrical interference caused by external signals and maintain the integrity of the signal passing through the wiring (910).

[0134] In one embodiment, the wiring (910) and clearance area may include a solder mask layer.

[0135] For example, the thickness (D4, D5) of the clearance area may be the same as the thickness (D6) of the wiring (910). However, it is not limited thereto, and the thickness (D4, D5) of the clearance area may be different from the thickness (D6) of the wiring (910).

[0136] Referring to FIG. 2 and FIG. 9, the second printed circuit board (220) may include a fourth fiducial mark (930) on the second surface (202) facing the first surface (201).

[0137] In one embodiment, the fourth recognition mark (930) may include a plurality of segmented recognition marks (931, 932) and a fifth segmented region (933).

[0138] In one embodiment, the fourth recognition mark (930) may include a metal layer exposed by removing at least a portion of the solder mask of the second side (202) of the second printed circuit board (220).

[0139] In one embodiment, the fourth recognition mark (830) may include at least one of a metal layer, a solder mask, and a clearance area.

[0140] For example, the eighth segmented recognition mark (931) and the ninth segmented recognition mark (932) may include a metal layer exposed by removing at least a portion of the solder mask. The fifth segmented region (933) may include the solder mask.

[0141] In one embodiment, the eighth segmented recognition mark (931) may be spaced apart from the ninth segmented recognition mark (932) by the fifth segmented area (933).

[0142] In one embodiment, the eighth segmented recognition mark (931) and the ninth segmented recognition mark (932) may be spaced apart from the wiring (910) included in the first printed circuit board (210).

[0143] In one embodiment, components and / or wiring mounted on the surface of the first printed circuit board (210) may be spaced apart so as not to come into contact with at least a portion of the second printed circuit board (220).

[0144] In one embodiment, the fifth segment area (833) may correspond to the sum of the thickness (D6) of the wiring (910) and the thickness (D4, D5) of the clearance area around the wiring (910).

[0145] In one embodiment, the fifth segment area (833) can separate the eighth segmented recognition mark (931) and the ninth segmented recognition mark (932) by a distance greater than the sum of the thickness (D6) of the wiring (910) and the thicknesses (D4, D5) of the clearance area around the wiring (910).

[0146] In one embodiment, the fourth recognition mark (930) may be placed on the second printed circuit board (220) at a position corresponding to the wiring (910) of the first printed circuit board (210).

[0147] FIG. 11 shows a circuit diagram of a first printed circuit board (210) according to one embodiment of the present disclosure.

[0148] FIG. 12 shows a layout diagram of a second printed circuit board (220) including the wiring (1210) of FIG. 11 according to one embodiment of the present disclosure.

[0149] FIG. 2 is a drawing showing a stacked state of a first printed circuit board (210) and a second printed circuit board (220), and FIG. 11 is a drawing showing the first printed circuit board (210) in a flat state after removing the second printed circuit board (220). FIG. 11 shows only the fifth recognition mark (1130) and the seventh component (1110) of the second printed circuit board (220) separately displayed at a position corresponding to the first printed circuit board (210) shown in a flat state, and the fifth recognition mark (1130) and the seventh component (1110) are not included in the first printed circuit board (210).

[0150] Referring to FIGS. 2, FIGS. 11 and FIGS. 12, the second printed circuit board (220) may include a fifth recognition mark (1130) for mounting a seventh component (1110).

[0151] In one embodiment, the fifth recognition mark (1130) may include a plurality of segmented recognition marks (1131, 1132) and a sixth segmented area (1133).

[0152] For example, if the recognition mark shown in FIGS. 11 and 12 is a segmentless integrated recognition mark (1140), it may be placed in the wiring area (1210) of the second printed circuit board (220) rather than the ground area (1220) of the second printed circuit board (220) where the fifth recognition mark (1130) is placed, in order to avoid a short circuit or short due to contact with components on the first printed circuit board (210). If the segmentless integrated recognition mark (1140) is placed in the wiring area (1210), there is a problem that the efficiency of the wiring area (1210) is reduced due to a bottleneck. As in the present invention, the segmented fifth recognition mark (1130) can be freely placed on the second printed circuit board (220).

[0153] In one embodiment, the segmentless integrated recognition mark (1140) is shown exemplarily in the drawings to compare the case where the fifth recognition mark (1130) of FIGS. 11 and FIGS. 12 is placed on the ground area (1220) of the second printed circuit board (220) and the case where it is placed on the wiring area (1210) of the second printed circuit board (220), and is not actually placed on the second printed circuit board (220).

[0154] FIG. 13 shows a circuit diagram of a first printed circuit board (210) according to one embodiment of the present disclosure.

[0155] FIG. 14 shows a layout diagram of a second printed circuit board (220) including a sixth recognition mark (1330) according to one embodiment of the present disclosure.

[0156] FIG. 2 is a drawing showing a stacked state of a first printed circuit board (210) and a second printed circuit board (220), and FIG. 13 is a drawing showing the first printed circuit board (210) in a flat state after removing the second printed circuit board (220). FIG. 13 shows only the sixth recognition mark (1330) and the eighth component (1331) of the second printed circuit board (220) separately displayed at a position corresponding to the first printed circuit board (210) shown in a flat state, and the sixth recognition mark (1330) and the eighth component (1331) are not included in the first printed circuit board (210).

[0157] Referring to FIGS. 2, FIGS. 13 and FIGS. 14, the second printed circuit board (220) may include a sixth recognition mark (1330) and a seventh recognition mark (1350) for mounting an eighth component (1331).

[0158] In one embodiment, the sixth recognition mark (1330) may include a plurality of segmented recognition marks. The plurality of segmented recognition marks included in the sixth recognition mark (1330) may include a segmented line, a broken line, or a dashed line.

[0159] In one embodiment, the first recognition mark (230), the second recognition mark (530), the third recognition mark (830), the fourth recognition mark (930), or the fifth recognition mark (1130) includes an L-shape with angled corners. The sixth recognition mark (1330) includes a vertical line or a horizontal line, or an I-shape. The sixth recognition mark (1330) may have a simpler geometric shape than the first recognition mark (230), the second recognition mark (530), the third recognition mark (830), the fourth recognition mark (930), or the fifth recognition mark (1130). Recognition marks having a simple geometric shape (e.g., the sixth recognition mark (1330)) may be placed on the second printed circuit board (220) in various areas required for part recognition.

[0160] In one embodiment, the seventh recognition mark (1350) may include a continuous shape without segmentation.

[0161] FIG. 15 is a drawing showing an eighth recognition mark (1530) according to one embodiment of the present disclosure.

[0162] In one embodiment, the eighth recognition mark (1530) may include a plurality of segmented recognition marks (1531, 1532, 1533, 1534, 1535, 1536, 1537). The eighth recognition mark (1530) includes an L-shape with angled corners.

[0163] In one embodiment, the eighth recognition mark (1530) may have a first length (D7) in the x-axis direction and a second length (D8) in the y-axis direction.

[0164] In one embodiment, each of the plurality of segmented recognition marks (1531, 1532, 1533, 1534, 1535, 1536, 1537) may have a third length (D9) in the y-axis direction and a fourth length (D10) in the x-axis direction.

[0165] In one embodiment, each segmented area of ​​a plurality of segmented recognition marks (1531, 1532, 1533, 1534, 1535, 1536, 1537) may have a specified distance (D11). Each of the plurality of segmented recognition marks (1531, 1532, 1533, 1534, 1535, 1536, 1537) may be spaced apart by a specified distance (D11).

[0166] FIG. 16 is a drawing showing a ninth recognition mark (1630) according to one embodiment of the present disclosure.

[0167] In one embodiment, the ninth recognition mark (1630) may include a plurality of segmented recognition marks (1631, 1632, 1633, 1634). The ninth recognition mark (1630) includes a vertical line or a horizontal line, or an I-shape.

[0168] In one embodiment, the ninth recognition mark (1630) may have a fifth length (D12) in the x-axis direction.

[0169] In one embodiment, each of the plurality of segmented recognition marks (1631, 1632, 1633, 1634) may have a sixth length (D13) in the y-axis direction and a seventh length (D14) in the x-axis direction. Each segmented area of ​​the plurality of segmented recognition marks (1631, 1632, 1633, 1634) may have a specified distance (D15). Each of the plurality of segmented recognition marks (1631, 1632, 1633, 1634) may be spaced apart by a specified distance (D15).

[0170] FIG. 17 is a drawing showing recognition marks (1731, 1732, 1733, 1734, 1735, 1736, 1737, 1738) according to one embodiment of the present disclosure.

[0171] In one embodiment, the 10th recognition mark (1731), the 11th recognition mark (1732), the 12th recognition mark (1733), and the 13th recognition mark (1734) may include an L-shape with angled corners.

[0172] In one embodiment, the 14th recognition mark (1735), the 15th recognition mark (1736), the 16th recognition mark (1737), and the 17th recognition mark (1738) include a vertical line or a horizontal line, or an I-shape.

[0173] In one embodiment, the 10th recognition mark (1731), the 14th recognition mark (1735), the 13th recognition mark (1734), and the 17th recognition mark (1738) may include geometric shapes such as a segmented line, a broken line, or a dashed line.

[0174] In one embodiment, the 10th recognition mark (1731), the 14th recognition mark (1735), the 13th recognition mark (1734), and the 17th recognition mark (1738) may include a plurality of segmented recognition marks of a regular and constant size.

[0175] In one embodiment, the size of the plurality of segmented recognition marks included in the 10th recognition mark (1731), the 14th recognition mark (1735), the 13th recognition mark (1734) and the 17th recognition mark (1738) can be set by design.

[0176] In one embodiment, the 11th recognition mark (1732), the 12th recognition mark (1733), the 14th recognition mark (1735), and the 13th recognition mark (1734) may include geometric shapes such as a dotted line.

[0177] In one embodiment, the 11th recognition mark (1732), the 12th recognition mark (1733), the 14th recognition mark (1735), and the 13th recognition mark (1734) may include a plurality of segmented recognition marks of a regular and constant size.

[0178] In one embodiment, the size of the segmented recognition marks included in the 11th recognition mark (1732), 12th recognition mark (1733), 14th recognition mark (1735) and 13th recognition mark (1734) can be set by design.

[0179] FIG. 18 is a drawing showing an 18th recognition mark (1830) according to one embodiment of the present disclosure.

[0180] In one embodiment, the 18th recognition mark (1830) may include a plurality of segmented recognition marks (1831, 1832, 1833, 1834, 1835). The 18th recognition mark (1630) may include an L-shape with angled corners.

[0181] However, it is not limited to this, and the 18th recognition mark (1830) may include a vertical line or a horizontal line, or an I-shape.

[0182] In one embodiment, each of the plurality of segmented recognition marks (1831, 1832, 1833, 1834, 1835) may be spaced apart by a segmented area including a specified distance (D16).

[0183] In one embodiment, each of the plurality of segmented recognition marks (1831, 1832, 1833, 1834, 1835) may include a shape that is broken at a specific angle (e.g., about 45 degrees). For example, a specified distance (D16) may have a specific angle (e.g., about 45 degrees).

[0184] In one embodiment, each of the segmented recognition marks included in the first recognition mark (230), the second recognition mark (530), the third recognition mark (830), the fourth recognition mark (930), the fifth recognition mark (1130), the sixth recognition mark (1330), the eighth recognition mark (1530), the ninth recognition mark (1630), the tenth recognition mark (1731), the eleventh recognition mark (1732), the twelfth recognition mark (1733), the thirteenth recognition mark (1734), the fourteenth recognition mark (1735), the fifteenth recognition mark (1736), the sixteenth recognition mark (1737), or the seventeenth recognition mark (1738) may include a shape that is cut at a specific angle (e.g., about 90 degrees). For example, the segmented regions between the segmented recognition marks included in the first recognition mark (230), the second recognition mark (530), the third recognition mark (830), the fourth recognition mark (930), the fifth recognition mark (1130), the sixth recognition mark (1330), the eighth recognition mark (1530), the ninth recognition mark (1630), the tenth recognition mark (1731), the eleventh recognition mark (1732), the twelfth recognition mark (1733), the thirteenth recognition mark (1734), the fourteenth recognition mark (1735), the fifteenth recognition mark (1736), the sixteenth recognition mark (1737), or the seventeenth recognition mark (1738) may have a specific angle (e.g., about 90 degrees).However, it is not limited to this, and the segmented regions between the segmented recognition marks included in the first recognition mark (230), the second recognition mark (530), the third recognition mark (830), the fourth recognition mark (930), the fifth recognition mark (1130), the sixth recognition mark (1330), the eighth recognition mark (1530), the ninth recognition mark (1630), the tenth recognition mark (1731), the eleventh recognition mark (1732), the twelfth recognition mark (1733), the thirteenth recognition mark (1734), the fourteenth recognition mark (1735), the fifteenth recognition mark (1736), the sixteenth recognition mark (1737), or the seventeenth recognition mark (1738) may include various angles by design.

[0185] FIG. 19 is a drawing showing recognition marks (1931, 1932, 1933, 1934) according to one embodiment of the present disclosure.

[0186] In one embodiment, the 19th recognition mark (1931), the 20th recognition mark (1932), the 21st recognition mark (1933), and the 22nd recognition mark (1934) may include an L-shape with angled corners.

[0187] However, it is not limited to this, and the 19th recognition mark (1931), the 20th recognition mark (1932), the 21st recognition mark (1933), and the 22nd recognition mark (1934) may include a vertical line or a horizontal line, or an I-shape.

[0188] In one embodiment, the 19th recognition mark (1931), the 20th recognition mark (1932), the 21st recognition mark (1933), and the 22nd recognition mark (1934) may include geometric shapes such as a segmented line, a broken line, or a dashed line.

[0189] In one embodiment, the 19th recognition mark (1931) may include a plurality of segmented recognition marks (19311, 19312) spaced apart by a specified distance (D17).

[0190] In one embodiment, the 20th recognition mark (1932) may include a plurality of segmented recognition marks (19321, 19322) spaced apart by a specified distance (D18).

[0191] In one embodiment, the 21st recognition mark (1933) may include a plurality of segmented recognition marks (19331, 19332) spaced apart by a specified distance (D19).

[0192] In one embodiment, the 22nd recognition mark (1934) may include a plurality of segmented recognition marks (19341, 19342) spaced apart by a specified distance (D20).

[0193] In one embodiment, the 19th recognition mark (1931), the 20th recognition mark (1932), the 21st recognition mark (1933), and the 22nd recognition mark (1934) may be irregularly segmented.

[0194] In one embodiment, the size of the plurality of segmented recognition marks included in the 19th recognition mark (1931), the 20th recognition mark (1932), the 21st recognition mark (1933) and the 22nd recognition mark (1934) can be set by design.

[0195] FIG. 20 is a drawing showing recognition marks (2031, 2032, 2033, 2034) according to one embodiment of the present disclosure.

[0196] In one embodiment, the 23rd recognition mark (2031) may include a plurality of segmented recognition marks. The plurality of segmented recognition marks included in the 23rd recognition mark (2031) may include a triangular shape.

[0197] In one embodiment, the 24th recognition mark (2032) may include a plurality of segmented recognition marks. The plurality of segmented recognition marks included in the 24th recognition mark (2032) may include a rhombus shape.

[0198] In one embodiment, the 25th recognition mark (2033) may include a plurality of segmented recognition marks. The plurality of segmented recognition marks included in the 25th recognition mark (2033) may include a circular shape.

[0199] In one embodiment, the 26th recognition mark (2034) may include a plurality of segmented recognition marks. The plurality of segmented recognition marks included in the 26th recognition mark (2034) may include circular and square shapes.

[0200] In one embodiment, the segmented recognition marks included in the recognition marks (e.g., the 23rd recognition mark (2031), the 24th recognition mark (2032), the 25th recognition mark (2033) and the 26th recognition mark (2034)) may include various geometric shapes (e.g., polygons and circles).

[0201] In one embodiment, the segmented recognition marks included in the recognition mark (e.g., the 23rd recognition mark (2031), the 24th recognition mark (2032), the 25th recognition mark (2033) and the 26th recognition mark (2034)) may include not only a single geometric shape (e.g., a polygon and a circle) but also a combination of geometric shapes (e.g., a polygon and a circle).

[0202] In one embodiment, segmented recognition marks included in the first recognition mark (230), the second recognition mark (530), the third recognition mark (830), the fourth recognition mark (930), the fifth recognition mark (1130), the sixth recognition mark (1330), the eighth recognition mark (1530), the ninth recognition mark (1630), the tenth recognition mark (1731), the eleventh recognition mark (1732), the twelfth recognition mark (1733), the thirteenth recognition mark (1734), the fourteenth recognition mark (1735), the fifteenth recognition mark (1736), the sixteenth recognition mark (1737) or the seventeenth recognition mark (1738), the nineteenth recognition mark (1931), the twenty recognition mark (1932), the twenty-first recognition mark (1933) and the twenty-second recognition mark (1934) are rectangular, square, or L It includes a shape, but may include a circular or polygonal shape and a combination thereof.

[0203] An electronic device (100) according to one embodiment of the present disclosure comprises a first printed circuit board (210) having a plurality of components mounted on a first surface, and a second printed circuit board (220) having a fiducial mark and at least one component mounted on a second surface that is spaced apart from and facing the first surface, wherein a third component among the plurality of components mounted on the first printed circuit board is positioned facing the fiducial mark of the second printed circuit board (220), and the fiducial mark may include the width of the third component and a segmented area spaced apart by a first distance on both sides centered on the third component.

[0204] An electronic device (100) according to one embodiment of the present disclosure comprises a first printed circuit board (210) having a plurality of components mounted on a first surface, and a second printed circuit board (220) having a fiducial mark and at least one component mounted on a second surface spaced apart from and facing the first surface, wherein the conductive portions of the first component and the second component among the plurality of components mounted on the first printed circuit board are positioned facing each other with the fiducial mark of the second printed circuit board (220), and the fiducial mark may include a segmented area at a position corresponding to the spaced interval between the first component and the conductive portion of the second component.

[0205] An electronic device (100) according to one embodiment of the present disclosure may be characterized in that the segmented area between the first segmented recognition mark and the second segmented recognition mark is greater than or equal to the specified distance between the first part and the second part.

[0206] An electronic device (100) according to one embodiment of the present disclosure may be characterized in that, even if a plurality of components included in the first printed circuit board (210) and the recognition mark of the second printed circuit board (220) come into contact, the first component and the second component are not electrically connected by the recognition mark.

[0207] According to one embodiment of the present disclosure, the recognition mark may include a plurality of segmented recognition marks spaced apart by regular or irregular segmented regions.

[0208] Each of the plurality of segmented recognition marks according to one embodiment of the present disclosure may include at least one of a polygon or a circle.

[0209] According to one embodiment of the present disclosure, the recognition mark may include a plurality of segmented recognition marks spaced apart by segmented regions forming a specific angle.

[0210] An electronic device (100) according to one embodiment of the present disclosure may further include a third component among the plurality of components.

[0211] According to one embodiment of the present disclosure, the recognition mark may further include a third segmented recognition mark spaced apart by a first distance from the center of the third part, and a fourth segmented recognition mark spaced apart by a second distance from the center of the third part.

[0212] According to one embodiment of the present disclosure, the first distance or the second distance may correspond to the clearance area of ​​the third part.

[0213] According to one embodiment of the present disclosure, the recognition mark may include a metal layer exposed by removing at least a portion of the solder mask of the second printed circuit board (220).

[0214] According to one embodiment of the present disclosure, the first segmented recognition mark and the second segmented recognition mark may correspond to the metal layer.

[0215] According to one embodiment of the present disclosure, the segmented region between the first segmented recognition mark and the second segmented recognition mark may include the solder mask.

[0216] According to one embodiment of the present disclosure, the recognition mark may include at least one of the copper layer, the solder mask, and the clearance area.

[0217] An electronic device (100) according to one embodiment of the present disclosure may further include an interposer that electrically connects the first printed circuit board (210) and the second printed circuit board (220) while supporting a physical separation between the first printed circuit board (210) and the second printed circuit board (220).

[0218] According to one embodiment of the present disclosure, the recognition mark may form a geometric pattern, figure, or structure with the first segmented recognition mark, the second segmented recognition mark, and the segmented area corresponding to the specified distance.

[0219] According to one embodiment of the present disclosure, the recognition mark may have a specified length and a specified width.

[0220] A printed circuit board including a recognition mark according to one embodiment of the present disclosure includes a recognition mark including a plurality of segmented recognition marks on a surface facing another printed circuit board having a plurality of components installed thereon, at least some of the plurality of segmented recognition marks face the plurality of components, and the segmented area between the plurality of segmented recognition marks may correspond to the spacing between the plurality of components.

[0221] According to one embodiment of the present disclosure, the segmented area between the first segmented recognition mark and the second segmented recognition mark may be characterized as being greater than or equal to a specified distance between the first part and the second part.

[0222] A printed circuit board including a recognition mark according to one embodiment of the present disclosure may be characterized in that, even if a plurality of components included in the first printed circuit board (210) and the recognition mark of the second printed circuit board (220) come into contact, the first component and the second component are not electrically connected by the recognition mark.

[0223] According to one embodiment of the present disclosure, the recognition mark may include a plurality of segmented recognition marks spaced apart by regular or irregular segmented regions.

[0224] Each of the plurality of segmented recognition marks according to one embodiment of the present disclosure may include at least one of a polygon or a circle.

[0225] An electronic device according to one embodiment disclosed in this document may be of various forms. The electronic device may include, for example, a portable communication device (e.g., a smartphone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, or a consumer electronics device. The electronic device according to the embodiment of this document is not limited to the aforementioned devices.

[0226] The embodiments of this document and the terms used therein are not intended to limit the technical features described in this document to specific embodiments, and should be understood to include various modifications, equivalents, or substitutions of said embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of said items unless the relevant context clearly indicates otherwise. In this document, phrases such as "A or B," "at least one of A and B," "at least one of A or B," "A, B or C," "at least one of A, B and C," and "at least one of A, B, or C" may each include any one of the items listed together in the corresponding phrase, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used simply to distinguish said components from other said components and do not limit said components in any other aspect (e.g., importance or order). Where any (e.g., 1st) component is referred to as “coupled” or “connected” to another (e.g., 2nd) component, with or without the terms “functionally” or “communicationly,” it means that said any component may be connected to said other component directly (e.g., via a wire), wirelessly, or through a third component.

[0227] As used in one embodiment of this document, the term “module” may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit, for example. A module may be a component formed integrally, or a minimum unit of said component or a part thereof that performs one or more functions. For example, according to one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0228] One embodiment of the present document may be implemented as software (e.g., a program) comprising one or more instructions stored in a storage medium (e.g., internal memory) or external memory that is readable by a machine (e.g., an electronic device (100)). For example, a processor (e.g., a processor (110)) of the machine (e.g., an electronic device (100)) may call at least one of the one or more instructions stored in the storage medium and execute it. This enables the machine to operate to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code that can be executed by an interpreter. The storage medium readable by the machine may be provided in the form of a non-transitory storage medium. Here, 'non-temporary' simply means that the storage medium is a tangible device and does not contain a signal (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently and cases where it is stored temporarily.

[0229] According to one embodiment, the method according to one embodiment disclosed herein may be provided by being included in a computer program product. The computer program product may be traded between a seller and a buyer as a product. The computer program product may be distributed in the form of a device-readable storage medium (e.g., compact disc read-only memory (CD-ROM)) or an application store (e.g., Play Store). TM It can be distributed online (e.g., downloaded or uploaded) through ) or directly between two user devices (e.g., smartphones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily created on a device-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or a relay server.

[0230] According to one embodiment, each component (e.g., module or program) of the components described above may include a singular or multiple entities, and some of the multiple entities may be separated and placed in other components. According to one embodiment, one or more of the components or operations among the aforementioned components may be omitted, or one or more other components or operations may be added. Generally or additionally, multiple components (e.g., module or program) may be integrated into a single component. In this case, the integrated component may perform one or more functions of each of the multiple components in the same or similar manner as those performed by the corresponding component among the multiple components prior to integration. According to one embodiment, operations performed by the module, program, or other components may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

Claims

1. In an electronic device, A first printed circuit board having a plurality of components mounted on a first surface; and It includes a second printed circuit board having a fiducial mark and at least one component installed on a second surface that is spaced apart from and facing the first surface, and An electronic device in which the conductive portions of the first and second components among the plurality of components installed on the first printed circuit board are arranged to face each other with a recognition mark of the second printed circuit board, and the recognition mark includes a segmented region at a position corresponding to the gap between the first component and the conductive portion of the second component.

2. In Paragraph 1, An electronic device characterized in that the segmented area between the first segmented recognition mark and the second segmented recognition mark is greater than or equal to the specified distance between the first part and the second part.

3. In Paragraph 1, An electronic device characterized by preventing the first component and the second component from being electrically connected by the recognition mark even if a plurality of components included in the first printed circuit board come into contact with the recognition mark of the second printed circuit board.

4. In Paragraph 1, The above recognition mark is An electronic device comprising a plurality of segmented recognition marks spaced apart by regular or irregular segmented regions.

5. In Paragraph 4, Each of the above-mentioned plurality of segmented recognition marks is An electronic device comprising at least one of a polygon or a circle.

6. In Paragraph 1, The above recognition mark is An electronic device comprising a plurality of segmented recognition marks spaced apart by the segmented regions forming a specific angle.

7. In Paragraph 1, The above plurality of parts further include a third part, and The above recognition mark is An electronic device further comprising a third segmented recognition mark spaced apart by a first distance from the center of the third component, and a fourth segmented recognition mark spaced apart by a second distance from the center of the third component.

8. In Paragraph 7, The above first distance or the above second distance An electronic device corresponding to the clearance area of ​​the third component above.

9. In Paragraph 2, The above recognition mark is An electronic device comprising a metal layer exposed by removing at least a portion of the solder mask of the second printed circuit board.

10. In Paragraph 9, The above-mentioned first segmented recognition mark and the above-mentioned second segmented recognition mark are An electronic device corresponding to the above metal layer.

11. In Paragraph 9, The segmented region between the first segmented recognition mark and the second segmented recognition mark is an electronic device including the solder mask.

12. In Paragraph 11, The above recognition mark is An electronic device comprising at least one of the copper layer, the solder mask, and the clearance region.

13. In Paragraph 1, While supporting the physical separation between the first printed circuit board and the second printed circuit board, An electronic device further comprising an interposer that electrically connects the first printed circuit board and the second printed circuit board.

14. In Paragraph 2, The above recognition mark is An electronic device forming a geometric pattern, figure, or structure with the segmented area corresponding to the first segmented recognition mark, the second segmented recognition mark, and the specified distance.

15. In Paragraph 1, The above recognition mark is An electronic device having a specified length and a specified width.

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