Method for displaying, by means of an electronic computing device, a circuit arrangement for controlling a machine, computer program product, computer-readable storage medium, and electronic computing device

Abstract

The invention relates to a method for displaying, by means of an electronic computing device (30), a circuit arrangement (10) for controlling a machine (22), having the steps of: detecting, by means of a detection device (32) of the electronic computing device (30), an input (34) describing the circuit arrangement (10), detecting, by means of the detection device (32), a display request (36) requesting a display of the circuit arrangement (10), generating the display (38) of the circuit arrangement (10) on the basis of the input (34) and of the display request (36) by means of the electronic computing device (30), and displaying the generated display (38) by means of a display device (40) of the electronic computing device (30). The invention also relates to a computer program product, to a computer-readable storage medium, and to an electronic computing device (30).

Description

[0001] 202413681

[0002] 1

[0003] Description

[0004] Method for displaying a circuit arrangement for controlling a machine by means of an electronic computing device, computer program product, computer-readable storage medium and electronic computing device

[0005] The following invention relates to a method for displaying a circuit arrangement for controlling a machine by means of an electronic computing device according to claim 1. The invention further relates to a corresponding computer program product, a corresponding computer-readable storage medium and a corresponding electronic computing device.

[0006] Automation ecosystems for cyber-physical systems (CBS) are already known from the prior art. A platform-based cyber-physical system is essentially composed of decoupled automation functions (AFs) whose interconnections or structure change during system startup, operation, and shutdown. These automation functions can also be referred to as control functions. This structure of numerous automation functions for controlling a machine can also be described as a circuit arrangement. The circuit arrangement changes, for example, to adapt system behavior, scale system performance, and extend the system lifecycle.

[0007] However, current technology lacks precise descriptions of aspects of system behavior from a holistic perspective. Such descriptions would often be useful for in-field monitoring and testing, as well as for system development and design, for precisely describing the desired behavior, for determining the temporal properties of automation function groups, particularly for verifying safety-related functions of safety-critical systems, and thus for ascertaining whether these functions operate as intended.

[0008] A precise description of system behavior must be expressive, clear, versatile, accurate, and reproducible. Given that adapting system functionality at runtime is becoming increasingly important in both flexible and traditional, rigid production systems, and that monitoring functions must be continuously reconfigured, the question arises as to how such a system can be accurately described.

[0009] 2. Such a system consists in particular of transient automation function groups with transient control and data connections. Furthermore, seamless upgrades of two or more communicating automation functions, as well as seamless upgrades of continuous and safety-related automation functions, should be able to be described. The ability to describe dynamic adaptation of non-stopable automation functions is also of important importance.

[0010] The Communication Sequential Processes (CSP) theory is already known from the state of the art and is the most frequently used data flow theory for describing concurrent processes or functions that communicate using messages. However, CSP has no direct, practical application and does not specifically support communication between automated functions that are loosely coupled, for example, via a publish-subscribe network and exhibit real-time systems with actual time constraints. CSP has a formal, textual representation, but a practical graphical representation is lacking.

[0011] Functional blocks connected to shared data channels are common in the logic circuits of decoders (DEDs) and in block diagrams of microcontrollers with multiple functional units sharing one or more data / address / control buses. Similar diagrams are used for dynamic data stream pipelines in asynchronous, message-oriented middleware with interconnected data-producing and -consuming programs, for example, in event-driven systems. In embedded computing and real-time systems, synchronous systems that utilize the Data Distribution Service (DDS) and its Public Subscribe architecture, such as RTI Connext, are sometimes also depicted.

[0012] Function blocks with input and output data ports are common in representations of software components (PGSML) and data flow nodes (DRBS). Time-controlled systems are not explicitly supported. This also applies to event / sequence diagrams (PGSML).

[0013] With appropriate application tools, scripts can also be written that automatically generate diagrams suitable for documentation purposes, such as component diagrams, similarity function blocks, and event sequence diagrams. However, these tools lack operational semantics and the necessary precision and abstraction to represent the temporal properties of 202413681.

[0014] 3

[0015] To specify, monitor, and test groups of time-controlled automation functions.

[0016] Overall, adequate graphical and equivalent textual descriptions of parallel and sequential interactions between dynamically configurable, periodically executed, and especially time-controlled, function blocks that evolve over time are currently lacking. However, adequate descriptions of interactions would enable automated observation and verification of the properties of automation function groups and automation function interactions at runtime of a CSP.

[0017] The object of the present invention is to provide a method, a computer program product, a computer-readable storage medium and an electronic computing device by means of which a circuit arrangement for a machine can be better described and displayed.

[0018] This problem is solved by a method, a computer program product, a computer-readable storage medium, and an electronic computing device according to the independent claims. Advantageous embodiments are specified in the dependent claims.

[0019] One aspect of the invention relates to a method for displaying a circuit arrangement for controlling a machine using an electronic computer. An input describing the circuit arrangement is acquired by means of a sensor unit of the electronic computer. A display request for displaying the circuit arrangement is acquired by means of the sensor unit. The display of the circuit arrangement is generated by the electronic computer depending on the input and depending on the display request, and the generated display is shown by means of a display unit of the electronic computer.

[0020] This allows the described circuit arrangement to be transformed and displayed based on the input and the display requirements. 202413681

[0021] 4

[0022] For example, a text block or a trace can be used as input, which is then transformed into a graphical structure or display. A display requirement can then be specified, such as the display of communication between automation functions, the display of dependencies between automation functions, or similar. Depending on this, the communication between automation functions, for example, is then displayed graphically. Thus, a user of the display device or electronic computing device can reliably obtain an overview of the circuit arrangement based on an input and the display requirement.

[0023] The circuit arrangement can be both simulated and in operation, generating actual control signals for the machine.

[0024] In particular, a domain-specific language (DSL) for capturing interaction patterns in dynamic, time-controlled groups of automation functions can be represented via input. Statements in this domain-specific language can be represented both graphically and textually. Graphical and textual representations have different syntax but share a common semantic grammar. Statements about static and dynamic properties of seamless upgrades of measurement-clock-controlled automation function groups, both graphical and textual, apply this semantic grammar. Dynamically changing structures in the actions of groups of automation function instances can be automatically checked at runtime of the circuit arrangement using correctly formed behavioral descriptions in the prescribed domain-specific language.Instructions in the proposed domain-specific language can be formulated, for example, using data channels selected in a data area and automation function instances selected in the function area. Together, the selected data channels and automation function instances form one or more structured automation function groups and interactions within them. The structures of the automation function group and the interactions evolve over time. Property change points mark moments on the timeline when properties relevant to a particular task are modified. Structure change points are changes to the automation function group structure.

[0025] A function connection view links data channels and automation function instances. Automation function instances and data channels 202413681

[0026] 5 and their data relationships, especially input and output, between them apply for a specific time interval between two structural change points. Optionally specified data types of automation functions, communication channels, and automation function variables, such as sensor or actuator, enhance the expressiveness, integrity, and accuracy of behavioral descriptions. The types can be adapted to the system's needs, for example, for a combined sensor / actuator function and for a control function fieldbus connection. For instance, one automation function might describe a sensor type, while another automation function represents any data type. The optional type specifications contribute to the clarity and accuracy of behavioral descriptions by providing additional information about the nature of the automation functions, data channels, and variables used.

[0027] Compared to the prior art, the present invention thus offers the advantage of providing a domain-specific language for comprehensive, integrated, consistent, and concise descriptions of the circuit arrangement. This allows for the description of variables, conditional structures of variable automation functions, and variable connections between them in the form of publish-subscribe data channels. Furthermore, variables and conditional interactions between automation function instances can be represented by conditional, temporally sequential and parallel message transmissions and publish-subscribe communication channels. Data variables and changing values ​​of automation function instances can also be described. Additionally, data variables and changing values ​​between automation function instances can be described in publish-subscribe communication channels.A graphical and textual representation can also be provided, which are particularly equivalent in terms of their semantics, since both representations are based on a common semantic grammar.

[0028] This has the particular advantage that the graphical representation, in the form of a corresponding language, can easily provide understandable visualizations of the behavior of individual automation function instances throughout their entire lifespan and of groups of automation function instances during upgrade operations. Equivalent textual representations in this language enable the precise recording of the structures of automation function instance groups and changes to these structures for CPS analysis and process recording.

[0029] 6

[0030] Structures of automation function instance groups for CPS analysis, representation of processes and structures for CPS analysis and documentation, specifications of automation function processes and structures for CPS design and testing, and monitoring of automation function instance processes and structures against CPS behavior descriptions.

[0031] Both graphical and textual representations of corresponding instructions have normalized forms that can be automatically translated into one another using a common grammar. The simultaneous provision of graphical and textual representations and instructions in the form of language promotes understanding of the behavior and properties of groups of time-triggered automation functions, for example, under narrow, cycle-accurate timelines and under wide timelines where the truth value of statements in temporal logic (TML) can change over time. This benefits the engineering, operation, and safety assessments of time-triggered and periodically operated cyber-physical systems (CPS).

[0032] In one advantageous embodiment, text input describing the circuit layout is captured as input. Specifically, the text input can be in the form of binary code or corresponding text blocks. Furthermore, appropriate traces can also be used to describe the circuit layout. A trace can refer to a range of techniques and tools that make it possible to reconstruct the execution of a program by capturing and logging important information such as function calls, variable values, memory addresses, and other system-relevant data. A trace can be generated in various ways, for example, by adding output to the source code that is displayed during program execution or written to a file, or by using debugging tools and functions that automatically generate traces.This makes it possible to create a corresponding representation of the circuit arrangement based on text input.

[0033] Another advantageous design feature involves transforming the text input into a graphical description of the circuit arrangement. For example, corresponding automation functions can be graphically represented, and their connections for control and communication can also be graphically depicted. Thus, for a user of the electronic 202413681

[0034] 7

[0035] The computer system should provide a simple overview of how the circuit arrangement is structured and how it communicates.

[0036] Another advantageous design involves using a graphical description of the circuit arrangement as input. For example, corresponding automation functions can already be represented graphically as function blocks. These can then be graphically related to each other as input. The display can then be generated accordingly, depending on the display requirements.

[0037] It has also proven advantageous to transform the graphical description into a textual representation of the circuit layout. This allows, for example, the graphical description to be output and displayed as a textual representation, such as in the form of traces. The trace can then be used, for instance, to create further descriptions of the circuit layout.

[0038] In a further advantageous embodiment, it is provided that a representation of an already existing circuit arrangement is adapted based on the input.

[0039] For example, the existing circuit layout can be represented graphically or textually. Input can then be provided in the form of text or a graphical description, and the circuit layout can be adapted accordingly. This allows existing circuit layouts to be modified and adapted even after the fact.

[0040] In a further advantageous embodiment, it is provided that an operational test of the circuit arrangement is carried out based on the generated representation. Thus, after input, a corresponding operational test can be performed, particularly automatically. For this purpose, appropriate simulations of the automation functions and their dependencies can be performed. Furthermore, corresponding tests can be carried out, for example, before the actual commissioning of the machine. For this purpose, corresponding control signals for the machine can be generated, and sensor signals for the purpose of monitoring the machine can be received from the machine to reliably perform the operational test. These operational tests can be designed as in-field tests. Based on the generated representation, a user can now 202413681

[0041] 8 For example, in the graphical representation, you can understand how the corresponding dependencies are and how the circuit arrangement works in operation.

[0042] It is also advantageous if a test case for an operational test of the circuit arrangement is generated based on the generated representation. In other words, a test case can first be generated based on the generated representation and subsequently executed. Based on the generated representation, various tests can be suggested to perform in order to conduct a comprehensive simulation of the circuit arrangement. Thus, a user can be automatically presented with a test case to perform in order to carry out a corresponding simulation of the circuit arrangement.

[0043] Another advantageous embodiment provides that, based on the display requirements, mutual dependencies of at least two components of the circuit arrangement are shown, and / or communication paths of the at least two components are shown, and / or mutual influences of the at least two components are shown, and / or dependencies on the control of the machine are shown. The components can, for example, be the so-called automation functions. This allows for a corresponding user-specific adaptation of the display based on the display requirements.

[0044] In a further advantageous embodiment, time-dependent changes in the depicted circuit arrangement are also displayed. For example, the behavior of the circuit arrangement can then be observed over a longer period. Thus, the various communication processes and the generation of control signals can be displayed and observed over an extended timeframe. Depending on the display requirements, the relevant information can then be shown, allowing a user to understand the corresponding time-dependent processes within the circuit arrangement.

[0045] In a further advantageous embodiment, the level of detail in the display is adjusted depending on the display requirements. In particular, the granularity of the display can thus be adapted. For example, a user can choose to see only a simple display with a low level of detail of the circuit arrangement. Alternatively, the user can also choose correspondingly more detailed displays.

[0046] 9. For example, communication standards between the components as well as further details of the control functions or automation functions are also displayed.

[0047] It is also advantageous if at least one control signal for controlling the machine is generated based on the generated representation of the circuit arrangement. In particular, for example, after a simulation of the circuit arrangement, it can actually be implemented and corresponding control signals for controlling the machine can be generated and transmitted to the machine.

[0048] The presented method is, in particular, a computer-implemented method. Therefore, a further aspect of the invention relates to a computer program product with program code means which, when the program code means are executed by the electronic computing device, cause a method according to the preceding aspect to be carried out.

[0049] Furthermore, the invention also relates to a computer-readable storage medium with at least one computer program product according to the preceding aspect.

[0050] A further aspect of the invention relates to an electronic computing device for displaying a circuit arrangement for controlling a machine, comprising at least one detection device and a display device, wherein the electronic computing device is configured to carry out a method according to the preceding aspect. In particular, the method is carried out by means of the electronic computing device.

[0051] Advantageous embodiments of the process are to be regarded as advantageous embodiments of the computer program product, the computer-readable storage medium, and the electronic computing device. The electronic computing device possesses tangible features to enable the execution of the corresponding process steps.

[0052] A computing unit / electronic computing device / node can be understood, in particular, as a data processing device that contains a processing circuit. The computing unit can therefore, in particular, process data for performing arithmetic operations.

[0053] 10. This may also include operations to perform indexed access to a data structure, such as a lookup table (LUT).

[0054] The computing unit may, in particular, contain one or more computers, one or more microcontrollers, and / or one or more integrated circuits, for example, one or more application-specific integrated circuits (ASICs), one or more field-programmable gate arrays (FPGAs), and / or one or more systems on a chip (SoCs). The computing unit may also contain one or more processors, for example, one or more microprocessors, one or more central processing units (CPUs), one or more graphics processing units (GPUs), and / or one or more signal processors, in particular one or more digital signal processors (DSPs). The computing unit may also include a physical or virtual array of computers or other units of the aforementioned type.

[0055] In various embodiments, the computing unit includes one or more hardware and / or software interfaces and / or one or more storage units.

[0056] A storage unit can be volatile data storage, for example as dynamic random access memory (DRAM) or static random access memory (SRAM), or as non-volatile data storage, for example as read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory or flash EEPROM, ferroelectric random access memory (FRAM), or magnetoresistive random access memory.It can be designed as MRAM (magnetoresistive random access memory) or as phase-change random access memory, PCRAM (phase-change random access memory).

[0057] For use cases or application situations that may arise in a method according to the invention and that are not explicitly described herein, it may be provided that 202413681

[0058] 11 that, according to the procedure, an error message and / or a request for user feedback is issued and / or a default setting and / or a predetermined initial state is set.

[0059] Regardless of the grammatical gender of a particular term, persons with male, female or other gender identities are included.

[0060] Further features and combinations of features of the invention will become apparent from the figures and their descriptions, as well as from the claims. In particular, further embodiments of the invention need not necessarily include all features of any one of the claims. Further embodiments of the invention may have features or combinations of features that are not mentioned in the claims.

[0061] This shows:

[0062] Fig. 1 shows a schematic block diagram according to an embodiment of an electronic computing device;

[0063] Fig. 2 shows a schematic block diagram according to one embodiment of a circuit arrangement;

[0064] Fig. 3 shows another block diagram according to an embodiment of the circuit arrangement from Fig. 2;

[0065] Fig. 4 shows another schematic block diagram according to one embodiment of a circuit arrangement;

[0066] Fig. 5 shows another schematic block diagram according to the embodiment of the circuit arrangement from Fig. 4;

[0067] Fig. 6 shows another schematic block diagram of a circuit arrangement;

[0068] Fig. 7 shows a schematic block diagram according to an embodiment of the circuit arrangement at a first time point in time; 202413681

[0069] 12

[0070] Fig. 8 shows a further schematic block diagram according to an embodiment of the circuit arrangement from Fig. 7 at a later time; and

[0071] Fig. 9 shows a schematic flowchart according to a chronological sequence for a circuit arrangement.

[0072] In the figures, identical or functionally equivalent elements are provided with the same reference symbols.

[0073] Fig. 1 shows a schematic block diagram according to an embodiment of an electronic computing device 30. The electronic computing device 30 is designed to display a circuit arrangement 10 for controlling a machine 22. The electronic computing device 30 has at least one acquisition device 32 and one display device 40.

[0074] The electronic computing device 30 can be used to provide a method according to the invention for displaying the circuit arrangement 10. This involves acquiring an input 34 to describe the circuit arrangement 10 by means of the acquisition device 32. A display request 36 for displaying the circuit arrangement 10 by means of the acquisition device 32 is acquired. The electronic computing device 30 then generates the display 28 of the circuit arrangement as a function of the input 34 and as a function of the display request 36, and displays the generated display 38 by means of a display device 40 of the electronic computing device 30. For this purpose, a display signal 46 can be transmitted from the electronic computing device to the display device 40.

[0075] In particular, it can be provided that input 34 is a text input describing the circuit arrangement 10. Furthermore, the text input can be transformed into a graphical description of the circuit arrangement 10. Alternatively, input 34 can be a graphical description of the circuit arrangement 10. The graphical description can then be transformed into a textual representation of the circuit arrangement 10.

[0076] Based on input 34, a representation 38 of an existing circuit arrangement 10 is adapted. Furthermore, an operational test of the circuit arrangement 10 can be carried out based on the generated representation. Additionally, based on 202413681

[0077] 13 of the generated representation 38 a test case generation for an operational test of the circuit arrangement 10 is carried out.

[0078] Furthermore, it may be provided that, based on the representation requirement 36, mutual dependencies of at least two components of the circuit arrangement 10 are represented and / or communication paths of the at least two components are represented and / or mutual influences of the at least two components are represented and / or dependencies for the control of the machine 22 are represented.

[0079] Furthermore, it can be provided that time-dependent changes in the depicted circuit arrangement 10 are also displayed. It can also be provided that the level of detail in the representation is adjusted depending on the display requirement 36.

[0080] Furthermore, it can be provided that, based on the generated representation 38 of the circuit arrangement 10, at least one control signal 42 is generated for controlling the machine 22. Additionally, a signal 44 for monitoring the machine can be transmitted from the machine 22 to the electronic computing device 30.

[0081] This invention relates in particular to a domain-specific language (DSL) for capturing interaction patterns in dynamic, time-triggered automation function groups. Statements in this DSL can be represented both graphically and textually. Graphical and textual representations have different syntax but share a common semantic grammar. Graphical and textual statements about static and dynamic properties of seamless upgrades of coupled, time-triggered automation function groups apply this semantic grammar. Dynamically changing structures and interactions in groups of AF instances (AFI) can be automatically checked for compliance with correct behavior according to the proposed DSL during the runtime of a CPS.

[0082] The graphical and textual statements in the DSL describe the interactions between automation function groups, including input and output variables, schedules, conditions, and actions. Using this DSL, developers of cyber-physical systems (CPS) can easily and precisely describe complex interactions between automation function groups, thus improving system reliability and efficiency. The graphical representation also allows non-experts to understand the statements in the DSL.

[0083] 14. Understand and verify what facilitates collaboration between developers and other stakeholders.

[0084] Statements in the proposed DSL are formulated using data channels (DCs) selected in the data space and automation function instances (AFIs) selected in the function space. Together, the selected DCs and AFIs form one or more structured AFI groups and interactions between them.

[0085] The structures of AFI groups (FCP) and interactions (FIP) evolve over time. Property change points (PCP) mark moments on the timeline when properties relevant to a specific task are modified. Structure change points (SCP) are changes in the AF group structure.

[0086] This DSL uses data channels and automation function instances to define interactions between automation function groups. The structures and interactions of the AFI groups change over time, which is represented by property change points (PCPs) and structure change points (SCPs). These concepts enable developers to define complex interactions between automation function groups in CPS and improve their reliability and efficiency.

[0087] A function connection diagram links data channels (DCs) and automation function instances (AFIs). AFIs, DCs, and the data relationships (in, out) between them are valid for a specific time interval between two structural change points.

[0088] A function connection diagram illustrates the relationships between automation function instances and data channels, including input and output data relationships. By using time intervals, developers can precisely define when a particular function or data channel is active, improving system reliability and accuracy. These diagrams also facilitate understanding and verification of interactions between automation function groups in CPS.

[0089] Figures 2 and 3 show a schematic block diagram according to an embodiment of a circuit arrangement 10. In the present embodiment, the circuit arrangement 10 comprises a first electronic computing unit 12 with a first 202413681

[0090] 15

[0091] Automation function 24, a second electronic computing device 14 with a second automation function 26, and a third electronic computing device 16 with a third automation function 28. Corresponding communication can take place via a first communication channel 18 and a second communication channel 20.

[0092] Optional type specifications for automation functions 24, 26, 28, DC, and AF variables, such as S (sensor) and T3 (any data type), enhance the expressiveness, integrity, and accuracy of behavioral descriptions. These types can be adapted to the requirements of the system domain; for example, an automation function 24, 26, or 28 can represent a combined sensor / actuator function and / or a control function without a fieldbus connection.

[0093] Optional type specifications allow developers to precisely define which type of automation function (24, 26, 28) or data / communication channel (18, 20) is used, thus improving the integrity and accuracy of system descriptions. By adapting to the system domain, these types can also help increase the expressiveness of behavior descriptions by supporting a wide range of automation functions (24, 26, 28) and data channels. This option also allows developers to reflect specific requirements of the CPS system in the behavior descriptions.

[0094] Figures 2 and 3 show two semantically equivalent views of the function connection view for the same AF group. The linear view in Figure 2 allows this view to be developed to the right, alongside time, into function interaction views. The area view on the right in Figure 3, on the other hand, emphasizes the input-output relationships between the APIs in the reading direction.

[0095] The following expressions {E1a} to {E1c} highlight different views of the semantically equivalent AF group in Figures 2 and 3, with each view supporting different engineering tasks. The DC view in {E1a} emphasizes the DC in the foreground, which is well-suited for data-centric architectures. The AF view in {E1b}, on the other hand, emphasizes the AFI in the foreground, which is well-suited for component architectures. In {E1c}, the AF-DC view is highlighted by placing the DC in the center, which is well-suited for function and cascade analyses as well as dependency analyses. All these graphical and textual views of the same AF group can be automatically translated into one another. 202413681

[0096] 16

[0097] D1 < AF1 {E1a}

[0098] D2 < AF2

[0099] D1, D2 > AF3

[0100] AF1 > D1 {E1b}

[0101] AF2 > D2

[0102] AF3 < D1, D2

[0103] AF1 > D1 > AF3 {E1c}

[0104] AF2 > D2 > AF3

[0105] Expressions can be annotated with types and provisioning relationships. For example, the typed variant {E2} of {E1c} indicates two physically independent sensors that send data of different types to a single, physically independent actuator.

[0106] AF1 :S@CN1 > D1 :T1 > AF3:A@CN3 {E2}

[0107] AF2:S@CN2 > D2:T2 > AF3:A@CN3

[0108] By annotating expressions with types and deployment relationships, developers can specify precisely how the various components of a CPS system are connected and what kind of data is exchanged between them. This can help improve the integrity and correctness of the system by ensuring that the correct components are connected and the correct types of data are exchanged. In {E2}, for example, specifying the types and physical independence of the sensors and the actuator makes it clear that two different types of sensor data are being sent to a common actuator.

[0109] Typed expressions enable consistency checks and the analysis of resource utilization, data transmission paths, fault container regions, and more.

[0110] By using typed expressions, developers can verify that all components of a CPS system are correctly typed and how they interact with each other. This information can then be used to analyze resource utilization to determine which components require how much processing power, memory, and bandwidth. Furthermore, typed expressions can also help identify error-containing areas by showing how data flows between the system's components.

[0111] 17

[0112] This information is crucial for optimizing the performance and reliability of a CPS system by ensuring it has sufficient resources to operate efficiently and minimizing error-prone areas. Annotating expressions with types allows developers to automatically capture and analyze this information, eliminating the need for manual calculation and tracking.

[0113] Figures 4 and 5 show another schematic block diagram of a further embodiment of a circuit arrangement.

[0114] The AF groups in Figures 2 and 3, as well as 4 and 5, have different semantics. This becomes immediately clear when comparing the two-dimensional views in Figures 3 and 5.

[0115] Figures 2 and 3 show an AF group with semantic meaning for sensors and actuators, focusing on the representation of input / output relationships. Figures 4 and 5, on the other hand, show an AF group with semantic meaning for communication between different components of the CPS system, focusing on the representation of message flows and relationships.

[0116] These differences in semantics become apparent in the two-dimensional views through the different representation of sensors, actuators, and communication components, as well as through the way data flows between them. This information can be important to ensure that the CPS system is configured correctly and functioning as expected.

[0117] The following expressions {E3a} to {E3c} all describe the semantically equivalent AF group in Figures 4 and 5. The symbol separates expressions on the same line. These three expressions are only slightly different in their wording to highlight different aspects of the AF group in Figures 4 and 5. These different views can be useful for considering the AF group from various perspectives and for gaining a better understanding of its properties.

[0118] This symbol is used to separate multiple expressions on the same line, which can help make the code simpler and more readable. This syntax is described in 202413681.

[0119] 18 common in many programming languages ​​and is frequently used to group related instructions or expressions on one line.

[0120] Overall, the expressions {E3a} to {E3c} provide a precise description of the AF group from Fig. 4 and 5 and can help developers to better understand its properties and relationships to other components of the CPS system.

[0121] D1 < AF1 ; D2 < AF2; D1 > AF2; D2 > AF3 {E3a}

[0122] AF1 > D1 ; AF2 < D1 ; AF2 > D2; AF3 < D2 {E3b}

[0123] AF1 > D1 > AF2; AF2 > D2 > AF3 {E3c1}

[0124] AF1 > D1 > AF2 > D2 > AF3 {E3c2}

[0125] {E4} is a typed variant of {E3c2}. {E4} reveals a "perceive-calculate-act" sequence that is fundamental for control loops, especially for robots.

[0126] Annotating {E4} with types highlights a clear "sense-calculate-act" sequence, which is a fundamental principle in the control of GPS systems. This sequence is particularly important for robots, as they use a set of sensors to perceive their environment, perform calculations to make decisions, and control actuators to execute specific actions.

[0127] This view can be helpful for better understanding how a CPS system works and ensuring it is configured correctly to function as expected. By annotating expressions with types, developers can have this information automatically captured and analyzed, instead of having to calculate or track it manually.

[0128] AF1 :S@CN1 > D1 :T1 > AF2:C@CN2 > D2:T2 > AF3:A@CN3 {E4}

[0129] The basic CPS structures shown in Figures 2 to 5 are used to define the DSL (Domain Specific Language). In practice, however, many CPS utilize multiple sensors, actuators, and computational functions on different nodes, as well as multiple data channels for transporting atomic and structured data. 202413681

[0130] 19

[0131] However, if the DSL statements focus on selected aspects that are important for a specific system engineering or operational goal, then simple structures like those sketched in Figures 2 to 5 are also realistic.

[0132] This paragraph emphasizes the importance of selecting the relevant aspects for a specific engineering or operational goal when defining a DSL. Although CPS typically have more complex structures, simple structures can be useful for illustrating the key concepts and relationships between the components of a CPS system.

[0133] This view can also help improve the understanding of the basic principles of CPS systems and provide developers with a basis for dealing with more complex systems.

[0134] Fig. 6 shows another schematic block diagram of an embodiment of a circuit arrangement 10. In particular, a functional interaction view is shown, which links calculation and communication processes via automation function 24, 26, 28 and DC (data channels) during a specific time interval.

[0135] This approach is used to illustrate and analyze the interactions between the various functions in a CPS system. It considers not only the computational operations on the individual nodes, but also the communication processes between them across data channels.

[0136] This perspective can help improve understanding of how a CPS system works and identify potential problems or bottlenecks in communication between different functions. By analyzing these interrelationships, developers can ensure that the system is configured correctly and functioning as expected.

[0137] The time intervals are used to examine the interactions during specific periods, which can be helpful in tracking the system's performance over time and identifying potential bottlenecks or communication problems.

[0138] Function interaction relationship views can be seen as an extension of function connection views, which include a timeline with 202413681

[0139] 20 sequential operations are arranged from left to right and parallel operations from top to bottom.

[0140] The first automation function 24 is created in communication cycle c2 on node CN1, i.e., the first electronic computing device 12; the life cycle of the first automation function 24 begins ({E5a}). The first automation function 24 is deleted in communication cycle c1; the life cycle of the first automation function 24 ends.

[0141] <c2>: +AFa1@CN1 {E5a}

[0142] <c2>: -AFa1@CN1 {E5b}

[0143] Function link views are used to show the connections between the functions of a system, while function interaction views also consider the communication processes and are presented in a time context.

[0144] The lifecycle of the first automation function 24 is used to illustrate its existence duration in the system, starting with its creation in communication cycle c2 on node CN1 and ending with its deletion in communication cycle c1. By visualizing the lifecycle of the first automation function 24, developers can understand how long it exists in the system and how it behaves during its existence.

[0145] These views can help improve the understanding of how a CPS system works and identify potential problems or bottlenecks in communication between the different functions.

[0146] Figures 7 and 8 show another schematic block diagram of an embodiment of a circuit arrangement 10. The input-output interface of an AFI is defined by all data channels (DCs) that an AFI has subscribed to or published at a given time. In a rigorous system environment, required and provided DCs, including type specifications, can be used for static and dynamic type testing. 202413681

[0147] 21

[0148] The first automation function 24 publishes D in communication cycle k1 ({E6a}). The first automation function 24 subscribes to D in communication cycle k1 ({E6b}). The first automation function 24 stops publishing D in communication cycle k1 ({E6c}). The first automation function 24 stops subscribing to D in communication cycle k1 ({E6d}).

[0149] <k1>: AFa1 +> D: AFa1 publishes data channel D {E6a}

[0150] <k1>: AFa1 +< D: AFa1 subscribes data channel D {E6b}

[0151] <k1>: AFa1 -> D: AFa1 stops publication of D {E6c}

[0152] <k1>: AFa1 -< D: AFa1 unsubscribes data channel D {E6d}

[0153] The release of data channels (DCs), the subscribing to DCs, and their recalls are structural change points (< >).

[0154] The following are further examples not shown graphically.

[0155] AFI sends or receives messages in already published data channels (DCs). Sending and receiving messages does not change the structure of an automation function group. Messages are sent and received via DCs between structure change points.

[0156] D was released so that the first automation function 24 in the communication cycle k1 can send a message of type D ({E7a}). D was released so that the first automation function 24 in the communication cycle k1 can send a message with value v ({E7a}). k1 : AFa1 > D {E7a} k1 : AFa1 > D=v {E7b}

[0157] D was published. Subsequently, the first automation function 24 in communication cycle k1 does not send a message of type D ({E8a1}). {E8a2} is a variant of {E8a1} in which the first automation function 24 in communication cycle k23 does not send a message with value v. {E8b} does not receive a message of type D from the first automation function 24 in communication cycle k1. {E8c} does not send an AFI a message of type D in communication cycle k1. 202413681 k1 : AFa1 / > D {E8a1} k23: AFa1 / > D=v {E8a2} k1 : D / > AFa1 {E8b} k1 : / > D {E8c}

[0158] AFIs send and receive messages sequentially or in parallel. D1 and D2 have been published. Subsequently, in {E9a}, two messages are sent sequentially in the successive communication cycles k1 and k2. In {E9b}, two messages are sent in parallel in communication cycle k1. k1 : AFa1 > D1 > AFa2 {E9a} k2: AFa2 > D2 > AFa3 k1 : AFa1 > D1 > AFa3 {E9b} k1 : AFa2 > D2 > AFa3

[0159] A receiving AFI can share a data channel (DC). Likewise, a sending AFI can use the same DC. D has been published. Subsequently, the first control function 24 in communication cycle k1 sends a message of type D (with the same payment content) to all AFIs that have registered for D (the second control function 26 and the third control function 28) according to {E10a}. The first control function 24 receives messages of type D from all AFIs that published D and sent a message of type D in communication cycle k1. The first control function 24 receives a message of type D with the value v from the second control function 26 and another message of type D with the value w from the third control function 28. k1 : AFa1 > D > AFa2, AFa3 {E10a1} k1 : AFa1 > D > * {E10a2} k1 : AFa2, AFa3 > D > AFa1 {E10b1} k1 : AFa* > D > AFa1 {E10b2} k1 : AFa2 > D=v > AFa1 {E10c} k1 : AFa3 > D=w > AFa1 202413681

[0160] 23

[0161] For security, reliability, or technical reasons, different AFIs may use different data channels (DCs), as shown in {11}, instead of a shared DC as in the behaviorally equivalent {E1 Ob}. k1 : AFa1 > D1 > AFa2; AFa1 > D2 > AFa3 {11 a} k1 : AFa2 > D1 > AFa1 ; AFa3 > D2 > AFa1 {E11 b}

[0162] During an interaction, the values ​​in the variables of an AFI remain constant or change, depending on the property of the CPS in focus. Data flows into and between the variables of one or more AFIs. {E12a} focuses on the effects of arithmetic operations on AFI variables. The variables AFal.x and AFa2.x exchange their values. AFal.x changes its value from v at the end of the c1 computation cycle to w at the end of the c2 computation cycle. AFa2.x changes its value from w at the end of c1 to v at the end of c2. c1 : AFa1 ,x=v; AFa2.x=w {E12a} c2: AFa1.x=w; AFa2.x=v

[0163] With the data flow: c1 : AFa1.x=v,w {E12b} k1 : AFa1 > D=v > AFa2 c2: AFa2.x=u,v

[0164] The value of AFa1.x changes from v in cO to w in c1 and sends a D message with the new value v to AFa2 in k1. Upon receiving the D message with the value v, AFa2.x changes the value from u in c1 to v in c2.

[0165] The proposed solution also provides the ability to describe formal properties of seamless upgrades of message-linked, time-triggered automation function groups that can be automatically tested during system runtime. The following property statements serve as examples: Instances of an acting AF control the physical environment exclusively and mutually exclusively; Ready instances of an updatable AF exchange ranks immediately after a trigger; A secondary instance of an updatable AF starts concurrently with the primary instance; Primary instances continue communication during a seamless upgrade; Peer instances of an acting AF control the physical environment exclusively and mutually exclusively.

[0166] 24

[0167] The physical environment of an actuator must not be confused, especially during seamless upgrades where two instances of the same acting AF run in parallel. Only the primary instance i of an acting AF controls actuators. Secondary instances of acting AFs are muted. For safety reasons, it is necessary to require that the outputs of both upgrade-related instances of an AF are never open simultaneously. `never (AF.type=Actuator.id=i.peer=j and AF.id=j).output=open {E13}`

[0168] {E13} always applies, in all computation cycles, for all pairs of instances of peers i and j update-related, actuating AF.

[0169] During a version change, pairs of Automation Function Instances (AFIs) implementing different versions of the same Automation Function (AF) exchange their ranks, i.e., the right to control the AF environment, or in other words, the right to generate AF outputs.

[0170] For example, AFa1B and AFa2G are such an AFI pair. Instance 1 of AF a implements version "Blue" (AFa1B), and instance 2 of the same AF a implements version "Green" (AFa2G). SFu1 is the upgrade service function that coordinates upgrades among the upgradeable AFs.

[0171] Immediately upon receiving a trigger from SFu1, the upgrade utility, AFa1B transitions from primary to secondary status, and AFa2G transitions from secondary to primary status. AFa1B and AFa2G inform SFu of their new ranks. c+0: AF.name=a.id=1,version=Blue.rank=primary / / short: AFa1 B {E14a} c+0: AF.name=a.id=2,version=Green.rank=secondary / / short: AFa2G k+0: SFu1 > command. upgrade=switch > AFa1B, AFa2G c+1 : AF.name=a.id=1 ,version=Blue.rank=secondary c+1 : AF.name=a.id=2.version=Green.rank=primary k+1 : AFa1 B > info.rank=secondary > SFu1 k+1 : AFa2G > info.rank=primary > SFu1 202413681

[0172] 25

[0173] {E12b} combines computational and communication subexpressions and uses the temporal operator "next" to express the same thing as {E14a}.

[0174] (SFu1 > command. upgrade=switch > AFa1B.rank=primary; {E14b}

[0175] SFu1 > command. upgrade=switch > AFa2G.rank=secondary) next

[0176] (AFa1B.rank=secondary > info.rank=secondary > SFu1 ;

[0177] AFa2G.rank=primary > info.rank=primary > SFu1)

[0178] Fig. 9 shows a schematic flowchart according to a temporal sequence for a circuit arrangement 10. During a seamless upgrade, upgradeable AFs go through the same basic lifecycle. A seamless upgrade takes place in characteristic sequences of data and message flows between AFI and SFu. {E15} describes the behavior of the peer instances AFa1B and AFa2G of Afa and groups it into three phases: (1) start the secondary AFI in parallel with the primary AFI, (2) run the primary and secondary AFI concurrently, and (3) start the seamless upgrade. c1+0: AFa1B.rank=primary {E15} k1+0: AFa1B > D:N c1+1: AFa1B.rank=primary; +AFa2G.rank=secondary k1+1: AFa1B > D:N c1+2: AFa1B.rank=primary; AFa2G.rank=secondary k1+2: AFa1B > D:N; AFa2G (+> D:R; +< command, +> info) c1+3: AFa1B.rank=primary; AFa2G.rank=secondary k1+3: AFa1B > D:N; AFa2G > (D:R; info.rank=secondary) c1+4: AFa1B.rank=primary; AFa2G.rank=secondary k1+4: AFa1B > D:N; AFa2G > D:R c1+5: AFa1B.rank=primary; AFa2G.rank=secondary k1+5: AFa1B > D:N; AFa2G > D:R c2+0: AFa1B.rank=primary; AFa2G.rank=secondary k2+0: AFa1B > D:N; AFa2G > D:R c2+n: AFa1B.rank=primary; AFa2G.rank=secondary k2+n: AFa1B > D:N; AFa2G > D:R c3+0: AFa1B.rank=primary; AFa2G.rank=secondary k3+0: AFa1B > D:N; AFa2G > D:R 202413681.

[0179] 26 k3+0: command. upgrade=prepare > AFa1B, AFa2G c3+1: AFa1B.rank=primary; AFa2G.rank=secondary k3+1: AFa1B > (D:N; info. u pg rade= ready); AFa2G > (D:R, info.upgrade=ready)

[0180] For seamless upgrades of upgradeable AFs that run continuously, the secondary AFI is always started in parallel with its respective primary AFI, as outlined in Fig. 9 and described equivalently in {15}. The only difference lies in the number and structure (types) of publication / subscription data communications.

[0181] {15} describes the behavior of AFa's peer instances AFa1B and AFa2G, where AFI is not considered in context, i.e., AFb1B, AFb2G, and SFu1. Therefore, for example, the context-free statement AFa1B > D:N would be read with context as AFa1B > D:N > AFb1B. Publication / subscription data communications enable such loose communication between AF and facilitate the description of focus behavior.

[0182] Provided the communicating AFIs are active and running, {E16a} always applies during normal operation as well as during a seamless upgrade running concurrently. `always (AF.id=i > D > AF.id=j).rank=primary {E16a}`

[0183] {E16} applies in particular to AFa1B and AFb1B in the scenario outlined in Fig. 9 and during the period from k1+3 to k3+1, which is described in {E15}.

[0184] {E16b} is similar to {E16a}, with the extension including the AF instances AFb1B and AFb2G, as well as the publishing / subscription data communication D:N and D:R.

[0185] (AFa1B.id=ai.peer=aj > D:N > AFb1 B.id=bi.peer=bj).rank=primary {E16b} until (AFa2G.id=aj.peer=ai > D:R > AFb2G.id=bj.peer=bi).rank=primary

[0186] Compact statements about AF groups are formulated using Temporal Logic of Meaning (TML) operators, e.g., "never" in {13}, "next" in {14b}, "ever" in {16a}, and "until" in {16b}, as well as wildcards, such as * in {10}. Such TML statements can be verified against detailed, cycle-accurate descriptions of AF groups in AGP, as shown in Fig. 2, and / or interactions between AFs in AIP. TML statements can be tied to specific property change points by being valid only while the selected target AF group exists.

[0187] 27

[0188] Reference symbol list

[0189] 10 Circuit arrangement

[0190] 12 first electronic computing device

[0191] 14 second electronic computing device

[0192] 16 third electronic computing device

[0193] 18 first communication channel

[0194] 20 second communication channel

[0195] 22 machine

[0196] 24 first automation function

[0197] 26 second automation function

[0198] 28 third automation function

[0199] 30 electronic computing devices

[0200] 32 Recording device

[0201] 34 Input

[0202] 36 Display requirement

[0203] 38 illustration

[0204] 40 Display unit

[0205] 42 Control signal

[0206] 44 Signal

[0207] 46 Display signal

Claims

202413681 28 Patent claims 1. Method for displaying a circuit arrangement (10) for controlling a machine (22) by means of an electronic computing device (30), comprising the steps: - Capturing an input (34) to describe the circuit arrangement (10) by means of a capture device (32) of the electronic computing device (30); - Capturing a display request (36) to display the circuit arrangement (10) using the detection device (32); - Generating the representation (38) of the circuit arrangement (10) depending on the input (34) and depending on the representation requirement (36) by means of the electronic computing device (30); and - Displaying the generated representation (38) by means of a display device (40) of the electronic computing device (30).

2. Method according to claim 1, characterized in that the input (34) is a text input for describing the circuit arrangement (10).

3. Method according to claim 2, characterized in that the text input is transformed into a graphical description of the circuit arrangement (10).

4. Method according to claim 1, characterized in that a graphical description of the circuit arrangement (10) is captured as input (34).

5. Method according to claim 4, characterized in that the graphical description is transformed into a textual representation of the circuit arrangement (10).

6. Method according to one of the preceding claims, characterized in that a representation (38) of an already existing circuit arrangement (10) is adapted on the basis of the input (34).

7. Method according to one of the preceding claims, characterized in that 202413681 29 Based on the generated representation (38) an operational test of the circuit arrangement (10) is carried out.

8. Method according to one of the preceding claims, characterized in that a test case generation for an operational test of the circuit arrangement (10) is carried out on the basis of the generated representation (38).

9. Method according to one of the preceding claims, characterized in that, based on the representation requirement (36), mutual dependencies of at least two components of the circuit arrangement (10) are represented and / or communication paths of the at least two components are represented and / or mutual influences of the at least two components are represented and / or dependencies for the control of the machine (22) are represented.

10. Method according to one of the preceding claims, characterized in that time-dependent changes in the illustrated circuit arrangement (10) are also displayed.

11. Method according to one of the preceding claims, characterized in that the level of detail of the representation (28) is adjusted depending on the representation requirement (36).

12. Method according to one of the preceding claims, characterized in that at least one control signal (42) for controlling the machine (22) is generated on the basis of the generated representation (38) of the circuit arrangement (10).

13. Computer program product comprising program code means which cause an electronic computing device (30) to perform a method according to one of claims 1 to 12 when the program code means are processed by the electronic computing device (30).

14. Computer-readable storage medium comprising at least one computer program product according to claim 13.

15. Electronic computing device (30) for displaying a circuit arrangement (10) for controlling a machine (22), with at least one detection device (32) and 202413681 30 of a display device (40), wherein the electronic computing device (30) is configured to perform a method according to one of claims 1 to 12.

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