Composite substrate and surface acoustic wave element
The composite substrate with an amorphous silicon layer and dielectric layer addresses electrical loss issues in SAW filters by enhancing volume resistivity, resulting in high-performance SAW filters.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-09-03
- Publication Date
- 2026-04-09
AI Technical Summary
Existing composite substrates used in SAW filters suffer from significant electrical losses, necessitating further improvements in suppressing these losses.
A composite substrate design incorporating an amorphous silicon layer with specific Raman spectrum characteristics, including a full width at half maximum of 95 cm⁻¹ or less and a TA/TO peak intensity ratio of 0.485 or less, along with a dielectric layer, to enhance volume resistivity and reduce electrical losses.
The proposed composite substrate significantly suppresses electrical losses, enabling the production of high-performance SAW filters with improved electrical properties.
Smart Images

Figure JP2025031177_09042026_PF_FP_ABST
Abstract
Description
Composite substrates and surface acoustic wave elements
[0001] This invention relates to a composite substrate and a surface acoustic wave element.
[0002] Communication devices such as mobile phones use filters that utilize surface acoustic waves (SAW filters) to extract electrical signals of arbitrary frequencies. SAW filters use composite substrates having a piezoelectric layer and a support substrate. As a technique to suppress electrical losses in such composite substrates, composite substrates with a charge trap layer between the piezoelectric layer and the support substrate have been proposed (for example, Patent Documents 1 and 2). On the other hand, there is a continuing demand for further improvement in suppressing electrical losses in composite substrates, and further improvements are desired.
[0003] Special Publication No. 2023-544271 Patent No. 6612872
[0004] The main object of the present invention is to provide a composite substrate that includes an amorphous silicon layer having high volume resistivity and in which electrical losses are significantly suppressed.
[0005] [1] A composite substrate according to one embodiment of the present invention comprises a support substrate, an amorphous silicon layer, and a piezoelectric layer in this order, wherein the full width at half maximum of the TO peak in the Raman spectrum of the amorphous silicon layer is 95 cm -1 ) The following: [2] A composite substrate according to another embodiment of the present invention has a support substrate, an amorphous silicon layer, and a piezoelectric layer in this order, wherein the TA / TO peak intensity ratio in the Raman spectrum of the amorphous silicon layer is 0.485 or less. [3] In [1] or [2] above, the thickness of the amorphous silicon layer is 5 nm to 3000 nm. [4] In any of [1] to [3] above, the composite substrate further has a dielectric layer between the amorphous silicon layer and the piezoelectric layer. [5] In any of [1] to [4] above, the average hydrogen content of the amorphous silicon layer is 5.0 × 10 21(atoms / cc) or less, and the amorphous silicon layer has a region in the thickness direction where the hydrogen content increases toward the piezoelectric layer. [6] In any of [1] to [5] above, the composition ratio O / Si of silicon to oxygen in the amorphous silicon layer is 0.2 or less, and the amorphous silicon layer has a region in the thickness direction where the composition ratio O / Si increases toward the piezoelectric layer. [7] According to another aspect of the present invention, a surface acoustic wave element is provided. The surface acoustic wave element has a composite substrate in any of [1] to [6] above.
[0006] According to embodiments of the present invention, a composite substrate can be realized that includes an amorphous silicon layer having high volume resistivity and in which electrical losses are significantly suppressed.
[0007] This is a schematic cross-sectional view of a composite substrate according to an embodiment of the present invention. This is a schematic cross-sectional view illustrating one step in the manufacturing method
[0008] Embodiments of the present invention will be described below with reference to the drawings, but the present invention is not limited to these embodiments. Note that the drawings are schematic for clarity, and the thickness, length, width, shape, proportions, etc., do not accurately reflect the actual shape.
[0009] A. Composite Substrate A-1. Schematic Figure 1 of the composite substrate is a schematic cross-sectional view of a composite substrate according to an embodiment of the present invention. The composite substrate 100 in the illustrated example has a support substrate 10, an amorphous silicon layer 20, and a piezoelectric layer 40 in this order. If necessary, a dielectric layer 30 may be provided between the amorphous silicon layer 20 and the piezoelectric layer 40, as shown in the illustrated example. In one embodiment, the full width at half maximum of the TO peak in the Raman spectrum of the amorphous silicon layer 20 is 95 cm. -1) The following. In another embodiment, the TA / TO peak intensity ratio in the Raman spectrum of the amorphous silicon layer 20 is 0.485 or less. The TO peak in the Raman spectrum means a peak composed of the transverse optical vibration mode. The TA peak means a peak composed of the transverse acoustic vibration mode. That the full width at half maximum of the TO peak and the TA / TO peak intensity ratio are in the above ranges means that the local order of the amorphous silicon layer, more specifically the variation in the bond angle, becomes smaller. As a result, when the full width at half maximum is around 95 (cm -1 ) or the TA / TO peak intensity ratio is around 0.490, there may exist a critical boundary where the volume resistivity of the amorphous silicon layer increases by one order of magnitude. Further, as the full width at half maximum or the TA / TO peak intensity ratio decreases, the volume resistivity of the amorphous silicon layer may increase exponentially. For example, when the full width at half maximum is around 82 (cm -1 ) or the TA / TO peak intensity ratio is around 0.44, the volume resistivity of the amorphous silicon layer can increase up to nearly 1000 times compared to the case where the full width at half maximum is around 94 (cm -1 ) or the TA / TO peak intensity ratio is around 0.48.
[0010] The full width at half maximum of the TO peak is, for example, 92 (cm -1 ) or less, preferably 90 (cm -1 ) or less, more preferably 88 (cm -1 ) or less, still more preferably 87 (cm -1 ) or less, particularly preferably 85 (cm -1 ) or less, and especially preferably 83 (cm -1 ) or less. If the full width at half maximum of the TO peak is in such a range, the effects according to the embodiments of the present invention can become more remarkable. The full width at half maximum of the TO peak can be, for example, 68 (cm -1 ) or more, and can also be, for example, 70 (cm -1 ) or more.
[0011] The TA / TO peak intensity ratio is, for example, 0.480 or less, preferably 0.475 or less, more preferably 0.470 or less, even more preferably 0.465 or less, particularly preferably 0.460 or less, and especially preferably 0.450 or less. When the TA / TO peak intensity ratio is within this range, the effects of the embodiments of the present invention may become even more pronounced. The TA / TO peak intensity ratio may be, for example, 0.300 or more, or for example, 0.350 or more.
[0012] The components of the composite substrate will be explained in detail below.
[0013] A-2. Support Substrate Any suitable substrate can be used as the support substrate 10. The support substrate may be made of a single crystal, a polycrystalline material, or a combination thereof. Examples of materials that make up the support substrate include silicon, sapphire, sialon, cordierite, mullite, glass, quartz, crystal, alumina, germanium, silicon carbide, gallium nitride, indium phosphide, and aluminum nitride.
[0014] The silicon described above may be single-crystal silicon, which may have a polycrystalline layer formed on its surface, or it may be high-resistance silicon.
[0015] The thermal expansion coefficient of the material constituting the support substrate is preferably smaller than that of the material constituting the piezoelectric layer, which will be described later. With such a support substrate, changes in the shape and size of the piezoelectric layer when the temperature changes can be suppressed, and for example, changes in the frequency characteristics of the resulting surface acoustic wave element can be suppressed.
[0016] Any appropriate thickness can be used for the support substrate. For example, the thickness of the support substrate may be 100 μm to 1000 μm (1 mm).
[0017] The arithmetic mean roughness Ra of the amorphous silicon layer surface of the support substrate can be, for example, 0.1 nm to 1.0 nm, 0.2 nm to 0.8 nm, 0.3 nm to 0.7 nm, or 0.4 nm to 0.6 nm. With such a support substrate, for example, a high-performance (for example, one with a high Q factor) surface acoustic wave element can be obtained. Note that the arithmetic mean roughness Ra is a value measured by an atomic force microscope (AFM) in a field of view of 10 μm × 10 μm.
[0018] A-3. Amorphous Silicon Layer The amorphous silicon layer 20 is composed of amorphous silicon, as its name suggests, and may contain hydrogen and oxygen atoms. When the amorphous silicon layer and the support substrate are directly bonded, for example by a surface activation method as described later, the amorphous silicon layer may further contain argon atoms. The amorphous silicon layer has the following advantages: Polycrystalline silicon requires adjustments such as optimizing the grain size of the columnar structure to obtain predetermined properties, but amorphous silicon does not have grain boundaries and has an isotropic atomic arrangement, so such adjustments are not necessary.
[0019] The average hydrogen content in the amorphous silicon layer is preferably 5.0 × 10⁻⁶. 21 (atoms / cc) or less, more preferably 2.5 × 10 21 (atoms / cc) or less, and more preferably 1.0 × 10 21 The average hydrogen content is less than or equal to (atoms / cc), and particularly preferably below the detection limit. If the average hydrogen content is within this range, crystallization of the amorphous silicon layer can be suppressed.
[0020] The amorphous silicon layer preferably has a region in the thickness direction where the hydrogen content increases toward the piezoelectric layer side. The "region where the hydrogen content increases" may be a region where the hydrogen content increases continuously or stepwise over the entire thickness direction or a part thereof of the amorphous silicon layer, or it may be a region having a hydrogen content higher than the average hydrogen content formed on the piezoelectric layer side of the amorphous silicon layer. With such a configuration, when bonding to the support substrate via the amorphous silicon layer, the amount of hydrogen on the surface side of the amorphous silicon layer decreases, resulting in fewer unbonded bonds and easier activation, thus enabling sufficient bonding strength to be obtained. The hydrogen content can be measured, for example, by secondary ion mass spectrometry (SIMS).
[0021] The silicon-to-oxygen composition ratio O / Si (based on atomic percent) in the amorphous silicon layer is preferably 0.20 or less, more preferably 0.15 or less, even more preferably 0.10 or less, and particularly preferably below the detection limit. When the composition ratio O / Si is within this range, the amorphous silicon is more easily activated when bonding to the support substrate via the amorphous silicon layer, so that a composite substrate with sufficient bonding strength can be obtained. The composition ratio O / Si can be calculated, for example, from the silicon concentration and oxygen concentration obtained by energy-dispersive X-ray spectroscopy (TEM-EDX) using a transmission electron microscope.
[0022] Preferably, the amorphous silicon layer has a region in the thickness direction where the composition ratio O / Si increases toward the piezoelectric layer. In other words, the amorphous silicon layer has a region in the thickness direction where the oxygen content increases toward the piezoelectric layer. The "region where the oxygen content increases" may be a region where the oxygen content increases continuously or stepwise over the entire thickness direction or a part thereof of the amorphous silicon layer, or it may be a region having an oxygen content higher than the average oxygen content formed on the piezoelectric layer side of the amorphous silicon layer. With such a configuration, when bonding to the support substrate via the amorphous silicon layer, the amount of hydrogen on the surface side of the amorphous silicon layer decreases, making it easier to maintain an activated state, and thus sufficient bonding strength can be obtained.
[0023] The thickness of the amorphous silicon layer is preferably 5 nm to 3000 nm (3 μm), more preferably 50 nm to 2000 nm, even more preferably 100 nm to 1000 nm, particularly preferably 200 nm to 800 nm, and especially preferably 400 nm to 600 nm.
[0024] The arithmetic mean roughness Ra of the surface of the amorphous silicon layer on the supporting substrate side can be, for example, 0.1 nm to 1.0 nm, or for example, 0.2 nm to 0.8 nm, or for example, 0.3 nm to 0.7 nm, or for example, 0.4 nm to 0.6 nm. With such a configuration, a composite substrate with sufficient bonding strength can be obtained.
[0025] A-4. Piezoelectric layer Any suitable piezoelectric material can be used as the material constituting the piezoelectric layer 40. Preferably, LiAO is used as the piezoelectric material. 3 A single crystal having the following composition is used. Here, A is one or more elements selected from the group consisting of niobium and tantalum. Specifically, LiAO 3 Lithium niobate (LiNbO) 3 ) may also be lithium tantalate (LiTaO 3 ) may be a lithium niobate-lithium tantalate solid solution. Other examples of piezoelectric materials include silicon, quartz, silica, silicon carbide, gallium nitride, indium phosphide, and lead zirconate titanate (PZT).
[0026] When the piezoelectric material is lithium tantalate, the cut angle can be appropriately set depending on the purpose. For example, the piezoelectric layer is aligned with the X-axis (crystal axis) of the piezoelectric material in the direction of surface wave propagation (X 1 When this is the case, the direction rotated 32° to 55° (for example, 42°) from the Y-axis toward the Z-axis is the direction perpendicular to the main surface of the piezoelectric layer (X 3 It is preferable that the angle corresponds to (180°, 58° to 35°, 180°) in Euler angle notation.
[0027] When the piezoelectric material is lithium niobate, the cut angle can be appropriately set according to the purpose. For example, when the X-axis (crystal axis) of the piezoelectric material is the propagation direction of the surface acoustic wave (X 1 ), the direction rotated 0° to 40° (e.g., 37.8°) from its Z-axis toward the -Y-axis corresponds to the direction perpendicular to the main surface of the piezoelectric layer (X 3 ), specifically, it is preferably (0°, 0° to 40°, 0°) in Euler angle representation. When the piezoelectric material is lithium niobate, the piezoelectric layer, for example, when the X-axis (crystal axis) of the piezoelectric material is the propagation direction of the surface acoustic wave (X 1 ), the direction rotated 40° to 65° from its Y-axis toward the Z-axis corresponds to the direction perpendicular to the main surface of the piezoelectric layer (X 3 ), specifically, it is preferably (180°, 50° to 25°, 180°) in Euler angle representation.
[0028] The thickness of the piezoelectric layer is, for example, 30 μm (30000 nm) or less, preferably 10 μm or less, more preferably 5 μm or less, still more preferably 3 μm or less, and particularly preferably 1.5 μm or less. According to such a thickness, for example, a high-performance (e.g., having good temperature characteristics and a high Q value) surface acoustic wave device can be obtained. On the other hand, the thickness of the piezoelectric layer can be, for example, 0.05 μm (50 nm) or more, and can also be, for example, 0.2 μm or more.
[0029] The arithmetic mean roughness Ra of the surface of the piezoelectric layer on the amorphous silicon layer side can be, for example, 1.0 nm or less, can also be, for example, 0.8 nm or less, can also be, for example, 0.6 nm or less, and can also be, for example, 0.4 nm or less. On the other hand, the arithmetic mean roughness Ra can be, for example, 0.1 nm or more, and can also be, for example, 0.2 nm or more. According to such a piezoelectric layer, for example, a high-performance (e.g., having a high Q value) surface acoustic wave device can be obtained.
[0030] A-5. Dielectric Layer The dielectric layer 30 is an optional layer provided as needed. By providing the dielectric layer, the stability of the temperature characteristics of the composite substrate can be improved. As the material constituting the dielectric layer, any suitable dielectric material can be used. Examples of the dielectric material include silicon oxide, silicon nitride, silicon oxynitride (a compound of silicon, oxygen, and nitrogen), aluminum oxide, aluminum nitride, and aluminum oxynitride (a compound of aluminum, oxygen, and nitrogen). The dielectric layer may be a single layer or may have a laminated structure composed of a plurality of layers made of different dielectric materials. For example, the dielectric layer may be a single layer of silicon oxide or may have a laminated structure of silicon oxide and silicon oxynitride, or silicon oxide and silicon nitride.
[0031] The thickness of the dielectric layer may be, for example, 100 nm to 1000 nm, or for example, 200 nm to 800 nm, or for example, 300 nm to 700 nm, or for example, 400 nm to 600 nm.
[0032] The dielectric layer can be formed by any suitable method. Specific examples of the method for forming the dielectric layer include sputtering, CVD, and ion assist evaporation.
[0033] B. Manufacturing Method of Composite Substrate B-1. Outline of Manufacturing Method of Composite Substrate The manufacturing method of the composite substrate according to an embodiment of the present invention includes, in this order, forming an amorphous silicon layer on one side of a piezoelectric substrate, smoothing the amorphous silicon layer, bonding the amorphous silicon layer and a support substrate, and thinning the piezoelectric substrate to form a piezoelectric layer. In an embodiment of the present invention, the amorphous silicon layer is heat-treated at 200°C to 600°C in an atmosphere of air or an inert gas.
[0034] Hereinafter, an example of the manufacturing method will be described with reference to FIGS. 2A to 2D. Note that FIG. 2D has the same content as FIG. 1.
[0035] B-2. Formation of the Amorphous Silicon Layer First, a piezoelectric substrate 40' is prepared. The piezoelectric substrate is thinned to form a piezoelectric layer, as described later. Therefore, the materials constituting the piezoelectric substrate are as described in section A-4 above with respect to the piezoelectric layer. The thickness of the piezoelectric substrate may be, for example, 100 μm to 1000 μm (1 mm), or for example, 200 μm to 500 μm. The surface on which the amorphous silicon layer of the piezoelectric substrate is formed can be polished to have an arithmetic mean roughness Ra of, for example, 0.1 nm to 1.0 nm, or for example, 0.2 nm to 0.4 nm. Any suitable polishing method can be used. Examples of polishing methods include lapping and chemical mechanical polishing (CMP).
[0036] Next, as shown in Figure 2A, an amorphous silicon layer 20 is formed on the polished surface of the piezoelectric substrate 40'. Alternatively, as shown in Figure 2B, a dielectric layer 30 may be formed on the polished surface of the piezoelectric substrate 40', and then the amorphous silicon layer 20 may be formed. Any suitable method can be used to form the amorphous silicon layer and the dielectric layer. A typical example of a formation method is sputtering. The thickness of the formed amorphous silicon layer is preferably 5 nm to 3000 nm, as described in section A-3 above.
[0037] In one embodiment, during the formation of an amorphous silicon layer, regions may be formed in which the hydrogen and oxygen content decreases as the amorphous silicon layer is deposited. As a result, the amorphous silicon layer of the resulting composite substrate may have regions in the thickness direction in which the hydrogen content increases toward the piezoelectric layer and / or regions in which the composition ratio O / Si increases. It can be inferred that these regions with reduced hydrogen and oxygen content may be formed because residual moisture in the deposition chamber is incorporated into the deposited amorphous silicon layer, and the residual moisture in the deposition chamber decreases as the deposition progresses.
[0038] B-3. Smoothing treatment of the amorphous silicon layer Next, the amorphous silicon layer 20 (the exposed surface thereof) is subjected to a smoothing treatment. Through the smoothing treatment, the surface of the amorphous silicon layer can be polished to have an arithmetic mean roughness Ra of, for example, 0.1 nm to 1.0 nm.
[0039] B-4. Bonding the amorphous silicon layer to the support substrate Next, the support substrate 10 is prepared. The surface of the support substrate to be bonded to the amorphous silicon layer may be polished so that the arithmetic mean roughness Ra is, for example, 0.1 nm to 1.0 nm.
[0040] Next, as shown in Figure 2C, the amorphous silicon layer 20 and the support substrate 10 are joined. Note that Figure 2C shows an embodiment including a dielectric layer 30. Any suitable method can be used for joining. Examples of joining methods include bonding with adhesive, surface activation bonding, plasma activation bonding, and atomic diffusion bonding. So-called direct bonding without adhesive may also be used. Direct bonding is preferred. Direct bonding allows for thinning of the composite substrate and prevents adverse effects from adhesives. For example, direct bonding by surface activation bonding can be achieved by the following procedure: In a high vacuum chamber (e.g., 1 × 10⁻⁶) -6 At a pressure of approximately Pa, a neutralization beam is irradiated onto the bonding surfaces of the amorphous silicon layer and the support substrate. This activates each bonding surface. Next, the activated bonding surfaces are brought into contact in a vacuum atmosphere and bonded at room temperature. The load during this bonding can be, for example, 100 N to 20,000 N. In one embodiment, when performing surface activation with a neutralization beam, an inert gas is introduced into the chamber, and a high voltage is applied from a DC power supply to electrodes placed in the chamber. In such a configuration, electrons move due to the electric field generated between the electrode (positive electrode) and the chamber (negative electrode), and a beam of atoms and ions from the inert gas is generated. Of the beam that reaches the grid, the ion beam is neutralized at the grid, so a beam of neutral atoms is emitted from the high-speed atomic beam source. The atomic species constituting the beam are preferably inert gas elements (for example, argon (Ar), nitrogen (N)). The voltage during activation by beam irradiation is, for example, 0.5 kV to 2.0 kV, and the current is, for example, 50 mA to 200 mA.
[0041] B-5. Thinning of the piezoelectric substrate (formation of the piezoelectric layer) Next, as shown in Figure 2D, the piezoelectric substrate 40' is thinned to form the piezoelectric layer 40. Specifically, as described above, a piezoelectric substrate with a thickness of about 100 μm to 1000 μm is polished to thin it and form the piezoelectric layer 40. The thickness after polishing (i.e., the thickness of the piezoelectric layer) can be, for example, 50 nm to 30000 nm, or for example, 200 nm to 1500 nm, as explained in section A-4 above.
[0042] B-6. Heat Treatment In the embodiments of the present invention, the amorphous silicon layer is subjected to heat treatment as described above. By performing the heat treatment, an amorphous silicon layer having the desired full width at half maximum of the TO peak or the TA / TO peak intensity ratio in the Raman spectrum, and as a result having a high volume resistivity, can be formed. In this specification, "the amorphous silicon layer is subjected to heat treatment" means that at least the amorphous silicon layer is subjected to heat treatment, and it is possible to heat treat only the amorphous silicon layer, or to heat treat a laminate including the amorphous silicon layer. Substantively, a laminate including the amorphous silicon layer can be subjected to heat treatment.
[0043] The heat treatment may be performed at any appropriate time. Specifically, the heat treatment may be performed before the smoothing treatment of the amorphous silicon layer, after the smoothing treatment of the amorphous silicon layer and before bonding of the support substrate, after bonding of the support substrate and before thinning of the piezoelectric substrate, during the thinning of the piezoelectric substrate, or after thinning of the piezoelectric substrate (after the piezoelectric layer is formed).
[0044] Heat treatment can typically be carried out in an air or inert gas atmosphere.
[0045] The heating temperature is, for example, 200°C to 600°C, preferably 300°C to 590°C, more preferably 400°C to 580°C, and even more preferably 500°C to 550°C. If the heating temperature is within this range, an amorphous silicon layer having the desired TO peak full width at half maximum and TA / TO peak intensity ratio can be formed without the silicon crystallizing. The heating rate and the cooling rate after heating are not particularly limited. The heating rate and cooling rate may be, for example, 10°C / min or less, and may be, for example, 0.5°C / min to 5°C / min.
[0046] The heating and holding time is preferably 0.25 hours or more, more preferably 2 hours or more, even more preferably 3 hours or more, and particularly preferably 4 hours or more. If the heating time is within this range, an amorphous silicon layer having the desired TO peak full width at half maximum and TA / TO peak intensity ratio can be formed. As the heating and holding time increases, the changes in the TO peak full width at half maximum and TA / TO peak intensity ratio become more gradual, so the upper limit of the heating and holding time can be set from the viewpoint of manufacturing efficiency. Specifically, the upper limit of the heating and holding time may be, for example, 10 hours, or for example, 8 hours, or for example, 6 hours.
[0047] As described above, a composite substrate 100 as shown in Figure 2D can be obtained.
[0048] C. Surface Acoustic Wave Element The composite substrate according to the embodiment of the present invention can be applied to a surface acoustic wave element. Therefore, a surface acoustic wave element including the composite substrate according to the embodiment of the present invention can also be included in the embodiments of the present invention. A surface acoustic wave element typically has the above-mentioned composite substrate and electrodes (comb-type electrodes) provided on the piezoelectric layer side of the composite substrate. Such a surface acoustic wave element is suitably used, for example, as a SAW filter in communication equipment such as mobile phones.
[0049] The present invention will be specifically described below with reference to examples, but the present invention is not limited to these examples. The measurement methods for each characteristic in the examples are as follows. Unless otherwise specified, the "%" in the examples is based on weight.
[0050] (1) TO peak full width at half maximum and TA / TO peak intensity ratio. The composite substrates obtained in the examples and comparative examples were subjected to Raman spectroscopy measurements, and the obtained Raman spectra were derived. The specific procedure was as follows: The composite substrate was obliquely polished from the piezoelectric layer side at a bevel angle of 0.005°. Laser light was irradiated onto the amorphous silicon layer through the portion of the dielectric layer exposed by the polishing, where the thickness was several tens of nanometers, and the Raman spectrum of the amorphous silicon layer was obtained. The reason for irradiating the amorphous silicon layer with laser light through the dielectric layer is that if the laser light is irradiated directly onto the amorphous silicon layer, the Raman scattering intensity will be weak, so the measurement was performed through the dielectric layer which does not affect the Raman shift. The evaluation range of the Raman spectrum was 100 cm. -1 ) ~ 1200 (cm -1 ) was 100 (cm -1 ) ~ 600 (cm -1 The range of ) was extracted, and the components of each phonon (LO, LA, TO, TA) were peak-fitted using a mixed function of Gaussian and Lorentz functions, and the peak position, full width at half maximum, and peak intensity were analyzed. The analysis conditions were as follows: Instrument: LabRAM HR Evolution, Horiba, Ltd. Excitation wavelength: 532 nm Excitation light intensity: 0.6 mW Integration time: 30 seconds Number of integrations: 3 Slit width: 100 μm Hole diameter: 300 μm Objective lens: 100x Detector: CCD Environment: Room temperature, air
[0051] (2) The hydrogen content in the amorphous silicon layer was measured by secondary ion mass spectrometry (SIMS).
[0052] (3) Composition ratio O / Si in the amorphous silicon layer Energy-dispersive X-ray spectroscopy (TEM-EDX) was performed on the cross-section of the amorphous silicon layer of the composite substrates obtained in the examples and comparative examples, and the silicon concentration and oxygen concentration were calculated from the obtained results.
[0053] (4) Crystallinity of the amorphous silicon layer The amorphous silicon layer of the composite substrates obtained in the examples and comparative examples was subjected to electron diffraction to confirm its crystallinity.
[0054] (5) Volume resistivity of the amorphous silicon layer The sheet resistivity of the amorphous silicon layer was measured, and the volume resistivity was calculated from the obtained sheet resistivity and the thickness of the amorphous silicon layer. The sheet resistivity was measured using a USR probe with a "High Resta-UX MCP-HT800" manufactured by Nitto Seiko Analytech Co., Ltd. The optical film thickness obtained with a reflection spectrometer was used as the thickness of the amorphous silicon layer.
[0055] <Example 1> As the piezoelectric substrate, a lithium tantalate substrate (LT substrate) with an orientation flat (OF) portion, a diameter of 4 inches, and a thickness of 250 μm was used. The LT substrate used was a 46° Y-cut X-propagation LT substrate, where the propagation direction of surface acoustic waves (SAW) was X and the cutting angle was a rotational Y-cut plate. The surface of the LT substrate was mirror-polished to an arithmetic mean roughness Ra of 0.3 nm. The arithmetic mean roughness was evaluated using an atomic force microscope (AFM) in a square field of view of 10 μm x 10 μm. On the other hand, as the support substrate, a silicon substrate with an OF portion, a diameter of 4 inches, and a thickness of 230 μm was prepared. The arithmetic mean roughness Ra of the support substrate surface was 0.5 nm. SiO was sputtered onto the LT substrate. 2 A dielectric layer was formed by depositing a film with a thickness of 500 nm. Subsequently, an amorphous silicon layer with a thickness of 500 nm was deposited on the dielectric layer by sputtering. The laminate of the LT substrate (piezoelectric substrate) / dielectric layer / amorphous silicon layer was subjected to heat treatment. The heat treatment was carried out under a nitrogen atmosphere. The heating was increased from room temperature to 200°C at a rate of 1°C / min, held at 200°C for 5 hours, and then cooled to room temperature at a rate of 1°C / min. Next, the surface of the amorphous silicon layer was smoothed by lapping. The arithmetic mean roughness Ra of the smoothed amorphous silicon layer surface was 0.5 nm. Next, the smoothed amorphous silicon layer and the support substrate were directly bonded by a surface activation method. Finally, the LT substrate was polished from its initial thickness of 250 μm to 1000 nm (1 μm) to form a piezoelectric layer. A composite substrate was obtained in this manner. The obtained composite substrates were subjected to the evaluations described in (1) to (5) above. The results are shown in Table 1.
[0056] <Example 2> A composite substrate was obtained in the same manner as in Example 1, except that the heating temperature was set to 300°C, that is, the laminate of LT substrate / dielectric layer / amorphous silicon layer was heated from room temperature to 300°C at a rate of 1°C / min, held at 300°C for 5 hours, and then cooled down to room temperature at a rate of 1°C / min. The obtained composite substrate was subjected to the same evaluation as in Example 1. The results are shown in Table 1.
[0057] <Example 3> A composite substrate was obtained in the same manner as in Example 1, except that the heat treatment was performed in air and the heating temperature was 300°C. The obtained composite substrate was subjected to the same evaluation as in Example 1. The results are shown in Table 1.
[0058] <Example 4> A composite substrate was obtained in the same manner as in Example 1, except that the heating temperature was set to 400°C. The obtained composite substrate was subjected to the same evaluation as in Example 1. The results are shown in Table 1.
[0059] <Example 5> A composite substrate was obtained in the same manner as in Example 1, except that a piezoelectric substrate was thinned to form a piezoelectric layer and then subjected to heat treatment. The obtained composite substrate was subjected to the same evaluation as in Example 1. The results are shown in Table 1.
[0060] <Example 6> A composite substrate was obtained in the same manner as in Example 1, except that the heating temperature was set to 600°C. The obtained composite substrate was subjected to the same evaluation as in Example 1. The results are shown in Table 1.
[0061] <Comparative Example 1> A composite substrate was obtained in the same manner as in Example 1, except that no heat treatment was performed. The obtained composite substrate was subjected to the same evaluation as in Example 1. The results are shown in Table 1.
[0062] <Comparative Example 2> A composite substrate was obtained in the same manner as in Example 1, except that the heating temperature was set to 100°C. The obtained composite substrate was subjected to the same evaluation as in Example 1. The results are shown in Table 1.
[0063]
[0064] <Evaluation> As is clear from Table 1, according to the embodiments of the present invention, a composite substrate containing an amorphous silicon layer having a high volume resistivity can be obtained by performing a heat treatment at a predetermined temperature.
[0065] A composite substrate according to an embodiment of the present invention can be suitably used, for example, in a surface acoustic wave device.
[0066] 10 Support substrate 20 Amorphous silicon layer 30 Dielectric layer 40 Piezoelectric layer 40' Piezoelectric substrate 100 Composite substrate
Claims
1. The device comprises a support substrate, an amorphous silicon layer, and a piezoelectric layer in this order, wherein the full width at half maximum of the TO peak in the Raman spectrum of the amorphous silicon layer is 95 cm. -1 The following are composite substrates.
2. A composite substrate comprising a support substrate, an amorphous silicon layer, and a piezoelectric layer in that order, wherein the TA / TO peak intensity ratio in the Raman spectrum of the amorphous silicon layer is 0.485 or less.
3. The composite substrate according to claim 1 or 2, wherein the thickness of the amorphous silicon layer is 5 nm to 3000 nm.
4. The composite substrate according to claim 1 or 2, further comprising a dielectric layer between the amorphous silicon layer and the piezoelectric layer.
5. The average hydrogen content of the amorphous silicon layer is 5.0 × 10 21 The composite substrate according to claim 1 or 2, wherein the (atoms / cc) is less than or equal to (atoms / cc), and the amorphous silicon layer has a region in the thickness direction in which the hydrogen content increases toward the piezoelectric layer.
6. The composite substrate according to claim 1 or 2, wherein the silicon-to-oxygen composition ratio O / Si of the amorphous silicon layer is 0.2 or less, and the amorphous silicon layer has a region in the thickness direction where the composition ratio O / Si increases toward the piezoelectric layer.
7. A surface acoustic wave element having a composite substrate according to claim 1 or 2.
Citation Information
Patent Citations
Composite film, preparation method and electronic component
CN112420914A
Diamond substrate for surface acoustic wave element, and surface acoustic wave element
JP2003221294A
Acoustic wave device, and method for manufacturing the same
JP2008028980A
Composite substrate, and method for manufacturing composite substrate
JP2019169983A
Composite substrate and method for producing composite substrate
WO2024004333A1