Etching method and etching device

Abstract

Provided are an etching method and an etching device for forming an excellent etching shape.　An etching method comprises: a step for preparing a substrate having a silicon-containing layer to be etched, and a mask layer that is formed on the layer to be etched and has a pattern of openings; and a step for generating plasma of a processing gas to etch the layer to be etched through the openings of the mask layer, the processing gas being a mixed gas of HBr, SF6, and O2.

Description

Etching method and etching apparatus

[0001] This disclosure relates to an etching method and an etching apparatus.

[0002] Patent Document 1 describes a silicon oxide etching step in which a workpiece having an etchable layer mainly composed of silicon, a silicon oxide layer formed on the etchable layer, and a pre-patterned resist layer formed on the silicon oxide layer is subjected to plasma etching of the silicon oxide layer using the resist layer as a mask, an adhering material removal step in which adhering material generated in the silicon oxide etching step and attached to the workpiece is removed, and SF using the silicon oxide layer as a mask ６ and O ２ and SiF ４ A processing method is disclosed which includes a silicon etching step in which a layer to be etched is plasma-etched using plasma generated from a processing gas containing a and a.

[0003] Patent No. 4722725

[0004] In one aspect, this disclosure provides an etching method and an etching apparatus for forming a good etched shape.

[0005] To solve the above problem, according to one embodiment, a step of preparing a substrate having an etching target layer containing silicon and a mask layer formed on the etching target layer and having an opening pattern, and HBr, SF ６ , O ２ An etching method is provided, comprising the steps of: generating a plasma of the processing gas using a mixed gas as a processing gas, and etching the layer to be etched through the opening in the mask layer.

[0006] In one aspect, the present disclosure can provide an etching method and an etching apparatus for forming a good etching shape.

[0007] An example of a longitudinal cross-section of an etching apparatus. An example of a flowchart showing the etching process. An example of a schematic cross-sectional diagram of a substrate prepared in step S101. An example of a schematic cross-sectional diagram of a substrate after the etching process in step S102. An example of a schematic cross-sectional diagram of a substrate after etching in a reference example. An example of a graph showing the in-plane dependence of the bottom CD. An example of a schematic cross-sectional diagram of a substrate after etching when etching polysilicon.

[0008] The following describes embodiments for implementing this disclosure with reference to the drawings. In each drawing, the same reference numerals are used for identical components, and redundant explanations may be omitted.

[0009] [Etching Apparatus] An example of etching apparatus 1 will be described using Figure 1. Figure 1 shows an example of a longitudinal cross-section of etching apparatus 1 according to this embodiment.

[0010] The etching apparatus 1 is a parallel-plate type plasma processing apparatus (capacitively coupled plasma processing apparatus) in which a mounting table 20 and a gas shower head 25 are arranged opposite each other within a chamber 10. The mounting table 20 has the function of holding a substrate to be processed, such as a semiconductor wafer (hereinafter simply referred to as "substrate W"), and also functions as a lower electrode. The gas shower head 25 has the function of supplying processing gas (etching gas) into the chamber 10 in a shower-like manner and also functions as an upper electrode.

[0011] The chamber 10 is cylindrical and made of, for example, aluminum whose surface has been anodized (anodic oxidation). The chamber 10 is electrically grounded. The mounting base 20 is installed at the bottom of the chamber 10 and the substrate W is placed on it. The substrate W is an example of a substrate to be etched, and the substrate W has a mask layer 220 with a pattern of openings 225 formed on the etching target layer 210 which is the layer to be etched (see Figure 3 described later).

[0012] The mounting table 20 has a structure in which a support 104 formed from, for example, aluminum (Al), titanium (Ti), silicon carbide (SiC), etc., and an electrostatic chuck 106 is provided on the upper surface of the mounting table 20 for electrostatically adsorbing the substrate W. The electrostatic chuck 106 is made of, for example, alumina (Al２ O ３ The structure consists of a chuck electrode 106a sandwiched between insulators 106b made of dielectric materials such as ).

[0013] A DC voltage source 112 is connected to the chuck electrode 106a, and a DC current is supplied from the DC voltage source 112 to the chuck electrode 106a. As a result, the substrate W is attracted to the surface of the electrostatic chuck 106 by Coulomb force.

[0014] A refrigerant flow path 104a is formed inside the support 104. A refrigerant inlet pipe 104b and a refrigerant outlet pipe 104c are connected to the refrigerant flow path 104a. A cooling medium, such as cooling water or brine, output from the chiller 107 circulates through the refrigerant inlet pipe 104b, the refrigerant flow path 104a, and the refrigerant outlet pipe 104c. As a result, the mounting base 20 and the electrostatic chuck 106 are cooled.

[0015] The heat transfer gas supply source 85 supplies a heat transfer gas such as helium gas (He) or argon gas (Ar) to the back surface of the substrate W on the electrostatic chuck 106 through the gas supply line 130. With this configuration, the temperature of the electrostatic chuck 106 is controlled by the cooling medium circulated in the refrigerant flow path 104a and the heat transfer gas supplied to the back surface of the substrate W. As a result, the substrate W can be controlled to a predetermined temperature. Alternatively, the substrate W may be heated by using a heating source.

[0016] A power supply device 30 for supplying two - frequency superimposed power is connected to the mounting table 20. The power supply device 30 includes a first high - frequency power supply 32 for supplying high - frequency power HF (High Frequency) for plasma generation at a first frequency, and a second high - frequency power supply 34 for supplying high - frequency power LF (Low Frequency) for bias at a second frequency lower than the first frequency. The first high - frequency power supply 32 is electrically connected to the mounting table 20 via a first matching unit 33. The second high - frequency power supply 34 is electrically connected to the mounting table 20 via a second matching unit 35. The first high - frequency power supply 32 applies, for example, high - frequency power HF for plasma excitation at 100 MHz to the mounting table 20. The second high - frequency power supply 34 applies, for example, high - frequency power LF for bias at 13.56 MHz to the mounting table 20. In this embodiment, although the high - frequency power HF is applied to the mounting table 20, it may be applied to the gas shower head 25. The first high - frequency power supply 32, the gas shower head 25 (upper electrode), and the mounting table 20 (lower electrode) constitute a plasma generation unit for generating plasma.

[0017] The first matching unit 33 matches the load impedance with the internal (or output) impedance of the first high - frequency power supply 32. The second matching unit 35 matches the load impedance with the internal (or output) impedance of the second high - frequency power supply 34. The first matching unit 33 functions so that the internal impedance of the first high - frequency power supply 32 and the load impedance seemingly match when plasma is generated in the chamber 10. The second matching unit 35 functions so that the internal impedance of the second high - frequency power supply 34 and the load impedance seemingly match when plasma is generated in the chamber 10.

[0018] The gas shower head 25 is attached so as to close the opening in the ceiling of the chamber 10 via an insulating member that insulates its peripheral portion. The gas shower head 25 may be electrically grounded as shown in FIG. 1. Also, a variable DC power supply (not shown) may be connected so that a predetermined DC (Direct Current) voltage is applied to the gas shower head 25.

[0019] The gas shower head 25 is formed with a gas inlet 45 for introducing a processing gas (etching gas). Inside the gas shower head 25, a center-side diffusion chamber 50a and an edge-side diffusion chamber 50b branched from the gas inlet 45 are provided. The processing gas (etching gas) output from the gas supply source 15 is supplied to the diffusion chambers 50a and 50b through the gas inlet 45, diffused in the respective diffusion chambers 50a and 50b, and introduced from a large number of gas supply holes 55 toward the mounting table 20. Note that the gas supply source 15 and the gas shower head 25 constitute a processing gas supply unit.

[0020] An exhaust port 60 is formed on the bottom surface of the chamber 10, and the inside of the chamber 10 is exhausted by an exhaust device 65 connected to the exhaust port 60 via an exhaust pipe. Thereby, the inside of the chamber 10 can be maintained at a predetermined degree of vacuum. A gate valve G is provided on the side wall of the chamber 10. The substrate W is carried in and out of the chamber 10 by opening and closing the gate valve G.

[0021] The etching apparatus 1 is provided with a control unit 100 for controlling the operation of the entire apparatus. The control unit 100 includes a CPU (Central Processing Unit) 105, a ROM (Read Only Memory) 110, and a RAM (Random Access Memory) 115. The CPU 105 executes a desired process such as etching, which will be described later, according to various recipes stored in these storage areas. The recipes describe the process time, pressure (gas exhaust), high-frequency power and voltage, various gas flow rates, the temperature inside the chamber (upper electrode temperature, side wall temperature of the chamber, electrostatic chuck temperature, etc.), the temperature of the chiller 107, etc., which are control information of the apparatus for the process conditions. Note that these programs and recipes indicating the process conditions may be stored in a hard disk or a semiconductor memory. Also, the recipes may be set at a predetermined position in the storage area in a state of being stored in a portable computer-readable storage medium such as a CD-ROM or a DVD.

[0022] In this description, etching apparatus 1 was explained using an etching apparatus as an example, which has opposing upper and lower electrodes and generates capacitively coupled plasma (CCP) between the electrodes to perform etching on the substrate W. The configuration of the etching apparatus is not limited to this, and other etching apparatuses may be used, such as an etching apparatus that generates inductively coupled plasma (ICP) to perform etching on the substrate W.

[0023] [Etching Process] Next, an example of the etching process using the etching apparatus 1 will be explained using Figures 2 to 4. Figure 2 is an example of a flowchart showing the etching process.

[0024] In step S101, the substrate W is prepared. Here, the control unit 100 opens the gate valve G and controls the substrate transport device (not shown) to place the substrate W on the mounting table 20. After the substrate transport device retracts outside the chamber 10, the control unit 100 closes the gate valve G. The control unit 100 also controls the DC voltage source 112 to supply a DC current to the chuck electrode 106a, causing the substrate W to adhere to the surface of the electrostatic chuck 106. The control unit 100 also controls the heat transfer gas supply source 85 to supply heat transfer gas between the surface of the electrostatic chuck 106 and the back surface of the substrate W. This promotes heat conduction between the mounting table 20 and the substrate W, and adjusts the temperature of the substrate W to a predetermined temperature. The pressure inside the chamber 10 is adjusted to a predetermined pressure by the exhaust device 65.

[0025] Figure 3 is an example of a schematic cross-sectional view of the substrate W prepared in step S101. The substrate W has an etching target layer 210 and a mask layer 220 formed on the etching target layer 210.

[0026] The etching target layer 210 is a layer (film) containing silicon (Si). Specifically, the etching target layer 210 may be a single-crystal silicon layer (Bare-Si), a polycrystalline polysilicon layer (Poly-Si), or an amorphous (microcrystalline) silicon layer (a-Si).

[0027] The mask layer 220 is a layer (film) having a pattern of openings 225. The mask layer 220 is made of, for example, silicon oxide (SiO).

[0028] In step S102, an etching process is performed on the substrate W. Here, the control unit 100 controls the gas supply source 15 to supply a processing gas (etching gas) into the chamber 10. Also, the control unit 100 controls the first high-frequency power supply 32 to supply high-frequency power HF for plasma excitation. Further, the control unit 100 controls the second high-frequency power supply 34 to supply high-frequency power LF for bias. Thereby, plasma of the processing gas is generated. The generated plasma of the processing gas subjects the substrate W to a plasma etching process.

[0029] Here, as the processing gas (etching gas), a mixed gas of HBr (hydrogen bromide) gas, SF ６ (sulfur hexafluoride) gas, and O ２ (oxygen) gas is used.

[0030] An example of the etching process recipe is described below.

[0031] Pressure inside the chamber 10: 120 [mTorr] Output of high-frequency power HF: 800 [W] Output of high-frequency power LF: 1300 [W] Flow rate of HBr / SF ６ / O ２ : 270 / 10 / 10 [sccm] Temperature of the mounting table 20 (substrate W): 60 [°C] Processing time: 1680 [sec]

[0032] Note that when the flow rate ratio of the processing gas (etching gas) has a flow rate ratio of HBr of 270, the flow rate ratio of SF ６ is preferably within the range of 9 to 11, and the flow rate ratio of O ２ is preferably within the range of 9 to 11. In other words, when the flow rate of HBr is 1, the flow rate ratio of SF ６ to the flow rate of HBr is preferably within the range of 0.033 to 0.041, and the flow rate ratio of O ２ to the flow rate of HBr is preferably within the range of 0.033 to 0.041.

[0033] Figure 4 is an example of a schematic cross-sectional view of the substrate W after the etching process in step S102.

[0034] By etching the etchable layer 210 through the opening 225 of the mask layer 220, a deep recess 215 with a high aspect ratio (for example, an aspect ratio of 50 or more) is formed in the etchable layer 210. The recess 215 is, for example, a hole, a trench, or the like.

[0035] Here, TopCD is defined as the opening width (critical dimension, CD) at the top of the recess 215 formed in the etchable layer 210. BtmCD is defined as the opening width (critical dimension, CD) at the bottom of the recess 215 formed in the etchable layer 210.

[0036] HBr is an etchant that anisotropically etches the etched layer 210 (in the vertical downward direction indicated by arrow 250). Specifically, HBr ions are generated by the plasma. Furthermore, the HBr ions are drawn toward the substrate W by supplying high-frequency power LF for biasing to the lower electrode (mounting stage 20), causing anisotropic etching of the etched layer 210 (in the vertical downward direction indicated by arrow 250).

[0037] O ２ This is an oxidizing agent that forms a protective film (silicon oxide film) on the side walls 216 of the recesses 215 formed in the etching target layer 210. This suppresses bowing of the side walls 216 of the recesses 215.

[0038] SF ６ This is an etchant that isotropically etches the etchable layer 210. The upper side (opening side) side wall 216 of the recess 215 is O ２ A protective film is formed by this process. As a result, the side wall 216 on the upper side (opening side) of the recess 215 undergoes isotropic etching. ６ This suppresses etching. On the other hand, on the lower (bottom) side wall 216 of the recess 215, O ２ The protective film formed by this process is not sufficiently formed, and isotropic etching of SF ６It is etched by this process. This allows the recess 215 to be deepened while widening the BtmCD of the recess 215.

[0039] In this way, by forming a recess 215 with a high aspect ratio, it is possible to suppress the reduction (shrinkage) of BtmCD relative to TopCD.

[0040] As shown in Figure 4, reaction byproducts from etching the etchable layer 210 accumulate on the side walls 226 of the opening 225 of the mask layer 220. This narrows the opening width of the opening 225.

[0041] Then, after the etching process (S102), the substrate W is removed from the chamber 10. Here, the control unit 100 controls the DC voltage source 112 to release the suction of the substrate W. Then, it opens the gate valve G and controls the substrate transport device (not shown) to receive the substrate W from the mounting table 20 and remove it from the chamber 10. After the substrate transport device has moved out of the chamber 10, the control unit 100 closes the gate valve G.

[0042] As described above, the etching process shown in Figure 2 allows for the formation of high-aspect-ratio recesses 215 in the silicon (Si)-containing etchable layer 210. Furthermore, it can suppress the shrinkage of BtmCD relative to TopCD. In addition, it can suppress the twisting of the recesses 215 formed in the etchable layer 210. As a result, it is possible to form recesses 215 with a good etched shape.

[0043] Next, the etching process of this embodiment will be further explained in comparison with the etching process of the reference example. In the etching process of the reference example, HBr (hydrogen bromide) gas and NF are used as the processing gas (etching gas). ３ (Nitrogen trifluoride) gas, O ２ A gas mixture of (oxygen) gas is used. The other components are the same, so redundant explanations are omitted.

[0044] HBr is an etchant that anisotropically etches the etched layer 210 (in the vertical downward direction indicated by arrow 250). Specifically, HBr ions are generated by the plasma. Furthermore, the HBr ions are drawn toward the substrate W by supplying high-frequency power LF for biasing to the lower electrode (mounting stage 20), causing anisotropic etching of the etched layer 210 (in the vertical downward direction indicated by arrow 250).

[0045] O ２ This is an oxidizing agent that forms a protective film (silicon oxide film) on the side walls 216 of the recesses 215 formed in the etching target layer 210. This suppresses bowing of the side walls 216 of the recesses 215.

[0046] NF ３ This is an etchant that is drawn toward the substrate W by supplying high-frequency power LF for bias to the lower electrode (mounting base 20) and performs anisotropic etching. ３ This is an etching gas used to prevent the opening 225 of the mask layer 220 from becoming blocked by reaction by-products when etching the etchable layer 210.

[0047] Figure 5 is an example of a schematic cross-sectional view of the substrate W after etching in a reference example. As shown in Figure 5, NF is used as the processing gas (etching gas). ３ By including this, the opening 225 of the mask layer 220 is widened, ２ This makes it easier for the gas to reach the recess 215. As a result, a protective film is formed on the side wall 216 of the recess 215, and when a recess 215 with a high aspect ratio is formed, BtmCD shrinks relative to TopCD.

[0048] Here, the etching target layer 210 is a single-crystal silicon layer (Bare-Si), and the processing gas (HBr, NF) according to the reference example is used. ３ , O ２ Etching process using ) and the process gas (HBr, SF) according to this embodiment ６ , O ２The substrate W was etched using an etching process with ). Then, the TopCD, BowCD, BtmCD, and depth of the recess 215 were measured. BowCD is defined as the opening width (critical dimension, CD) in the bowing portion of the recess 215.

[0049] Reference example of processed gas (HBr, NF ３ , O ２ The recess 215 formed by etching using ) had a TopCD of 80 nm, a BowCD of 114 nm, a BtmCD of 47 nm, and a Depth of 4339 nm.

[0050] The processing gas (HBr, SF) according to this embodiment ６ , O ２ The recess 215 formed by etching using ) had a TopCD of 80 nm, a BowCD of 115 nm, a BtmCD of 84 nm, and a Depth of 4357 nm.

[0051] Thus, the processing gas according to this embodiment (HBr, SF ６ , O ２ In etching processes using the following reference example, the process gas (HBr, NF ３ , O ２ Compared to etching using ), we were able to expand the BtmCD.

[0052] Figure 6 shows an example of a graph illustrating the in-plane dependence of BtmCD. Here, a substrate W with a diameter of 300 mm is etched to form a recess 215 in the etched layer 210. The horizontal axis represents the radial distance from the center of the substrate W. The vertical axis represents the BtmCD value of the recess 215. The results when using the processing gas of this embodiment are shown with black circles and solid lines. The results when using the processing gas of the reference example are shown with white circles and dashed lines. In the example in Figure 6, TopCD is 80 nm.

[0053] As shown in Figure 6, the processing gas according to this embodiment (HBr, SF ６ , O ２ In etching processes using the following reference example, the process gas (HBr, NF ３ , O２ Compared to etching using the above method, the BtmCD value could be increased by approximately twice. In other words, the reduction (shrinkage) of BtmCD relative to TopCD of the recess 215 can be suppressed. Furthermore, improvement in BtmCD was obtained from the center to the edge of the substrate W.

[0054] Figure 7 is an example of a schematic cross-sectional view of the substrate W after etching when etching polysilicon. When the layer to be etched 210A is a polysilicon layer, the layer to be etched 210A contains a crystalline structure 211A inside and has large grain boundaries.

[0055] Here, the treatment gas (HBr, NF) in the reference example is shown. ３ , O ２ In etching processes using (HBr, NF), during etching of the polysilicon layer, the etching rate is disrupted by the grain boundaries, increasing the probability that etching proceeds in the direction 260 along the grain boundaries. This may cause twisting in the recesses 215 formed in the etched layer 210A. Similarly, in etching processes using the reference example (HBr, NF ３ , O ２ In etching processes using ), there is a risk that twisting may occur in the recesses 215, even in etching processes that etch the amorphous silicon layer.

[0056] In contrast, the processing gas according to this embodiment (HBr, SF ６ , O ２ In etching processes using ), in etching processes that etch the polysilicon layer, not only isotropic etchant HBr but also isotropic etchant SF ６ Furthermore, because it also contains, the influence of disorder on the etching rate due to grain boundaries can be reduced, and the occurrence of twisting in the recess 215 can be suppressed. Also, the processing gas (HBr, SF) according to this embodiment ６ , O ２In etching processes using this method, twisting in the recesses 215 can be suppressed, even in etching processes that etch the amorphous silicon layer.

[0057] Although etching methods and etching apparatus have been described above, this disclosure is not limited to the embodiments described above, and various modifications and improvements are possible within the scope of the gist of this disclosure as described in the claims.

[0058] Furthermore, this application claims priority based on Japanese Patent Application No. 2024-178217, filed on October 10, 2024, and the entire contents of these Japanese Patent Applications are incorporated herein by reference.

[0059] 1 Etching apparatus 10 Chamber 15 Gas supply source (processing gas supply unit) 20 Mounting stage (plasma generation unit) 25 Gas shower head (processing gas supply unit, plasma generation unit) 30 Power supply device 32 First high-frequency power supply (plasma generation unit) 34 Second high-frequency power supply 65 Exhaust device 100 Control unit 210 Layer to be etched 215 Recess 216 Side wall 220 Mask layer 225 Opening 226 Side wall W Substrate

Claims

1. A step of preparing a substrate having an etching target layer containing silicon and a mask layer formed on the etching target layer and having an opening pattern, and HBr, SF ６ , O ２ An etching method comprising the steps of: generating a plasma of the processing gas using a mixed gas as a processing gas, and etching the layer to be etched through the opening of the mask layer.

2. The etching method according to claim 1, wherein the layer to be etched is a polysilicon layer or an amorphous silicon layer.

3. The processing gas is HBr, SF ６ , O ２ The flow rate ratio of SF is such that the flow rate ratio of HBr is 270. ６ The flow rate ratio is in the range of 9 to 11. ２ The etching method according to claim 1, wherein the flow rate ratio is in the range of 9 to 11.

4. The etching method according to claim 1, wherein bias power is supplied to a mounting stage on which the substrate is placed, to draw HBr ions generated by the plasma into the substrate.

5. A process for preparing a substrate comprising: a chamber; a mounting table provided in the chamber on which a substrate is placed; a processing gas supply unit for supplying processing gas into the chamber; a plasma generation unit for generating plasma of the processing gas; and a control unit, wherein the substrate has an etching target layer containing silicon and a mask layer formed on the etching target layer and having an opening pattern; and HBr, SF ６ , O ２ An etching apparatus configured to perform the steps of: generating a plasma of the processing gas using a mixed gas as the processing gas, and etching the layer to be etched through the opening in the mask layer.

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