Analog-to-digital converter and analog-to-digital conversion method

Abstract

An analog-to-digital converter (1) comprises: a step-down unit (10) that steps down a signal to be measured at a prescribed ratio and outputs a step-down signal, or steps down the signal at a prescribed first ratio and outputs a first step-down signal, and steps down the signal at a prescribed second ratio at which the degree of step-down is greater than that at the first ratio and outputs a second step-down signal; a conversion unit (20) that receives, as input, the signal and the step-down signal, the first step-down signal and the second step-down signal, or the step-down signal, performs conversion into first digital data and second digital data having a smaller value than the first digital data, and outputs the first digital data and the second digital data; a multiplication unit (40) that multiplies the second digital data by the reciprocal of the ratio, the reciprocal of the second ratio, or a value corresponding to the ratio and the calculation content of the conversion unit (20), and outputs third digital data; and an output unit (50) that compares the value of the first digital data and the value of the third digital data, and outputs the larger one of the values.

Description

Analog-to-Digital Converter and Analog-to-Digital Conversion Method

[0001] The present disclosure relates to an analog-to-digital converter and an analog-to-digital conversion method for converting an analog signal into a digital signal.

[0002] Conventionally, an analog-to-digital converter converts an analog signal into a digital signal and outputs it, that is, outputs a digital signal having a magnitude corresponding to the magnitude of the input analog signal. When noise is included in the input analog signal, the analog-to-digital converter outputs a digital signal corresponding to the signal obtained by adding the noise to the analog signal. Therefore, in an analog-to-digital converter, countermeasures against noise that affects the analog signal become a problem.

[0003] Various methods have been proposed for countermeasures against noise that affects an analog signal. For example, Patent Document 1 discloses a technique in which an impedance measuring device converts a first voltage signal of a measurement target into first digital data, converts a second voltage signal obtained by降压 the first voltage signal at a predetermined ratio into second digital data, and when the first digital data is in a saturated state, replaces the first digital data with digital data obtained by multiplying the second digital data by the reciprocal of the predetermined ratio.

[0004] Japanese Patent Application Laid-Open No. 2011-38969

[0005] It should be noted that the term "降压" in the original text may not be an accurate or common expression. You may want to double-check and correct it if necessary for a more precise translation. Here it is tentatively translated as "降压".However, according to the conventional technology described above, the impedance measuring device described in Patent Document 1 selects the digital data to output based on whether the first digital data has reached the maximum output value of the first A / D (Analog / Digital) conversion circuit, that is, whether it is saturated or not. When a low-pass filter and a delta-sigma type AD (Analog Digital) converter, which is a general analog-to-digital converter, are used as the first A / D conversion circuit, if the input to the first A / D conversion circuit is affected by excessive noise superimposed on the original input signal, and the low-pass filter cannot sufficiently attenuate the noise component, the internal processing of the delta-sigma type AD converter cannot remove the noise component. As a result, the output of the delta-sigma type AD converter will output a value smaller than the original input value from which the noise component has been removed. Therefore, the impedance measuring device described in Patent Document 1 has the problem that it is difficult to perform high-precision measurements because it cannot accurately determine saturation.

[0006] This disclosure has been made in view of the above, and aims to provide an analog-to-digital converter that can output high-precision digital data even under the influence of noise.

[0007] To solve the above-mentioned problems and achieve the objective, the analog-to-digital converter of this disclosure is characterized by comprising: a step-down unit that steps down the signal to be measured by a defined ratio and outputs a step-down signal, or steps down the signal by a defined first ratio and outputs a first step-down signal, and steps down the signal by a defined second ratio which is greater than the first ratio and outputs a second step-down signal; a conversion unit that takes the signal and the step-down signal, or the first step-down signal and the second step-down signal, or the step-down signal as input and converts them into first digital data and second digital data which has a smaller value than the first digital data and outputs them; a multiplication unit that multiplies the second digital data by the reciprocal of the ratio, or the reciprocal of the second ratio, or a value corresponding to the calculation content of the ratio and the conversion unit and outputs third digital data; and an output unit that compares the value of the first digital data and the value of the third digital data and outputs the larger value.

[0008] The analog-to-digital converter disclosed herein has the effect of being able to output highly accurate digital data even under the influence of noise.

[0009] Figure showing an example configuration of the analog-to-digital converter according to Embodiment 1. A flowchart showing the operation of the analog-to-digital converter according to Embodiment 1. Figure showing an example of a case where the processing circuit realizing the analog-to-digital converter according to Embodiment 1 is configured with a processor and memory. Figure showing an example of a case where the processing circuit realizing the analog-to-digital converter according to Embodiment 1 is configured with dedicated hardware. Figure showing an example configuration of the analog-to-digital converter according to Embodiment 2. A flowchart showing the operation of the analog-to-digital converter according to Embodiment 2. Figure showing an example configuration of the analog-to-digital converter according to Embodiment 3. A flowchart showing the operation of the analog-to-digital converter according to Embodiment 3. Figure showing an example configuration of the analog-to-digital converter according to Embodiment 4. A flowchart showing the operation of the analog-to-digital converter according to Embodiment 4. Figure showing an example configuration of the analog-to-digital converter according to Embodiment 5. A flowchart showing the operation of the analog-to-digital converter according to Embodiment 5. Figure showing an example configuration of the analog-to-digital converter according to Embodiment 6. A flowchart showing the operation of the analog-to-digital converter according to Embodiment 6. Figure showing an example configuration of the analog-to-digital converter according to Embodiment 7. A flowchart showing the operation of the analog-to-digital converter according to Embodiment 7.

[0010] The analog-to-digital converter and analog-to-digital conversion method according to embodiments of this disclosure will be described in detail below with reference to the drawings.

[0011] Embodiment 1. Figure 1 shows an example of the configuration of the analog-to-digital converter 1 according to Embodiment 1. The analog-to-digital converter 1 is connected to a voltage source 2, which is a DC power supply, via a probe 3. The voltage source 2 generates a voltage V1 signal and supplies it to the analog-to-digital converter 1. The analog-to-digital converter 1 converts the voltage V1 signal, which is a DC voltage supplied from the voltage source 2, from an analog signal to a digital signal and outputs it.

[0012] The analog-to-digital converter 1 comprises a step-down unit 10, a conversion unit 20, a multiplication unit 40, and an output unit 50. The analog-to-digital converter 1 inputs a voltage V2 signal, which takes into account the effects of noise on the analog-to-digital converter 1, to the step-down unit 10 and the conversion unit 20, relative to the voltage V1 signal supplied from the voltage source 2 via the probe 3. The analog-to-digital converter 1 has a wiring structure in which the same voltage V2 signal is input to the step-down unit 10 and the conversion unit 20. Note that if the analog-to-digital converter 1 is not affected by noise, the values ​​of the voltage V1 signal and the voltage V2 signal will be the same.

[0013] The step-down unit 10 includes resistors 11 and 12. In the step-down unit 10, a voltage V2 signal is input to one end of resistor 11, one end of resistor 12 is connected to the other end of resistor 11, and ground is connected to the other end of resistor 12. That is, in the step-down unit 10, one end of resistor 11 is the input terminal, and the connection point between the other end of resistor 11 and one end of resistor 12 is the output terminal. The step-down unit 10 steps down the voltage V2 signal, which is the signal to be measured, by a specified ratio and outputs a step-down signal of voltage V3. The step-down unit 10 outputs the step-down signal of voltage V3 from its output terminal to a second AD conversion unit 22, which will be described later and is included in the conversion unit 20. In Embodiment 1, the defined ratio of the step-down unit 10 is set so that even if the analog-to-digital converter 1 is affected by noise and the values ​​of the voltage V1 signal and the voltage V2 signal become different, the value of the voltage V3 signal, which is the output from the step-down unit 10, i.e., voltage V3, does not exceed the input voltage range of the second AD conversion unit 22. In the example in Figure 1, if the resistance value of resistor 11 is R11 and the resistance value of resistor 12 is R12, the defined ratio is "defined ratio = R12 / (R11 + R12)".

[0014] The conversion unit 20 comprises a first AD conversion unit 21 and a second AD conversion unit 22. In the conversion unit 20, the first AD conversion unit 21 receives a voltage V2 signal, which is the signal to be measured, and the second AD conversion unit 22 receives a voltage V3 signal from the step-down unit 10. The first AD conversion unit 21 converts the voltage V2 signal, which is the signal to be measured, into first digital data D1 and outputs it to the output unit 50. That is, the first AD conversion unit 21 outputs the value of the voltage V2 signal, i.e., the first digital data D1 corresponding to voltage V2. The second AD conversion unit 22 converts the voltage V3 signal, which is the step-down signal, into second digital data D2 and outputs it to the multiplication unit 40. That is, the second AD conversion unit 22 outputs the value of the voltage V3 signal, i.e., the second digital data D2 corresponding to voltage V3. In Embodiment 1, the conversion unit 20 takes a voltage V2 signal, which is the signal to be measured, and a voltage V3 signal, which is a step-down signal, as inputs, converts the voltage V2 signal, which is the signal to be measured, into a first digital data D1, and converts the voltage V3 signal, which is a step-down signal, into a second digital data D2 with a smaller value than the first digital data D1, and outputs them.

[0015] The multiplication unit 40 obtains the second digital data D2 from the second AD conversion unit 22 of the conversion unit 20. The multiplication unit 40 calculates the third digital data D3 by multiplying the second digital data D2 by the reciprocal of the aforementioned defined ratio, and outputs the third digital data D3 to the output unit 50. That is, the multiplication unit 40 outputs the third digital data D3, which is obtained by multiplying the second digital data D2 by the reciprocal of the aforementioned defined ratio, to the output unit 50. In Embodiment 1, as described above, the "defined ratio = R12 / (R11 + R12)", so the reciprocal of the defined ratio is "reciprocal of the defined ratio = (R11 + R12) / R12".

[0016] The output unit 50 compares the value of the first digital data D1 with the value of the third digital data D3 and outputs the larger value. The output unit 50 includes a comparison unit 51 and a selection unit 52. In the first embodiment, the first digital data D1 is input from the first AD conversion unit 21 of the conversion unit 20, and the third digital data D3 is input from the multiplication unit 40, to both the comparison unit 51 and the selection unit 52 of the output unit 50.

[0017] The comparison unit 51 compares the value of the first digital data D1 obtained from the first AD conversion unit 21 of the conversion unit 20 with the value of the third digital data D3 obtained from the multiplication unit 40. The comparison unit 51 outputs the comparison result to the selection unit 52. Based on the comparison result obtained from the comparison unit 51, the selection unit 52 outputs the larger of the first digital data D1 obtained from the first AD conversion unit 21 of the conversion unit 20 and the third digital data D3 obtained from the multiplication unit 40. For example, if the comparison result obtained from the comparison unit 51 is that the value of the first digital data D1 is larger, the selection unit 52 outputs the first digital data D1, and if the comparison result obtained from the comparison unit 51 is that the value of the third digital data D3 is larger, the selection unit 52 outputs the third digital data D3. The digital data selected by the selection unit 52 becomes the output from the analog-to-digital converter 1.

[0018] Note that if the value of the first digital data D1 and the value of the third digital data D3 are the same, the selection unit 52 will output either the first digital data D1 or the third digital data D3, but here we will output the first digital data D1. Therefore, if the value of the first digital data D1 is greater than the value of the third digital data D3, the comparison unit 51 will output a comparison result indicating that the value of the first digital data D1 is greater. If the value of the third digital data D3 is greater than the value of the first digital data D1, the comparison unit 51 will output a comparison result indicating that the value of the third digital data D3 is greater. If the values ​​of the first digital data D1 and the third digital data D3 are the same, the comparison unit 51 may output a comparison result indicating that the value of the first digital data D1 and the value of the third digital data D3 are the same, or it may output a comparison result indicating that the value of the first digital data D1 is greater.

[0019] Next, the operation of the analog-to-digital converter 1 will be explained using a specific example. Here, as an example, the input range of the analog-to-digital converter 1 will be set to 0V to 10V. In addition, in the analog-to-digital converter 1, the first AD conversion unit 21 and the second AD conversion unit 22 are composed of the same type of delta-sigma type AD converter, and the input range of each delta-sigma type AD converter will be set to 0V to 10V.

[0020] The magnitude of the voltage V1 signal supplied from the voltage source 2 to the analog-to-digital converter 1, i.e., the value of voltage V1, is set to DC 10V. In a noise-free environment, as described above, the value of the voltage V1 signal and the value of the voltage V2 signal will be the same. In this case, the input voltage to the first AD conversion unit 21 will be DC 10V, and the first digital data D1 output from the first AD conversion unit 21 will be digital data corresponding to DC 10V.

[0021] Now, let's consider the case where AC 10Vpp common-mode noise is applied to the analog-to-digital converter 1. When common-mode noise is applied to the analog-to-digital converter 1, some of the common-mode noise is converted into normal-mode noise due to the unbalanced component of the input circuit of the analog-to-digital converter 1 and flows into the analog-to-digital converter 1. In this case, the input voltage of the first AD conversion unit 21, i.e., voltage V2, becomes a voltage in which normal-mode noise is superimposed on voltage V1. If all of the common-mode noise is converted into normal-mode noise, the input voltage of the first AD conversion unit 21, i.e., voltage V2, becomes a voltage in which AC 10Vpp is superimposed on voltage V1, which is DC 10V.

[0022] The first AD conversion unit 21 is a delta-sigma type AD converter, so it averages multiple sampling results acquired at a high data rate and outputs the average value as the conversion result of the delta-sigma type AD converter. If the input voltage V2 to the first AD conversion unit 21 is a voltage in which AC 10Vpp is superimposed on DC 10V, the voltage actually input to the first AD conversion unit 21 will be 10V ± 10V, that is, a voltage in the range of 0V to 10V out of 0V to 20V. In the first AD conversion unit 21, voltages in the range of 0V to 10V are sampled by the delta-sigma type AD converter, and as mentioned above, the average value of the sampling results becomes the first digital data D1, which is the output of the first AD conversion unit 21, so the first digital data D1 will be a value corresponding to a value lower than 10V.

[0023] Here, the resistance values ​​R11 of resistor 11 and R12 of resistor 12 are set so that the aforementioned defined ratio in the step-down unit 10 becomes 1 / 4. For example, the resistance value R11 of resistor 11 is set to 30kΩ and the resistance value R12 of resistor 12 is set to 10kΩ. If the voltage V2, which is the signal value of voltage V2, is a voltage in which AC 10Vpp is superimposed on DC 10V, then the voltage V3, which is the signal value of voltage V3, which is the output from the step-down unit 10, will be a voltage in which AC 2.5Vpp is superimposed on DC 2.5V.

[0024] The second AD conversion unit 22 is a delta-sigma type AD converter, so it averages multiple sampling results acquired at a high data rate and outputs the average value as the conversion result of the delta-sigma type AD converter. If the input voltage V3 to the second AD conversion unit 22 is a voltage in which AC 2.5Vpp is superimposed on DC 2.5V, the voltage actually input to the second AD conversion unit 22 will be a value of 2.5V ± 2.5V. In the second AD conversion unit 22, a value of 2.5V ± 2.5V is sampled by the delta-sigma type AD converter, and as mentioned above, the average value of the sampling results becomes the second digital data D2, which is the output of the second AD conversion unit 22, so the second digital data D2 will be a value corresponding to 2.5V.

[0025] Since the specified ratio in the step-down unit 10 is 1 / 4, the multiplier unit 40 multiplies the second digital data D2 by 4, which is the reciprocal of 1 / 4, as the reciprocal of the specified ratio mentioned above. As a result, the third digital data D3, which is the output from the multiplier unit 40, becomes the value corresponding to 10V, which is four times the value corresponding to 2.5V that is the second digital data D2.

[0026] The comparison unit 51 of the output unit 50 compares the value of the first digital data D1 with the value of the third digital data D3. As mentioned above, the value of the first digital data D1 corresponds to a value lower than 10V, while the value of the third digital data D3 corresponds to a value of 10V. Since the value of the third digital data D3 is greater than the value of the first digital data D1, the comparison unit 51 determines that the value of the third digital data D3 is greater than the value of the first digital data D1. Based on this, the selection unit 52 of the output unit 50 selects and outputs the third digital data D3, which has a value greater than the value of the first digital data D1, based on the comparison result of the comparison unit 51.

[0027] In this way, the analog-to-digital converter 1 outputs a first digital data D1 when unaffected by noise, and outputs a third digital data D3 when affected by common-mode noise, thereby maintaining the accuracy of the output digital data even under noise influence. The noise dealt with in Embodiment 2 and later is the same type of noise as described in Embodiment 1.

[0028] Figure 2 is a flowchart showing the operation of the analog-to-digital converter 1 according to Embodiment 1. In the analog-to-digital converter 1, the step-down unit 10 steps down the voltage V2 signal, which is the signal to be measured, by a specified ratio (step S11). The step-down unit 10 outputs a voltage V3 signal, which is a stepped-down signal. The conversion unit 20 converts the voltage V2 signal, which is the signal to be measured, into first digital data D1, and converts the voltage V3 signal, which is a stepped-down signal from the step-down unit 10, into second digital data D2 (step S12). The multiplication unit 40 multiplies the second digital data D2 by the reciprocal of the specified ratio mentioned above and outputs third digital data D3 (step S13). The output unit 50 compares the value of the first digital data D1 and the value of the third digital data D3, selects the digital data with the larger value and outputs it (step S14).

[0029] Next, the hardware configuration of the analog-to-digital converter 1 will be described. In the analog-to-digital converter 1, the step-down unit 10 is implemented by a plurality of resistors. The conversion unit 20, the multiplication unit 40, and the output unit 50 are implemented by a processing circuit. The processing circuit may be a processor and memory that execute a program stored in memory, or it may be dedicated hardware.

[0030] Figure 3 shows an example of a case where the processing circuit 90 that realizes the analog-to-digital converter 1 according to Embodiment 1 is configured with a processor 91 and a memory 92. When the processing circuit 90 is configured with a processor 91 and a memory 92, each function of the processing circuit 90 of the analog-to-digital converter 1 is realized by software, firmware, or a combination of software and firmware. The software or firmware is written as a program and stored in the memory 92. In the processing circuit 90, each function is realized by the processor 91 reading and executing the program stored in the memory 92. In other words, the processing circuit 90 is equipped with a memory 92 for storing the program that will ultimately be executed as the processing of the analog-to-digital converter 1. Furthermore, these programs can be said to cause the computer to execute the procedures and methods of the analog-to-digital converter 1.

[0031] The above program includes a step in which the step-down unit 10 steps down the signal to be measured by a defined ratio and outputs a step-down signal, or steps down the signal by a defined first ratio and outputs a first step-down signal, and steps down the signal by a defined second ratio which is greater than the first ratio and outputs a second step-down signal, and a conversion unit 20 takes the signal and the step-down signal, or the first step-down signal and the second step-down signal, or the step-down signal as input and converts the first digital data D1 and the value of the first digital data D1 This can also be described as a program that causes the analog-to-digital converter 1 to execute the following steps: a conversion step of converting to a smaller second digital data D2 and outputting it; a multiplication step in which the multiplication unit 40 multiplies the second digital data D2 by the reciprocal of the ratio, or the reciprocal of the second ratio, or a value corresponding to the ratio and the calculation content of the conversion unit 20, and outputs the third digital data D3; and an output step in which the output unit 50 compares the value of the first digital data D1 and the value of the third digital data D3 and outputs the larger value. The program described here also includes the contents described in Embodiment 2 and later.

[0032] Here, the processor 91 may be a CPU (Central Processing Unit), processing unit, arithmetic unit, microprocessor, microcomputer, or DSP (Digital Signal Processor). The memory 92 may be, for example, a non-volatile or volatile semiconductor memory such as RAM (Random Access Memory), ROM (Read Only Memory), flash memory, EPROM (Erasable Programmable ROM), EEPROM (Registered Trademark) (Electrically EPROM), magnetic disk, flexible disk, optical disk, compact disk, minidisc, or DVD (Digital Versatile Disc).

[0033] Figure 4 shows an example of a case where the processing circuit 93 that realizes the analog-to-digital converter 1 according to Embodiment 1 is configured with dedicated hardware. When the processing circuit 93 is configured with dedicated hardware, the processing circuit 93 shown in Figure 4 may be, for example, a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), or a combination thereof. Each function of the analog-to-digital converter 1 may be realized by the processing circuit 93 separately, or each function may be realized together by the processing circuit 93.

[0034] Furthermore, some of the functions of the analog-to-digital converter 1 may be implemented using dedicated hardware, while others may be implemented using software or firmware. In this way, the processing circuit can implement the above-mentioned functions using dedicated hardware, software, firmware, or a combination thereof.

[0035] As described above, according to this embodiment, in the analog-to-digital converter 1, the step-down unit 10 steps down the voltage V2 signal, which is the signal to be measured, by a specified ratio and outputs a step-down signal. The conversion unit 20 converts the voltage V2 signal, which is the signal to be measured, into first digital data D1 and outputs it, and converts the step-down signal, voltage V3, into second digital data D2 and outputs it. The multiplication unit 40 multiplies the second digital data D2 by the reciprocal of a specified ratio and outputs third digital data D3. The output unit 50 compares the value of the first digital data D1 and the value of the third digital data D3 and outputs the digital data with the larger value. As a result, even under the influence of noise, the analog-to-digital converter 1 can output highly accurate digital data by outputting the third digital data D3 when the first digital data D1 is measured at a low value.

[0036] Embodiment 2. Embodiment 2 describes an analog-to-digital converter 1a with a different circuit configuration from the analog-to-digital converter 1 of Embodiment 1. The same reference numerals are used for the components described in Embodiment 1, and detailed descriptions are omitted.

[0037] Figure 5 shows an example configuration of the analog-to-digital converter 1a according to Embodiment 2. The analog-to-digital converter 1a is connected to a voltage source 2a, which is an AC power source. The voltage source 2a generates an AC voltage Va signal and supplies it to the analog-to-digital converter 1a. One end of the voltage source 2a is connected to the analog-to-digital converter 1a, and the other end is connected to ground. Here, the voltage source 2a is described as an AC power source in which the AC voltage Va alternately fluctuates between the positive and negative sides, but it may also be a voltage source that continuously outputs a positive voltage, or a voltage source that continuously outputs a negative voltage. The analog-to-digital converter 1a converts the AC voltage Va signal supplied from the voltage source 2a from an analog signal to a digital signal and outputs it.

[0038] The analog-to-digital converter 1a comprises a step-down unit 10, a conversion unit 20, a multiplication unit 40, a first absolute value calculation unit 41, a second absolute value calculation unit 42, and an output unit 50. The analog-to-digital converter 1a is supplied with an AC voltage Va signal from a voltage source 2a, which is different from the input signal of the analog-to-digital converter 1 of Embodiment 1, where a voltage V1 signal is supplied from a voltage source 2. However, the operation of the step-down unit 10, the conversion unit 20, and the multiplication unit 40 is the same as that of the analog-to-digital converter 1 of Embodiment 1. In Embodiment 2, the first AD conversion unit 21 of the conversion unit 20 outputs the first digital data D1 to the first absolute value calculation unit 41 and the selection unit 52 of the output unit 50. Furthermore, the multiplication unit 40 outputs the third digital data D3, obtained by multiplying the second digital data D2 by the reciprocal of the aforementioned defined ratio, to the second absolute value calculation unit 42 and the selection unit 52 of the output unit 50.

[0039] The first absolute value calculation unit 41 calculates the absolute value of the first digital data D1 output from the first AD conversion unit 21 of the conversion unit 20, which in Embodiment 1 was input to the comparison unit 51 of the output unit 50. The first absolute value calculation unit 41 outputs the absolute value of the first digital data D1 obtained by the calculation to the comparison unit 51 of the output unit 50. The second absolute value calculation unit 42 calculates the absolute value of the third digital data D3 output from the multiplication unit 40, which in Embodiment 1 was input to the comparison unit 51 of the output unit 50. The second absolute value calculation unit 42 outputs the absolute value of the third digital data D3 obtained by the calculation to the comparison unit 51 of the output unit 50.

[0040] The output unit 50 compares the absolute value of the first digital data D1 with the absolute value of the third digital data D3 and outputs the one with the larger absolute value. In Embodiment 2, the selection unit 52 receives the first digital data D1 from the first AD conversion unit 21 of the conversion unit 20 and the third digital data D3 from the multiplication unit 40, similar to Embodiment 1. On the other hand, the comparison unit 51 receives the absolute value of the first digital data D1 from the first absolute value calculation unit 41 and the absolute value of the third digital data D3 from the second absolute value calculation unit 42.

[0041] Here, we assume that in the analog-to-digital converter 1a, the voltage V2 signal is affected by noise, and that at a certain point in time, the voltage of the voltage V2 signal is -10V. In this case, the conversion unit 20 operates in the same way as in Embodiment 1, so that the first digital data D1 becomes digital data corresponding to a negative value with an absolute value smaller than -10V, and the second digital data D2 becomes digital data corresponding to -2.5V. The third digital data D3 is obtained by multiplying the second digital data D2 by 4 in the multiplication unit 40, resulting in digital data corresponding to -10V. If the comparison unit 51 were to compare the value of the first digital data D1 corresponding to a negative value with an absolute value smaller than -10V with the value of the third digital data D3 corresponding to -10V, it would mistakenly determine that the value of the first digital data D1 corresponding to a negative value with an absolute value smaller than -10V is larger. However, since the first digital data D1 corresponding to negative values ​​with an absolute value smaller than -10V is affected by noise, it is undesirable for the comparison unit 51 to determine that the value of the first digital data D1 corresponding to negative values ​​with an absolute value smaller than -10V is larger than the value of the third digital data D3 corresponding to -10V.

[0042] Therefore, in the second embodiment, the first absolute value calculation unit 41 calculates a value corresponding to a value with an absolute value smaller than 10V as the absolute value of the first digital data D1. The second absolute value calculation unit 42 calculates a value corresponding to 10V as the absolute value of the third digital data D3. The output unit 50 compares the absolute value of the first digital data D1 with the absolute value of the third digital data D3, and outputs the third digital data D3, determining that the absolute value of the third digital data D3 is larger. In this way, even when an AC voltage Va is supplied from the voltage source 2a, the analog-to-digital converter 1a can avoid outputting the digital data that is affected by noise by calculating the absolute value of each digital data with the first absolute value calculation unit 41 and the second absolute value calculation unit 42.

[0043] Figure 6 is a flowchart showing the operation of the analog-digital converter 1a according to Embodiment 2. The operations from step S11 to step S13 in the flowchart shown in Figure 6 are the same as the operations from step S11 to step S13 in the flowchart of Embodiment 1 shown in Figure 2. The first absolute value calculation unit 41 calculates the absolute value of the first digital data D1, and the second absolute value calculation unit 42 calculates the absolute value of the third digital data D3 (step S21). The output unit 50 compares the absolute value of the first digital data D1 with the absolute value of the third digital data D3, and selects and outputs the digital data with the larger absolute value (step S22).

[0044] The hardware configuration of the analog-digital converter 1a will be described. In the analog-digital converter 1a, the first absolute value calculation unit 41 and the second absolute value calculation unit 42 are realized by a processing circuit. The processing circuit may be a processor and a memory that execute a program stored in the memory, or may be dedicated hardware.

[0045] As described above, according to the present embodiment, in the analog-digital converter 1a, the first absolute value calculation unit 41 calculates the absolute value of the first digital data D1, and the second absolute value calculation unit 42 calculates the absolute value of the third digital data D3. The output unit 50 outputs the digital data with the larger absolute value among the first digital data D1 and the third digital data D3. Thereby, the analog-digital converter 1a can output high-precision digital data even when an alternating voltage Va is supplied from the voltage source 2a.

[0046] Embodiment 3. In Embodiment 3, an analog-digital converter 1b having a circuit configuration different from that of the analog-digital converter 1 according to Embodiment 1 and the analog-digital converter 1a according to Embodiment 2 will be described. The same reference numerals are given to the configurations described in Embodiment 1 or Embodiment 2, and detailed descriptions thereof are omitted.

[0047] FIG. 7 is a diagram showing a configuration example of the analog-to-digital converter 1b according to Embodiment 3. The analog-to-digital converter 1b is connected to a voltage source 2b that is an AC power supply. The voltage source 2b generates a signal of an AC voltage Va and supplies it to the analog-to-digital converter 1b with differential input. Here, the voltage source 2b will be described assuming an AC power supply in which the AC voltage Va alternately varies between the positive side and the negative side. The analog-to-digital converter 1b converts the signal of the AC voltage Va supplied from the voltage source 2b from an analog signal to a digital signal and outputs it.

[0048] The analog-to-digital converter 1b includes a step-down unit 10b, a conversion unit 20b, a multiplication unit 40, a first absolute value calculation unit 41, a second absolute value calculation unit 42, and an output unit 50. The analog-to-digital converter 1b inputs a signal of a voltage V2, which takes into account the influence of noise received by the analog-to-digital converter 1b, to the step-down unit 10b with respect to the signal of the AC voltage Va supplied from the voltage source 2b. When the analog-to-digital converter 1b is not affected by noise, the value of the signal of the AC voltage Va and the value of the signal of the voltage V2 are the same.

[0049] The step-down unit 10b includes resistors 13 to 17. In the step-down unit 10b, one end of the voltage source 2b is connected to one end of resistor 13, one end of resistor 14 is connected to the other end of resistor 13, one end of resistor 15 is connected to the other end of resistor 14, one end of resistor 16 is connected to the other end of resistor 15, one end of resistor 17 is connected to the other end of resistor 16, and the other end of the voltage source 2b is connected to the other end of resistor 17. In the step-down unit 10b, the connection points between the other end of resistor 13 and one end of resistor 14, and the connection points between the other end of resistor 16 and one end of resistor 17 become output terminals to the first AD conversion unit 21 provided in the conversion unit 20b. Furthermore, in the step-down unit 10b, the connection point between the other end of resistor 14 and one end of resistor 15, and the connection point between the other end of resistor 15 and one end of resistor 16, become output terminals to the second AD conversion unit 22 provided in the conversion unit 20b. That is, the step-down unit 10b steps down the voltage V2 signal, which is the signal to be measured, by a defined first ratio to output a first step-down signal, and steps down the voltage V2 signal, which is the signal to be measured, by a defined second ratio that is greater than the first ratio to output a second step-down signal. The step-down unit 10b outputs the voltage V4 signal, which is the first step-down signal, to the first AD conversion unit 21 provided in the conversion unit 20b, and outputs the voltage V5 signal, which is the second step-down signal, to the second AD conversion unit 22 provided in the conversion unit 20b.

[0050] In Embodiment 3, the defined second ratio of the step-down unit 10b is set so that even if the analog-to-digital converter 1b is affected by noise and the signal value of the AC voltage Va and the signal value of the voltage V2 become different, the signal value of the voltage V5 output from the step-down unit 10b, i.e., voltage V5, does not exceed the input voltage range of the second AD conversion unit 22. In the example of Figure 7, if the resistance value of resistor 13 is R13, the resistance value of resistor 14 is R14, the resistance value of resistor 15 is R15, the resistance value of resistor 16 is R16, and the resistance value of resistor 17 is R17, then the defined second ratio is "defined second ratio = R15 / (R13 + R14 + R15 + R16 + R17)". Note that the defined first ratio of the step-down unit 10b is a ratio with a smaller degree of step-down than the defined second ratio. In the example in Figure 7, the "prescribed first ratio = (R14 + R15 + R16) / (R13 + R14 + R15 + R16 + R17)".

[0051] The conversion unit 20b comprises a first AD conversion unit 21, a second AD conversion unit 22, and an internal conversion unit multiplication unit 23. In the conversion unit 20b, the first AD conversion unit 21 receives a voltage V4 signal, which is a first step-down signal, from the step-down unit 10b, and the second AD conversion unit 22 receives a voltage V5 signal, which is a second step-down signal, from the step-down unit 10b. The first AD conversion unit 21 converts the first step-down signal into a fourth digital data D4 and outputs it to the internal conversion unit multiplication unit 23. The internal conversion unit multiplication unit 23 multiplies the fourth digital data D4 by the reciprocal of a first ratio defined therein and outputs the first digital data D1. As mentioned above, the first defined ratio is defined as (R14 + R15 + R16) / (R13 + R14 + R15 + R16 + R17), and therefore the reciprocal of the first defined ratio is defined as (R13 + R14 + R15 + R16 + R17) / (R14 + R15 + R16). The multiplication unit 23 within the conversion unit outputs the first digital data D1 to the first absolute value calculation unit 41 and the selection unit 52 of the output unit 50. The second AD conversion unit 22 converts the second step-down signal into the second digital data D2 and outputs it to the multiplication unit 40.

[0052] Thus, the conversion unit 20b takes the signal of voltage V4, which is the first step-down signal, and the signal of voltage V5, which is the second step-down signal, as inputs, converts them into the first digital data D1 and the second digital data D2, which has a smaller value than the first digital data D1, and outputs them.

[0053] The multiplication unit 40 multiplies the second digital data D2 by the reciprocal of the second ratio and outputs the third digital data D3. That is, the multiplication unit 40 outputs the third digital data D3, which is the second digital data D2 multiplied by the reciprocal of the second ratio, to the second absolute value calculation unit 42 and the selection unit 52 of the output unit 50. As mentioned above, since "the defined second ratio = R15 / (R13 + R14 + R15 + R16 + R17)", the reciprocal of the defined second ratio is "the reciprocal of the defined second ratio = (R13 + R14 + R15 + R16 + R17) / R15".

[0054] The subsequent operations of the first absolute value calculation unit 41, the second absolute value calculation unit 42, and the output unit 50 are the same as those described in Embodiment 2.

[0055] Figure 8 is a flowchart illustrating the operation of the analog-to-digital converter 1b according to Embodiment 3. The step-down unit 10b steps down the voltage V2 signal, which is the signal to be measured, by a defined first ratio and a defined second ratio (step S31). The step-down unit 10b outputs a voltage V4 signal, which is the first step-down signal stepped down by the defined first ratio, and a voltage V5 signal, which is the second step-down signal stepped down by the defined second ratio. The conversion unit 20b converts the voltage V4 signal, which is the first step-down signal, into fourth digital data D4, multiplies the fourth digital data D4 by the reciprocal of the defined first ratio to convert it into first digital data D1, and converts the voltage V5 signal, which is the second step-down signal, into second digital data D2 (step S32). The multiplication unit 40 multiplies the second digital data D2 by the reciprocal of the defined second ratio to output third digital data D3 (step S33). In the flowchart shown in Figure 8, the operations of steps S21 and S22 are the same as those of steps S21 and S22 in the flowchart of Embodiment 2 shown in Figure 6.

[0056] The hardware configuration of the analog-to-digital converter 1b will now be described. In the analog-to-digital converter 1b, the step-down section 10b is implemented by a plurality of resistors. The conversion section 20b is implemented by a processing circuit. The processing circuit may be a processor and memory that execute a program stored in memory, or it may be dedicated hardware.

[0057] As described above, according to this embodiment, in the analog-to-digital converter 1b, the step-down unit 10b steps down the voltage V2 signal, which is the signal to be measured, by a defined first ratio and outputs a first step-down signal, and steps down the voltage V2 signal, which is the signal, by a defined second ratio that is greater than the first ratio and outputs a second step-down signal. The conversion unit 20b converts the voltage V4 signal, which is the first step-down signal, into first digital data D1 and outputs it, and converts the voltage V5 signal, which is the second step-down signal, into second digital data D2 and outputs it. As a result, the analog-to-digital converter 1b can output highly accurate digital data even when an AC voltage Va signal is supplied from the voltage source 2b via differential input, and both signals input to the conversion unit 20b are signals stepped down by the step-down unit 10b.

[0058] Embodiment 4. Embodiment 4 describes an analog-to-digital converter 1c with a different circuit configuration from the analog-to-digital converter 1 of Embodiment 1 to the analog-to-digital converter 1b of Embodiment 3. The same reference numerals are used for the components described in Embodiments 1 to 3, and detailed descriptions are omitted.

[0059] Figure 9 shows an example of the configuration of the analog-to-digital converter 1c according to Embodiment 4. The connection relationship between the analog-to-digital converter 1c and the voltage source 2a is the same as the connection relationship between the analog-to-digital converter 1a and the voltage source 2a in Embodiment 2 shown in Figure 5.

[0060] The analog-to-digital converter 1c comprises a step-down unit 10, a conversion unit 20c, a multiplication unit 40, a first absolute value calculation unit 41, a second absolute value calculation unit 42, and an output unit 50. The analog-to-digital converter 1c inputs a voltage V2 signal to the step-down unit 10, which takes into account the effect of noise on the analog-to-digital converter 1c on the AC voltage Va signal supplied from the voltage source 2a. Note that if the analog-to-digital converter 1c is not affected by noise, the values ​​of the AC voltage Va signal and the voltage V2 signal will be the same.

[0061] The step-down unit 10 operates in the same manner as the step-down unit 10 in Embodiments 1 and 2. In Embodiment 4, in the analog-to-digital converter 1c, only the step-down signal of voltage V3 from the step-down unit 10 is input to the conversion unit 20c, and the signal of voltage V2 is not input.

[0062] The conversion unit 20c comprises a first AD conversion unit 21, a second AD conversion unit 22, and an amplification unit 24. In the conversion unit 20c, the voltage V3 signal, which is a step-down signal from the step-down unit 10, is input to the second AD conversion unit 22 and the amplification unit 24. The amplification unit 24 amplifies the voltage V3 signal, which is a step-down signal, with an amplification factor corresponding to the aforementioned defined ratio, and outputs the amplified signal V6 to the first AD conversion unit 21. The amplification factor corresponding to the defined ratio is, for example, the reciprocal of the defined ratio. In Embodiment 1, an example was described in which the step-down unit 10 steps down the voltage V2 signal to 1 / 4 and outputs the voltage V3 signal. Applying this example to Embodiment 4, the amplification factor of the amplification unit 24 is set so that the voltage of the voltage V3 signal, which is a step-down signal, becomes four times greater. As a result, the first AD conversion unit 21, which is located downstream of the amplification unit 24, receives an amplified signal V6 with the same voltage as the voltage V2 input to the step-down unit 10.

[0063] The first AD conversion unit 21 converts the amplified signal V6 into first digital data D1 and outputs it to the first absolute value calculation unit 41 and the selection unit 52 of the output unit 50. The second AD conversion unit 22 converts the step-down signal, which is voltage V3, into second digital data D2 and outputs it to the multiplication unit 40. In embodiment 4, the conversion unit 20c takes the step-down signal as input and converts it into first digital data D1 and second digital data D2 which has a smaller value than the first digital data D1, and outputs them.

[0064] The subsequent operations of the multiplication unit 40, the first absolute value calculation unit 41, the second absolute value calculation unit 42, and the output unit 50 are the same as those described in Embodiment 2.

[0065] Figure 10 is a flowchart showing the operation of the analog-to-digital converter 1c according to Embodiment 4. The step-down unit 10 steps down the voltage V2 signal, which is the signal to be measured, by a specified ratio (step S11). The step-down unit 10 outputs a voltage V3 signal, which is a step-down signal. The conversion unit 20c amplifies the voltage V3 signal, which is a step-down signal stepped down by the step-down unit 10, converts the amplified signal V6 into first digital data D1, and converts the voltage V3 signal, which is a step-down signal stepped down by the step-down unit 10, into second digital data D2 (step S41). In the flowchart shown in Figure 10, the operations of steps S13, S21, and S22 are the same as the operations of steps S13, S21, and S22 in the flowchart of Embodiment 2 shown in Figure 6.

[0066] The hardware configuration of the analog-to-digital converter 1c will now be described. In the analog-to-digital converter 1c, the conversion unit 20c is implemented by a processing circuit. The processing circuit may be a processor and memory that execute a program stored in memory, or it may be dedicated hardware.

[0067] As described above, according to this embodiment, in the analog-to-digital converter 1c, the conversion unit 20c converts the amplified signal V6 obtained by amplifying the step-down signal into a first digital data D1 and outputs it, and converts the step-down signal into a second digital data D2 and outputs it. As a result, the analog-to-digital converter 1c can output high-precision digital data even when the signal input to the conversion unit 20c is only a step-down signal.

[0068] Embodiment 5. Embodiment 5 describes an analog-to-digital converter 1d with a different circuit configuration from the analog-to-digital converter 1 of Embodiment 1 to the analog-to-digital converter 1c of Embodiment 4. The same reference numerals are used for the components described in Embodiments 1 to 4, and detailed descriptions are omitted.

[0069] Figure 11 shows an example of the configuration of the analog-to-digital converter 1d according to Embodiment 5. The connection relationship between the analog-to-digital converter 1d and the voltage source 2a is the same as the connection relationship between the analog-to-digital converter 1a and the voltage source 2a in Embodiment 2 shown in Figure 5.

[0070] The analog-to-digital converter 1d comprises a step-down unit 10, a conversion unit 20d, a multiplication unit 40, a first absolute value calculation unit 41, a second absolute value calculation unit 42, and an output unit 50. The analog-to-digital converter 1d inputs a voltage V2 signal, which takes into account the effect of noise on the analog-to-digital converter 1d on the AC voltage Va signal supplied from the voltage source 2a, to the first switch 25 of the step-down unit 10 and the conversion unit 20d. Note that if the analog-to-digital converter 1d is not affected by noise, the value of the AC voltage Va signal and the value of the voltage V2 signal will be the same. The operation of the step-down unit 10 is the same as the operation of the step-down unit 10 of the analog-to-digital converter 1a described in Embodiment 2.

[0071] The conversion unit 20d includes a first switch 25, an AD conversion unit 26, a second switch 27, and a control unit 28. Based on the control of the control unit 28, the first switch 25 selects either the voltage V2 signal, which is the signal to be measured, or the voltage V3 signal, which is the step-down signal from the step-down unit 10, and outputs it to the AD conversion unit 26.

[0072] When the first switch 25 outputs a voltage V2 signal, which is the signal to be measured, the AD conversion unit 26 converts the voltage V2 signal into first digital data D1 and outputs it to the second switch 27. Also, when the first switch 25 outputs a step-down signal of voltage V3, the AD conversion unit 26 converts the step-down signal of voltage V3 into second digital data D2 and outputs it to the second switch 27. The AD conversion unit 26 is composed of a delta-sigma type AD converter, similar to the first AD conversion unit 21 and the second AD conversion unit 22 described in Embodiment 1 and other embodiments.

[0073] Based on the control of the control unit 28, the second switch 27 outputs the first digital data D1 to the first absolute value calculation unit 41 and the selection unit 52 of the output unit 50 when the first digital data D1 is output from the AD conversion unit 26. Also, based on the control of the control unit 28, the second switch 27 outputs the second digital data D2 to the multiplication unit 40 when the second digital data D2 is output from the AD conversion unit 26.

[0074] The control unit 28 controls the first switch 25 and the second switch 27 such that when the first switch 25 outputs a voltage V2 signal, which is the signal to be measured, the second switch 27 outputs the first digital data D1 to the first absolute value calculation unit 41 and the selection unit 52 of the output unit 50, and when the first switch 25 outputs a voltage V3 signal, which is a step-down signal, the second switch 27 outputs the second digital data D2 to the multiplication unit 40. The control unit 28 controls the switching of the first switch 25 and the second switch 27 in a time-division manner, for example, so that the period during which one of the first switch 25 and the second switch 27 is selected is the same as the period during which the first switch 25 and the second switch 27 are selected.

[0075] The subsequent operations of the multiplication unit 40, the first absolute value calculation unit 41, the second absolute value calculation unit 42, and the output unit 50 are the same as those described in Embodiment 2.

[0076] Figure 12 is a flowchart showing the operation of the analog-to-digital converter 1d according to Embodiment 5. The step-down unit 10 steps down the voltage V2 signal, which is the signal to be measured, by a specified ratio (step S11). The step-down unit 10 outputs a voltage V3 signal, which is a step-down signal. When the conversion unit 20d selects the voltage V2 signal, which is the signal to be measured, as the input signal, it converts the voltage V2 signal, which is the signal to be measured, into first digital data D1, and when the step-down signal, which is voltage V3, is selected as the input signal, it converts the voltage V3 signal, which is a step-down signal, into second digital data D2 (step S51). In the flowchart shown in Figure 12, the operations of steps S13, S21, and S22 are the same as the operations of steps S13, S21, and S22 in the flowchart of Embodiment 2 shown in Figure 6.

[0077] The hardware configuration of the analog-to-digital converter 1d will now be described. In the analog-to-digital converter 1d, the conversion unit 20d is implemented by a processing circuit. The processing circuit may be a processor and memory that execute a program stored in memory, or it may be dedicated hardware.

[0078] As described above, according to this embodiment, in the analog-to-digital converter 1d, the conversion unit 20d includes one AD conversion unit 26, the first switch 25 controls the signal input to the AD conversion unit 26, and the second switch 27 controls the output destination of the digital data output from the AD conversion unit 26. As a result, the analog-to-digital converter 1d can output high-precision digital data even when it is equipped with only one AD conversion unit 26. Furthermore, the analog-to-digital converter 1d can reduce the number of AD converters compared to the analog-to-digital converters 1, 1a, 1b, and 1c described in Embodiments 1 to 4, thus simplifying the configuration.

[0079] Embodiment 6. Embodiment 6 describes an analog-to-digital converter 1e with a different circuit configuration from the analog-to-digital converter 1 of Embodiment 1 to the analog-to-digital converter 1d of Embodiment 5. The same reference numerals are used for the components described in Embodiments 1 to 5, and detailed descriptions are omitted.

[0080] Figure 13 shows an example of the configuration of the analog-to-digital converter 1e according to Embodiment 6. The connection relationship between the analog-to-digital converter 1e and the voltage source 2a is the same as the connection relationship between the analog-to-digital converter 1a and the voltage source 2a in Embodiment 2 shown in Figure 5.

[0081] The analog-to-digital converter 1e comprises a step-down unit 10, a conversion unit 20e, a multiplication unit 40, a first absolute value calculation unit 41, a second absolute value calculation unit 42, and an output unit 50. The analog-to-digital converter 1e inputs a voltage V2 signal to the step-down unit 10, which takes into account the effect of noise on the analog-to-digital converter 1e on the AC voltage Va signal supplied from the voltage source 2a. Note that if the analog-to-digital converter 1e is not affected by noise, the values ​​of the AC voltage Va signal and the voltage V2 signal will be the same. The operation of the step-down unit 10 is the same as the operation of the step-down unit 10 in the analog-to-digital converter 1a of Embodiment 2. In Embodiment 6, only the voltage V3 signal is input to the conversion unit 20e, and the voltage V2 signal is not input.

[0082] The conversion unit 20e includes a first switch 25, an AD conversion unit 26, a second switch 27, a control unit 28, a first amplification unit 29, and a second amplification unit 30. The first amplification unit 29 amplifies the voltage V3 signal, which is a step-down signal, with a first amplification factor corresponding to the aforementioned defined ratio, and outputs the first amplified signal V7 to the first switch 25. The first amplification factor corresponding to the defined ratio is, for example, the same as the amplification factor corresponding to the defined ratio described in Embodiment 4, that is, the reciprocal of the defined ratio. The second amplification unit 30 amplifies the voltage V3 signal, which is a step-down signal, with a second amplification factor smaller than the first amplification factor, and outputs the second amplified signal V8 to the first switch 25. The second amplification factor, which is smaller than the first amplification factor, is set so that even when the step-down signal, voltage V3, is amplified by the second amplification factor, the voltage of the second amplified signal V8 does not exceed the input voltage range of the AD conversion unit 26 when the second amplified signal V8 is input to the AD conversion unit 26.

[0083] The first switch 25, based on the control of the control unit 28, selects and outputs either the first amplified signal V7 or the second amplified signal V8. When the first amplified signal V7 is output from the first switch 25, the AD conversion unit 26 converts the first amplified signal V7 into first digital data D1 and outputs it to the second switch 27. When the second amplified signal V8 is output from the first switch 25, the AD conversion unit 26 converts the second amplified signal V8 into second digital data D2 and outputs it to the second switch 27. When the first digital data D1 is output from the AD conversion unit 26, the second switch 27, based on the control of the control unit 28, outputs the first digital data D1 to the first absolute value calculation unit 41 and the selection unit 52 of the output unit 50. Furthermore, the second switch 27 outputs the second digital data D2 to the multiplication unit 40 when the second digital data D2 is output from the AD conversion unit 26, based on the control of the control unit 28.

[0084] The control unit 28 controls the first switch 25 and the second switch 27 such that when the first amplified signal V7 is output from the first switch 25, the second switch 27 outputs the first digital data D1 to the first absolute value calculation unit 41 and the selection unit 52 of the output unit 50, and when the second amplified signal V8 is output from the first switch 25, the second switch 27 outputs the second digital data D2 to the multiplication unit 40. The control unit 28 controls the switching of the first switch 25 and the second switch 27 in a time-division manner, for example, such that the period during which one of the first switch 25 and the second switch 27 is selected is the same as the period during which the other of the first switch 25 and the second switch 27 is selected.

[0085] The multiplication unit 40 multiplies the second digital data D2 by the predetermined ratio and a value corresponding to the calculation of the conversion unit 20e to output the third digital data D3. Specifically, the multiplication unit 40 multiplies the second digital data D2 by a value obtained from the reciprocal of the predetermined ratio and the reciprocal of a value corresponding to the degree of step-down of the second amplified signal V8 with respect to the voltage V2 signal, which is the signal to be measured and is calculated from the second amplification factor, to output the third digital data D3 to the second absolute value calculation unit 42 and the selection unit 52 of the output unit 50.

[0086] The subsequent operations of the first absolute value calculation unit 41, the second absolute value calculation unit 42, and the output unit 50 are the same as those described in Embodiment 2.

[0087] Figure 14 is a flowchart illustrating the operation of the analog-to-digital converter 1e according to Embodiment 6. The step-down unit 10 steps down the voltage V2 signal, which is the signal to be measured, by a specified ratio (step S11). The step-down unit 10 outputs a voltage V3 signal, which is a step-down signal. The conversion unit 20e selects either the first amplification unit 29 or the second amplification unit 30 to be used, and converts the step-down signal, voltage V3, into a first amplified signal V7, which is amplified by a first amplification factor, into first digital data D1, or converts the step-down signal, voltage V3, into a second amplified signal V8, which is amplified by a second amplification factor smaller than the first amplification factor, into second digital data D2 (step S61). The multiplication unit 40 multiplies the second digital data D2 by the specified ratio and a value corresponding to the calculations performed by the conversion unit 20e, and outputs third digital data D3 (step S62). In the flowchart shown in Figure 14, the operations of steps S21 and S22 are the same as those of steps S21 and S22 in the flowchart of Embodiment 2 shown in Figure 6.

[0088] The hardware configuration of the analog-to-digital converter 1e will now be described. In the analog-to-digital converter 1e, the conversion unit 20e is implemented by a processing circuit. The processing circuit may be a processor and memory that execute a program stored in memory, or it may be dedicated hardware.

[0089] As described above, according to this embodiment, in the analog-to-digital converter 1e, the conversion unit 20e amplifies the step-down signal from the step-down unit 10 with different amplification factors using the first amplification unit 29 and the second amplification unit 30. Then, for one AD conversion unit 26, the first switch 25 controls the signal input to the AD conversion unit 26, and the second switch 27 controls the output destination of the digital data output from the AD conversion unit 26. As a result, the analog-to-digital converter 1e can output high-precision digital data even when it is equipped with only one AD conversion unit 26. Furthermore, the analog-to-digital converter 1e can reduce the number of AD converters compared to the analog-to-digital converters 1, 1a, 1b, and 1c described in Embodiments 1 to 4, thus simplifying the configuration.

[0090] Embodiment 7. Embodiment 7 describes an analog-to-digital converter 1f with a different circuit configuration from the analog-to-digital converter 1 of Embodiment 1 to the analog-to-digital converter 1e of Embodiment 6. The same reference numerals are used for the components described in Embodiments 1 to 6, and detailed descriptions are omitted.

[0091] Figure 15 shows an example of the configuration of the analog-to-digital converter 1f according to Embodiment 7. The connection relationship between the analog-to-digital converter 1f and the voltage source 2a is the same as the connection relationship between the analog-to-digital converter 1a and the voltage source 2a in Embodiment 2 shown in Figure 5.

[0092] The analog-to-digital converter 1f comprises a step-down unit 10, a conversion unit 20f, a multiplication unit 40, a first absolute value calculation unit 41, a second absolute value calculation unit 42, and an output unit 50. The analog-to-digital converter 1f inputs a voltage V2 signal to the step-down unit 10, which takes into account the effect of noise on the analog-to-digital converter 1f on the AC voltage Va signal supplied from the voltage source 2a. Note that if the analog-to-digital converter 1f is not affected by noise, the values ​​of the AC voltage Va signal and the voltage V2 signal will be the same. The operation of the step-down unit 10 is the same as the operation of the step-down unit 10 in the analog-to-digital converter 1a of Embodiment 2. In Embodiment 7, only the voltage V3 signal is input to the conversion unit 20f, and the voltage V2 signal is not input.

[0093] The conversion unit 20f comprises an AD conversion unit 26f, a control unit 28f, and a variable amplification unit 31. Based on the control of the control unit 28f, the variable amplification unit 31 amplifies the voltage V3 signal, which is a step-down signal, by a first amplification factor corresponding to a defined ratio and outputs a first amplified signal V9, or amplifies the voltage V3 signal, which is a step-down signal, by a second amplification factor smaller than the first amplification factor and outputs a second amplified signal V10. Here, the first amplification factor, the second amplification factor, the first amplified signal V9, and the second amplified signal V10 are, for example, the same as the first amplification factor, the second amplification factor, the first amplified signal V7, and the second amplified signal V8 described in Embodiment 6. The variable amplification unit 31 of Embodiment 7 is configured to combine the first amplification unit 29, the second amplification unit 30, and the first switch 25 of Embodiment 6 into one unit.

[0094] Based on the control of the control unit 28f, when the variable amplifier 31 outputs the first amplified signal V9, the AD conversion unit 26f converts the first amplified signal V9 into first digital data D1 and outputs it to the first absolute value calculation unit 41 and the selection unit 52 of the output unit 50. Also, based on the control of the control unit 28f, when the variable amplifier 31 outputs the second amplified signal V10, the AD conversion unit 26f converts the second amplified signal V10 into second digital data D2 and outputs it to the multiplication unit 40. The AD conversion unit 26f is composed of a delta-sigma type AD converter, similar to the first AD conversion unit 21 and the second AD conversion unit 22 described in Embodiment 1 and the like. The AD conversion unit 26f of Embodiment 7 has a configuration that combines the AD conversion unit 26 and the second switch 27 of Embodiment 6 into one unit.

[0095] The control unit 28f controls the amplification factor of the variable amplifier unit 31 when it amplifies a step-down signal, which is a voltage V3. Specifically, the control unit 28f sets the amplification factor of the variable amplifier unit 31 to either the first amplification factor or the second amplification factor. Furthermore, the control unit 28f controls the variable amplifier unit 31 and the AD conversion unit 26f to output the first digital data D1 from the AD conversion unit 26f to the first absolute value calculation unit 41 and the selection unit 52 of the output unit 50 when the first amplified signal V9 is output from the variable amplifier unit 31, and to output the second digital data D2 from the AD conversion unit 26f to the multiplication unit 40 when the second amplified signal V10 is output from the variable amplifier unit 31.

[0096] The multiplication unit 40 multiplies the second digital data D2 by the predetermined ratio and a value corresponding to the calculation of the conversion unit 20f to output the third digital data D3. Specifically, the multiplication unit 40 multiplies the second digital data D2 by a value obtained from the reciprocal of the predetermined ratio and the reciprocal of a value corresponding to the degree of voltage reduction of the second amplified signal V10 relative to the voltage V2 signal, which is the signal to be measured and is calculated from the second amplification factor, to output the third digital data D3 to the second absolute value calculation unit 42 and the selection unit 52 of the output unit 50.

[0097] The subsequent operations of the first absolute value calculation unit 41, the second absolute value calculation unit 42, and the output unit 50 are the same as those described in Embodiment 2.

[0098] Figure 16 is a flowchart showing the operation of the analog-to-digital converter 1f according to Embodiment 7. The step-down unit 10 steps down the voltage V2 signal, which is the signal to be measured, by a specified ratio (step S11). The step-down unit 10 outputs a voltage V3 signal, which is a step-down signal. The conversion unit 20f controls the amplification factor and converts the voltage V3 signal, which is a step-down signal, into a first amplified signal V9, which is amplified by a first amplification factor, into first digital data D1, or converts the voltage V3 signal, which is a step-down signal, into a second amplified signal V10, which is amplified by a second amplification factor smaller than the first amplification factor, into second digital data D2 (step S71). The multiplication unit 40 multiplies the second digital data D2 by the specified ratio and a value corresponding to the calculation content of the conversion unit 20f, and outputs third digital data D3 (step S72). In the flowchart shown in Figure 16, the operations of steps S21 and S22 are the same as those of steps S21 and S22 in the flowchart of Embodiment 2 shown in Figure 6.

[0099] The hardware configuration of the analog-to-digital converter 1f will now be described. In the analog-to-digital converter 1f, the conversion unit 20f is implemented by a processing circuit. The processing circuit may be a processor and memory that execute a program stored in memory, or it may be dedicated hardware.

[0100] As described above, according to this embodiment, in the analog-to-digital converter 1f, the conversion unit 20f amplifies the step-down signal from the step-down unit 10 at different amplification rates using the variable amplification unit 31, and then a single AD conversion unit 26f converts each amplified signal, which has been amplified at different amplification rates, into digital data and controls the output destination of the digital data. As a result, the analog-to-digital converter 1f can output highly accurate digital data even if it is equipped with only one AD conversion unit 26f. Furthermore, the analog-to-digital converter 1f can simplify its configuration by reducing the number of AD converters compared to the analog-to-digital converters 1, 1a, 1b, and 1c described in Embodiments 1 to 4. In addition, the analog-to-digital converter 1f can further simplify its configuration by not including the first switch 25 and the second switch 27 compared to the analog-to-digital converters 1d and 1e described in Embodiments 5 and 6.

[0101] The configurations shown in the above embodiments are examples only, and it is possible to combine them with other known technologies, combine different embodiments, and omit or modify parts of the configuration without departing from the gist of the invention.

[0102] 1, 1a, 1b, 1c, 1d, 1e, 1f Analog-to-digital converter, 2, 2a, 2b Voltage source, 3 Probe, 10, 10b Step-down unit, 11-17 Resistors, 20, 20b, 20c, 20d, 20e, 20f Conversion unit, 21 First AD conversion unit, 22 Second AD conversion unit, 23 Multiplication unit within conversion unit, 24 Amplification unit, 25 First switch, 26, 26f AD conversion unit, 27 Second switch, 28, 28f Control unit, 29 First amplification unit, 30 Second amplification unit, 31 Variable amplification unit, 40 Multiplication unit, 41 First absolute value calculation unit, 42 Second absolute value calculation unit, 50 Output unit, 51 Comparison unit, 52 Selection unit, 90, 93 Processing circuit, 91 Processor, 92 Memory.

Claims

1. An analog-to-digital converter comprising: a step-down unit that steps down a signal to be measured by a defined ratio and outputs a step-down signal, or steps down the signal by a defined first ratio and outputs a first step-down signal, and steps down the signal by a defined second ratio which is greater than the first ratio and outputs a second step-down signal; a conversion unit that takes the signal and the step-down signal, or the first step-down signal and the second step-down signal, or the step-down signal as input and converts them into first digital data and second digital data which has a smaller value than the first digital data and outputs them; a multiplication unit that multiplies the second digital data by the reciprocal of the ratio, or the reciprocal of the second ratio, or the ratio and a value corresponding to the calculation content of the conversion unit and outputs third digital data; and an output unit that compares the value of the first digital data and the value of the third digital data and outputs the larger value.

2. The analog-to-digital converter according to claim 1, wherein the conversion unit comprises a first analog-to-digital conversion unit that converts the signal into the first digital data, and a second analog-to-digital conversion unit that converts the step-down signal into the second digital data, and the multiplication unit outputs the third digital data obtained by multiplying the second digital data by the reciprocal of the ratio to the output unit.

3. The analog-to-digital converter according to claim 1, characterized in that the conversion unit comprises: a first analog-to-digital conversion unit that converts the signal into the first digital data; a second analog-to-digital conversion unit that converts the step-down signal into the second digital data; further comprising: a first absolute value calculation unit that calculates the absolute value of the first digital data; and a second absolute value calculation unit that calculates the absolute value of the third digital data; the multiplication unit outputs the third digital data obtained by multiplying the second digital data by the reciprocal of the ratio to the second absolute value calculation unit and the output unit; and the output unit compares the absolute value of the first digital data and the absolute value of the third digital data and outputs the one with the larger absolute value.

4. The conversion unit comprises: a first analog-to-digital conversion unit that converts the first step-down signal into a fourth digital data; an internal multiplication unit that multiplies the fourth digital data by the reciprocal of the first ratio and outputs the first digital data; a second analog-to-digital conversion unit that converts the second step-down signal into a second digital data; further comprising: a first absolute value calculation unit that calculates the absolute value of the first digital data; and a second absolute value calculation unit that calculates the absolute value of the third digital data; the multiplication unit outputs the third digital data obtained by multiplying the second digital data by the reciprocal of the second ratio to the second absolute value calculation unit and the output unit; and the output unit compares the absolute value of the first digital data and the absolute value of the third digital data and outputs the one with the larger absolute value; characterized in that the analog-to-digital converter according to claim 1.

5. The analog-to-digital converter according to claim 1, characterized in that the conversion unit comprises: an amplification unit that amplifies the step-down signal with an amplification factor corresponding to the ratio and outputs an amplified signal; a first analog-to-digital conversion unit that converts the amplified signal into the first digital data; a second analog-to-digital conversion unit that converts the step-down signal into the second digital data; and further comprises: a first absolute value calculation unit that calculates the absolute value of the first digital data; a second absolute value calculation unit that calculates the absolute value of the third digital data; the multiplication unit outputs the third digital data obtained by multiplying the second digital data by the reciprocal of the ratio to the second absolute value calculation unit and the output unit; and the output unit compares the absolute value of the first digital data and the absolute value of the third digital data and outputs the one with the larger absolute value.

6. The analog-to-digital converter according to any one of claims 2 to 5, characterized in that the first analog-to-digital conversion unit and the second analog-to-digital conversion unit are composed of delta-sigma type analog-to-digital converters.

7. The conversion unit comprises: a first switch that selects and outputs the signal or the step-down signal; an analog-to-digital conversion unit that converts the signal into first digital data and outputs it when the signal is output from the first switch, and converts the step-down signal into second digital data and outputs it when the step-down signal is output from the first switch; a second switch that outputs the first digital data to a first absolute value calculation unit and an output unit that calculate the absolute value of the first digital data when the first digital data is output from the analog-to-digital conversion unit, and outputs the second digital data to the multiplication unit when the second digital data is output from the analog-to-digital conversion unit; and a control unit that controls the first switch and the second switch so that when the signal is output from the first switch, the first digital data is output from the second switch to the first absolute value calculation unit and the output unit, and when the step-down signal is output from the first switch, the second digital data is output from the second switch to the multiplication unit; and further, The analog-to-digital converter according to claim 1, comprising: a first absolute value calculation unit; a second absolute value calculation unit for calculating the absolute value of the third digital data; the multiplication unit outputs the third digital data obtained by multiplying the second digital data by the reciprocal of the ratio to the second absolute value calculation unit and the output unit; and the output unit compares the absolute value of the first digital data and the absolute value of the third digital data and outputs the one with the larger absolute value.

8. The conversion unit includes: a first amplification unit that amplifies the step-down signal with a first amplification factor corresponding to the ratio and outputs a first amplified signal; a second amplification unit that amplifies the step-down signal with a second amplification factor smaller than the first amplification factor and outputs a second amplified signal; a first switch that selects and outputs either the first amplified signal or the second amplified signal; an analog-to-digital conversion unit that converts the first amplified signal into first digital data when the first amplified signal is output from the first switch, and converts the second amplified signal into second digital data and outputs it when the second amplified signal is output from the first switch; a second switch that outputs the first digital data to a first absolute value calculation unit that calculates the absolute value of the first digital data and to the output unit when the first digital data is output from the analog-to-digital conversion unit, and outputs the second digital data to the multiplication unit when the second digital data is output from the analog-to-digital conversion unit. The analog-to-digital converter according to claim 1, further comprising: a control unit that controls the first switch and the second switch to output the first digital data from the second switch to the first absolute value calculation unit and the output unit when the first amplified signal is output from the first switch, and to output the second digital data from the second switch to the multiplication unit when the second amplified signal is output from the first switch; further comprising: a first absolute value calculation unit; and a second absolute value calculation unit that calculates the absolute value of the third digital data; the multiplication unit multiplies the second digital data by a value obtained from the reciprocal of the ratio and the reciprocal of a value corresponding to the degree of step-down of the second amplified signal relative to the signal calculated from the second amplification factor, as a value corresponding to the ratio and the calculation content of the conversion unit, and outputs the third digital data to the second absolute value calculation unit and the output unit; and the output unit compares the absolute value of the first digital data and the absolute value of the third digital data and outputs the one with the larger absolute value.

9. The conversion unit comprises: a variable amplifier that amplifies the step-down signal with a first amplification factor corresponding to the ratio and outputs a first amplified signal, or amplifies the step-down signal with a second amplification factor smaller than the first amplification factor and outputs a second amplified signal; an analog-to-digital conversion unit that, when the first amplified signal is output from the variable amplifier, converts the first amplified signal into first digital data and outputs it to a first absolute value calculation unit and the output unit which calculate the absolute value of the first digital data, and when the second amplified signal is output from the variable amplifier, converts the second amplified signal into second digital data and outputs it to the multiplication unit; and a control unit that controls the variable amplifier and the analog-to-digital conversion unit so that when the first amplified signal is output from the variable amplifier, the analog-to-digital conversion unit outputs the first digital data to the first absolute value calculation unit and the output unit, and when the second amplified signal is output from the variable amplifier, the analog-to-digital conversion unit outputs the second digital data to the multiplication unit. The analog-to-digital converter according to claim 1, comprising: a first absolute value calculation unit; a second absolute value calculation unit for calculating the absolute value of the third digital data; the multiplication unit multiplies the second digital data by a value obtained from the reciprocal of the ratio and the reciprocal of a value corresponding to the degree of step-down of the second amplified signal relative to the signal calculated from the second amplification factor, as a value corresponding to the calculation content of the ratio and the conversion unit, and outputs the third digital data to the second absolute value calculation unit and the output unit; and the output unit compares the absolute value of the first digital data and the absolute value of the third digital data and outputs the one with the larger absolute value.

10. The analog-to-digital converter according to any one of claims 7 to 9, characterized in that the analog-to-digital conversion unit is composed of a delta-sigma type analog-to-digital converter.

11. Analog-to-digital conversion method for an analog-to-digital converter, comprising: a step-down step in which a step-down unit steps down a signal to be measured by a defined ratio and outputs a step-down signal, or steps down the signal by a defined first ratio and outputs a first step-down signal, and steps down the signal by a defined second ratio which is greater than the first ratio and outputs a second step-down signal; a conversion step in which a conversion unit takes the signal and the step-down signal, or the first step-down signal and the second step-down signal, or the step-down signal as input and converts them into first digital data and second digital data which has a smaller value than the first digital data and outputs them; a multiplication step in which a multiplication unit multiplies the second digital data by the reciprocal of the ratio, or the reciprocal of the second ratio, or the ratio and a value corresponding to the calculation content of the conversion unit and outputs third digital data; and an output step in which an output unit compares the value of the first digital data and the value of the third digital data and outputs the larger value. An analog-to-digital conversion method characterized by including the following.

12. The analog-to-digital conversion method according to claim 11, wherein the conversion step includes: a first analog-to-digital conversion step in which a first analog-to-digital conversion unit converts the signal into first digital data; and a second analog-to-digital conversion step in which a second analog-to-digital conversion unit converts the step-down signal into second digital data, wherein in the multiplication step, the multiplication unit outputs to the output unit the third digital data obtained by multiplying the second digital data by the reciprocal of the ratio.

13. The analog-to-digital conversion method according to 11, characterized in that the conversion step includes: a first analog-to-digital conversion step in which a first analog-to-digital conversion unit converts the signal into first digital data; a second analog-to-digital conversion step in which a second analog-to-digital conversion unit converts the step-down signal into second digital data; further including: a first absolute value calculation step in which a first absolute value calculation unit calculates the absolute value of the first digital data; a second absolute value calculation step in which a second absolute value calculation unit calculates the absolute value of the third digital data; in the multiplication step, the multiplication unit outputs the third digital data obtained by multiplying the second digital data by the reciprocal of the ratio to the second absolute value calculation unit and the output unit; and in the output step, the output unit compares the absolute value of the first digital data and the absolute value of the third digital data and outputs the one with the larger absolute value.

14. The conversion step includes: a first analog-to-digital conversion step in which a first analog-to-digital conversion unit converts the first step down signal into a fourth digital data; a multiplication step in which an in-conversion unit multiplies the fourth digital data by the reciprocal of the first ratio and outputs the first digital data; a second analog-to-digital conversion step in which a second analog-to-digital conversion unit converts the second step down signal into a second digital data; further, a first absolute value calculation step in which a first absolute value calculation unit calculates the absolute value of the first digital data; a second absolute value calculation step in which a second absolute value calculation unit calculates the absolute value of the third digital data; in the multiplication step, the multiplication unit outputs the third digital data obtained by multiplying the second digital data by the reciprocal of the second ratio to the second absolute value calculation unit and the output unit; and in the output step, the output unit compares the absolute value of the first digital data and the absolute value of the third digital data and outputs the one with the larger absolute value. The analog-to-digital conversion method according to feature 11.

15. The analog-to-digital conversion method according to 11, wherein the conversion step includes: an amplification step in which an amplification unit amplifies the step-down signal with an amplification factor corresponding to the ratio and outputs an amplified signal; a first analog-to-digital conversion step in which a first analog-to-digital conversion unit converts the amplified signal into first digital data; a second analog-to-digital conversion step in which a second analog-to-digital conversion unit converts the step-down signal into second digital data; further including: a first absolute value calculation step in which a first absolute value calculation unit calculates the absolute value of the first digital data; a second absolute value calculation step in which a second absolute value calculation unit calculates the absolute value of the third digital data; in the multiplication step, the multiplication unit outputs the third digital data obtained by multiplying the second digital data by the reciprocal of the ratio to the second absolute value calculation unit and the output unit; and in the output step, the output unit compares the absolute value of the first digital data and the absolute value of the third digital data and outputs the one with the larger absolute value.

16. The analog-to-digital conversion method according to any one of claims 12 to 15, characterized in that the first analog-to-digital conversion unit and the second analog-to-digital conversion unit are composed of delta-sigma type analog-to-digital converters.

17. The conversion step comprises: a first switch step in which the first switch selects and outputs the signal or the step-down signal; an analog-to-digital conversion step in which the analog-to-digital conversion unit converts the signal to first digital data and outputs it when the signal is output from the first switch, and converts the step-down signal to second digital data and outputs it when the step-down signal is output from the first switch; a second switch step in which the second switch outputs the first digital data to a first absolute value calculation unit and an output unit that calculate the absolute value of the first digital data when the first digital data is output from the analog-to-digital conversion unit, and outputs the second digital data to the multiplication unit when the second digital data is output from the analog-to-digital conversion unit; The analog-to-digital conversion method according to claim 11, further comprising: a control step in which a control unit controls the first switch and the second switch to output the first digital data from the second switch to the first absolute value calculation unit and the output unit when the signal is output from the first switch, and to output the second digital data from the second switch to the multiplication unit when the step-down signal is output from the first switch; further comprising: a first absolute value calculation step in which the first absolute value calculation unit calculates the absolute value of the first digital data; a second absolute value calculation step in which the second absolute value calculation unit calculates the absolute value of the third digital data; in the multiplication step, the multiplication unit outputs the third digital data obtained by multiplying the second digital data by the reciprocal of the ratio to the second absolute value calculation unit and the output unit; and in the output step, the output unit compares the absolute value of the first digital data and the absolute value of the third digital data and outputs the one with the larger absolute value.

18. The conversion step comprises: a first amplification step in which a first amplifier unit amplifies the step-down signal with a first amplification factor corresponding to the ratio and outputs a first amplified signal; a second amplification step in which a second amplifier unit amplifies the step-down signal with a second amplification factor smaller than the first amplification factor and outputs a second amplified signal; a first switching step in which a first switch selects and outputs either the first amplified signal or the second amplified signal; and an analog-to-digital conversion step in which an analog-to-digital conversion unit converts the first amplified signal into first digital data when the first amplified signal is output from the first switch, and converts the second amplified signal into second digital data and outputs it when the second amplified signal is output from the first switch. A second switch step includes: a second switch step in which, when the first digital data is output from the analog-to-digital conversion unit, the second switch outputs the first digital data to the first absolute value calculation unit and the output unit which calculate the absolute value of the first digital data, and when the second digital data is output from the analog-to-digital conversion unit, the second switch outputs the second digital data to the multiplication unit; a control step in which the control unit controls the first switch and the second switch so that when the first amplified signal is output from the first switch, the first digital data is output from the second switch to the first absolute value calculation unit and the output unit, and when the second amplified signal is output from the first switch, the second switch outputs the second digital data to the multiplication unit; further, a first absolute value calculation unit includes a first absolute value calculation step in which it calculates the absolute value of the first digital data; and a second absolute value calculation unit includes a second absolute value calculation step in which it calculates the absolute value of the third digital data. In the multiplication step, the multiplication unit multiplies the second digital data by a value obtained from the reciprocal of the ratio and the reciprocal of a value corresponding to the degree of voltage reduction of the second amplified signal relative to the signal calculated from the second amplification factor, as a value corresponding to the calculation content of the conversion unit, and outputs the third digital data to the second absolute value calculation unit and the output unit.The analog-to-digital conversion method according to claim 11, characterized in that, in the output step, the output unit compares the absolute value of the first digital data with the absolute value of the third digital data and outputs the one with the larger absolute value.

19. The conversion step comprises: a variable amplification step in which a variable amplifier amplifies the step-down signal with a first amplification factor corresponding to the ratio and outputs a first amplified signal, or amplifies the step-down signal with a second amplification factor smaller than the first amplification factor and outputs a second amplified signal; and an analog-to-digital conversion step in which, when the first amplified signal is output from the variable amplifier, the first amplified signal is converted into first digital data and output to a first absolute value calculation unit that calculates the absolute value of the first digital data and to the output unit, and when the second amplified signal is output from the variable amplifier, the second amplified signal is converted into second digital data and output to the multiplication unit. The control unit controls the variable amplifier and the analog-to-digital converter to output the first digital data from the analog-to-digital converter to the first absolute value calculation unit and the output unit when the first amplified signal is output from the variable amplifier, and to output the second digital data from the analog-to-digital converter to the multiplication unit when the second amplified signal is output from the variable amplifier, further comprising: a first absolute value calculation step in which the first absolute value calculation unit calculates the absolute value of the first digital data; a second absolute value calculation step in which the second absolute value calculation unit calculates the absolute value of the third digital data; and in the multiplication step, the multiplication unit multiplies the second digital data by a value obtained from the reciprocal of the ratio and the reciprocal of a value corresponding to the degree of step-down of the second amplified signal relative to the signal calculated from the second amplification factor, as a value corresponding to the calculation content of the converter, and outputs the third digital data to the second absolute value calculation unit and the output unit. The analog-to-digital conversion method according to claim 11, characterized in that, in the output step, the output unit compares the absolute value of the first digital data with the absolute value of the third digital data and outputs the one with the larger absolute value.

20. The analog-to-digital conversion method according to any one of claims 17 to 19, characterized in that the analog-to-digital conversion unit is composed of a delta-sigma type analog-to-digital converter.

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