Electronic apparatus and device

Abstract

The present application provides an electronic apparatus and device. The electronic apparatus comprises a first accumulator and N filter modules, each filter module among the N filter modules comprises a plurality of branches, each branch among the plurality of branches comprises a phase adjustment unit and an amplitude adjustment unit that are coupled, and an output end of each filter module is coupled to the first accumulator. For a first filter module among the N filter modules, an input end of the phase adjustment unit in the first filter module is coupled to an input end of the electronic apparatus; and for an i-th filter module among the N filter modules, an input end of the phase adjustment unit in the i-th filter module is coupled to an output end of the phase adjustment unit in an (i-1)-th filter module. In this way, as the number of filter modules increases, finer amplitude and phase adjustment can be achieved, thereby improving the amplitude and phase equalization capability of the electronic apparatus.

Description

An electronic device and equipment

[0001] Cross-reference to related applications

[0002] This application claims priority to Chinese Patent Application No. 202411505942.5, filed on October 25, 2024, entitled "An Electronic Device and Equipment", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of communication technology, and in particular to an electronic device and apparatus. Background Technology

[0004] When a useful signal (i.e., a service signal) passes through a nonlinear system, it will produce nonlinear distortion. For example, after a useful signal is amplified by a power amplifier (PA), the output signal contains both the useful signal and the nonlinear distortion signal.

[0005] Currently, feedforward cancellation technology is commonly used to cancel nonlinear distortion components in the output signal of a nonlinear system. The feedforward cancellation system is located between the PA and the duplexer in the transmission channel. The feedforward cancellation system generally includes an equalizer. The amplitude and phase equalization capability of the equalizer affects the cancellation effect on the nonlinear distortion signal in the transmission signal of the input duplexer, thus affecting the performance of the signal processing system. Therefore, improving the amplitude and phase adjustment capability of the equalizer is particularly important. Summary of the Invention

[0006] This application provides an electronic device and apparatus for improving amplitude and phase equalization capabilities.

[0007] In a first aspect, embodiments of this application provide an electronic device, which may include: a first accumulator and N filtering modules, where N is an integer greater than 1. Each of the N filtering modules includes multiple branches, and each of the multiple branches includes a coupled phase adjustment unit and an amplitude adjustment unit. The output terminal of each filtering module is coupled to the first accumulator. For the first filtering module among the N filtering modules, the input terminal of the phase adjustment unit in the first filtering module is coupled to the input terminal of the electronic device. For the i-th filtering module among the N filtering modules, the input terminal of the phase adjustment unit in the i-th filtering module is coupled to the output terminal of the phase adjustment unit in the (i-1)-th filtering module, where i is an integer greater than 1 and not greater than N. Thus, as the number of filtering modules increases, the total number of amplitude adjustment units also increases, which is equivalent to an increase in the number of taps. Since the amplitude adjustment unit can perform amplitude adjustment, the increase of amplitude adjustment units can achieve more precise amplitude adjustment. Similarly, the phase adjustment unit can perform phase adjustment, so the increase of phase adjustment units can achieve more precise phase adjustment. Therefore, with the increase of filtering modules, more precise amplitude and phase adjustment can be achieved, thereby improving the amplitude and phase equalization capability of electronic devices.

[0008] Optionally, different filtering modules include the same number of branches. The input terminal of the phase adjustment unit in the j-th branch of the i-th filtering module is coupled to the output terminal of the phase adjustment unit in the j-th branch of the (i-1)-th filtering module, where j is a positive integer. This simplifies the structure of the electronic device, reduces its driving complexity, and thus lowers its driving power consumption. Furthermore, it enables finer phase adjustment, thereby improving the amplitude and phase equalization capability of the electronic device.

[0009] Furthermore, the phase difference between the phase adjustment unit in the j-th branch of the i-th filter module and the phase adjustment unit in the j-th branch of the (i-1)-th filter module is at least one adjustment period, where j is a positive integer. This allows the phase adjustment units in the coupled branches of different filter modules to output signals sequentially, achieving phase adjustment. The more filter modules there are, the finer this phase adjustment becomes, and it can also increase the number of effective amplitude adjustment coefficients (explained later), thereby improving the accuracy of phase adjustment and enhancing the amplitude-phase equalization capability of the electronic device.

[0010] Alternatively, different filter modules may include different numbers of branches. The phase difference between the phase adjustment unit in the j-th branch of the i-th filter module and the phase adjustment unit coupled in the (i-1)-th filter module is at least one adjustment period. Furthermore, fine adjustments can be made according to the actual coupling situation to complete the equalization process of the electronic device. The specific method for making fine adjustments can be set according to the actual situation and is not specifically limited here.

[0011] Optionally, each filtering module also includes a second accumulator. The outputs of multiple branches of each filtering module are coupled to the input of the second accumulator, and the output of the second accumulator is coupled to the first accumulator. In this way, each filtering module outputs only one result, thereby greatly reducing the amount of data processed by the first accumulator, thus reducing the computational cost and power consumption of the first accumulator.

[0012] Optionally, the electronic device also includes a digital-to-analog converter, with the output of the first accumulator coupled to the input of the digital-to-analog converter. This allows the electronic device to have more functions and integrate more features, thereby expanding its application range. For example, the electronic device can be used in communication systems, such as, but not limited to, communication systems used in Ethernet, SerDes, and other communication scenarios.

[0013] Secondly, embodiments of this application provide a signal processing system, which may include: a first splitter, a first combiner, a time delayer, and electronic devices; the first output terminal of the first splitter is coupled to the input terminal of the time delayer, the second output terminal of the first splitter is coupled to the input terminal of the electronic devices, the output terminal of the time delayer is coupled to the first input terminal of the first combiner, and the output terminal of the electronic devices is coupled to the second input terminal of the first combiner; the electronic devices include: a first accumulator and N filter modules, where N is an integer greater than 1, each of the N filter modules includes multiple branches, each of the multiple branches includes a coupled phase adjustment unit and an amplitude adjustment unit, and the output terminal of each filter module is coupled to the first accumulator; for the first filter module among the N filter modules, the input terminal of the phase adjustment unit in the first filter module is coupled to the input terminal of the electronic devices; for the i-th filter module among the N filter modules, the input terminal of the phase adjustment unit in the i-th filter module is coupled to the output terminal of the phase adjustment unit in the (i-1)-th filter module, where i is an integer greater than 1 and not greater than N. Thus, as the number of filtering modules increases, the total number of amplitude adjustment units also increases, equivalent to an increase in the number of taps in electronic components. Since the amplitude adjustment units perform amplitude adjustment, increasing the number of amplitude adjustment units allows for more precise amplitude adjustment. Similarly, the phase adjustment units perform phase adjustment, so increasing the number of phase adjustment units allows for more precise phase adjustment. Therefore, with the increase in filtering modules, more precise amplitude and phase adjustment can be achieved, resulting in a more accurate cancellation signal. When using this cancellation signal for cancellation processing, interference signals can be accurately and effectively cancelled, effectively reducing interference and improving the performance of the signal processing system.

[0014] In the embodiments of this application, the layout of the coefficient determination module or the device that implements its function in the signal processing system mainly includes the following:

[0015] The first type: The coefficient determination module or the device that performs its function is located outside the electronic device.

[0016] For example, the signal processing system further includes: a coefficient determination module, a preprocessing module, and a second splitter. The input terminal of the second splitter is coupled to the output terminal of the first combiner, and the output terminal of the second splitter is coupled to the first input terminal of the preprocessing module. The second input terminal of the preprocessing module is coupled to the service signal source, and the output terminal of the preprocessing module is coupled to the first input terminal of the coefficient determination module. The second input terminal of the coefficient determination module is coupled to the second output terminal of the first splitter, and the output terminal of the coefficient determination module is coupled to an electronic device. The coefficient determination module, the preprocessing module, and the second splitter are located outside the electronic device. The second splitter is used to: extract a sub-signal of a preset frequency band from the first signal output by the first combiner. The sub-signal includes a service signal and an interference signal. The preprocessing module is used to: perform cancellation processing on the service signal in the sub-signal according to the service signal provided by the service signal source to obtain the interference signal in the sub-signal. The coefficient determination module is used to: output an amplitude adjustment coefficient to the electronic device according to the output signal of the second output terminal of the first splitter and the interference signal in the sub-signal. The amplitude adjustment coefficient is used for amplitude adjustment processing. Thus, when determining the amplitude adjustment coefficient based on the output signal of the second output terminal of the first splitter and the interference signal in the sub-signal, the factor signal belongs to the signal within the preset frequency band of the first signal. Therefore, the interference of the service signal in the first signal on the determination of the amplitude adjustment coefficient can be reduced, the number of iterations can be reduced, the accuracy of the amplitude adjustment coefficient can be improved, and the cancellation effect can be further improved.

[0017] The coefficient determination module includes a first analog-to-digital converter (ADC), a second ADC, and a processor. The input of the first ADC is coupled to the second output of the first splitter, and the output of the first ADC is coupled to the first input of the processor. The input of the second ADC is coupled to the output of the preprocessing module, and the output of the second ADC is coupled to the second input of the processor. The output of the processor is coupled to an electronic device. The first ADC is used to convert the output signal of the second output of the first splitter into a corresponding first digital signal. The second ADC is used to convert the interference signal in the sub-signal output by the preprocessing module into a corresponding second digital signal. The processor is used to output an amplitude adjustment coefficient to the electronic device based on the first and second digital signals. Thus, since the signal input to the second analog-to-digital converter is an interference signal and does not include a large service signal, the second analog-to-digital converter only processes the interference signal during the conversion process. Since service signals are generally strong signals and interference signals are generally weak signals, processing only the interference signal can increase the signal-to-noise ratio of the converted signal and reduce the occupation of the quantization range of the second analog-to-digital converter, thus avoiding damage to the performance of the second analog-to-digital converter and improving the utilization rate of the quantization range of the second analog-to-digital converter.

[0018] The preprocessing module includes a filter, a digital-to-analog converter (DAC), and a second combiner. The input of the filter is coupled to the service signal source, the output of the filter is coupled to the input of the DAC, the output of the DAC is coupled to the first input of the second combiner, and the second input of the second combiner is coupled to the output of the second splitter. The filter is used to perform amplitude alignment processing on the service signal provided by the service signal source to obtain a second signal. The DAC is used to convert the second signal into a corresponding analog signal. The second combiner is used to perform cancellation processing on the service signal in the sub-signal based on the converted analog signal of the second signal to obtain the interference signal in the sub-signal. The filter can be a digital filter, such as, but not limited to, a finite impulse response (FIR) filter or an infinite impulse response (IIR) filter, etc., which can be set according to actual needs and are not specifically limited here. Furthermore, the filter can use fixed coefficients or adaptive coefficients to achieve amplitude alignment processing to match the amplitude and phase difference with the sub-signal. After being converted into the corresponding analog signal by the second digital-to-analog converter, the analog signal can be used to cancel out the service signal in the sub-signal to obtain the interference signal in the sub-signal, thereby improving the accuracy of the amplitude adjustment coefficient.

[0019] The second type: at least part of the structure in the coefficient determination module is inside the electronic device.

[0020] For example, the signal processing system further includes: a preprocessing module and a second splitter located outside the electronic device; the input of the second splitter is coupled to the output of the first combiner, and the output of the second splitter is coupled to the first input of the preprocessing module; the second input of the preprocessing module is coupled to the service signal source, and the output of the preprocessing module is coupled to the electronic device; the second splitter is used to: extract a sub-signal of a preset frequency band from the first signal output by the first combiner, the sub-signal including a service signal and an interference signal; the preprocessing module is used to: perform cancellation processing on the service signal in the sub-signal according to the service signal provided by the service signal source to obtain the interference signal in the sub-signal; the electronic device is also used to: determine an amplitude adjustment coefficient according to the output signal of the second output of the first splitter and the interference signal in the sub-signal, the amplitude adjustment coefficient being used for amplitude adjustment processing. In this way, the electronic device can have the function of a coefficient determination module, increasing the functionality of the electronic device and expanding its application range.

[0021] The signal processing system further includes a first analog-to-digital converter (ADC) and a second ADC. The input of the first ADC is coupled to the second output of the first splitter, and its output is coupled to an electronic device. The input of the second ADC is coupled to the output of the preprocessing module, and its output is also coupled to the electronic device. The first ADC is used to convert the output signal of the second output of the first splitter into a corresponding first digital signal. The second ADC is used to convert interference signals in the sub-signals output by the preprocessing module into corresponding second digital signals. The electronic device is also used to determine the amplitude adjustment coefficient based on the first and second digital signals. In other words, the processor in the coefficient determination module is inside the electronic device, while the first and second ADCs are outside the electronic device.

[0022] Alternatively, the electronic device is also used to: convert the output signal of the second output terminal of the first splitter into a corresponding first digital signal; convert the interference signal in the sub-signal output by the preprocessing module into a corresponding second digital signal; and determine the amplitude adjustment coefficient based on the first and second digital signals. That is to say, the processor, the first analog-to-digital converter, and the second analog-to-digital converter in the coefficient determination module are all located inside the electronic device.

[0023] It should be understood that in this second approach, the implementation of the preprocessing module is the same as that in the first approach, as detailed above.

[0024] In summary, in practical implementation, any of the above methods can be used to determine the coefficients of the module, depending on actual needs, and no specific limitations are made here.

[0025] Optionally, the signal processing system further includes a first amplifier, the input of which is coupled to the output of the preprocessing module. The first amplifier is used to amplify the interference signal in the sub-signal. This amplified interference signal has a higher signal-to-noise ratio, thereby further improving the utilization rate of the quantization range of the second digital-to-analog converter.

[0026] Optionally, the signal processing system further includes a second amplifier coupled between the service signal source and the input of the first splitter. When the service signal passes through the second amplifier, interference signals are generated due to nonlinear distortion, resulting in the output signal to the first splitter containing both service and interference signals. However, after processing by the first splitter, first combiner, time delayer, and electronic devices, the interference signals generated by nonlinear distortion can be eliminated, reducing the interference signals in the output signal and improving the accuracy of the output signal.

[0027] Furthermore, the signal processing system also includes a radio frequency (RF) transceiver unit. The output of the RF transceiver unit is coupled to the input of the power amplifier. The RF transceiver unit serves as a service signal source, providing service signals. The service signals output by the RF transceiver unit are generally RF signals. At this time, the RF transceiver unit can realize the conversion between baseband signals and RF signals. The first splitter, the first combiner, the time delay unit, and electronic devices can be used in the transmission path to realize the transmission of RF signals.

[0028] Optionally, the signal processing system also includes a duplexer, whose input is used to couple with the output of the first combiner, and whose output is used to couple with the antenna. Since the signal input to the duplexer has already undergone cancellation processing, the suppression requirements of the filter in the duplexer can be reduced, thereby reducing the manufacturing cost of the duplexer.

[0029] It should be understood that since the principle of this signal processing system in solving the problem is similar to that of the aforementioned electronic device, the implementation and technical effects of this signal processing system can be found in the implementation and technical effects of the aforementioned electronic device, and the repetition will not be repeated.

[0030] Thirdly, embodiments of this application provide a signal processing system, which may include: a first splitter, a first combiner, a time delayer, an amplitude-phase modulator, a preprocessing module, and a second splitter; the first output terminal of the first splitter is coupled to the input terminal of the time delayer, the second output terminal of the first splitter is coupled to the first input terminal of the amplitude-phase modulator, the output terminal of the time delayer is coupled to the first input terminal of the first combiner, and the output terminal of the amplitude-phase modulator is coupled to the second input terminal of the first combiner; the input terminal of the second splitter is coupled to the output terminal of the first combiner, and the output terminal of the second splitter is coupled to the first input terminal of the preprocessing module; the second input terminal of the preprocessing module is coupled to the service signal source, and the output terminal of the preprocessing module is coupled to the second input terminal of the amplitude-phase modulator; the first splitter is used to: output a first to-be-processed signal to the time delayer. The system includes a first signal and a second signal to be processed, both of which include service signals and interference signals. A delay unit is used to delay the first signal to obtain a delayed signal. A first combiner is used to cancel the delayed signal according to a cancellation signal to obtain a first signal. A second splitter is used to extract a sub-signal of a preset frequency band from the first signal output by the first splitter. The sub-signal includes service signals and interference signals. A preprocessing module is used to cancel the service signals in the sub-signal according to the service signals provided by the service signal source to obtain interference signals in the sub-signal. An amplitude-phase adjuster is used to adjust the amplitude and phase of the interference signal in the second signal to obtain a cancellation signal. Thus, when adjusting the amplitude and phase of the interference signal in the second signal to be processed based on the interference signal in the second signal to be processed and the interference signal in the sub-signal, the factor signal belongs to the signal within the preset frequency band of the first signal. Therefore, the interference generated by the service signal in the first signal on the determination of the amplitude adjustment coefficient can be reduced, the number of iterations can be reduced, and the accuracy of the amplitude adjustment coefficient can be improved, thereby improving the accuracy of the cancellation signal. When using the cancellation signal for cancellation processing, the interference signal can be accurately and effectively cancelled, effectively reducing the interference of the interference signal and improving the performance of the signal processing system.

[0031] Optionally, the amplitude and phase adjuster includes: a first accumulator and N filter modules, where N is an integer greater than 1. Each of the N filter modules includes multiple branches, and each branch includes a coupled phase adjustment unit and an amplitude adjustment unit. The output of each filter module is coupled to the first accumulator. For the first filter module among the N filter modules, the input of the phase adjustment unit in the first filter module is coupled to the input of the electronic device. For the i-th filter module among the N filter modules, the input of the phase adjustment unit in the i-th filter module is coupled to the output of the phase adjustment unit in the (i-1)-th filter module, where i is an integer greater than 1 and not greater than N. Thus, as the number of filtering modules increases, the total number of amplitude adjustment units also increases, which is equivalent to an increase in the number of taps. Since the amplitude adjustment unit can perform amplitude adjustment, the increase of amplitude adjustment units can achieve more precise amplitude adjustment. Similarly, the phase adjustment unit can perform phase adjustment, so the increase of phase adjustment units can achieve more precise phase adjustment. Therefore, the increase of filtering modules can achieve more precise amplitude and phase adjustment, thereby improving the amplitude and phase equalization capability of the amplitude and phase adjuster.

[0032] Furthermore, the amplitude-phase modulator may also include a processor. In this case, the signal processing system may also include a first analog-to-digital converter (ADC) and a second ADC located outside the amplitude-phase modulator; or, the amplitude-phase modulator may also include a processor, a first ADC, and a second ADC. The specific configuration can be tailored to actual needs and is not specifically limited here. The structures of the processor, the first ADC, and the second ADC are basically similar to those described in the second aspect above. Specific implementations of the processor, the first ADC, and the second ADC can be found in the relevant description in the second aspect above, and will not be detailed here.

[0033] It should be understood that since the principle of this signal processing system in solving the problem is similar to that of the aforementioned electronic device, the implementation and technical effects of this signal processing system can be found in the implementation and technical effects of the aforementioned electronic device, and the repetition will not be repeated.

[0034] Fourthly, embodiments of this application provide a signal processing method, which includes: a signal to be processed being split to obtain a first signal to be processed and a second signal to be processed, both of which include a service signal and an interference signal; adjusting the amplitude and phase of the interference signal in the second signal to be processed to obtain a cancellation signal; delaying the first signal to be processed to obtain a delayed signal; and canceling the cancellation signal and the delayed signal to obtain a first signal; wherein adjusting the phase of the interference signal in the second signal to be processed includes: phase adjustment units in each branch of the first filter module of N filter modules sequentially adjusting the phase of the interference signal in the second signal to be processed; wherein the phase difference between phase adjustment units in adjacent branches of the first filter module is at least one adjustment period; and the phase adjustment unit in the j-th branch of the i-th filter module of N filter modules adjusting the phase of the signal output by the phase adjustment unit coupled in the (i-1)-th filter module. The phase adjustment units in each branch of the i-th filter module sequentially adjust the phase of the input signal; wherein the phase difference between the phase adjustment unit in the j-th branch of the i-th filter module and the phase adjustment unit coupled in the (i-1)-th filter module is at least one adjustment period; the amplitude adjustment of the interference signal in the second signal to be processed includes: when the phase adjustment unit in each branch is coupled between the input terminal of the branch and the amplitude adjustment unit of the branch, the amplitude adjustment units in each branch of each of the N filter modules sequentially adjust the amplitude of the signal output by the phase adjustment unit in the branch; wherein the working timing of the amplitude adjustment units of adjacent branches in the same filter module differs by at least one adjustment period, and the working timing of the amplitude adjustment unit in the j-th branch of the i-th filter module differs by at least one adjustment period from the amplitude adjustment unit in the j-th branch of the (i-1)-th filter module; N is an integer greater than 1, i is an integer greater than 1 and not greater than N, and j is a positive integer.

[0035] Optionally, the signal processing method further includes: extracting a sub-signal of a preset frequency band from the first signal, the sub-signal including a service signal and an interference signal; performing cancellation processing on the service signal in the sub-signal according to the service signal to obtain the interference signal in the sub-signal; and obtaining an amplitude adjustment coefficient according to the second signal to be processed output by the first splitter and the interference signal in the sub-signal, the amplitude adjustment coefficient being used for amplitude adjustment.

[0036] It should be understood that since the principle of this signal processing method in solving the problem is similar to that of the signal processing system described in the second aspect above, the implementation and technical effects of this signal processing method can be found in the implementation and technical effects of the signal processing system described in the second aspect above, and the repetition will not be repeated.

[0037] Fifthly, embodiments of this application provide a signal processing method, which includes: a signal to be processed being split to obtain a first signal to be processed and a second signal to be processed, both the first signal to be processed and the second signal to be processed including a service signal and an interference signal; adjusting the amplitude and phase of the interference signal in the second signal to be processed to obtain a cancellation signal; delaying the first signal to be processed to obtain a delayed signal; canceling the delayed signal according to the cancellation signal to obtain a first signal; extracting a sub-signal of a preset frequency band from the first signal, the sub-signal including a service signal and an interference signal; canceling the service signal in the sub-signal according to the service signal to obtain the interference signal in the sub-signal; and obtaining an amplitude adjustment coefficient according to the second signal to be processed and the interference signal in the sub-signal, the amplitude adjustment coefficient being used for amplitude adjustment.

[0038] Optionally, adjusting the phase of the interference signal in the second signal to be processed includes: phase adjustment units in each branch of the first filter module of the N filter modules sequentially adjusting the phase of the interference signal in the second signal to be processed; wherein the phase difference between phase adjustment units in adjacent branches of the first filter module is at least one adjustment period; the phase adjustment unit in the j-th branch of the i-th filter module of the N filter modules adjusts the phase of the signal output by the phase adjustment unit coupled in the (i-1)-th filter module, and the phase adjustment units in each branch of the i-th filter module sequentially adjust the phase of the input signal; wherein the phase difference between the phase adjustment unit in the j-th branch of the i-th filter module and the phase adjustment unit coupled in the (i-1)-th filter module is... The phase difference is at least one adjustment period; the amplitude of the interference signal in the second signal to be processed is adjusted, including: when the phase adjustment unit in each branch is coupled between the input terminal of the branch and the amplitude adjustment unit of the branch, the amplitude adjustment unit in each branch of each of the N filtering modules sequentially adjusts the amplitude of the signal output by the phase adjustment unit in the branch; wherein, the working timing of the amplitude adjustment units of adjacent branches in the same filtering module differs by at least one adjustment period, and the working timing of the amplitude adjustment unit in the j-th branch of the i-th filtering module differs from that in the j-th branch of the (i-1)-th filtering module by at least one adjustment period; N is an integer greater than 1, i is an integer greater than 1 and not greater than N, and j is a positive integer.

[0039] It should be understood that since the principle of this signal processing method in solving the problem is similar to that of the signal processing system described in the third aspect above, the implementation and technical effects of this signal processing method can be found in the implementation and technical effects of the signal processing system described in the third aspect above, and the repetition will not be repeated.

[0040] In a sixth aspect, embodiments of this application provide a communication device, which includes: a baseband circuit and a signal processing system as described in any of the embodiments of the second and third aspects above.

[0041] It should be understood that since the principle of the communication equipment in solving the problem is similar to that of the aforementioned signal processing system, the implementation and technical effects of the communication equipment can be found in the implementation and technical effects of the aforementioned signal processing system, and the repetitions will not be repeated.

[0042] In a seventh aspect, embodiments of this application provide a communication system comprising: an analog-to-digital converter and an electronic device as described in any of the embodiments of the first aspect above, wherein the input terminal of the analog-to-digital converter is coupled to the output terminal of the electronic device.

[0043] It should be understood that since the principle of this communication system in solving the problem is similar to that of the aforementioned electronic device in solving the problem, the implementation and technical effects of this communication system can be found in the implementation and technical effects of the aforementioned electronic device, and the repetition will not be repeated. Attached Figure Description

[0044] Figure 1 is a schematic diagram of the structure of a communication device provided in an embodiment of this application;

[0045] Figure 2 is a schematic diagram of the structure of a radio frequency front-end module provided in an embodiment of this application;

[0046] Figure 3 is a schematic diagram of the structure of an electronic device provided in an embodiment of this application;

[0047] Figure 4 is a schematic diagram of another electronic device provided in an embodiment of this application;

[0048] Figure 5 is a timing diagram provided in an embodiment of this application;

[0049] Figure 6 is a schematic diagram of the structure of another electronic device provided in an embodiment of this application;

[0050] Figure 7 is a schematic diagram of another electronic device provided in an embodiment of this application;

[0051] Figure 8 is a schematic diagram of another electronic device provided in an embodiment of this application;

[0052] Figure 9 is a schematic diagram of a coefficient processor provided in an embodiment of this application;

[0053] Figure 10 is a schematic diagram of another coefficient processor provided in an embodiment of this application;

[0054] Figure 11 is a schematic diagram of another coefficient processor provided in an embodiment of this application;

[0055] Figure 12 is a schematic diagram of another coefficient processor provided in an embodiment of this application;

[0056] Figure 13 is a schematic diagram of the structure of a signal processing system provided in an embodiment of this application. Detailed Implementation

[0057] To make the objectives, technical solutions, and advantages of this application clearer, the application will now be described in further detail with reference to the accompanying drawings.

[0058] It should be noted that the same reference numerals in the accompanying drawings of this application denote the same or similar structures, and therefore repeated descriptions of them will be omitted. Terms expressing position and direction described in this application are illustrative based on the accompanying drawings, but may be modified as needed, and all such modifications are included within the scope of protection of this application. The accompanying drawings of this application are for illustrating relative positional relationships only and do not represent actual scale.

[0059] It should be noted that, in this application, the words "exemplarily" or "for example" are used to indicate examples, illustrations, or explanations. Any embodiment or design described as "exemplarily" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of words such as "exemplarily" or "for example" is intended to present the relevant concepts in a specific manner.

[0060] In the embodiments of this application, the words "first" and "second" do not limit the quantity or order. The term "coupling" is used to indicate an electrical connection, including direct connection through wires or terminals or indirect connection through other devices, and "coupling" has the same meaning as "coupled" and "connection". Therefore, "coupling" should be regarded as a broad electronic communication connection.

[0061] To facilitate understanding of the technical solutions provided in the embodiments of this application, the application scenarios will be explained first below.

[0062] The technical solutions provided in this application can be widely applied to various communication devices with radio frequency (RF) functions, as well as communication systems other than those with RF functions. Communication devices can be, but are not limited to, cellular phones, smartphones, handheld wireless devices with or without telephone functions, wireless tablets, base stations, routers, satellites, etc. Base stations can include various forms of macro base stations, micro base stations, relay stations, access points, or remote radio units. Communication systems can be, but are not limited to, communication systems used in Ethernet, SERDEs, and other communication scenarios.

[0063] Taking a communication device as an example, Figure 1 is a schematic diagram of the structure of a communication device provided in an embodiment of this application. Referring to Figure 1, the communication device may include: a baseband circuit 100 and a radio frequency system 200, wherein the input terminal of the radio frequency system 200 is coupled to the output terminal of the baseband circuit 100. During signal transmission, the baseband circuit 100 can modulate the low-frequency baseband signal to be transmitted into a mid-to-high-frequency digital signal and send the mid-to-high-frequency digital signal to the radio frequency system 200; during signal reception, the baseband circuit 100 can demodulate the high-frequency electromagnetic wave signal from the radio frequency system 200 into a low-frequency baseband signal.

[0064] The radio frequency (RF) system 200 includes an RF transceiver unit 210, an RF front-end module 220, and an antenna device 230. The RF transceiver unit 210 and the RF front-end module 220 can constitute a signal processing system. The baseband circuit 100 is coupled to the RF transceiver unit 210, the RF transceiver unit 210 is coupled to the RF front-end module 220, and the RF front-end module 220 is also coupled to the antenna device 230. The RF front-end module 220 includes a transmit path 221 and a receive path 222. The number of transmit paths 221 and receive paths 222 can be one or more. The transmit path 221 can be used to transmit RF signals of various frequency bands to the antenna device 230. The receive path 222 can be used to receive RF signals of various frequency bands to receive the RF signals transmitted by the antenna device 230.

[0065] Referring to Figure 2, the transmit path 221 may include a power amplifier 221b and a first filter 221a coupled in sequence, and the receive path 222 includes a low-noise amplifier 222b, a matching network 222c, and a second filter 222d coupled in sequence. When the communication device shown in Figure 1 supports frequency division duplexing (FDD), in order to isolate the transmit and receive signals and ensure that the receive and transmit can work simultaneously, the communication device also includes a duplexer. For example, the first filter 221a in the transmit path 221 and the low-noise amplifier 222b in the receive path 222 are both coupled to the duplexer 222a, so that the first filter 221a is connected to the antenna device 230 through the duplexer 222a, and the low-noise amplifier 222b is also connected to the antenna device 230 through the duplexer 222a. A duplexer is a special bidirectional three-terminal filter, including a transmit filter and a receive filter, which can filter and suppress the transmit and receive signals respectively to isolate the transmit and receive signals and ensure that the receive and transmit can work simultaneously.

[0066] The transmit filter in a duplexer has two main requirements: first, to ensure that interference signals falling into the receive frequency band, after being suppressed by the transmit filter, do not affect the receiver's sensitivity; and second, to ensure that interference signals located outside the receive frequency band, after being suppressed by the transmit filter, meet the agreed-upon spurious emission specifications. These requirements can be achieved by increasing the suppression power of the transmit filter in the duplexer. However, this will result in a larger transmit filter and higher cost.

[0067] To reduce the suppression of the transmit filter in the duplexer, a feedforward cancellation system can be used to cancel the nonlinear distortion signal in the transmit signal input to the duplexer, thereby reducing the impact of the nonlinear distortion signal on the aforementioned receiver sensitivity and transmit spurious performance. This nonlinear distortion signal is generated due to the nonlinear operation of the components in the transmit channel, primarily due to the nonlinear operation of the power amplifier (PA) in the transmit channel. The nonlinear distortion signal mainly includes interference signals and harmonic signals. For ease of description, interference signals will be used to represent nonlinear distortion signals in the following text.

[0068] For example, the feedforward cancellation system can be located between the PA and the duplexer in the transmit channel. The feedforward cancellation system includes: a first splitter, a time delay, an equalizer, a first combiner, and a coefficient processor. The input of the first splitter is coupled to the PA, the first output of the first splitter is coupled to the input of the time delay, and the second output of the first splitter is coupled to the input of the equalizer. The output of the time delay is coupled to the first input of the first combiner. The output of the equalizer is coupled to the second input of the first combiner. The first input of the coefficient processor is coupled to the output of the first combiner, the second input of the coefficient processor is coupled to the service signal source, the first output of the coefficient processor is coupled to the equalizer, and the second output of the coefficient processor is coupled to the duplexer. Specifically, the first splitter is used to: output a first signal to be processed to the time delay unit, and output a second signal to be processed to the equalizer and the coefficient processor respectively. Both the first and second signals to be processed include service signals and interference signals. The equalizer is used to: adjust the amplitude and phase of the interference signal in the second signal to be processed using amplitude adjustment coefficients to obtain a cancellation signal. The time delay unit is used to: delay the first signal to be processed to obtain a delayed signal, which is used to match the processing delay of the equalizer. The first combiner is used to: cancel the delayed signal according to the cancellation signal to obtain a first signal. The coefficient processor is used to: extract a sub-signal of a preset frequency band from the first signal output by the first splitter. The sub-signal includes service signals and interference signals. Based on the second signal to be processed and the sub-signal, it outputs an amplitude adjustment coefficient to the equalizer. It also transmits the first signal to the duplexer. Among these, the amplitude and phase equalization capability of the equalizer affects the cancellation effect on the nonlinear distortion signal in the transmitted signal input to the duplexer, thus affecting the performance of the signal processing system. Therefore, improving the amplitude and phase adjustment capability of the equalizer is particularly important.

[0069] Based on this, embodiments of this application provide an electronic device that can be used as an equalizer. Specifically, the electronic device includes a first accumulator and N filter modules, where N is an integer greater than 1. Each of the N filter modules includes multiple branches, and each branch includes a coupled phase adjustment unit and an amplitude adjustment unit. The output of each filter module is coupled to the first accumulator. For the first filter module among the N filter modules, the input of the phase adjustment unit in the first filter module is coupled to the input of the electronic device. For the i-th filter module among the N filter modules, the input of the phase adjustment unit in the i-th filter module is coupled to the output of the phase adjustment unit in the (i-1)-th filter module, where i is an integer greater than 1 and not greater than N. Thus, as the number of filtering modules increases, the total number of amplitude adjustment units also increases, which is equivalent to an increase in the number of taps. Since the amplitude adjustment unit can perform amplitude adjustment, the increase of amplitude adjustment units can achieve more precise amplitude adjustment. Similarly, the phase adjustment unit can perform phase adjustment, so the increase of phase adjustment units can achieve more precise phase adjustment. Therefore, with the increase of filtering modules, more precise amplitude and phase adjustment can be achieved, thereby improving the amplitude and phase equalization capability of electronic devices.

[0070] The following will provide a detailed description with reference to specific embodiments.

[0071] Figures 3 and 4 exemplarily illustrate a structural schematic diagram of an electronic device according to an embodiment of this application. Referring to Figures 3 and 4, the electronic device may include: a first accumulator 20 and N filter modules (structures shown as 10a, 10b, and 10c in Figure 4), where N is an integer greater than 1. Each of the N filter modules includes multiple branches, and each of the multiple branches includes a coupled phase adjustment unit (structures shown as 111a, 111b, 112a, 112b, 113a, and 113b in Figure 4) and an amplitude adjustment unit 12. The output terminal of each filter module is coupled to the first accumulator 20. The output of the first accumulator 20 is coupled to the output of the electronic device N2. For the first filter module 10a among the N filter modules, the input of the phase adjustment unit in the first filter module 10a is coupled to the input of the electronic device N1. For the i-th filter module among the N filter modules, the input of the phase adjustment unit in the i-th filter module is coupled to the output of the phase adjustment unit in the (i-1)-th filter module, where i is an integer greater than 1 and not greater than N. For example, if N is 3, then the value of i is 2 and 3; or, if N is 5, then the value of i is 2, 3, 4 and 5, etc., which will not be listed here.

[0072] Thus, as the number of filtering modules increases, the total number of amplitude adjustment units 12 also increases, which is equivalent to an increase in the number of taps. Since the amplitude adjustment unit 12 can perform amplitude adjustment, the increase of amplitude adjustment units 12 can achieve a more precise amplitude adjustment function; the phase adjustment unit can perform phase adjustment, so the increase of phase adjustment units can achieve a more precise phase adjustment; thus, with the increase of filtering modules, more precise amplitude and phase adjustment can be achieved, thereby improving the amplitude and phase equalization capability of electronic devices.

[0073] It should be understood that Figures 3 and 4 illustrate the case with N being 3 and each filter module including two branches. However, in practice, the value of N is not limited to 3; it can also be 2, 4, 5, or other values. The number of branches included in each filter module is also not limited to 2; it can be 3, 4, or even larger values. Since the more filter modules there are and the more branches each filter module includes, the higher the processing power of the electronic device, but the more complex the structure of the electronic device, the higher the manufacturing cost and the larger the area it occupies, the number of filter modules and the number of branches included in each filter module can be adjusted according to the requirements of the electronic device's area, manufacturing cost, and processing power. No specific limitations are made here.

[0074] For example, the amplitude adjustment unit 12 includes a multiplier, that is, a multiplier is used to implement the function of the amplitude adjustment unit 12. Of course, the function of the amplitude adjustment unit 12 can also be implemented by other devices that can achieve amplitude adjustment function besides the multiplier, which are not specifically limited here.

[0075] The phase adjustment unit includes a switch k1 and a capacitor C1. The first end of switch k1 is coupled to the input end of the phase adjustment unit, and the second end of switch k1 is coupled to the first end of capacitor C1 and the amplitude adjustment unit 12. The control end of switch k1 is coupled to the clock signal end (provided as the p0_0 signal end in Figure 5), and the second end of capacitor C1 is coupled to the ground end GND. Switch k1 can be turned on or off under the control of the clock signal p0_0 provided by the clock signal end. For example, when switch k1 is on, the input end of the phase adjustment unit is connected to the amplitude adjustment unit 12 and capacitor C1. The signal input from the input end of the phase adjustment unit can be stored in capacitor C1 and transmitted to the amplitude adjustment unit 12. When switch k1 is off, the connection between the input end of the phase adjustment unit and the amplitude adjustment unit 12 and capacitor C1 is broken, and the signal input from the input end of the phase adjustment unit cannot be transmitted to capacitor C1 and amplitude adjustment unit 12. In this way, the conduction state of switch k1 can be controlled by the clock signal p0_0, which in turn controls the phase of the signal output by the phase adjustment unit, thereby realizing the phase adjustment function.

[0076] It should be understood that the positional order of the phase adjustment unit and the amplitude adjustment unit 12 is not limited to that shown in Figures 3 and 4, and their positions can be interchanged. For example, the phase adjustment unit can be coupled between the input terminal of its branch and the amplitude adjustment unit 12 in its branch, or the amplitude adjustment unit 12 can be coupled between the input terminal of its branch and the phase adjustment unit in its branch. The specific configuration can be determined according to actual needs and is not specifically limited here. The following explanation uses the example of the phase adjustment unit being coupled between the input terminal of its branch and the amplitude adjustment unit 12 in its branch.

[0077] Furthermore, different filter modules can include the same number of branches. For example, each filter module can include M branches, where M is an integer greater than 1, such as, but not limited to, M being 2, 3, 4, or larger. The specific number of branches can be set according to actual needs and is not specifically limited here. For any two coupled filter modules, the phase adjustment units in these two filter modules are coupled one-to-one. Taking Figure 3 as an example, each filter module includes two branches. Following the top-to-bottom order, the filter modules are sequentially referred to as the first filter module 10a, the second filter module 10b, and the third filter module 10c. The phase adjustment units in the two branches of the first filter module 10a are labeled as 111a and 111b, the phase adjustment units in the two branches of the second filter module 10b are labeled as 112a and 112b, and the phase adjustment units in the two branches of the third filter module 10c are labeled as 113a and 113b. Then, in the first filter module 10a, the input terminals of phase adjustment units 111a and 111b are... The input terminal N1 of the electronic device is coupled; the input terminal of the phase adjustment unit 112a in the second filter module 10b is coupled to the output terminal of the phase adjustment unit 111a in the first filter module 10a, and the input terminal of the phase adjustment unit 112b in the second filter module 10b is coupled to the output terminal of the phase adjustment unit 111b in the first filter module 10a; the input terminal of the phase adjustment unit 113a in the third filter module 10c is coupled to the output terminal of the phase adjustment unit 112a in the second filter module 10b, and the input terminal of the phase adjustment unit 113b in the third filter module 10c is coupled to the output terminal of the phase adjustment unit 112b in the second filter module 10b. In this way, the input terminal of the phase adjustment unit in the j-th branch of the i-th filter module is coupled to the output terminal of the phase adjustment unit in the j-th branch of the (i-1)-th filter module, which simplifies the structure of the electronic device, reduces the driving complexity of the electronic device, and thus reduces the driving power consumption of the electronic device. Furthermore, it allows for more precise phase adjustment, thereby improving the amplitude and phase equalization capability of the electronic device. Where j is a positive integer not greater than M. For example, if M is 3, then the value of j can be 1, 2, or 3, etc., which will not be listed here.

[0078] Alternatively, the input terminal of the phase adjustment unit 112a in the second filter module 10b is coupled to the output terminal of the phase adjustment unit 111b in the first filter module 10a, the input terminal of the phase adjustment unit 112b in the second filter module 10b is coupled to the output terminal of the phase adjustment unit 111a in the first filter module 10a, the input terminal of the phase adjustment unit 113a in the third filter module 10c is coupled to the output terminal of the phase adjustment unit 112b in the second filter module 10b, and the input terminal of the phase adjustment unit 113b in the third filter module 10c is coupled to the output terminal of the phase adjustment unit 112a in the second filter module 10b. In this way, one-to-one coupling of each phase adjustment unit in any two coupled filter modules can be achieved. However, to achieve precise control, the phase of the phase adjustment unit in each filter module needs to be set accordingly to ensure the normal operation of the electronic devices.

[0079] Therefore, the following explanations will all take the coupling of the input terminal of the phase adjustment unit in the j-th branch of the i-th filter module with the output terminal of the phase adjustment unit in the j-th branch of the (i-1)-th filter module as an example.

[0080] The working process of electronic devices is described below.

[0081] I. Driving process of the phase adjustment unit.

[0082] 1.1 For any filtering module: the switches k1 (i.e., phase adjustment units) of different branches within the same filtering module correspond to different clock signal terminals, and the phase difference of the clock signals corresponding to the phase adjustment units of adjacent branches within the same filtering module is at least one adjustment period. In other words, the phase difference of the phase adjustment units in adjacent branches within the same filtering module is at least one adjustment period. Thus, under the control of the clock signal, the phase adjustment units in adjacent branches within the same filtering module can be turned on sequentially, thereby transmitting the signal input from the input terminal of the filtering module sequentially to the corresponding amplitude adjustment unit 12, thereby realizing phase control of the input signal and realizing the phase adjustment function.

[0083] For example, referring to the timing diagram shown in Figure 5, which is given with N being 2 and each filter module including four branches, assuming that the clock signals corresponding to the phase adjustment units of the four branches in the first filter module 10a are labeled as p0_0, p0_1, p0_2, and p0_3 respectively, and the clock signals corresponding to the phase adjustment units of the four branches in the second filter block are labeled as p1_0, p1_1, p1_2, and p1_3 respectively, and a phase adjustment clock Fs is given, for p0_0, p0_1, p0_2, p0_3 ... For p0_3, p0_1 is delayed by one phase adjustment clock cycle (also called the adjustment period, hereinafter referred to as the adjustment period) compared to p0_0, p0_2 is delayed by one adjustment period compared to p0_1, and p0_3 is delayed by one adjustment period compared to p0_2. Similarly, for p1_0, p1_1, p1_2, and p1_3, p1_1 is delayed by one adjustment period compared to p1_0, p1_2 is delayed by one adjustment period compared to p1_1, and p1_3 is delayed by one adjustment period compared to p1_2. Thus, for the first filter module 10a, the phase difference of the clock signals corresponding to the phase adjustment units of two adjacent branches is one adjustment period, and for the second filter module 10b, the phase difference of the clock signals corresponding to the phase adjustment units of two adjacent branches is also one adjustment period.

[0084] For the first filter module 10a, the signal input from its input terminal is shown as x in Figure 5. For ease of description, the signal shown by x is called input signal A. Each adjustment cycle corresponds to one input signal A, and each input signal A is represented by a number. The transmission order of each input signal A is represented by the magnitude of the number. For example, the input signal A represented when x is 1 is transmitted after the input signal A represented when x is 0. Furthermore, it is assumed that in the first filter module 10a, the signals output by the phase adjustment units in the four branches are x0_0, x0_1, x0_2, and x0_3, respectively, and the signals in x0_0, x0_1, x0_2, and x0_3 are also represented by numbers. At this time, when the input signal A corresponding to the rising edge of p0_0 is 0, the signal x0_0 output by the phase adjustment unit of the branch corresponding to p0_0 is also 0; when the input signal A corresponding to the rising edge of p0_1 is 1, the signal x0_1 output by the phase adjustment unit of the branch corresponding to p0_1 is also 1; when the input signal A corresponding to the rising edge of p0_2 is 2, the signal x0_2 output by the phase adjustment unit of the branch corresponding to p0_2 is also 2; when the input signal A corresponding to the rising edge of p0_3 is 3, the signal x0_3 output by the phase adjustment unit of the branch corresponding to p0_3 is also 3.

[0085] For the second filter module 10b, assuming that the signals output by the phase adjustment units in the four branches of the second filter module 10b are x1_0, x1_1, x1_2, and x1_3 respectively, and the signals in x1_0, x1_1, x1_2, and x1_3 are also represented by numbers; and since the input terminal of the phase adjustment unit in the j-th branch of the i-th filter module is coupled to the output terminal of the phase adjustment unit in the j-th branch of the (i-1)-th filter module, the input terminal of the phase adjustment unit in the first branch of the second filter module 10b is coupled to the output terminal of the phase adjustment unit in the first branch of the first filter module 10a. Therefore, the signal x0_0 output by the phase adjustment unit of the branch corresponding to p0_0 is the signal x0_0 of the phase adjustment unit of the branch corresponding to p1_0. If the input signal is x0_0, which is 0 at the rising edge of p1_0, then the output signal x1_0 of the phase adjustment unit of the branch corresponding to p1_0 is also 0. Similarly, if the input signal x0_1 is 1 at the rising edge of p1_1, then the output signal x1_1 of the branch corresponding to p1_1 is also 1. If the input signal x0_2 is 2 at the rising edge of p1_2, then the output signal x1_2 of the branch corresponding to p1_2 is also 2. If the input signal x0_3 is 3 at the rising edge of p1_3, then the output signal x1_3 of the branch corresponding to p1_3 is also 3.

[0086] Of course, Figure 5 shows an example with a delay of one adjustment cycle. However, in practice, it can also be: the phase adjustment unit in the (j+1)th branch of the same filter module is one adjustment cycle ahead of the phase adjustment unit in the jth branch, or the phase difference between the phase adjustment unit in the (j+1)th branch and the phase adjustment unit in the jth branch of the same filter module is two or three adjustment cycles, etc. The specific settings can be made according to the actual situation, and no specific limitation is made here.

[0087] 1.2 The phase difference between the phase adjustment unit in the j-th branch of the i-th filter module and the phase adjustment unit coupled in the (i-1)-th filter module is at least one adjustment period. For example, the phase difference between the phase adjustment unit in the j-th branch of the i-th filter module and the phase adjustment unit in the j-th branch of the (i-1)-th filter module is at least one adjustment period. This allows the phase adjustment units in the two coupled branches of different filter modules to output signals sequentially, thus achieving phase adjustment. The more filter modules there are, the finer this phase adjustment becomes, and the number of effective amplitude adjustment coefficients (explained later) can also be increased, thereby improving the accuracy of phase adjustment and enhancing the amplitude-phase equalization capability of electronic devices.

[0088] For example, continuing with Figure 5, p0_0 is delayed by one adjustment cycle compared to p1_0, p0_1 is delayed by one adjustment cycle compared to p1_1, p0_2 is delayed by one adjustment cycle compared to p1_2, and p0_3 is delayed by one adjustment cycle compared to p1_3. Of course, Figure 5 uses a delay of one adjustment cycle as an example, but in practice, it could also be: the phase adjustment unit in the j-th branch of the (i-1)-th filter module is advanced by one adjustment cycle compared to the phase adjustment unit in the j-th branch of the ith filter module, or the phase difference between the phase adjustment unit in the j-th branch of the (i-1)-th filter module and the phase adjustment unit in the j-th branch of the ith filter module is two or three adjustment cycles, etc. The specific settings can be adjusted according to the actual situation and are not specifically limited here.

[0089] II. Processing procedure of amplitude adjustment unit 12.

[0090] 2.1 For any filtering module: The operating timing of the amplitude adjustment units 12 of adjacent branches within the same filtering module differs by at least one adjustment cycle. This allows the amplitude adjustment units 12 of adjacent branches within the same filtering module to output signals sequentially, thereby increasing the number of effective amplitude adjustment coefficients and improving the amplitude and phase balance capability of electronic devices while achieving amplitude adjustment.

[0091] For example, continuing with Figure 5, the operating timing of the amplitude adjustment units 12 of the four branches in the first filter module 10a is labeled as c0_0, c0_1, c0_2, and c0_3, respectively, and each timing is formed by arranging four amplitude adjustment coefficients, which are represented by 0, c0, c1, and c2, respectively. Similarly, the operating timing of the amplitude adjustment units 12 of the four branches in the second filter module 10b is labeled as c1_0, c1_1, c1_2, and c1_3, respectively, and each timing is formed by arranging four amplitude adjustment coefficients, which are represented by 0, c3, c4, and c5, respectively. Taking the amplitude adjustment coefficient represented by 0 as an example, in the first filter module 10a, as shown in the dashed box 1, the 0 in c0_0, the 0 in c0_1, the 0 in c0_2, and the 0 in c0_3 are successively delayed by one adjustment period. In the second filter module 10b, as shown in the dashed box 2, the 0 in c1_0, the 0 in c1_1, the 0 in c1_2, and the 0 in c1_3 are successively delayed by one adjustment period. This indicates that within the same filter module, the amplitude adjustment unit 12 of the next branch is delayed by one adjustment period compared to the amplitude adjustment unit 12 of the current branch.

[0092] Of course, Figure 5 shows an example with a delay of one adjustment cycle. However, in actual practice, it can also be that the amplitude adjustment unit 12 of the next branch operates one adjustment cycle earlier than the amplitude adjustment unit 12 of the current branch, or the amplitude adjustment units 12 of adjacent branches within the same filter module differ in operating timing by two or three adjustment cycles, etc. The specific settings can be made according to the actual situation, and no specific limitation is made here.

[0093] Furthermore, taking the operating timing c0_0 of the amplitude adjustment unit 12 in the first branch of the first filter module 10a as an example, since the first filter module 10a includes four branches, c0_0 is composed of four different amplitude adjustment coefficients. These four amplitude adjustment coefficients are represented by 0, c0, c1, and c2, respectively. 0, c0, c1, and c2 are arranged cyclically as a whole (hereinafter referred to as whole A). The time corresponding to whole A is one cycle of the output signal x0_0 of the phase adjustment unit in the first branch. The amplitude adjustment coefficient represented by 0 is always in the first position of whole A. Among these four amplitude adjustment coefficients, c0, c1, and c2 represent non-zero amplitude adjustment coefficients, while 0 represents an amplitude adjustment coefficient of zero. The reason for this setting is that the data input to the first branch during the working phase is not stable. This instability may lead to adjustment error. If the first bit of the overall A is not set to 0, it may reduce the number of effective amplitude adjustment coefficients and reduce the amplitude and phase equalization capability. Therefore, by setting the first bit of the overall A to 0, the error caused by data instability can be eliminated, thereby improving the amplitude and phase equalization capability.

[0094] 2.2 The amplitude adjustment unit 12 in the j-th branch of the i-th filter module and the amplitude adjustment unit 12 in the j-th branch of the (i-1)-th filter module have a timing difference of at least one adjustment cycle. This can control the amplitude adjustment units 12 coupled in different filter modules to output signals sequentially, thereby increasing the number of effective amplitude adjustment coefficients and improving the amplitude and phase equalization capability of electronic devices on the basis of amplitude adjustment.

[0095] For example, continuing with Figure 5, taking the amplitude adjustment coefficient represented by 0 as an example, the 0 in c0_0 is delayed by one adjustment cycle compared to the 0 in c1_0, the 0 in c0_1 is delayed by one adjustment cycle compared to the 0 in c1_1, the 0 in c0_2 is delayed by one adjustment cycle compared to the 0 in c1_2, and the 0 in c0_3 is delayed by one adjustment cycle compared to the 0 in c1_3. Of course, Figure 5 uses a delay of one adjustment cycle as an example, but in practice, it can also be: the operating timing of the amplitude adjustment unit 12 in the j-th branch of the i-1-th filter module is advanced by one adjustment cycle compared to the amplitude adjustment unit 12 in the j-th branch of the i-th filter module, or the operating timing of the amplitude adjustment unit 12 in the j-th branch of the i-1-th filter module differs from that in the j-th branch of the i-th filter module by two or three adjustment cycles, etc. The specific settings can be made according to the actual situation and are not specifically limited here.

[0096] Therefore, based on the above description of the driving process of the phase adjustment unit and the processing process of the amplitude adjustment unit 12, in the timing diagram shown in Figure 5, by arbitrarily selecting data within an adjustment period, such as the data in the dashed box 3, and by calculating the output signal of the phase adjustment unit and the amplitude adjustment coefficient within the selected adjustment period, the formula 1 corresponding to the first filter module 10a can be obtained: 4*0+1*c2+2*c1+3*c0.

[0097] We can also obtain equation 2 corresponding to the second filter module 10b: 0*c3+1*0+(-2)*c5+(-1)*c4;

[0098] By summing equations 1 and 2, we get equation 3: 4*0+1*c2+2*c1+3*c0+0*c3+1*0+(-2)*c5+(-1)*c4;

[0099] After recombining equation 3, we get equation 4: (-2)*c5+(-1)*c4+0*c3+1*c2+2*c1+3*c0;

[0100] Finally, after processing Equation 4 based on the Least Mean Square (LMS) criterion, the cancellation signal can be obtained. This cancellation signal is the output signal of the electronic device. The amplitude and phase equalization capability of the electronic device affects the accuracy of the cancellation signal, thus affecting the effect of the cancellation process.

[0101] Furthermore, Equation 4 reveals amplitude adjustment coefficients c5, c4, c3, c2, c1, and c0. These coefficients are operated on with different numbers, indicating that different coefficients process different signals. This demonstrates that all amplitude adjustment coefficients are active during amplitude-phase adjustment, maximizing the amplitude-phase adjustment capability and thus enhancing the amplitude-phase equalization capability of the electronic device. In other words, if the revised equation contains multiple amplitude adjustment coefficients operated on with the same number, it means multiple coefficients are processing the same signal. This reduces the number of active coefficients, leading to a decrease in amplitude-phase adjustment capability, but it still improves the amplitude-phase equalization capability of the electronic device to a certain extent.

[0102] It should be understood that the amplitude adjustment coefficients that are operated with different numbers are the effective amplitude adjustment coefficients. For example, in equation 4, c5, c4, c3, c2, c1, and c0 are operated with different numbers, so c5, c4, c3, c2, c1, and c0 are all effective amplitude adjustment coefficients.

[0103] Based on the above, it can be concluded that, assuming the signal input to the input terminal N1 of the electronic device is called the second signal to be processed, the electronic device can adjust the phase and amplitude of the interference signal in the second signal to be processed, which may include:

[0104] In the first filter module 10a of N filter modules, the phase adjustment units in each branch sequentially adjust the phase of the interference signal in the second signal to be processed; wherein, the phase difference between the phase adjustment units in adjacent branches of the first filter module 10a is at least one adjustment period.

[0105] In N filtering modules, the phase adjustment unit in the j-th branch of the i-th filtering module adjusts the phase of the signal output by the phase adjustment unit coupled in the (i-1)-th filtering module, and the phase adjustment units in each branch of the i-th filtering module adjust the phase of the input signal in sequence; wherein, the phase difference between the phase adjustment unit in the j-th branch of the i-th filtering module and the phase adjustment unit coupled in the (i-1)-th filtering module is at least one adjustment period.

[0106] Furthermore, the electronic device adjusts the amplitude of the interference signal in the second signal to be processed, which may include:

[0107] When the phase adjustment unit in each branch is coupled between the input terminal of the branch and the amplitude adjustment unit 12 of the branch, the amplitude adjustment unit 12 in each branch of each of the N filtering modules sequentially adjusts the amplitude of the signal output by the phase adjustment unit in the branch.

[0108] Among them, the operating timing of the amplitude adjustment unit 12 in adjacent branches within the same filter module differs by at least one adjustment cycle, and the operating timing of the amplitude adjustment unit 12 in the j-th branch within the i-th filter module differs from that in the j-th branch within the (i-1)-th filter module by at least one adjustment cycle.

[0109] Figure 6 illustrates, by way of example, a schematic diagram of another electronic device in an embodiment of this application. Referring to Figure 6, the structure of the electronic device in this embodiment is basically similar to that of the electronic devices described in the embodiments shown in Figures 3 and 4 above, with the following differences: the number of branches included in different filtering modules can be different. For example, taking two filtering modules, the first filtering module 10a includes M1 branches, and the second filtering module 10b includes M2 branches, where M1 and M2 are both integers greater than 1, and M1 is not equal to M2.

[0110] If M1 is less than M2, then the output of the phase adjustment unit in one of the multiple branches of the second filter module 10b is coupled to the input of the phase adjustment unit in one branch of the first filter module 10a. For example, assuming M1 is 2 and M2 is 3, as shown in Figure 6, the output of the phase adjustment unit in one branch of the second filter module 10b is coupled to the input of the phase adjustment unit in one branch of the first filter module 10a, and the outputs of the phase adjustment units in the remaining two branches of the second filter module 10b are coupled to the input of the phase adjustment unit in another branch of the first filter module 10a.

[0111] If M1 is greater than M2, then the phase adjustment units in some branches of the first filter module 10a are not coupled to the second filter module 10b. For example, assuming M1 is 4 and M2 is 3 (not shown), the output terminals of the phase adjustment units in three branches of the second filter module 10b are coupled one-to-one with the input terminals of the phase adjustment units in three branches of the first filter module 10a. The phase adjustment unit in the remaining branch of the first filter module 10a is not coupled to the second filter module 10b.

[0112] Furthermore, regardless of whether M1 is less than M2 or greater than M2, when driving the phase adjustment units in each filter module, the phase difference between the phase adjustment units in each branch within the same filter module is at least one adjustment period, and the phase difference between the phase adjustment unit in the j-th branch of the i-th filter module and the coupled phase adjustment unit in the (i-1)-th filter module is at least one adjustment period. In addition, fine adjustments can be made according to the actual coupling situation to complete the equalization process of the electronic device. The specific method for fine adjustments can be set according to the actual situation and is not specifically limited here.

[0113] It should be understood that the structure of the electronic device in this embodiment is similar to that of the electronic device described in the embodiments shown in Figures 3 and 4 above. Please refer to the relevant descriptions in the previous embodiments. Repeated descriptions will not be repeated.

[0114] Figure 7 exemplarily illustrates a schematic diagram of another electronic device according to an embodiment of this application. Referring to Figure 7, the structure of the electronic device in this embodiment is basically similar to that of the electronic devices described in any of the embodiments shown in Figures 3, 4, and 6 above, with the difference being that each filtering module may also include a second accumulator 13. Exemplarily, the output terminals of multiple branches of each filtering module are coupled to the input terminals of the second accumulator 13, and the output terminals of the second accumulator 13 are coupled to the first accumulator 20. This allows each filtering module to output a single result, thereby significantly reducing the amount of data processed by the first accumulator 20, thus lowering the computational cost and power consumption of the first accumulator 20.

[0115] It should be understood that the structure of the electronic device in this embodiment is similar to the structure of the electronic device described in any of the embodiments shown in Figures 3, 4, and 6 above. For details, please refer to the relevant descriptions in the foregoing embodiments. Repeated descriptions will not be repeated here.

[0116] Figure 8 exemplarily illustrates a schematic diagram of another electronic device in an embodiment of this application. Referring to Figure 8, the structure of the electronic device in this embodiment is basically similar to that of the electronic devices described in any of the embodiments shown in Figures 3, 4, 6, and 7 above. The differences include: the electronic device may also include a digital-to-analog converter (DAC). To distinguish it from the DAC mentioned later, the DAC in this paragraph may also be referred to as the first DAC 30. Exemplarily, the output terminal of the first accumulator 20 is coupled to the input terminal of the first DAC 30. This allows the electronic device to have more functions and integrate more functions, thereby expanding the application range of the electronic device. For example, this electronic device can be applied to communication systems, such as, but not limited to, communication systems used in Ethernet, SerDes, and other communication scenarios.

[0117] It should be understood that the structure of the electronic device in this embodiment is similar to the structure of the electronic device described in any of the embodiments shown in Figures 3, 4, 6, and 7 above. For details, please refer to the relevant descriptions in the foregoing embodiments. Repeated descriptions will not be repeated here.

[0118] Figure 9 illustrates a schematic diagram of a coefficient processor according to an embodiment of this application. Referring to Figure 9, the coefficient processor 100 may include: a coefficient determination module 101, a preprocessing module 102, and a second splitter 103. The input terminal of the second splitter 103 is coupled to the output terminal of the first combiner 130, and the output terminal of the second splitter 103 is coupled to the first input terminal of the preprocessing module 102. The second input terminal of the preprocessing module 102 is coupled to the service signal source (i.e., the signal source providing the service signal S0 in Figure 9), and the output terminal of the preprocessing module 102 is coupled to the first input terminal of the coefficient determination module 101. The second input terminal of the coefficient determination module 101 is coupled to the second output terminal of the first splitter 110, and the output terminal of the coefficient determination module 101 is coupled to the amplitude adjustment unit in the electronic device 120. The determining module 101, the preprocessing module 102, and the second splitter 103 are all located outside the electronic device 120. The second splitter 103 is used to extract a sub-signal S1' of a preset frequency band from the first signal S1 output by the first combiner 130. The sub-signal S1' includes a service signal S0 and an interference signal S2. The preprocessing module 102 is used to cancel the service signal S0 in the sub-signal S1' according to the service signal S0 provided by the service signal source to obtain the interference signal S2 in the sub-signal S1'. The coefficient determining module 101 is used to output an amplitude adjustment coefficient to the amplitude adjustment unit in the electronic device 120 according to the output signal of the second output terminal of the first splitter 110 (i.e., the signal represented by S3 in Figure 9) and the interference signal S2 in the sub-signal S1'. The amplitude adjustment coefficient is used for amplitude adjustment processing.

[0119] When the coefficient processor 100 is applied to a signal processing system, Formula 1 can be derived: E = g@h + g@w, where E represents the first signal S1 output by the first combiner 130, g represents the signal input to the electronic device 120 (i.e., the signal represented by S3 in Figure 9), h represents the amplitude and phase characteristic distortion of the hardware such as the first splitter 110, the time delay unit, and the first combiner 130 in the signal processing system, @ represents convolution processing, and w represents the amplitude adjustment coefficient. When g and h are stable, the change of w will affect the first signal S1. Since the first signal S1 is obtained by canceling the signal input to the first combiner 130 with a cancellation signal, and the cancellation signal is determined based on the amplitude adjustment coefficient, the amplitude adjustment coefficient affects the effect of the cancellation processing, thereby affecting the accuracy of the first signal S1 output by the first combiner 130.

[0120] Based on the LMS criterion, to minimize the power of E, w can be iteratively processed. The specific iterative formula is: w n+1 =w n +μ×E n ×g n wn+1 w represents the amplitude adjustment coefficient at the current moment. n G represents the amplitude adjustment coefficient at the previous moment. n E represents the signal input to electronic device 120 at the previous moment. n Let S1 represent the first signal output by the first combiner 130 at the previous moment, and μ represent the iteration step size. Therefore, the amplitude adjustment coefficient at the current moment can be calculated based on the iterative formula, thereby calculating the first signal S1 output by the first combiner 130. Furthermore, it can be seen from the above iterative formula that the first signal S1 output by the first combiner 130 at the previous moment affects the amplitude adjustment coefficient at the current moment; that is, the first signal S1 acts as feedback and affects the amplitude adjustment coefficient. Thus, when determining the amplitude adjustment coefficient based on the output signal of the second output terminal of the first splitter 110 and the interference signal S2 in the sub-signal S1', the factor signal S1' belongs to the signal within the preset frequency band of the first signal S1. Therefore, the interference generated by the service signal S0 in the first signal S1 on determining the amplitude adjustment coefficient can be reduced, the number of iterations can be reduced, the accuracy of the amplitude adjustment coefficient can be improved, and the cancellation effect can be enhanced.

[0121] For example, the coefficient determination module 101 includes: a first analog-to-digital converter 101a, a second analog-to-digital converter 101b, and a processor 101c. The input terminal of the first analog-to-digital converter 101a is coupled to the second output terminal of the first splitter 110, and the output terminal of the first analog-to-digital converter 101a is coupled to the first input terminal of the processor 101c. The input terminal of the second analog-to-digital converter 101b is coupled to the output terminal of the preprocessing module 102, and the output terminal of the second analog-to-digital converter 101b is coupled to the second input terminal of the processor 101c. The output terminal of the processor 101c is coupled to the amplitude adjustment unit in the electronic device 120. The first analog-to-digital converter 101a is used to convert the output signal of the second output terminal of the first splitter 110 into a corresponding first digital signal. The second analog-to-digital converter 101b is used to convert the interference signal S2 in the sub-signal S1' output by the preprocessing module 102 into a corresponding second digital signal. The processor 101c is used to output an amplitude adjustment coefficient to the amplitude adjustment unit according to the first digital signal and the second digital signal. Since the signal input to the second analog-to-digital converter 101b is an interference signal S2 and does not include the larger service signal S0, the second analog-to-digital converter 101b only performs conversion processing on the interference signal S2. Since the service signal S0 is generally a stronger signal and the interference signal S2 is generally a weaker signal, performing conversion processing only on the interference signal S2 can increase the signal-to-noise ratio of the converted signal and reduce the occupation of the quantization range of the second analog-to-digital converter 101b, avoiding damage to the performance of the second analog-to-digital converter 101b, thereby improving the utilization rate of the quantization range of the second analog-to-digital converter 101b.

[0122] The preprocessing module 102 includes: a filter 102a, a digital-to-analog converter (hereinafter referred to as the second digital-to-analog converter 102b), and a second combiner 102c. The input terminal of the filter 102a is coupled to the service signal source, the output terminal of the filter 102a is coupled to the input terminal of the second digital-to-analog converter 102b, the output terminal of the second digital-to-analog converter 102b is coupled to the first input terminal of the second combiner 102c, and the second input terminal of the second combiner 102c is coupled to the output terminal of the second splitter 103. The filter 102a is used to: perform amplitude alignment processing on the service signal S0 provided by the service signal source to obtain a second signal; the second digital-to-analog converter 102b is used to: convert the second signal into a corresponding analog signal; the second combiner 102c is used to: based on the conversion of the second signal into a corresponding analog signal, perform cancellation processing on the service signal S0 in the sub-signal S1' to obtain the interference signal S2 in the sub-signal S1'. The filter 102a can be a digital filter, such as, but not limited to, a finite-length unit impulse response filter or an infinite-length unit impulse response filter. The specific settings can be configured according to actual needs and are not specifically limited here. Furthermore, the filter 102a can employ fixed or adaptive coefficients to achieve amplitude alignment processing, matching the amplitude-phase difference with the sub-signal S1'. After being converted into a corresponding analog signal by the second digital-to-analog converter 102b, the analog signal can be used to cancel out the service signal S0 in the sub-signal S1', obtaining the interference signal S2 in the sub-signal S1', thereby improving the accuracy of the amplitude adjustment coefficient.

[0123] Figure 10 exemplarily illustrates a structural schematic diagram of another coefficient processor 100 in an embodiment of this application. Referring to Figure 10, the structure of the coefficient processor 100 in this embodiment is basically similar to that of the coefficient processor 100 described in the embodiment shown in Figure 9 above. The differences include: the coefficient determination module 101 is integrated inside the electronic device 120, that is, the processor, the first analog-to-digital converter and the second analog-to-digital converter included in the coefficient determination module 101 are all located inside the electronic device. This allows the electronic device 120 to not only adjust the amplitude and phase of the interference signal in the input signal to obtain a cancellation signal, but also convert the output signal of the first splitter 110 into a corresponding first digital signal; convert the interference signal in the sub-signal output by the preprocessing module 102 into a corresponding second digital signal; and determine the amplitude adjustment coefficient based on the first digital signal and the second digital signal so that the amplitude adjustment coefficient can be used for amplitude adjustment processing. This increases the functionality of the electronic device 120 and expands its application range. For the sake of simplicity, the processor, the first analog-to-digital converter and the second analog-to-digital converter are not shown in Figure 10. Furthermore, the electronic device 120 integrating the coefficient determination module 101 can be referred to as an amplitude and phase adjuster.

[0124] It should be understood that the structure of the coefficient processor 100 in this embodiment is similar to that of the coefficient processor 100 described in the embodiment shown in FIG9 above. Please refer to the relevant description in the above embodiment. Repeated parts will not be described again.

[0125] Figure 11 exemplarily illustrates a structural schematic diagram of another coefficient processor 100 according to an embodiment of this application. Referring to Figure 11, the structure of the coefficient processor 100 in this embodiment is basically similar to that of the coefficient processor 100 described in the embodiment shown in Figure 9 above. The differences include: the processor 101c is integrated inside the electronic device 120, while the first analog-to-digital converter 101a and the second analog-to-digital converter 101b are both located outside the electronic device 120. This allows the electronic device 120 to not only adjust the amplitude and phase of the interference signal in the input signal to obtain a cancellation signal, but also to determine the amplitude adjustment coefficient based on the first digital signal and the second digital signal, so that the amplitude adjustment coefficient can be used for amplitude adjustment processing. This increases the functionality of the electronic device 120 and expands its application range. Furthermore, the electronic device 120 with the integrated processor 101c can be referred to as an amplitude and phase adjuster.

[0126] It should be understood that the structure of the coefficient processor 100 in this embodiment is similar to that of the coefficient processor 100 described in the embodiment shown in FIG9 above. Please refer to the relevant description in the above embodiment. Repeated parts will not be described again.

[0127] Figure 12 exemplarily illustrates a schematic diagram of another coefficient processor 100 according to an embodiment of this application. Referring to Figure 12, the structure of the coefficient processor 100 in this embodiment is basically similar to that of the coefficient processor 100 described in any of the embodiments shown in Figures 9 to 11 above, with the difference being that the coefficient processor 100 further includes a first amplifier 104. Exemplarily, the input terminal of the first amplifier 104 is coupled to the output terminal of the preprocessing module 102, and the output terminal of the first amplifier 104 is coupled to the input terminal of the second analog-to-digital converter 101b. The first amplifier 104 is used to amplify the interference signal S2 in the sub-signal S1' and output it to the second analog-to-digital converter 101b. In this way, the amplified interference signal S2 has a higher signal-to-noise ratio, thereby further improving the utilization rate of the quantization range of the second analog-to-digital converter 102b.

[0128] It should be understood that the structure of the coefficient processor 100 in this embodiment is similar to the structure of the coefficient processor 100 described in any of the embodiments shown in Figures 9 to 11 above. Please refer to the relevant descriptions in the foregoing embodiments. Repeated descriptions will not be repeated.

[0129] Figure 13 illustrates a schematic diagram of a signal processing system according to an embodiment of this application. Referring to Figure 13, the electronic device may include: a first splitter 110, a first combiner 130, a time delayer 140, an electronic device 120, and a coefficient processor 100. The first output terminal of the first splitter 110 is coupled to the input terminal of the time delayer 140, and the second output terminal of the first splitter 110 is coupled to the input terminal of the electronic device 120. The output terminal of the time delayer 140 is coupled to the first input terminal of the first combiner 130. The output terminal of the electronic device 120 is coupled to the second input terminal of the first combiner 130. The first input terminal of the coefficient processor 100 is coupled to the output terminal of the first combiner 130, the second input terminal of the coefficient processor 100 is coupled to the service signal source, and the first output terminal of the coefficient processor 100 is coupled to the electronic device 120.

[0130] In this embodiment of the application, when constructing the signal processing system, the electronic device 120 is implemented using the electronic device 120 described in any of the embodiments shown in Figures 3, 4, 6, and 7, while the coefficient processor 100 is implemented using a structure well-known in the art capable of implementing the coefficient processor 100; or, the coefficient processor 100 can be implemented using the coefficient processor 100 described in any of the embodiments shown in Figures 9 to 11, while the electronic device is implemented using a structure well-known in the art capable of implementing the electronic device 120; or, the electronic device 120 is implemented using the electronic device 120 described in any of the embodiments shown in Figures 3, 4, 6, and 7, and the coefficient processor 100 can be implemented using the coefficient processor 100 described in any of the embodiments shown in Figures 9 to 11; the specific configuration can be adjusted according to actual needs, and no specific limitations are made here. It should be understood that for embodiments of the electronic device 120 and the coefficient processor 100, please refer to the relevant descriptions in the foregoing embodiments, and repeated descriptions will not be repeated.

[0131] For example, the signal processing system further includes a second amplifier 150, which is coupled between the service signal source and the input of the first splitter 110. When the service signal passes through the second amplifier 150, interference signals are generated due to nonlinear distortion, resulting in the signal output to the first splitter 110 containing both service signals and interference signals. However, after processing by the first splitter 110, the first combiner 130, the time delayer 140, the electronic device 120, and the coefficient processor 100, the interference signals generated by nonlinear distortion can be eliminated, reducing the interference signals in the output signal and improving the accuracy of the output signal. Of course, the location between the service signal source and the input of the first combiner 130 is not limited to the second amplifier 150; other devices that can cause nonlinear distortion can also be provided. Regardless of the type of device used, the processing by the first splitter 110, the first combiner 130, the time delayer 140, the electronic device 120, and the coefficient processor 100 can reduce the influence of interference signals and improve the accuracy of the output signal. It should be understood that the interference signal output by the second combiner 102c is a part of the interference signal in the signal output to the first splitter 110.

[0132] Furthermore, the signal processing system may also include a radio frequency transceiver unit 160, the output of which is coupled to the input of the second amplifier 150. The radio frequency transceiver unit 160 serves as a service signal source, providing service signals, and the service signals output by the radio frequency transceiver unit 160 are generally radio frequency signals. In this case, the radio frequency transceiver unit 160 can realize the conversion between baseband signals and radio frequency signals, and the first splitter 110, the first combiner 130, the time delay unit 140, the electronic device 120, and the coefficient processor 100 can be applied in the transmission path to realize the transmission of radio frequency signals.

[0133] Furthermore, the signal processing system may also include a duplexer 170, the input of which is coupled to the output of the first combiner 130, i.e., the input of the duplexer 170 is coupled to the first output of the coefficient processor 100, and the output of the duplexer 170 is coupled to the antenna 180. Since the signal input to the duplexer 170 has already undergone cancellation processing, the suppression requirements of the filter in the duplexer 170 can be reduced, thereby reducing the manufacturing cost of the duplexer 170.

[0134] The signal processing system may further include a third amplifier 190, which is coupled between the output of the electronic device 120 and the second input of the first combiner 130. The third amplifier 190 is used to amplify the canceled signal to match the power of the corresponding component signal in the main link. The main link is a link consisting of the first splitter 110, the time delay unit 140, and the first combiner 130.

[0135] In summary, the electronic device described in this application can be applied not only to the aforementioned communication devices supporting FDD, but also to communication devices supporting other full-duplex communication, and even to communication devices that do not support or use full-duplex communication, in order to reduce the impact of nonlinear distortion signals on the communication device. The aforementioned other full-duplex communication can include time division duplexing (TDD) and FDD+TDD communication scenarios. It is understood that the electronic device can be located between the PA of the transmit channel and the transmit filter of the duplexer, or between the PA of the transmit channel and the transmit filter of the transmit channel. Furthermore, devices in the communication device that exhibit nonlinear distortion can be directly or indirectly connected to the input terminal of the electronic device, thereby canceling the nonlinear distortion introduced by the device through the electronic device.

[0136] Of course, the electronic devices described in this application embodiment can also be applied to communication systems other than communication devices with radio frequency functions, such as, but not limited to, communication systems used in Ethernet, SerDes, and other communication scenarios. In this case, the communication system may include: an analog-to-digital converter and electronic devices. To distinguish it from the first analog-to-digital converter and the second analog-to-digital converter mentioned above, the analog-to-digital converter in this paragraph may also be referred to as a third analog-to-digital converter. The input terminal of the third analog-to-digital converter is coupled to the output terminal of the electronic device, the output terminal of the third analog-to-digital converter is coupled to the subsequent circuit, and the input terminal of the electronic device is coupled to the signal source. The signal provided by the signal source may be, but is not limited to, a signal after channel attenuation. This signal is first transmitted to the electronic device, processed by the electronic device, and then transmitted to the third analog-to-digital converter. Since the electronic device has excellent amplitude and phase equalization capabilities, it can compensate for the amplitude and phase distortion of the signal provided by the signal source. Then, the compensated signal is transmitted to the third analog-to-digital converter, thereby improving the signal-to-noise ratio of the signal output by the third analog-to-digital converter and improving the accuracy of the subsequent circuit processing.

[0137] Obviously, those skilled in the art can make various modifications and variations to the embodiments of this application without departing from the spirit and scope of the embodiments of this application. Therefore, if these modifications and variations to the embodiments of this application fall within the scope of the claims of this application and their equivalents, this application also intends to include these modifications and variations.

Claims

1. An electronic device, characterized in that, The electronic device comprises: a first accumulator and N filter modules, N being an integer greater than 1, each of the N filter modules comprising a plurality of branches, each of the plurality of branches comprising a coupled phase adjustment unit and an amplitude adjustment unit, an output of each of the filter modules being coupled to the first accumulator; for a first filter module of the N filter modules, an input of the phase adjustment unit in the first filter module being coupled to an input of the electronic device; for an i-th filter module of the N filter modules, an input of the phase adjustment unit in the i-th filter module being coupled to an output of the phase adjustment unit in an (i-1)-th filter module, i being an integer greater than 1 and not greater than N.

2. Electronic device according to claim 1, characterized in that The different filter modules comprise the same number of branches, an input of the phase adjustment unit in a j-th branch in the i-th filter module being coupled to an output of the phase adjustment unit in the j-th branch in the (i-1)-th filter module, j being a positive integer.

3. Electronic device according to claim 2, characterized in that A phase difference between the phase adjustment unit in the j-th branch in the i-th filter module and the phase adjustment unit in the j-th branch in the (i-1)-th filter module is at least one adjustment period, j being a positive integer.

4. Electronic device according to any of claims 1-3, characterized in that, Each of the filter modules further comprises a second accumulator, outputs of the plurality of branches of each of the filter modules being coupled to inputs of the second accumulator, an output of the second accumulator being coupled to the first accumulator.

5. Electronic device according to any of claims 1-4, characterized in that, The electronic device further comprises a digital-to-analog converter, an output of the first accumulator being coupled to an input of the digital-to-analog converter.

6. A signal processing system, characterized by The electronic device comprises: a first splitter, a first combiner, a time delay device, and an electronic device; a first output of the first splitter being coupled to an input of the time delay device, a second output of the first splitter being coupled to an input of the electronic device, an output of the time delay device being coupled to a first input of the first combiner, an output of the electronic device being coupled to a second input of the first combiner; the electronic device comprises a first accumulator and N filter modules, N being an integer greater than 1, each of the filter modules comprising a plurality of branches, each of the plurality of branches comprising a coupled phase adjustment and an amplitude adjustment unit, an output of each of the filter modules being coupled to the first accumulato for a first filter module of the N filter modules, an input of the phase adjustment unit in first filter module being coupled to an input of the electronic device; for an i-th filter module of the N filter modules, an input of the phase adjustment unit in i-th filter module being coupled to an output of the phase adjustment unit in (i-1)-th filter module, i being an integer greater than 1 and not larger than N.

7. The signal processing system of claim 6, wherein, The signal processing system further comprises a coefficient determining module, a preprocessing module and a second shunt, an input end of the second shunt is coupled with an output end of the first combiner, and an output end of the second shunt is coupled with a first input end of the preprocessing module; a second input end of the preprocessing module is coupled with a service signal source, and an output end of the preprocessing module is coupled with a first input end of the coefficient determining module; a second input end of the coefficient determining module is coupled with a second output end of the first shunt, and an output end of the coefficient determining module is coupled with the electronic device; the coefficient determining module, the preprocessing module and the second shunt are arranged outside the electronic device; The second shunt is configured to extract a preset frequency band sub-signal from the first signal output by the first combiner, and the sub-signal comprises a service signal and an interference signal; The preprocessing module is configured to perform cancellation processing on the service signal in the sub-signal according to the service signal provided by the service signal source, to obtain the interference signal in the sub-signal; The coefficient determining module is configured to output an amplitude adjustment coefficient to the electronic device according to the output signal of the second output end of the first shunt and the interference signal in the sub-signal, and the amplitude adjustment coefficient is used for amplitude adjustment processing.

8. The signal processing system of claim 7, wherein, The coefficient determining module comprises a first analog-to-digital converter, a second analog-to-digital converter and a processor, an input end of the first analog-to-digital converter is coupled with the second output end of the first shunt, and an output end of the first analog-to-digital converter is coupled with a first input end of the processor; an input end of the second analog-to-digital converter is coupled with an output end of the preprocessing module, and an output end of the second analog-to-digital converter is coupled with a second input end of the processor; and an output end of the processor is coupled with the electronic device; The first analog-to-digital converter is configured to convert the output signal of the second output end of the first shunt into a corresponding first digital signal; The second analog-to-digital converter is configured to convert the interference signal in the sub-signal output by the preprocessing module into a corresponding second digital signal; The processor is configured to output the amplitude adjustment coefficient to the electronic device according to the first digital signal and the second digital signal.

9. The signal processing system of claim 6, wherein, The signal processing system further comprises a preprocessing module and a second shunt arranged outside the electronic device, an input end of the second shunt is coupled with an output end of the first combiner, and an output end of the second shant is coupled with a first input end of the preprocessing module; a second input end of the preprocessingmodule is coupled with a service signal source, and an output end of the preprocessing module is coupled with the electronic device; The second shunt is configured to extract a preset frequency band sub-signalfrom the first signal output by the first combiner, and the sub-signal comprises a service signaland an interference signal; The preprocessing module is configured to perform cancellation processing on the service signal in thesub-signal according to the service signal provided by the service signal source, to obtain the interference signalin the sub-signal; The electronic device is further configured to determine an amplitude adjustment coefficient according to the output signal of the second output end of the first shunt and the interference signal in the sub-signal.

10. The signal processing system of claim 9, wherein, The signal processing system further comprises a first analog-to-digital converter and a second analog-to-digital converter, the input end of the first analog-to-digital converter is coupled with the second output end of the first shunt, and the output end of the first analog-to-digital converter is coupled with the electronic device; the input end of the second analog-to-digital converter is coupled with the output end of the preprocessing module, and the output end of the second analog-to-digital converter is coupled with the electronic device. The first analog-to-digital converter is configured to convert the output signal of the second output end of the first shunt into a corresponding first digital signal. The second analog-to-digital converter is configured to convert the interference signal in the sub-signal output by the preprocessing module into a corresponding second digital signal. The electronic device is further configured to determine the amplitude adjustment coefficient according to the first digital signal and the second digital signal.

11. The signal processing system of claim 9, wherein, The electronic device is further configured to convert the output signal of the second output end of the first shunt into a corresponding first digital signal, convert the interference signal in the sub-signal output by the preprocessing module into a corresponding second digital signal, and determine the amplitude adjustment coefficient according to the first digital signal and the second digital signal.

12. A signal processing system as claimed in any one of claims 7-11, characterized in that, The preprocessing module comprises a filter, a digital-to-analog converter, and a second combiner, the input end of the filter is coupled with the service signal source, the output end of the filter is coupled with the input end of the digital-to-analog converter, the output end of the digital-to-analog converter is coupled with the first input end of the second combiner, and the second input end of the second combiner is coupled with the output end of the second shunt. The filter is configured to perform amplitude and phase alignment processing on the service signal provided by the service signal source to obtain a second signal. The digital-to-analog converter is configured to convert the second signal into a corresponding analog signal. The second combiner is configured to perform cancellation processing on the service signal in the sub-signal according to the corresponding analog signal of the second signal to obtain the interference signal in the sub-signal.

13. A signal processing system as claimed in any one of claims 7-12, characterized in that The signal processing system further comprises a first amplifier, the input end of the first amplifier is coupled with the output end of the preprocessing module, and the first amplifier is configured to perform amplification processing on the interference signal in the sub-signal.

14. A signal processing system as claimed in any one of claims 6-13, characterized in that, The signal processing system further comprises a second amplifier, the second amplifier is coupled between the service signal source and the input end of the first shunt.

15. The signal processing system of claim 14, wherein, The signal processing system further comprises a radio frequency transceiver unit, the output end of the radio frequency transceiver unit is coupled with the input end of the power amplifier, and the radio frequency transceiver unit provides the service signal as the service signal source.

16. The signal processing system of any one of claims 6-15, wherein, The signal processing system further comprises a duplexer, the input end of the duplexer is configured to be coupled with the output end of the first combiner, and the output end of the duplexer is configured to be coupled with an antenna.

17. A signal processing system, characterized by The signal processing system comprises: a first shunt, a first combiner, a time delay device, an amplitude and phase adjuster, a preprocessing module, and a second shunt. a first output of the first brancher is coupled with an input of the time delayer, a second output of the first brancher is coupled with a first input of the amplitude and phase adjuster, an output of the time delayer is coupled with a first input of the first combiner, an output of the amplitude and phase adjuster is coupled with a second input of the first combiner; an input of the second brancher is coupled with an output of the first combiner, an output of the second brancher is coupled with a first input of the pre-processing module; a second input of the pre-processing module is coupled with a service signal source, an output of the pre-processing module is coupled with a second input of the amplitude and phase adjuster; the first brancher is configured to output a first to-be-processed signal to the time delayer and output a second to-be-processed signal to the amplitude and phase adjuster, the first to-be-processed signal and the second to-be-processed signal each include a service signal and an interference signal; the time delayer is configured to perform delay processing on the first to-be-processed signal to obtain a delay signal; the first combiner is configured to perform cancellation processing on the delay signal according to a cancellation signal to obtain a first signal; the second brancher is configured to extract a preset frequency band sub-signal from the first signal output by the first brancher, the sub-signal including a service signal and an interference signal; the pre-processing module is configured to perform cancellation processing on the service signal in the sub-signal according to the service signal provided by the service signal source to obtain the interference signal in the sub-signal; the amplitude and phase adjuster is configured to adjust the amplitude and phase of the interference signal in the second to-be-processed signal according to the second to-be-processed signal and the interference signal in the sub-signal to obtain the cancellation signal.

18. A signal processing method characterized by, comprising: a to-be-processed signal is branched to obtain a first to-be-processed signal and a second to-be-processed signal, the first to-be-processed signal and the second to-be-processed signal each including a service signal and an interference signal; the amplitude and phase of the interference signal in the second to-be-processed signal are adjusted to obtain a cancellation signal; the first to-be-processed signal is subjected to delay processing to obtain a delay signal; the cancellation signal and the delay signal are subjected to cancellation processing to obtain a first signal; wherein adjusting the phase of the interference signal in the second to-be-processed signal comprises: phase adjustment units in each branch in a first filter module of N filter modules sequentially adjust the phase of the interference signal in the second to-be-processed signal; wherein the phase difference between the phase adjustment units in adjacent branches in the first filter module is at least one adjustment period; a phase adjustment unit in a jth branch in an ith filter module of the N filter modules adjusts the phase of a signal output by a coupled phase adjustment unit in an i-1th filter module, and the phase adjustment units in each branch in the ith filter module sequentially adjust the phase of an input signal; wherein the phase difference between the phase adjustment unit in the jth branch in the ith filter module and the coupled phase adjustment unit in the i-1th filter module is at least one adjustment period. The amplitude of the interference signal in the second to-be-processed signal is adjusted, comprising: When the phase adjustment unit in each branch is coupled between the input end of the branch and the amplitude adjustment unit of the branch, the amplitude adjustment unit in each branch in each filter module successively adjusts the signal output by the phase adjustment unit in the branch; wherein the working time sequence of the amplitude adjustment units of adjacent branches in the same filter module is different by at least one adjustment period, and the working time sequence of the amplitude adjustment unit in the jth branch in the ith filter module and the amplitude adjustment unit in the jth branch in the i-1th filter module is different by at least one adjustment period; N is an integer greater than 1, i is an integer greater than 1 and not greater than N, and j is a positive integer.

19. The signal processing method of claim 18, wherein, Further comprising: A sub-signal of a preset frequency band is extracted from the first signal, and the sub-signal includes the service signal and the interference signal; The service signal in the sub-signal is cancelled according to the service signal, to obtain the interference signal in the sub-signal; An amplitude adjustment coefficient is obtained according to the second to-be-processed signal output by the first divider and the interference signal in the sub-signal, and the amplitude adjustment coefficient is used for amplitude adjustment.

20. A signal processing method, characterized by, Comprising: After the to-be-processed signal is divided, a first to-be-processed signal and a second to-be-processed signal are obtained, and the first to-be-processed signal and the second to-be-processed signal both include a service signal and an interference signal; The amplitude and phase of the interference signal in the second to-be-processed signal are adjusted to obtain a cancellation signal; The first to-be-processed signal is delayed to obtain a delayed signal; The delayed signal is cancelled according to the cancellation signal to obtain a first signal; A sub-signal of a preset frequency band is extracted from the first signal, and the sub-signal includes the service signal and the interference signal; The service signal in the sub-signal is cancelled according to the service signal, to obtain the interference signal in the sub-signal; An amplitude adjustment coefficient is obtained according to the second to-be-processed signal and the interference signal in the sub-signal, and the amplitude adjustment coefficient is used for amplitude adjustment.

21. A communications device, comprising: Comprising: A baseband circuit and a signal processing system as claimed in any one of claims 6-17; The output end of the baseband circuit is coupled with the input end of the signal processing system.

22. A communication system, characterized by Comprising: An analog-to-digital converter and an electronic device as claimed in any one of claims 1-5, the input end of the analog-to-digital converter is coupled with the output end of the electronic device.

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