Buck-boost converter and mode switching method and circuit therefor

Abstract

Disclosed in the present invention are a buck-boost converter and a mode switching method and circuit therefor. The mode switching method comprises: on the basis of a boost-buck mode signal and a third drive signal of a third switching transistor, selecting a drive signal from the third drive signal, and a first drive signal of a first switching transistor, filtering the selected drive signal or a voltage-divided signal of the selected drive signal and then comparing a filtered signal with a first reference voltage, and obtaining a closed-loop buck mode signal on the basis of a comparison result; comparing an output voltage of a buck-boost converter with a second reference voltage, and obtaining an open-loop buck mode signal on the basis of a comparison result; and when both the closed-loop buck mode signal and the open-loop buck mode signal are effective, outputting an effective buck mode signal, so as to switch an operating mode of the buck-boost converter to a buck mode in the next switching cycle. Therefore, the accuracy of determining an operating mode of the buck-boost converter is improved, and smooth switching between operating modes of the buck-boost converter is realized.

Description

Buck-boost converter and mode switching method and circuit thereof Cross-reference to Related Applications

[0001] This application claims priority to the Chinese Patent Application No. 202411536941.7, filed on October 30, 2024, and entitled “Buck-Boost Converter and Mode Switching Method and Circuit Thereof”, the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] The present application relates to the technical field of integrated circuits, and in particular to a Buck-Boost converter and a mode switching method and circuit thereof. BACKGROUND

[0003] A four-switch Buck-Boost converter has three operating modes, namely, a Buck mode, a Boost mode, and a Buck-Boost mode. The four-switch Buck-Boost converter switches among the three operating modes to adapt to different voltage conversion requirements.

[0004] The existing four-switch Buck-Boost converter generally uses open-loop judgment to determine the operating mode. The method of open-loop judgment of the operating mode of the four-switch Buck-Boost converter is to compare the output voltage of the Buck-Boost converter with a threshold voltage through hysteresis, and determine the operating mode of the four-switch Buck-Boost converter according to the comparison result, wherein the threshold voltage is the product of the input voltage and a duty cycle, and the duty cycle is a fixed value. This judgment method cannot accurately determine the true operating state of the four-switch Buck-Boost converter when facing a large load current because the duty cycle is not dynamically adjusted according to the actual load current, thereby increasing the risk of misjudgment.

[0005] Therefore, it is necessary to propose a new four-switch Buck-Boost converter and a mode switching method and circuit thereof to solve the above problems. SUMMARY

[0006] In view of the above problems, the purpose of the present application is to provide a Buck-Boost converter and a mode switching method and circuit thereof, so as to realize smooth switching between the operating modes of the Buck-Boost converter.

[0007] According to an aspect of the present application, a mode switching method of a buck-boost converter is provided, the buck-boost converter comprising an inductor, a first switch, a second switch, a third switch and a fourth switch, the first switch, the inductor and the fourth switch being connected in series between an input terminal and an output terminal, one end of the second switch being connected to a node between the first switch and the inductor, one end of the third switch being connected to a node between the inductor and the fourth switch, the operation modes of the buck-boost converter comprising a buck mode, a boost mode and a buck-boost mode, wherein the mode switching method comprises selecting a drive signal from the third drive signal, a first drive signal of the first switch according to a buck-boost mode signal and the third drive signal of the third switch, comparing the selected drive signal or a voltage-divided signal of the selected drive signal with a first reference voltage after filtering, and obtaining a closed-loop buck mode signal according to the comparison result; comparing an output voltage of the buck-boost converter with a second reference voltage, and obtaining an open-loop buck mode signal according to the comparison result; and outputting a valid buck mode signal when both the closed-loop buck mode signal and the open-loop buck mode signal are valid, so as to switch the operation mode of the buck-boost converter to the buck mode in the next switching period.

[0008] Optionally, the mode switching method further comprises selecting a drive signal from the second drive signal, a fourth drive signal of the fourth switch according to the buck-boost mode signal and the second drive signal of the second switch, comparing the selected drive signal or a voltage-divided signal of the selected drive signal with a third reference voltage after filtering, and obtaining a closed-loop boost mode signal according to the comparison result; comparing the output voltage of the buck-boost converter with a fourth reference voltage, and obtaining an open-loop boost mode signal according to the comparison result; and outputting a valid boost mode signal when the closed-loop boost mode signal and / or the open-loop boost mode signal is valid, so as to switch the operation mode of the buck-boost converter to the boost mode in the next switching period; the mode switching method further comprises outputting a valid buck-boost mode signal when both the buck mode signal and the boost mode signal are invalid, so as to switch the operation mode of the buck-boost converter to the buck-boost mode in the next switching period.

[0009] Optionally, the selecting a drive signal from the third drive signal, the first drive signal according to the boost-buck mode signal and the third drive signal, providing a drive signal or a voltage-divided signal of the selected drive signal to a first node according to a result of an AND operation between the boost-buck mode signal and the third drive signal, filtering a voltage of the first node to obtain a buck filtered voltage, and obtaining the closed-loop buck mode signal according to a result of a comparison between the buck filtered voltage and a first reference voltage, wherein the first reference voltage is equal to a product of a first threshold value and a first voltage, the second reference voltage is equal to a product of the first threshold value and an input voltage of the boost-buck converter, the first threshold value is related to a maximum conversion ratio of an output voltage to the input voltage when the boost-buck converter is in a buck mode, and the first voltage is related to amplitudes of the first to fourth drive signals.

[0010] Optionally, the selecting a drive signal from the second drive signal, the fourth drive signal according to the boost-buck mode signal and the second drive signal, providing a drive signal or a voltage-divided signal of the selected drive signal to a second node according to a result of an AND operation between the boost-buck mode signal and the second drive signal, filtering a voltage of the second node to obtain a boost filtered voltage, and obtaining the closed-loop boost mode signal according to a result of a comparison between the boost filtered voltage and a third reference voltage, wherein the third reference voltage is equal to a product of a second threshold value and the first voltage, the fourth reference voltage is equal to a product of the second threshold value and the input voltage, the second threshold value is related to a minimum conversion ratio of the output voltage to the input voltage when the boost-buck converter is in a boost mode, and the first voltage is related to amplitudes of the first to fourth drive signals.

[0011] According to a second aspect of the present application, a mode switching circuit of a buck-boost converter is provided, the buck-boost converter comprising an inductor, a first switch, a second switch, a third switch and a fourth switch, the first switch, the inductor and the fourth switch being connected in sequence between an input terminal and an output terminal, one end of the second switch being connected to a node between the first switch and the inductor, one end of the third switch being connected to a node between the inductor and the fourth switch, the operation modes of the buck-boost converter comprising a buck mode, a boost mode and a buck-boost mode, the mode switching circuit comprising a closed-loop buck judging module configured to select a drive signal from the third drive signal, a first drive signal of the first switch and a boost-buck mode signal according to the boost-buck mode signal and the third drive signal of the third switch, compare the selected drive signal or a voltage division signal of the selected drive signal with a first reference voltage after filtering, and obtain a closed-loop buck mode signal according to a comparison result; an open-loop buck judging module configured to compare an output voltage of the buck-boost converter with a second reference voltage, and obtain an open-loop buck mode signal according to a comparison result; and an open-loop-closed-loop judging module configured to output a valid buck mode signal when the closed-loop buck mode signal and the open-loop buck mode signal are both valid, so as to switch the operation mode of the buck-boost converter to the buck mode in a next switching period.

[0012] Optionally, the mode switching circuit further comprises a closed-loop boost judging module configured to select a drive signal from the second drive signal, a fourth drive signal of the fourth switch and the boost-buck mode signal according to the boost-buck mode signal and the second drive signal of the second switch, compare the selected drive signal or a voltage division signal of the selected drive signal with a third reference voltage after filtering, and obtain a closed-loop boost mode signal according to a comparison result; an open-loop boost judging module configured to compare the output voltage of the buck-boost converter with a fourth reference voltage, and obtain an open-loop boost mode signal according to a comparison result; and the open-loop-closed-loop judging module is further configured to output a valid boost mode signal when the closed-loop boost mode signal and / or the open-loop boost mode signal is valid, so as to switch the operation mode of the buck-boost converter to the boost mode in a next switching period; and the open-loop-closed-loop judging module is further configured to output a valid boost-buck mode signal when the buck mode signal and the boost mode signal are both invalid, so as to switch the operation mode of the buck-boost converter to the boost-buck mode in a next switching period.

[0013] Optionally, the closed-loop buck judgment module includes a first resistor and a second resistor, sequentially connected between the first driving signal and the ground terminal; a third resistor and a first transmission gate, sequentially connected between the third driving signal and the first node; a second transmission gate, connected between the common node of the first resistor and the second resistor and the first node; a first comparator, with its negative input connected to the first node, its positive input receiving the first reference voltage, and its output providing the closed-loop buck mode signal; and a first NAND gate, with its first input receiving the boost-buck mode signal, its second input receiving the third driving signal, and its output connected to... The second transmission gate has a control terminal; a first NOT gate, whose input terminal receives the output terminal of the first NAND gate, and whose output terminal is connected to the control terminal of the first transmission gate; the open-loop buck converter judgment module includes a third comparator, whose negative input terminal receives the output voltage of the buck-boost converter, whose positive input terminal receives the second reference voltage, and whose output terminal provides the open-loop buck mode signal; the open-loop and closed-loop judgment module includes a third NAND gate, whose first input terminal receives the open-loop buck mode signal, and whose second input terminal receives the closed-loop buck mode signal; and a third NOT gate, whose input terminal is connected to the output terminal of the third NAND gate, and whose output terminal provides the buck mode signal.

[0014] Optionally, the closed-loop boost judgment module includes a fourth resistor and a fifth resistor, sequentially connected between the fourth driving signal and the ground terminal; a sixth resistor and a third transmission gate, sequentially connected between the second driving signal and the second node; a fourth transmission gate, connected between the common node of the fourth and fifth resistors and the second node; a second comparator, with its negative input connected to the second node, its positive input receiving the third reference voltage, and its output providing the closed-loop boost mode signal; a second NAND gate, with its first input receiving the boost-buck mode signal, its second input receiving the second driving signal, and its output connected to the control terminal of the fourth transmission gate; and a second NOT gate, with its input receiving the signal from the second NAND gate. The output terminal is connected to the control terminal of the third transmission gate; the open-loop boost judgment module includes a fourth comparator, whose positive input terminal receives the output voltage of the buck-boost converter, whose negative input terminal receives the fourth reference voltage, and whose output terminal provides the open-loop boost mode signal; the open-loop and closed-loop detection circuit further includes a first NOR gate, whose first input terminal receives the open-loop boost mode signal, and whose second input terminal receives the closed-loop boost mode signal; a fourth NOT gate, whose input terminal is connected to the output terminal of the first NOR gate, and whose output terminal provides the boost mode signal; and a second NOR gate, whose first input terminal receives the output terminal of the third NOT gate, and whose second input terminal receives the output terminal of the fourth NOT gate, and whose output terminal provides the boost-buck mode signal.

[0015] Optionally, the first to fourth comparators are hysteresis comparators, and the resistance values ​​of the first, second, fourth, and fifth resistors are equal; the first reference voltage is equal to the product of a first threshold and a first voltage, the third reference voltage is equal to the product of a second threshold and the first voltage, the second reference voltage is equal to the product of the first threshold and the input voltage of the buck-boost converter, and the fourth reference voltage is equal to the product of the second threshold and the input voltage. The first threshold is related to the maximum conversion ratio between the output voltage and the input voltage when the buck-boost converter is in buck mode, the second threshold is related to the minimum conversion ratio between the output voltage and the input voltage when the buck-boost converter is in boost mode, and the first voltage is related to the amplitude of the first to fourth drive signals.

[0016] According to a third aspect of the present invention, a buck-boost converter is provided, comprising a first switching transistor and a second switching transistor connected sequentially between an input voltage and a ground terminal, the common node of which is a first switching node, the control terminals of the first and second switching transistors respectively receiving a first driving signal and a second driving signal; an inductor connected between the first and second switching nodes; a third switching transistor connected between the second switching node and the ground terminal, the control terminal of the third switching transistor receiving a third driving signal; a fourth switching transistor connected between the second switching node and the output voltage, the control terminal of the fourth switching transistor receiving a fourth driving signal; a mode switching circuit as described above; and a logic control circuit for controlling the buck-boost converter to operate in a corresponding operating mode according to the boost mode signal, the buck mode signal, and the boost-buck mode signal.

[0017] The buck-boost converter and its mode switching method and circuit provided by the present invention determine the working mode of the buck-boost converter in the next switching cycle by combining open-loop detection and closed-loop detection, which improves the accuracy of buck-boost converter working mode judgment and realizes smooth switching between buck-boost converter working modes. Attached Figure Description

[0018] The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0019] Figure 1 shows a schematic diagram of a buck-boost converter;

[0020] Figure 2 shows a schematic diagram of mode determination in open-loop judgment of a prior art buck-boost converter;

[0021] Figure 3 shows a schematic diagram of a buck-boost converter according to an embodiment of the present invention;

[0022] Figure 4 shows a circuit diagram of a mode switching circuit according to an embodiment of the present invention;

[0023] Figure 5 shows a simplified schematic diagram of the closed-loop buck converter judgment module according to an embodiment of the present invention when the buck-boost converter is in buck mode.

[0024] Figure 6 shows a timing diagram of the closed-loop buck converter judgment module according to an embodiment of the present invention when the buck-boost converter is in buck mode;

[0025] Figure 7 shows a timing diagram of the closed-loop buck determination module according to an embodiment of the present invention when the buck-boost converter is in buck mode and biased towards buck.

[0026] Figure 8 shows a schematic flowchart of a mode switching method according to an embodiment of the present invention. Detailed Implementation

[0027] Various embodiments of the invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements or modules are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0028] It should be understood that, in the following description, "circuit" may include single or combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by the programmable circuit. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it may be directly coupled or connected to the other element, or there may be intermediate elements; the connection between elements may be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0029] Furthermore, certain terms are used in this patent specification and claims to refer to specific components. Those skilled in the art will understand that hardware manufacturers may use different names to refer to the same component. This patent specification and claims do not distinguish components based on differences in name, but rather on differences in function.

[0030] Furthermore, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0031] Figure 1 shows a schematic diagram of a buck-boost converter.

[0032] Referring to Figure 1, the buck-boost converter 10 is a four-switch buck-boost converter, which includes an input capacitor Cin, an output capacitor Cout, first to fourth switches Q1-Q4, and an inductor L. The input capacitor Cin is connected between the input voltage Vin and ground. The first switch Q1, inductor L, and fourth switch Q4 are sequentially connected between the input voltage Vin and the output voltage Vout. The second switch Q2 is connected between the switching node SW1 (the intermediate node between the first switch Q1 and inductor L) and ground. The third switch Q3 is connected between the switching node SW2 (the intermediate node between inductor L and fourth switch Q4) and ground. The output capacitor Cout is connected between the output voltage Vout and ground. The control terminal of the first switch Q1 receives a first drive signal Tg_q1, the control terminal of the second switch Q2 receives a second drive signal Bg_q2, the control terminal of the third switch Q3 receives a third drive signal Bg_q3, and the control terminal of the fourth switch Q4 receives a fourth drive signal Tg_q4.

[0033] The buck-boost converter 10 achieves switching between boost mode, buck mode, and boost-buck mode by controlling the on and off of the first to fourth switching transistors Q1-Q4.

[0034] Specifically, when the buck-boost converter 10 operates in buck mode, the third switch Q3 is off, the fourth switch Q4 is on, and the first switch Q1 and the second switch Q2 are alternately on. When the buck-boost converter 10 operates in boost mode, the first switch Q1 is on, the second switch Q2 is off, and the third switch Q3 and the fourth switch Q4 are alternately on. When the buck-boost converter 10 operates in boost-buck mode, two of the first to fourth switches Q1-Q4 are selectively on.

[0035] Figure 2 shows a schematic diagram of mode determination in open-loop determination of a prior art buck-boost converter.

[0036] Taking the first to fourth switching transistors Q1-Q4 with a switching frequency of 1.2MHz and a minimum on-time of 100ns as an example.

[0037] In buck mode, the maximum conversion ratio of output voltage Vout to input voltage Vin is: Where D1 refers to the duty cycle of the first drive signal Tg_q1.

[0038] To improve the stability of the buck-boost converter 10, a certain margin, typically 2%, is required when switching from buck mode to buck-boost mode or vice versa. As shown in Figure 2, the conversion ratio of output voltage Vout to input voltage Vin is set to 86% as the threshold for switching from buck mode to buck-boost mode. Furthermore, since the open-loop determination of the buck-boost converter 10 is achieved by comparing the product of the above threshold and the input voltage Vin with the output voltage Vout using a hysteresis comparator, there is a certain hysteresis when switching from buck-boost mode to buck mode. Therefore, a hysteresis margin of, for example, 2%, is required. Thus, the conversion ratio of output voltage Vout to input voltage Vin is set to 84% as the threshold for switching from buck-boost mode to buck mode.

[0039] In boost mode, the minimum conversion ratio between the output voltage Vout and the input voltage Vin is: Where D2 refers to the duty cycle of the third driving signal Bg_q3.

[0040] To improve the stability of the buck-boost converter 10, a certain margin is also needed when the buck-boost converter 10 switches from boost mode to buck-boost mode or from buck-boost mode to boost mode. As shown in Figure 2, the conversion ratio of output voltage Vout to input voltage Vin is generally taken as 115% as the threshold when the buck-boost converter 10 switches from boost mode to buck-boost mode. In addition, since there is also a certain hysteresis when the buck-boost converter 10 switches from buck-boost mode to boost mode in open-loop judgment, a hysteresis of, for example, 2% is also needed. Therefore, the conversion ratio of output voltage Vout to input voltage Vin is taken as 117% as the threshold when the buck-boost converter 10 switches from buck-boost mode to boost mode.

[0041] Although the above method for determining the operating mode of the buck-boost converter 10 is simple and easy to implement, it has certain problems. For example, when a large current is generated to convert the 4V input voltage Vin to the 3.2V output voltage Vout, the duty cycle of the first drive signal Tg_q1 is 3.2 / 4 = 80% using the above method. Therefore, the open-loop determination requires the buck-boost converter 10 to operate in buck mode. Because the input and output lines of the buck-boost converter 10 have a voltage drop of 200mV across the inductor L under high current conditions, the actual voltage across the inductor L is L+=3.8V and L-=3.4V. Therefore, the required duty cycle for the first drive signal Tg_q1 is 3.4 / 3.8=89.5%. However, since it is judged to be in buck mode, the buck-boost converter 10 operates in buck mode. Even if the loop adjustment makes the conduction time of the first switch Q1 reach its maximum, the duty cycle of the first drive signal Tg_q1 is only 88%, less than the required duty cycle of 89.5%. Therefore, the output voltage Vout does not meet the requirements, causing the buck-boost converter 10 to malfunction.

[0042] Therefore, a new mode switching method and circuit for buck-boost converters are needed to solve the above problems.

[0043] Figure 3 shows a schematic diagram of the buck-boost converter according to an embodiment of the present invention.

[0044] Referring to Figure 3, the buck-boost converter 100 includes a first switch Q1 and a second switch Q2, which are sequentially connected between the input voltage Vin and ground. Their common node is the switching node SW1. The control terminal of the first switch Q1 receives a first drive signal Tg_q1, and the control terminal of the second switch Q2 receives a second drive signal Bg_q2. An inductor L is connected between the switching nodes SW1 and SW2. A third switch Q3 is connected between the switching node SW2 and ground, and its control terminal receives a third drive signal Bg_q3. A fourth switch Q4 is connected between the switching node SW2 and the output voltage Vout, and its control terminal receives a fourth drive signal Tg_q4. An output capacitor Cout is connected between the output voltage Vout and ground. An input capacitor Cin is connected between the input voltage Vin and ground. The amplitudes of the first to fourth drive signals are the same. The buck-boost converter 100 operates in boost mode, buck mode, and boost-buck mode.

[0045] The buck-boost converter 100 also includes a mode switching circuit 110 and a logic control circuit 120. The mode switching circuit 110 generates a boost mode signal Boost, a buck mode signal Buck, and a buck-boost mode signal Buck_Boost based on the output voltage Vout, the input voltage Vin, and the first to fourth drive signals. The logic control circuit 120 controls the buck-boost converter 100 to operate in the corresponding operating mode based on the boost mode signal Boost, the buck mode signal Buck, and the buck-boost mode signal Buck_Boost.

[0046] Figure 4 shows a circuit diagram of a mode switching circuit according to an embodiment of the present invention.

[0047] The mode switching circuit of this invention is applied to a four-switch boost-buck converter. The following description uses its application in the boost-buck converter 100 shown in Figure 3 as an example. It should be understood that its application is not limited to the boost-buck converter 100 shown in Figure 3.

[0048] Referring to Figure 3, the mode switching circuit 110 includes a closed-loop detection circuit 200, an open-loop detection circuit 300, and an open-loop buck voltage judgment module 400. The closed-loop detection circuit 200 includes a closed-loop buck voltage judgment module 210 and a closed-loop boost voltage judgment module 220. The open-loop detection circuit 300 includes an open-loop buck voltage judgment module 310 and an open-loop boost voltage judgment module 320.

[0049] Specifically, the closed-loop buck judgment module 210 is used to select a driving signal from the third driving signal Bg_q3 and the first driving signal Tg_q1 based on the boost-buck mode signal Buck_boost and the third driving signal Bg_q3, and then filter the selected driving signal or the voltage divider signal of the selected driving signal and compare it with the first reference voltage V. Buck_ref_close A comparison is performed to obtain the closed-loop buck mode signal Buck_close based on the comparison result. Wherein, the first reference voltage V... Buck_ref_close =First threshold * First voltage = First threshold * (2 / VDD), where VDD represents the amplitude of the first drive signal Tg_q1, and the first threshold represents the maximum conversion ratio (i.e., the maximum duty cycle of the first drive signal Tg_q1) between the output voltage Vout and the input voltage Vin when the buck-boost converter 100 is in buck mode. Taking a switching frequency of 1.2MHz for the first to fourth switches Q1-Q4 and a minimum on-time of 100ns for the first to fourth switches Q1-Q4 as an example, the maximum conversion ratio is 88%. To improve the stability of the buck-boost converter 100, the first threshold is generally left with a certain margin based on this maximum conversion ratio, for example, 86% can be selected.

[0050] Optionally, when the selected driving signal is the first driving signal Tg_q1, the voltage divider signal of the first driving signal Tg_q1 needs to be filtered before being compared with the first reference voltage V. Buck_ref_close A comparison is performed; when the selected signal is the third driving signal Bg_q3, the third driving signal Bg_q3 needs to be filtered before being compared with the first reference voltage V. Buck_ref_close Compare them.

[0051] The closed-loop boost judgment module 220 is used to select a driving signal from the second driving signal Bg_q2 and the fourth driving signal Tg_q4 based on the boost-buck mode signal Buck_boost and the second driving signal Bg_q2, and to filter the selected driving signal or the voltage divider signal of the selected driving signal and then compare it with the third reference voltage V. Boost_ref_close A comparison is performed to obtain the closed-loop boost mode signal Boost_close based on the comparison result. The third reference voltage V... Boost_ref_close =Second threshold * (2 / VDD), where VDD represents the amplitude of the third drive signal Bg_q3, and the second threshold represents the minimum conversion ratio between the output voltage Vout and the input voltage Vin when the buck-boost converter 100 is in boost mode. Taking a switching frequency of 1.2MHz for the first to fourth switches Q1-Q4 and a minimum on-time of 100ns for the first to fourth switches Q1-Q4 as an example, the minimum conversion ratio is 113.64%. To improve the stability of the buck-boost converter 100, the second threshold is generally left with a certain margin based on this minimum conversion ratio, for example, 115% can be selected.

[0052] Optionally, when the selected drive signal is the fourth drive signal Tg_q4, the voltage divider signal of the fourth drive signal Tg_q4 needs to be filtered before being compared with the third reference voltage V. Boost_ref_close A comparison is performed; when the selected drive signal is the second drive signal Bg_q2, the second drive signal Bg_q2 needs to be filtered before being compared with the third reference voltage V. Boost_ref_close Compare them.

[0053] The open-loop buck converter judgment module 310 is used to compare the output voltage Vout with the second reference voltage V Buck_ref_open A comparison is performed to obtain the open-loop buck mode signal Buck_open based on the comparison result. Wherein, the second reference voltage V... Buck_ref_open =First threshold * Vin.

[0054] The open-loop boost judgment module 320 is used to compare the output voltage Vout with the fourth reference voltage V Boost_ref_open A comparison is performed to obtain the open-loop boost mode signal Boost_open based on the comparison result. Here, the fourth reference voltage V... Boost_ref_open =Second threshold * Vin.

[0055] The open-loop buck converter determination module 400 is used to output a valid buck mode signal Buck when both the open-loop buck mode signal Buck_open and the closed-loop buck mode signal Buck_close are valid, so as to switch the operating mode of the buck-boost converter 100 to buck mode in the next switching cycle; to output a valid boost mode signal Boost when the open-loop boost mode signal Boost_open and / or the closed-loop boost mode signal Boost_close are valid, so as to switch the operating mode of the buck-boost converter 100 to boost mode in the next switching cycle; and to output a valid boost-buck mode signal Buck_boost when both the buck mode signal Buck and the boost mode signal Boost are invalid, so as to switch the operating mode of the buck-boost converter 100 to boost-buck mode in the next switching cycle. Among them, the open-loop buck mode signal Buck_open, the closed-loop buck mode signal Buck_close, the open-loop boost mode signal Boost_open, the closed-loop boost mode signal Boost_close, the boost mode signal Boost, the buck mode signal Buck, and the boost-buck mode signal Buck_boost are all valid when their level value is the first level value, for example, 1.

[0056] Furthermore, referring to Figure 4, the closed-loop step-down judgment module 210 includes resistors R1-R4, NAND gates U7 and U11, transmission gates U12 and U13, capacitor C1, and comparator U3. Among them, resistor R4 and capacitor C1 constitute the first filter circuit, and the common node of resistor R4 and capacitor C1 provides the step-down filter voltage V. DC_buck Specifically, resistor R3 and transmission gate U12 are connected sequentially between the third driving signal Bg_q3 and node A. Resistors R1 and R2 are connected sequentially between the first driving signal Tg_q1 and the ground terminal. Transmission gate U13 is connected between the common node of resistors R1 and R2 and node A. Resistor R4 is connected between node A and the negative input terminal of comparator U3, and the positive input terminal of comparator U3 receives the first reference voltage V. Buck_ref_closeThe output of comparator U3 provides the closed-loop buck mode signal Buck_close. Capacitor C1 is connected between resistor R4, the intermediate node of comparator U3, and ground. The first input of NAND gate U7 receives the boost-buck mode signal Buck_boost, the second input receives the third drive signal Bg_q3, and its output is connected to the input of NOT gate U11. The control terminal of transmission gate U12 is connected to the output of NOT gate U11, and transmission gate U12 is selectively controlled by the output signal of NOT gate U11 to perform data transmission. The control terminal of transmission gate U13 is connected to the output of NAND gate U7, and transmission gate U13 is selectively controlled by the output signal of NAND gate U7 to perform data transmission. Specifically, transmission gates U12 and U13 select to perform data transmission when the signal received at their control terminals is high.

[0057] The closed-loop boost judgment module 220 includes resistors R5-R8, NAND gates U6 and U10, transmission gates U14 and U15, capacitor C2, and comparator U4. Resistor R8 and capacitor C2 form the second filter circuit, and the common node of resistor R8 and capacitor C2 provides the boost filter voltage V. DC_boost Specifically, resistor R5 and transmission gate U14 are connected sequentially between the second drive signal Bg_q2 and node B. Resistors R6 and R7 are connected sequentially between the fourth drive signal Tg_q4 and ground. Transmission gate U15 is connected between the common node of resistors R6 and R7 and node B. Resistor R8 is connected between node B and the negative input of comparator U4, and the positive input of comparator U4 receives the third reference voltage V. Boost_ref_close The output of comparator U4 provides the closed-loop boost mode signal Boost_close. Capacitor C2 is connected between resistor R8, the intermediate node of comparator U4, and ground. The first input of NAND gate U6 receives the boost-buck mode signal Buck_boost, the second input receives the second drive signal Bg_q2, and its output is connected to the input of NOT gate U10. The control terminal of transmission gate U14 is connected to the output of NOT gate U10, and transmission gate U14 is selectively controlled by the output signal of NOT gate U10 to perform data transmission. The control terminal of transmission gate U15 is connected to the output of NAND gate U6, and transmission gate U15 is selectively controlled by the output signal of NAND gate U6 to perform data transmission. Specifically, transmission gates U14 and U15 select to perform data transmission when the signal received at their control terminals is high.

[0058] Optionally, the resistance values ​​of resistors R1-R2 and resistors R6-R7 are equal.

[0059] The open-loop buck converter judgment module 310 includes a comparator U1. The negative input of the comparator U1 receives the output voltage Vout of the buck-boost converter 100, and the positive input receives the second reference voltage V. Buck_ref_openThe output provides the open-loop buck mode signal Buck_open. Specifically, when the open-loop buck mode signal Buck_open = 1 (i.e., Vout < V...), the output is... Buck_ref_open At that time, the open-loop determination shows that the operating mode of the buck-boost converter 100 in the next switching cycle is buck mode.

[0060] The open-loop boost judgment module 320 includes a comparator U2. The positive input terminal of the comparator U2 receives the output voltage Vout, and the negative input terminal receives the fourth reference voltage V. Boost_ref_open The output provides the open-loop boost mode signal Boost_open. Specifically, when the open-loop buck mode signal Boost_open = 1 (i.e., Vout > V),... Boost_ref_open At that time, the open-loop determination shows that the operating mode of the buck-boost converter 100 in the next switching cycle is boost mode.

[0061] Optionally, comparators U1-U4 may be hysteresis comparators.

[0062] The open-loop buck converter determination module 400 includes NAND gates U5, NOT gates U8-U9, and NOR gates U16 and U17. The first input of NAND gate U5 receives the open-loop buck mode signal Buck_open, and the second input receives the closed-loop buck mode signal Buck_close. The first input of NOR gate U16 receives the open-loop boost mode signal Boost_open, and the second input receives the closed-loop boost mode signal Boost_close. NOT gate U9 is connected between the output of NAND gate U5 and the first input of NOR gate U17, and its output provides the buck mode signal Buck. NOT gate U8 is connected between the output of NOR gate U16 and the second input of NOR gate U17, and its output provides the boost mode signal Boost. The output of NOR gate U17 provides the boost-buck mode signal Buck_Boost.

[0063] The following uses the closed-loop step-down judgment module 210 as an example to illustrate the working principle of the closed-loop detection circuit 200 in this embodiment of the invention:

[0064] When the buck-boost converter 100 is in buck mode, the third switch Q3 is turned on, the fourth switch Q4 is turned off, and the first switches Q1 and Q2 are turned on alternately. At this time, the buck-boost mode signal Buck_Boost=0, and the closed-loop buck judgment module 210 can be simplified as shown in Figure 5. The timing diagram of the closed-loop buck judgment module 210 at this time is shown in Figure 6.

[0065] Taking the switching frequency of the first to fourth switching transistors Q1-Q4 as 1.2MHz and the minimum on-time of the first to fourth switching transistors Q1-Q4 as 100ns as an example, when the buck-boost converter 100 operates in buck mode, the first drive signal Tg_q1 is divided by resistors R1 and R2, and then filtered by the first filter circuit composed of resistor R4 and capacitor C1 to obtain the buck filtered voltage V. DC_buck =D1*(VDD / 2). Using the first reference voltage V... Buck_ref_close Taking 86%*(VDD / 2) as an example, when the buck-boost converter 100 needs to switch from buck mode to buck-boost mode, the output voltage Vout and the input voltage Vin reach the maximum conversion ratio, that is, the duty cycle D1 of the first drive signal Tg_q1 reaches the maximum duty cycle of 88%. Then the collected buck filter voltage V DC_buck =88%*(VDD / 2)>V Buck_ref_close [86%*(VDD / 2)], therefore, the closed-loop buck mode signal buck_close=0. Where D1=Ton / Tsw, Ton represents the on-time of the first switch Q1, and Tsw represents one switching cycle of the buck-boost converter 100.

[0066] When the buck-boost converter 100 is in buck-boost mode, it needs to determine whether the current operating state can return to buck mode. Specifically, when the buck-boost converter 100 operates in buck-boost mode, it will adaptively perform buck and boost cycles, meaning that one switching cycle includes both boost and buck phases. Since there is an action to raise the output voltage Vout during the boost phase, the duty cycle D1 of the first drive signal Tg_q1 is lower than in buck mode during the buck phase. Therefore, it is possible to determine the required duty cycle (hereinafter referred to as D) if buck mode is used in the current operating state. buck_real (This indicates that) if the duty cycle D buck_real If the duty cycle exceeds the maximum duty cycle in buck mode, it means that you cannot return to buck mode; otherwise, it means that you can return to buck mode.

[0067] Figure 7 shows a timing diagram of the closed-loop buck converter according to an embodiment of the present invention when the buck-boost converter is in buck mode and biased towards buck.

[0068] Referring to Figures 7 and 4, when the buck-boost converter 100 operates in buck-boost mode, the buck-boost mode signal Buck_Boost = 1. When the third switch Q3 is turned on, the transmission gate U12 is turned on, and the third drive signal Bg_q3 = VDD is transmitted to node A via the transmission gate U12. When the third switch Q3 is turned off, the transmission gate U13 is turned on, and the first drive signal Tg_q1 is transmitted to node A via the transmission gate U13 after being divided by resistors R1 and R2. The third drive signal Bg_q3 is transmitted to node A via the transmission gate U12. Therefore, when the third switch Q3 is turned on, the voltage V at node A is VDD. pulse_buck =VDD, when both the first switching transistors Q1 and Q3 are turned off, the voltage V at node A is... pulse_buck =0, when the third switch Q3 is off and the first switch Q1 is on, the voltage V at node A is 0. pulse_buck =2 / VDD.

[0069] In Figure 7, time T represents one switching cycle of the buck-boost converter 100 in buck-boost mode, and Ts represents half a cycle of the buck-boost converter 100 in buck-boost mode. Within one switching cycle T, the rise in inductor current IL equals the fall in inductance; therefore, we can obtain:

[0070] (Vin-Vout)*(2*Ts-T) Q2 -T Q3 )+Vin*T Q3 =Vout*T Q2 , among which, T Q2 T represents the on-time of the second switch Q2. Q3 This indicates the on-time of the third switch, Q3.

[0071] Therefore, we can conclude that: Converting this to voltage gives the voltage V corresponding to the actual pure step-down duty cycle. buck_real for:

[0072] Since this formula is not easily represented in a circuit, the method shown in Figure 3 is actually used, and the derivation is as follows:

[0073] Therefore, we can conclude that: Because the buck bias state in the buck-boost mode of the buck-boost converter 100 has the following:

[0074] T Q2 >T Q3 Therefore, we can deduce that: V DC_buck >V buck_real

[0075] Therefore, when V DC_buck<V Buck_ref_close At that time, it will definitely be satisfied.

[0076] V Buck_ref_close >V buck_real

[0077] This represents the duty cycle V of the first drive signal Tg_q1 required for the actual voltage reduction of the buck-boost converter 100. buck_real The duty cycle is less than the maximum duty cycle of the first drive signal Tg_q1 when the buck-boost converter 100 is operating in buck mode. Therefore, it can enter buck mode at this time. So when V DC_buck < V buck_ref_close When the closed-loop buck mode signal buck_close=1, the closed-loop detection determines that the buck-boost converter 100 should switch from buck-boost mode Buck_Boost to buck mode Buck in the next switching cycle.

[0078] The buck-boost converter and its mode switching circuit provided in this embodiment of the invention determine the operating mode of the buck-boost converter in the next switching cycle by combining open-loop detection and closed-loop detection, which improves the accuracy of the buck-boost converter operating mode judgment and realizes smooth switching between buck-boost converter operating modes.

[0079] Figure 8 shows a schematic flowchart of a mode switching method according to an embodiment of the present invention.

[0080] The present invention also provides a mode switching method, which can be applied to the buck-boost converter 100 described above, specifically including the following steps:

[0081] Step S1: Select a driving signal from the third driving signal and the first driving signal of the first switching transistor according to the boost-buck mode signal and the third driving signal of the third switching transistor. Filter the selected driving signal or the voltage divider signal of the selected driving signal and compare it with the first reference voltage. Obtain the closed-loop buck mode signal according to the comparison result.

[0082] Step S2: Compare the output voltage of the buck-boost converter with the second reference voltage, and obtain the open-loop buck mode signal based on the comparison result; and

[0083] Step S5: When both the closed-loop buck mode signal and the open-loop buck mode signal are valid, output a valid buck mode signal to switch the operating mode of the buck-boost converter to the buck mode in the next switching cycle.

[0084] Furthermore, the mode switching method also includes:

[0085] Step S3: Select a driving signal from the second driving signal and the fourth driving signal of the fourth switching transistor according to the boost-buck mode signal and the second driving signal of the second switching transistor. Filter the selected driving signal or the voltage divider signal of the selected driving signal and compare it with the third reference voltage. Obtain the closed-loop boost mode signal according to the comparison result.

[0086] Step S4: Compare the output voltage of the buck-boost converter with the fourth reference voltage, and obtain the open-loop boost mode signal based on the comparison result; and

[0087] Step S6: When one of the closed-loop boost mode signal and / or the open-loop boost mode signal is valid, output a valid boost mode signal to switch the operating mode of the buck-boost converter to the boost mode in the next switching cycle.

[0088] Furthermore, the mode switching method also includes:

[0089] Step S7: When both the buck mode signal and the boost mode signal are invalid, output a valid boost-buck mode signal to switch the operating mode of the buck-boost converter to the boost-buck mode in the next switching cycle.

[0090] Furthermore, step S1 also includes:

[0091] The boost-buck mode signal and the third drive signal are ANDed together, and the third drive signal or the voltage divider of the first drive signal is provided to the first node according to the result of the operation.

[0092] The voltage at the first node is filtered to obtain a step-down filtered voltage; and

[0093] The buck filter voltage is compared with the first reference voltage, and the closed-loop buck mode signal is obtained based on the comparison result.

[0094] Step S3 also includes:

[0095] The boost-buck mode signal and the second drive signal are ANDed together, and the voltage divider signal of the second drive signal or the fourth drive signal is provided to the second node according to the result of the operation.

[0096] The voltage at the second node is filtered to obtain a boost filter voltage; and

[0097] The boost filter voltage is compared with the third reference voltage, and the closed-loop boost mode signal is obtained based on the comparison result.

[0098] Wherein, the first reference voltage is equal to the product of the first threshold and the first voltage, the third reference voltage is equal to the product of the second threshold and the first voltage, the second reference voltage is equal to the product of the first threshold and the input voltage of the buck-boost converter, and the fourth reference voltage is equal to the product of the second threshold and the input voltage. Wherein, the first threshold is related to the maximum conversion ratio between the output voltage and the input voltage when the buck-boost converter is in buck mode, the second threshold is related to the minimum conversion ratio between the output voltage and the input voltage when the buck-boost converter is in boost mode, and the first voltage is related to the amplitude of the first to fourth drive signals.

[0099] As described above, these embodiments of the present invention do not exhaustively describe all details, nor do they limit the invention to specific embodiments. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to effectively utilize the invention and its modifications. The scope of protection of this invention should be determined by the scope defined in the claims and their equivalents.

Claims

1. A mode switching method for a buck-boost converter, the buck-boost converter comprising an inductor, a first switch, a second switch, a third switch, and a fourth switch, wherein the first switch, the inductor, and the fourth switch are sequentially connected between an input terminal and an output terminal, one end of the second switch is connected to a node between the first switch and the inductor, and one end of the third switch is connected to a node between the inductor and the fourth switch, wherein the buck-boost converter operates in buck mode, boost mode, and boost-buck mode, wherein... The mode switching method includes: Based on the boost-buck mode signal and the third drive signal of the third switch, a drive signal is selected from the third drive signal and the first drive signal of the first switch. The selected drive signal or the voltage divider signal of the selected drive signal is filtered and compared with the first reference voltage. The closed-loop buck mode signal is obtained based on the comparison result. The output voltage of the buck-boost converter is compared with a second reference voltage, and the open-loop buck mode signal is obtained based on the comparison result; and When both the closed-loop buck mode signal and the open-loop buck mode signal are valid, a valid buck mode signal is output to switch the operating mode of the buck-boost converter to the buck mode in the next switching cycle.

2. The mode switching method according to claim 1 further includes: Based on the boost-buck mode signal and the second drive signal of the second switch, a drive signal is selected from the second drive signal and the fourth drive signal of the fourth switch. The selected drive signal or the voltage divider signal of the selected drive signal is filtered and compared with the third reference voltage. The closed-loop boost mode signal is obtained based on the comparison result. The output voltage of the buck-boost converter is compared with the fourth reference voltage, and the open-loop boost mode signal is obtained based on the comparison result. as well as When the closed-loop boost mode signal and / or the open-loop boost mode signal are valid, a valid boost mode signal is output to switch the operating mode of the buck-boost converter to the boost mode in the next switching cycle. When both the buck mode signal and the boost mode signal are invalid, a valid boost-buck mode signal is output to switch the operating mode of the buck-boost converter to the boost-buck mode in the next switching cycle.

3. The mode switching method according to claim 1, wherein, The step of selecting a driving signal from the third driving signal and the first driving signal of the first switching transistor based on the boost-buck mode signal and the third driving signal of the third switching transistor, filtering the selected driving signal or the voltage divider signal of the selected driving signal and comparing it with the first reference voltage, and obtaining the closed-loop buck mode signal based on the comparison result includes: The boost-buck mode signal and the third drive signal are ANDed together, and the third drive signal or the voltage divider of the first drive signal is provided to the first node according to the result of the operation. The voltage at the first node is filtered to obtain a step-down filtered voltage; and The buck filter voltage is compared with the first reference voltage, and the closed-loop buck mode signal is obtained based on the comparison result. Wherein, the first reference voltage is equal to the product of the first threshold and the first voltage, the second reference voltage is equal to the product of the first threshold and the input voltage of the buck-boost converter, the first threshold is related to the maximum conversion ratio between the output voltage and the input voltage when the buck-boost converter is in buck mode, and the first voltage is related to the amplitude of the first to fourth drive signals.

4. The mode switching method according to claim 2, wherein, The step of selecting a driving signal from the second driving signal and the fourth driving signal of the fourth switching transistor based on the boost-buck mode signal and the second driving signal of the second switching transistor, filtering the selected driving signal or the voltage divider signal of the selected driving signal and comparing it with the third reference voltage, and obtaining the closed-loop boost mode signal based on the comparison result includes: The boost-buck mode signal and the second drive signal are ANDed together, and the voltage divider signal of the second drive signal or the fourth drive signal is provided to the second node according to the result of the operation. The voltage at the second node is filtered to obtain a boost filter voltage; and The boost filter voltage is compared with the third reference voltage, and the closed-loop boost mode signal is obtained based on the comparison result. Wherein, the third reference voltage is equal to the product of the second threshold and the first voltage, the fourth reference voltage is equal to the product of the second threshold and the input voltage, the second threshold is related to the minimum conversion ratio between the output voltage and the input voltage when the buck-boost converter is in boost mode, and the first voltage is related to the amplitude of the first to fourth drive signals.

5. A mode switching circuit for a buck-boost converter, the buck-boost converter comprising an inductor, a first switch, a second switch, a third switch, and a fourth switch, wherein the first switch, the inductor, and the fourth switch are sequentially connected between an input terminal and an output terminal, one end of the second switch is connected to a node between the first switch and the inductor, one end of the third switch is connected to a node between the inductor and the fourth switch, the buck-boost converter operating modes include buck mode, boost mode, and boost-buck mode, and the mode switching circuit comprises: The closed-loop buck mode determination module is used to select a driving signal from the third driving signal and the first driving signal of the first switching transistor based on the boost-buck mode signal and the third driving signal of the third switching transistor, filter the selected driving signal or the voltage divider signal of the selected driving signal and compare it with the first reference voltage, and obtain the closed-loop buck mode signal based on the comparison result. An open-loop buck converter determination module is used to compare the output voltage of the buck-boost converter with a second reference voltage and obtain an open-loop buck mode signal based on the comparison result; and The open-loop / closed-loop judgment module is used to output a valid buck mode signal when both the closed-loop buck mode signal and the open-loop buck mode signal are valid, so as to switch the operating mode of the buck-boost converter to the buck mode in the next switching cycle.

6. The mode switching circuit according to claim 5 further includes: The closed-loop boost mode determination module is used to select a driving signal from the second driving signal and the fourth driving signal of the fourth switching transistor based on the boost-buck mode signal and the second driving signal of the second switching transistor, filter the selected driving signal or the voltage divider signal of the selected driving signal and compare it with the third reference voltage, and obtain the closed-loop boost mode signal based on the comparison result. An open-loop boost mode determination module is used to compare the output voltage of the buck-boost converter with a fourth reference voltage and obtain an open-loop boost mode signal based on the comparison result; and The open-loop and closed-loop judgment module is also used to output a valid boost mode signal when the closed-loop boost mode signal and / or the open-loop boost mode signal are valid, so as to switch the working mode of the buck-boost converter to the boost mode in the next switching cycle. The open-loop and closed-loop judgment module is also used to output a valid boost-buck mode signal when both the buck mode signal and the boost mode signal are invalid, so as to switch the working mode of the buck-buck converter to boost-buck mode in the next switching cycle.

7. The mode switching circuit according to claim 6, wherein, The closed-loop buck judgment module includes: The first resistor and the second resistor are connected sequentially between the first drive signal and the ground terminal; The third resistor and the first transmission gate are connected sequentially between the third driving signal and the first node; The second transmission gate is connected between the common node of the first resistor and the second resistor and the first node; The first comparator has its negative input connected to the first node, its positive input receiving the first reference voltage, and its output providing the closed-loop buck mode signal. The first NAND gate receives the boost-buck mode signal at its first input, receives the third drive signal at its second input, and its output is connected to the control terminal of the second transmission gate. The first NOT gate receives the output of the first NAND gate at its input terminal, and its output terminal is connected to the control terminal of the first transmission gate. The open-loop buck judgment module includes: The third comparator receives the output voltage of the buck-boost converter at its negative input terminal, receives the second reference voltage at its positive input terminal, and provides the open-loop buck mode signal at its output terminal. The open-loop / closed-loop determination module includes: The third NAND gate receives the open-loop buck mode signal at its first input and the closed-loop buck mode signal at its second input. The third NOT gate has its input connected to the output of the third NAND gate, and its output provides the buck mode signal.

8. The mode switching circuit according to claim 7, wherein, The closed-loop boost judgment module includes: The fourth and fifth resistors are connected sequentially between the fourth drive signal and the ground terminal; The sixth resistor and the third transmission gate are connected sequentially between the second drive signal and the second node; The fourth transmission gate is connected between the common node of the fourth and fifth resistors and the second node; The second comparator has its negative input connected to the second node, its positive input receiving the third reference voltage, and its output providing the closed-loop boost mode signal. The second NAND gate has a first input terminal that receives the boost-buck mode signal, a second input terminal that receives the second drive signal, and an output terminal that is connected to the control terminal of the fourth transmission gate. The second NOT gate receives the output of the second NAND gate at its input terminal, and its output terminal is connected to the control terminal of the third transmission gate. The open-loop boost judgment module includes: The fourth comparator receives the output voltage of the buck-boost converter at its positive input terminal, receives the fourth reference voltage at its negative input terminal, and provides the open-loop boost mode signal at its output terminal. The open-loop / closed-loop determination module also includes: The first NOR gate receives the open-loop boost mode signal at its first input and the closed-loop boost mode signal at its second input. The fourth NOT gate has its input connected to the output of the first NOR gate, and its output provides the boost mode signal. The second NOR gate has its first input receiving the output of the third NOT gate, its second input receiving the output of the fourth NOT gate, and its output providing the boost-buck mode signal.

9. The mode switching circuit according to claim 8, wherein, The first to fourth comparators are hysteresis comparators, and the resistance values ​​of the first resistor, the second resistor, the fourth resistor, and the fifth resistor are equal. The first reference voltage is equal to the product of the first threshold and the first voltage; the third reference voltage is equal to the product of the second threshold and the first voltage; the second reference voltage is equal to the product of the first threshold and the input voltage of the buck-boost converter; and the fourth reference voltage is equal to the product of the second threshold and the input voltage. The first threshold is related to the maximum conversion ratio between the output voltage and the input voltage when the buck-boost converter is in buck mode; the second threshold is related to the minimum conversion ratio between the output voltage and the input voltage when the buck-boost converter is in boost mode; and the first voltage is related to the amplitude of the first to fourth drive signals.

10. A buck-boost converter, comprising: The first switch and the second switch are connected sequentially between the input voltage and the ground terminal, and their common node is the first switch node. The control terminals of the first switch and the second switch receive the first drive signal and the second drive signal, respectively. An inductor is connected between the first switching node and the second switching node; The third switch is connected between the second switch node and the ground terminal, and the control terminal of the third switch receives the third drive signal; The fourth switch is connected between the second switch node and the output voltage, and the control terminal of the fourth switch receives the fourth drive signal. The mode switching circuit as described in any one of claims 5-9; as well as The logic control circuit is used to control the buck-boost converter to operate in the corresponding operating mode according to the boost mode signal, buck mode signal, and boost-buck mode signal.

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