Buck converter and control circuit therefor and electronic device using the same

Abstract

The application discloses a Buck converter and a control circuit thereof and an electronic device using the same. The control circuit comprises: an error amplifier, which compares a first detection voltage of an output voltage with a preset reference voltage, and outputs a voltage difference between the two as an error signal; a ripple compensation circuit, which, in a first mode, superimposes a ripple voltage reflecting energy change of an energy storage element on the error signal to obtain a second detection voltage, and, in a second mode, divides the first detection voltage to obtain the second detection voltage; a PWM comparator, which compares the second detection voltage with the reference voltage to generate a PWM signal; a logic circuit, which generates a switching signal according to the PWM signal and controls a duty cycle of the switching signal, so that the output voltage of the Buck converter approaches the reference voltage; and a driving circuit, which is used for generating driving signals applied to gates of switching transistors and rectifier transistors based on the switching signal, so that the efficiency problem in a light load can be improved, and the area of the circuit is not increased.

Description

Technical Field

[0001] This invention relates to the field of switching power supply technology, and more specifically, to a Buck converter and its control circuit, as well as electronic devices using them. Background Technology

[0002] Microprocessors for digital signal processing are installed in a wide variety of electronic devices in recent years, such as portable phones, PDAs (Personal Digital Assistants), and laptop computers. The power supply voltage required to drive these microprocessors has decreased with the miniaturization of semiconductor manufacturing processes, with some operating at low voltages below 1.5V.

[0003] On the other hand, these electronic devices use batteries such as lithium-ion batteries as power sources. The voltage output from lithium-ion batteries is around 3V to 4V. If this voltage is directly supplied to the microprocessor, it will generate unnecessary power consumption. Therefore, buck converters, series regulators, etc. are generally used to step down the battery voltage and then provide it to the microprocessor after regulation.

[0004] Buck converters come in two types: those using diodes for rectification (hereinafter referred to as diode rectification) and those using rectifier transistors instead of diodes (hereinafter referred to as synchronous rectification). The former offers the advantage of high efficiency when the load current is small, but it requires diodes in addition to inductors and capacitors in the control circuit, thus increasing the circuit area. The latter is less efficient than the former when the current supplied to the load is small, but because it uses transistors instead of diodes, it can be integrated into an LSI, enabling miniaturization of the circuit area, including peripheral components. Portable phones and other electronic devices, when miniaturization is required, often employ Buck converters using synchronous rectifier transistors.

[0005] Figure 1 A schematic circuit diagram of a synchronous rectified Buck converter according to the prior art is shown. The Buck converter 100 includes a main power circuit and a control circuit. The main power circuit includes a switching transistor MD1 and a rectifier transistor MD2 connected in series between the input terminal and ground. An inductor Lx is connected between the intermediate node of the switching transistor MD1 and the rectifier transistor MD2 and the output terminal. An output capacitor Co is connected between the output terminal and ground. The input terminal of the Buck converter 100 receives an input voltage Vin, and the output terminal provides an output voltage Vout. The control circuit of the Buck converter 100 provides drive signals to the switching transistor MD1 and the rectifier transistor MD2.

[0006] In the control circuit of Buck converter 100, the on-time control circuit 110 sets a fixed on-time Ton for the switching period Tsw, thereby generating a reset signal. The minimum off-time control circuit 120 sets a minimum off-time Toff_min (or maximum switching frequency) corresponding to a predetermined output voltage and a predetermined load. The error amplifier EA obtains an error signal Vc based on the detected voltage FB and the reference voltage Vref of the output voltage Vout. The PWM comparator 131 compares the error signal Vc with the detected voltage FB to obtain a PWM signal (Pulse Width Modulation). The two inputs of AND gate 132 receive the PWM signal output from PWM comparator 131 and the minimum off-time Toff_min, respectively, and the output provides a set signal. The RS flip-flop 140 generates a switching signal based on the reset signal and the set signal. The drive circuit 150 converts the switching signal into a drive signal to control the conduction state of the switching transistor MD1 and the rectifier transistor MD2.

[0007] When the detected voltage FB is less than or equal to the error signal Vc, the conduction time control circuit 110 sets a fixed conduction time, so that the conduction time of the switch control signal is a fixed value. When the detected voltage FB is greater than the error signal Vc, the turn-off signal of the switch control signal is effective, thereby dynamically adjusting the turn-off time according to the output voltage Vout. This turn-off time is greater than the minimum turn-off time Toff_min.

[0008] However, in some applications, low ESR (Equivalent Series Resistance) capacitors (such as ceramic capacitors) are required as output capacitors for the Buck converter 100. Because this type of output filter produces only a small output ripple even in the presence of significant noise, and because the capacitor ripple has a phase delay compared to the inductor ripple, subharmonic oscillations can occur in the system, potentially leading to instability in the control system. Conversely, using capacitors with high ESR (such as electrolytic capacitors) as output capacitors for the Buck converter 100 not only increases circuit area and cost but also leads to increased output voltage ripple and large fluctuations, affecting the normal operation of subsequent circuits.

[0009] Furthermore, the existing Buck converter 100 suffers from poor efficiency when the load current is small. As the load current decreases, the current flowing through the output inductor also gradually decreases and flows in the negative direction. If the current flowing through the inductor becomes negative, excess power will be consumed during the conduction of the rectifier transistor because the current flowing through the inductor flows to ground through the rectifier transistor. Summary of the Invention

[0010] In view of the above problems, the object of the present invention is to provide a Buck converter and its control circuit, as well as an electronic device using them, which can improve efficiency under light loads without increasing the circuit area of ​​the Buck converter.

[0011] According to a first aspect of the present invention, a control circuit for a Buck converter is provided. The Buck converter includes a switching transistor, a rectifier transistor, and an energy storage element. An input voltage is transmitted to the energy storage element by switching the switching transistor and the rectifier transistor to convert the input voltage into an output voltage. The control circuit includes: an error amplifier for comparing a first detection voltage of the output voltage with a preset reference voltage and outputting the voltage difference between the two as an error signal; a ripple compensation circuit for superimposing a ripple voltage reflecting the energy change of the energy storage element onto the error signal in a first mode to obtain a second detection voltage, and for dividing the first detection voltage to obtain the second detection voltage in a second mode; a PWM comparator for comparing the second detection voltage with the reference voltage to generate a PWM signal; a logic circuit for generating a switching signal based on the PWM signal and controlling its duty cycle so that the output voltage of the Buck converter is close to the reference voltage; and a drive circuit for generating a drive signal applied to the gates of the switching transistor and the rectifier transistor based on the switching signal.

[0012] Optionally, the error amplifier is controlled to be turned on in the first mode and controlled to be turned off in the second mode.

[0013] Optionally, the ripple compensation circuit includes: a compensation resistor and a compensation capacitor connected between the two ends of the energy storage element; a first capacitor, the first end of which is connected to the midpoint between the first resistor and the first capacitor; a first resistor, the first end of which is connected to the first detected voltage and the positive input terminal of the error amplifier, and the second end of which is connected to the output terminal of the error amplifier and the positive input terminal of the PWM comparator; and a second resistor, the first end of which is connected to the second end of the first capacitor, and the second end of which is connected to the second end of the first resistor.

[0014] Optionally, the control circuit further includes a light load detection circuit, used to compare the switching voltage at the connection point of the switching transistor and the rectifier transistor with a threshold voltage, and generate a light load indication signal based on the comparison result to control the Buck converter to switch between the first mode and the second mode.

[0015] Optionally, the light load detection circuit includes: a zero-crossing comparator for comparing the switching voltage with the threshold voltage and outputting a zero-crossing detection signal; a first timing module for timing and generating a first indication signal when the high-level time of the zero-crossing detection signal is greater than a first preset time; a second timing module for starting timing upon receiving the zero-crossing detection signal and generating a second indication signal when the timing reaches a second preset time; and a trigger module for setting to generate a valid light load indication signal upon receiving the first indication signal and resetting to generate an invalid light load indication signal upon receiving the second indication signal and the switching signal.

[0016] Optionally, the first preset time is longer than the second preset time.

[0017] Optionally, the threshold voltage is a ground potential.

[0018] Optionally, the control circuit further includes: an on-time control circuit for setting the minimum on-time of the switching transistor; and a minimum off-time control circuit for setting the minimum off-time of the switching transistor, wherein the minimum off-time is a fixed time period.

[0019] According to a second aspect of the present invention, a Buck converter is provided, comprising: a main power circuit including a switching transistor, a rectifier transistor, and an energy storage element, wherein an input voltage is transmitted to the energy storage element by switching the switching transistor and the rectifier transistor to convert the input voltage into an output voltage; and the aforementioned control circuit for controlling the switching of the switching transistor and the rectifier transistor.

[0020] According to a third aspect of the present invention, an electronic device is provided, comprising: a battery for outputting a battery voltage; a microprocessor; and the aforementioned Buck converter for stepping down the battery voltage and providing it to the microprocessor.

[0021] In summary, the Buck converter and its control circuit of this invention have two modes: standard and light load. In standard mode, the ripple compensation circuit superimposes the ripple voltage reflecting the energy change of the energy storage element onto the output of the error amplifier to obtain a second detection voltage. A PWM comparator then compares this second detection voltage with a set reference voltage to control the turn-on timing of the switching transistor. In light load mode, the ripple compensation circuit obtains the second detection voltage based on a first detection voltage obtained by voltage division of the output voltage. A PWM comparator then compares this second detection voltage with the set reference voltage to control the turn-on timing of the switching transistor. This allows only the PWM comparator and reference voltage module to be retained in light load mode, while other modules are turned off, minimizing the circuit's quiescent current and improving its light load efficiency. Furthermore, the Buck converter of this invention does not require an additional PWM comparator for light load mode to compare the output voltage with the set reference voltage, thus balancing circuit area and size.

[0022] Furthermore, the Buck converter of this invention retains the main architecture of hysteresis control with adaptive hysteresis in standard mode. Under this architecture, changes in output voltage can be directly reflected to the PWM comparator, providing extremely excellent transient response.

[0023] Furthermore, in this control architecture, the on-time of the switching transistor is jointly controlled by the on-time control circuit and the PWM comparator. When the on-time of the PWM comparator is less than the minimum on-time set by the on-time control circuit, the on-time of the switching transistor can be limited to the minimum on-time, ensuring that the system operates in a pseudo-fixed-frequency state. When the on-time of the PWM comparator is greater than the maximum on-time, the on-time of the switching transistor is controlled by the output of the PWM comparator. This allows the system's on-time to increase with the increase of the PWM signal, thus achieving smooth frequency reduction at high duty cycles and avoiding erroneous switching due to the ripple peak-to-peak value being overwhelmed by noise.

[0024] Furthermore, the light load detection circuit in this embodiment can set different time windows for entering and exiting the light load mode by setting a dual timing module. By setting the first preset time to be greater than the second preset time, a hysteresis can be set between the two time windows, which can prevent the system from constantly switching between the light load mode and the standard mode when the load fluctuates, thus improving the stability of the circuit. Attached Figure Description

[0025] The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0026] Figure 1A schematic circuit diagram of a synchronous rectifier Buck converter according to the prior art is shown;

[0027] Figure 2 A schematic circuit diagram of a Buck converter according to an embodiment of the present invention is shown;

[0028] Figure 3 The installation is shown Figure 2 A schematic block diagram of the electronic equipment of the Buck converter;

[0029] Figure 4 A schematic circuit diagram of a light load detection circuit in a Buck converter according to an embodiment of the present invention is shown.

[0030] Figure 5 A schematic waveform diagram of the Buck converter in standard mode according to an embodiment of the present invention is shown;

[0031] Figure 6 A schematic waveform diagram of the Buck converter in light load mode according to an embodiment of the present invention is shown. Detailed Implementation

[0032] Various embodiments of the invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale. Furthermore, some well-known parts may not be shown.

[0033] It should be understood that, in the following description, "circuit" refers to a conductive loop consisting of at least one element or sub-circuit connected by an electrical or electromagnetic link. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it can be directly coupled or connected to the other element, or there may be intermediate elements. The connection between elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0034] In this application, the switching transistor is a transistor that operates in switching mode to provide a current path, including a bipolar transistor or a field-effect transistor. The first terminal and the second terminal of the switching transistor are respectively the high potential terminal and the low potential terminal on the current path, and the control terminal is used to receive a drive signal to control the switching transistor to turn on and off.

[0035] This invention can be presented in various forms, some of which will be described below.

[0036] Figure 2 A schematic circuit diagram of a Buck converter 200 according to an embodiment of the present invention is shown. Figure 3 The installation is shown Figure 2 A schematic block diagram of an electronic device 300 with Buck converter 200. Electronic device 300 is, for example, a notebook computer, having a battery 310, a microprocessor 320, and Buck converter 200.

[0037] Battery 310, for example, is composed of multiple lithium-ion battery cells, outputting a battery voltage Vbat of approximately 12V. Microprocessor 320 is a functional block that performs various calculations and comprehensively controls the electronic device 300 as a whole; it is an LSI that operates at a power supply voltage of approximately 1.5V.

[0038] The Buck converter 200 of this embodiment steps down the battery voltage Vbat to approximately 12V and provides it as the power supply voltage for the microprocessor 320. The microprocessor 320 consumes a significant amount of current during computational processing; therefore, it reduces current consumption in standby mode to lower power consumption. Consequently, the current Iout flowing from the buck converter 200 to the microprocessor 320 varies considerably depending on the operating state of the microprocessor 320. The buck converter 200 of this embodiment is well-suited for applications where it efficiently performs voltage conversion on devices operating in a very low-current-consumption mode as loads. The following is based on... Figure 2 The structure of the Buck converter 200 is described in detail.

[0039] like Figure 2 As shown, the Buck converter 200 includes a main power circuit and a control circuit. Its main power circuit is the output circuit of a common synchronous rectification buck switching regulator, which steps down the input voltage Vin applied to input terminal 202 and outputs the output voltage Vout from output terminal 204. The input voltage Vin is... Figure 3 The battery voltage Vbat is used. Switching transistor MD1 and rectifier transistor MD2 are connected in series between input terminal 202 and ground. Switching transistor MD1 and rectifier transistor MD2 are, for example, N-channel MOS transistors, and their conduction and cutoff are controlled by a drive signal applied to their gates.

[0040] An energy storage element (e.g., an inductor Lx) is provided between the connection point of the switching transistor MD1 and the rectifier transistor MD2 and the output terminal 204. The output capacitor Co is positioned between the output terminal 204 and ground. Resr is the equivalent series resistance of the output capacitor Co. A load resistor RL is connected in parallel across the output capacitor Co. A first voltage divider network composed of resistors R1 and R2 is used to obtain the first detection voltage FB1 for the output voltage Vout.

[0041] In this embodiment, the voltage at the connection point of the switching transistor MD1 and the rectifier transistor MD2 is called the switching voltage Vsw. Furthermore, the current flowing through the inductor Lx is called the inductor current IL. The direction of this inductor current IL flowing towards the output capacitor Co is defined as positive. Additionally, the current flowing from the output capacitor Co to the load via the output terminal 204 is called the output current Iout.

[0042] The control circuit of the Buck converter 200 generates drive signals to be applied to the gates of the switching transistor MD1 and the rectifier transistor MD2, controlling the switching transistor MD1 and the rectifier transistor MD2 to turn on and off. The Buck converter 200 uses the inductor Lx to perform energy conversion by repeatedly switching the switching transistor MD1 and the rectifier transistor MD2 on and off, thereby stepping down the input voltage Vin. The stepped-down voltage is smoothed by the inductor Lx and the output capacitor Co, and is output as the output voltage Vout.

[0043] The control circuit of the Buck converter 200 can be integrated into an LSI chip on a semiconductor substrate. In this embodiment, the switching transistor MD1 and the rectifier transistor MD2 can be located outside the control circuit, but they can also be located inside the control circuit.

[0044] The control circuit of the Buck converter 200 mainly adopts the ULP-COT (Ultra Low Power Constant On-Time Control) architecture, which may include an error amplifier EA, an on-time control circuit 210, a minimum off-time control circuit 220, a PWM comparator 230, a logic circuit 240, a drive circuit 250, a ripple compensation circuit 260, and a light load detection circuit 270. During each switching cycle Tsw, the control circuit alternately executes a first state and a second state. The first state turns on the switching transistor MD1 and turns off the rectifier transistor MD2; the second state turns on the rectifier transistor MD2 and turns off the switching transistor MD1. Between the first and second states, there is a time (also called dead time) during which neither the switching transistor MD1 nor the rectifier transistor MD2 is turned on.

[0045] In the first state, during a predetermined on-time Ton, determined by the high-level time of the PWM signal or the on-time Ton1 set by the on-time control circuit 210, the control circuit charges the output capacitor Co via the switching transistor MD1, causing the output voltage Vout to rise slowly. After the on-time Ton has elapsed, the circuit transitions to the second state, turning on the rectifier transistor MD2. In the second state, when the output voltage Vout drops to a predetermined reference voltage Vref, the control circuit returns to the first state.

[0046] The transition between the first and second states is performed by a loop consisting of an error amplifier EA, an on-time control circuit 210, a minimum off-time control circuit 220, a PWM comparator 230, and a logic circuit 240.

[0047] The on-time control circuit 210 starts timing when the switching transistor MD1 is turned on, and is used to set the minimum on-time of the switching transistor MD1 in each cycle to Ton1 = Vout / Vin*Tsw. Where Vout represents the output voltage value, Vin represents the input voltage value, and Tsw represents the switching cycle of the Buck converter, which can ensure the consistency of the Buck converter's operating frequency.

[0048] The minimum turn-off time control circuit 220 starts timing when the switching transistor MD1 is turned off, and is used to set the minimum turn-off time Toff_min (or maximum switching frequency) of the switching transistor MD1 in each cycle corresponding to a predetermined output voltage and a predetermined load. The minimum turn-off time Toff_min is a fixed time period.

[0049] The positive input terminal of the error amplifier EA is connected to the first detection voltage FB1 obtained by the voltage divider network of resistors R1 and R2 from the output voltage Vout, and the negative input terminal is connected to the preset reference voltage Vref. The error amplifier EA is used to compare the voltage division value FB1 of the output voltage Vout with the preset reference voltage Vref, and output the voltage difference between the two as an error signal.

[0050] The positive input terminal of the PWM comparator 230 is connected to the output of the error amplifier EA and the output of the ripple compensation circuit 260, while the negative input terminal is connected to the reference voltage Vref. The PWM comparator 230 is used to compare the error signal with the second detection voltage FB2 obtained by superimposing the error signal with the ripple voltage Ripple, which reflects the energy change of the energy storage element Lx, and the reference voltage Vref to generate a PWM signal.

[0051] Logic circuit 240 includes NAND gates 241-243 and OR gate 244. One input of OR gate 244 is connected to the PWM signal, and the other input is connected to the output of the on-time control circuit 210. One input of NAND gate 243 is connected to the output of the minimum off-time control circuit 220, and the other input is connected to the PWM signal. One input of NAND gate 241 is connected to the output of NAND gate 243, and the other input is connected to the output of NAND gate 242. One input of NAND gate 242 is connected to the output of OR gate 244, and the other input is connected to the output of NAND gate 241. The output of NAND gate 241 is used to output the switching signal DRV. Logic circuit 240 is used to generate the switching signal DRV according to the PWM signal, the minimum on-time Ton1, or the minimum off-time Toff_min, respectively, and by controlling its duty cycle, makes the output voltage Vout of Buck converter 200 close to the reference voltage Vref.

[0052] The drive circuit 250 is used to alternately turn on the switching transistor MD1 and the rectifier transistor MD2 with a dead time, based on the switching signal DRV and the zero-crossing detection signal ZCD output by the light load detection circuit 270.

[0053] As mentioned earlier, the main architecture of the Buck converter 200 in this embodiment is hysteresis control with adaptive hysteresis. The error signal output from the error amplifier EA is superimposed with the ripple voltage Ripple to obtain the second detection voltage FB2. The error signal provides the DC point, and the ripple voltage Ripple provides an AC signal in phase with the inductor current. The PWM signal output from the PWM comparator 230 is directly used to control the switching transistor MD1 and the rectifier transistor MD2 to turn on and off. The change in the output voltage Vout can be directly reflected to the PWM comparator 230, enabling the PWM comparator 230 to perform the relevant switching action in the first moment. Therefore, this control architecture can provide extremely excellent transient response.

[0054] Furthermore, under this control architecture, the on-time Ton of each switching cycle is jointly controlled by the outputs of the on-time control circuit 210 and the PWM comparator 230. When the high-level time of the PWM signal is less than the on-time Ton1 set by the on-time control circuit 210, the on-time of the switching transistor MD1 is limited to the minimum on-time Ton1. Since the minimum on-time Ton1 is adaptive to a fixed frequency, this setting ensures that the system operates in a pseudo-fixed-frequency state. When the high-level time of the PWM signal is greater than the on-time Ton1 set by the on-time control circuit 210, the on-time of the switching transistor MD1 is controlled by the output of the PWM comparator 230. The on-time Ton of the system can increase with the increase of the PWM signal, thereby achieving smooth frequency reduction. This situation usually occurs at high duty cycles. In this case, the peak-to-peak ripple value is limited by the hysteresis of the PWM comparator, avoiding the situation where the peak-to-peak ripple value is too small and is overwhelmed by noise, resulting in erroneous switching. Furthermore, since the control architecture retains the core of hysteresis control, its maximum on-time is controlled by the output of the PWM comparator 230, rather than being limited by the timing of the on-time control circuit 210, thus enabling 100% on-time in some cases.

[0055] In addition, to improve efficiency under light load conditions, the control circuit of this embodiment also includes a ripple compensation circuit 260 and a light load detection circuit 270. The light load detection circuit 270 is used to compare the switching voltage Vsw at the connection point of the switching transistor MD1 and the rectifier transistor MD2 with a set threshold voltage, and generate a light load indication signal PSM based on the comparison result to control the Buck converter 200 to switch between standard mode and light load mode.

[0056] In the standard mode, the ripple compensation circuit 260 superimposes the ripple voltage Ripple, reflecting the energy change of the energy storage element Lx, onto the error signal to obtain the second detection voltage FB2. The PWM comparator 230 compares the second detection voltage FB2 with the reference voltage Vref to control the turn-on timing of the switching transistor MD1. In the light-load mode, the error amplifier EA is controlled to turn off, and the ripple compensation circuit 260 divides the first detection voltage FB1 to obtain the second detection voltage FB2. That is, in this mode, the second detection voltage FB2 is the same as the first detection voltage FB1. When the second detection voltage FB2, which serves as the output voltage Vout, drops to the reference voltage Vref, the output of the PWM comparator 230 flips, turning on the switching transistor MD1. Therefore, in the light-load mode, only the PWM comparator 230 and the reference voltage module need to be retained, while other modules are turned off, which can minimize the quiescent current of the circuit and improve the light-load efficiency of the circuit.

[0057] The ripple compensation circuit 260 is connected between the two ends of the energy storage element Lx to generate the ripple voltage Ripple. The ripple compensation circuit 260 includes a compensation resistor R. R1 Resistors R3 and R4 and compensation capacitor C R1 And capacitor C3. Compensation resistor R R1 and compensation capacitor C R1 A capacitor C3 is connected in series between the two ends of the energy storage element Lx, with its first end connected to the compensation resistor R. R1 and compensation capacitor C R1 The middle node is connected, the second end is connected to the first end of resistor R4, the second end of resistor R4 is connected to the second end of resistor R3, the positive input of PWM comparator 230 and the output of error amplifier EA, and the first end of resistor R3 is connected to the positive input of error amplifier EA and the first detection voltage FB1.

[0058] When the system is in standard mode, through resistor R R1 and capacitor C R1 The sampling of current changes in the energy storage element Lx generates the ripple voltage Ripple. Capacitor C3 couples this ripple voltage Ripple to the first terminal of resistor R3, and then superimposes it onto the output of error amplifier EA through resistors R3 and R4. In this standard mode, the DC gain of error amplifier EA is gm*R4, where gm is the transconductance of error amplifier EA. Appropriately adjusting this product can obtain the desired output voltage accuracy. When the system is in light-load mode, the first terminal of resistor R3 is in a high-impedance state. Therefore, the first detection voltage FB1 is directly divided to obtain the second detection voltage FB2 through the voltage divider network of resistors R3 and R4.

[0059] Figure 4 A schematic circuit diagram of a light load detection circuit in a Buck converter according to an embodiment of the present invention is shown. Figure 4 As shown, the light load detection circuit 270 of this embodiment includes a zero-crossing comparator 271, a first timing module 272, a third timing module 273, and a trigger module 274.

[0060] The positive input of the zero-crossing comparator 271 is connected to the switching voltage Vsw at the junction of the switching transistor MD1 and the rectifier transistor MD2, and the negative input is connected to the threshold voltage (e.g., ground potential). The zero-crossing comparator 271 is used to compare the switching voltage Vsw with the threshold voltage and output a zero-crossing detection signal ZCD.

[0061] The first timing module 272 is used for timing and generates a first indication signal V1 when the high-level time of the zero-crossing detection signal ZCD is greater than a first preset time T1. The second timing module 273 is used to start timing when the zero-crossing detection signal ZCD is received and generates a second indication signal V2 when the timing reaches a second preset time T2. The light-load detection circuit 270 in this embodiment further includes inverters INV1 and INV2, which are respectively connected to the output terminals of the first timing module 272 and the second timing module 273, and are used to perform waveform shaping on the first indication signal V1 and the second indication signal V2, respectively.

[0062] The trigger module 274 includes NAND gates 2741-2743 and an OR gate 2744. NAND gate 2741 has three inputs: the first input is connected to the second indicator signal V2, the second input is connected to the output of the zero-crossing comparator 271, and the third input is connected to the output of the logic circuit 240. The first input of the OR gate 2744 is connected to the output of the NAND gate 2742, and the second input is connected to the first indicator signal V1. The first input of the NAND gate 2742 is connected to the output of the OR gate 2744, and the second input is connected to the output of the NAND gate 2743, with the output used to output a light-load indicator signal PSM. The first input of the NAND gate 2743 is connected to the output of the NAND gate 2742, and the second input is connected to the output of the NAND gate 2741. The trigger module 274 is used to control the switching of the valid and invalid states of the light-load indicator signal PSM based on the first indicator signal V1, the second indicator signal V2, and the switching signal DRV.

[0063] The entry criteria for light load mode are as follows: When the switching voltage Vsw drops to 0, the output of the zero-crossing comparator 271 goes high. When the high-level time of the zero-crossing detection signal ZCD is greater than the first preset time T1, the first timing module 272 outputs a valid first indication signal V1. The trigger module 274 generates a valid light load indication signal PSM based on the valid first indication signal V1, and the control system switches to light load mode, shutting down other modules and retaining only the PWM comparator and the reference voltage module. The exit criteria for light load mode are as follows: When the high level of the zero-crossing detection signal ZCD arrives, the second timing module 273 starts timing. When the timing reaches the second preset time T2, a time window is given to the trigger module 274. If a high-level switching signal DRV is detected within this time window, the trigger module 274 resets and generates an invalid light load indication signal PSM, and the control system switches from light load mode to standard mode.

[0064] The light load detection circuit 270 in this embodiment can set different time windows for entering and exiting the light load mode by setting a dual timing module. Furthermore, by setting the first preset time T1 to be greater than the second preset time T2, a hysteresis can be set between these two time windows, which can prevent the system from constantly switching between the light load mode and the standard mode when the load fluctuates, thereby improving the stability of the circuit.

[0065] Figure 5 A schematic waveform diagram of the Buck converter in standard mode according to an embodiment of the present invention is shown. Figure 6 A schematic waveform diagram of the Buck converter in light load mode according to an embodiment of the present invention is shown.

[0066] First, refer to Figure 5 This describes the operation of the Buck converter 200 in standard mode in this embodiment.

[0067] exist Figure 5 In the process, when the second detection voltage FB2 drops to the reference voltage Vref, the PWM signal flips to a high level, controlling the switching transistor MD1 to turn on and the rectifier transistor MD2 to turn off (there is a certain dead time between them, the same below). During the conduction of the switching transistor MD1, the inductor current IL gradually increases, and the output voltage Vout also increases with time, while the conduction time control circuit starts timing. When the timing of the conduction time control circuit reaches the minimum conduction time Ton1, Ton1 flips to a high level, controlling the switching transistor MD1 to turn off and the rectifier transistor MD2 to turn on. During the conduction of the rectifier transistor MD2, the inductor current IL gradually decreases, and the output voltage Vout also decreases with time. When the second detection voltage FB2 drops to the reference voltage Vref, the above process is repeated.

[0068] Next, refer to Figure 6 This describes the operation of the Buck converter 200 in light load mode in this embodiment.

[0069] In light-load mode, although the on-time of switching transistor MD1 is still controlled by the PWM comparator and the off-time is still controlled by Ton1 of the on-time control circuit, the DC deviation of the detected voltage FB will be significantly larger because the error amplifier EA is turned off. However, since the load is very light at this time, this DC deviation is still within an acceptable range. Figure 6As shown, when the second detection voltage FB2 drops to the reference voltage Vref, the PWM signal flips to a high level, controlling the switching transistor MD1 to turn on and the rectifier transistor MD2 to turn off. During the conduction period of the switching transistor MD1, the inductor current IL rises rapidly, and the output voltage Vout also rises rapidly. When the timing of the conduction time control circuit reaches the minimum conduction time Ton1, Ton1 flips to a high level, controlling the switching transistor MD1 to turn off and the rectifier transistor MD2 to turn on. During the conduction period of the rectifier transistor MD2, the inductor current IL gradually decreases, and the output voltage Vout also decreases over time. When the second detection voltage FB2 drops to the reference voltage Vref, the above process is repeated.

[0070] In summary, the Buck converter and its control circuit of this invention have two modes: standard and light load. In standard mode, the ripple compensation circuit superimposes the ripple voltage reflecting the energy change of the energy storage element onto the output of the error amplifier to obtain a second detection voltage. A PWM comparator then compares this second detection voltage with a set reference voltage to control the turn-on timing of the switching transistor. In light load mode, the ripple compensation circuit obtains the second detection voltage based on a first detection voltage obtained by voltage division of the output voltage. A PWM comparator then compares this second detection voltage with the set reference voltage to control the turn-on timing of the switching transistor. This allows only the PWM comparator and reference voltage module to be retained in light load mode, while other modules are turned off, minimizing the circuit's quiescent current and improving its light load efficiency. Furthermore, the Buck converter of this invention does not require an additional PWM comparator for light load mode to compare the output voltage with the set reference voltage, thus balancing circuit area and size.

[0071] Furthermore, the Buck converter of this invention retains the main architecture of hysteresis control with adaptive hysteresis in standard mode. Under this architecture, changes in output voltage can be directly reflected to the PWM comparator, providing extremely excellent transient response.

[0072] Furthermore, in this control architecture, the on-time of the switching transistor is jointly controlled by the on-time control circuit and the PWM comparator. When the on-time of the PWM comparator is less than the minimum on-time set by the on-time control circuit, the on-time of the switching transistor can be limited to the minimum on-time, ensuring that the system operates in a pseudo-fixed-frequency state. When the on-time of the PWM comparator is greater than the maximum on-time, the on-time of the switching transistor is controlled by the output of the PWM comparator. This allows the system's on-time to increase with the increase of the PWM signal, thus achieving smooth frequency reduction at high duty cycles and avoiding erroneous switching due to the ripple peak-to-peak value being overwhelmed by noise.

[0073] Furthermore, the light load detection circuit in this embodiment can set different time windows for entering and exiting the light load mode by setting a dual timing module. By setting the first preset time to be greater than the second preset time, a hysteresis can be set between the two time windows, which can prevent the system from constantly switching between the light load mode and the standard mode when the load fluctuates, thus improving the stability of the circuit.

[0074] In the above description, well-known structural elements and steps have not been described in detail. However, those skilled in the art should understand that the corresponding structural elements and steps can be implemented through various technical means. Furthermore, in order to form the same structural elements, those skilled in the art can also design methods that are not entirely identical to those described above. Additionally, although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination.

[0075] As described above, these embodiments of the present invention do not exhaustively describe all details, nor do they limit the invention to specific embodiments. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to effectively utilize the invention and its modifications. The scope of protection of this invention should be determined by the scope defined in the claims of this invention.

Claims

1. A control circuit for a Buck converter, the Buck converter comprising a switching transistor, a rectifier transistor, and an energy storage element, wherein an input voltage is transmitted to the energy storage element by switching the switching transistor and the rectifier transistor to convert the input voltage into an output voltage, wherein, The control circuit includes: An error amplifier is used to compare the first detection voltage of the output voltage with a preset reference voltage and output the voltage difference between the two as an error signal. A ripple compensation circuit is used to superimpose a ripple voltage reflecting the energy change of the energy storage element onto the error signal in a first mode to obtain a second detection voltage, and to divide the first detection voltage to obtain the second detection voltage in a second mode, wherein the first mode is a standard mode and the second mode is a light load mode. A PWM comparator is used to compare the second detected voltage with the reference voltage to generate a PWM signal; A logic circuit is used to generate a switching signal based on the PWM signal and control its duty cycle so that the output voltage of the Buck converter is close to the reference voltage. A driving circuit is used to generate a driving signal applied to the gates of the switching transistor and the rectifier transistor based on the switching signal.

2. The control circuit according to claim 1, wherein, In the first mode, the error amplifier is controlled to be turned on, and in the second mode, the error amplifier is controlled to be turned off.

3. The control circuit according to claim 1, wherein, The ripple compensation circuit includes: A compensation resistor and a compensation capacitor are connected between the two ends of the energy storage element; The first capacitor has its first terminal connected to the intermediate node of the compensation resistor and the compensation capacitor. A first resistor, the first end of which is connected to the first detected voltage and the positive input terminal of the error amplifier, and the second end of which is connected to the output terminal of the error amplifier and the positive input terminal of the PWM comparator; and The second resistor has its first end connected to the second end of the first capacitor, and its second end connected to the second end of the first resistor.

4. The control circuit according to claim 1 further includes: A light load detection circuit is used to compare the switching voltage at the connection point of the switching transistor and the rectifier transistor with a threshold voltage, and generate a light load indication signal based on the comparison result to control the switching of the Buck converter between the first mode and the second mode.

5. The control circuit according to claim 4, wherein, The light load detection circuit includes: A zero-crossing comparator is used to compare the switching voltage with the threshold voltage and output a zero-crossing detection signal; The first timing module is used for timing and generates a first indication signal when the high-level time of the zero-crossing detection signal is greater than a first preset time. The second timing module is configured to start timing upon receiving the zero-crossing detection signal and generate a second indication signal when the timing reaches a second preset time; and The trigger module is configured to set and generate a valid light load indication signal when the first indication signal is received, and to reset and generate an invalid light load indication signal when the second indication signal and the switch signal are received.

6. The control circuit according to claim 5, wherein, The first preset time is greater than the second preset time.

7. The control circuit according to claim 4, wherein, The threshold voltage is the ground potential.

8. The control circuit according to claim 1, further comprising: On-time control circuit, used to set the minimum on-time of the switching transistor; as well as A minimum turn-off time control circuit is used to set the minimum turn-off time of the switching transistor, wherein the minimum turn-off time is a fixed time period.

9. A Buck converter, comprising: The main power circuit includes a switching transistor, a rectifier transistor, and an energy storage element. The input voltage is transmitted to the energy storage element by switching the switching transistor and the rectifier transistor, so as to convert the input voltage into an output voltage. as well as The control circuit according to any one of claims 1-8 is used to control the switching of the switching transistor and the rectifier transistor.

10. An electronic device, comprising: A battery that outputs battery voltage; microprocessor; as well as The Buck converter of claim 9 is used to step down the battery voltage and provide it to the microprocessor.

Images