Data transmission rate control method, device, medium and program product

Abstract

The present application relates to the technical field of servers. Disclosed are a data transmission rate control method, a device, a medium and a program product. The method comprises: controlling a first PCIe device to perform data transmission rate negotiation with a second PCIe device, so as to obtain a first actual data transmission rate; if the first actual data transmission rate does not reach a maximum data transmission rate supported by the second PCIe device, sending the first actual data transmission rate to the second PCIe device, so as to modify a parameter value of a data transmission control parameter to a target value; controlling the first PCIe device to continue to perform data transmission rate negotiation with the second PCIe device, so as to obtain a second actual data transmission rate; and if the second actual data transmission rate reaches the maximum data transmission rate supported by the second PCIe device, controlling, according to the maximum data transmission rate supported by the second PCIe device, the first PCIe device to communicate with the second PCIe device. The data transmission performance can be improved.

Description

Data transmission rate control methods, devices, media, and software products

[0001] Cross-references to related applications

[0002] This application claims priority to Chinese Patent Application No. 202411528035.2, filed on October 30, 2024, entitled "Control method, apparatus, medium and program product for data transmission rate", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of server technology, specifically to methods, devices, media, and program products for controlling data transmission rates. Background Technology

[0004] In a server, there are typically two PCIe devices connected via a PCIe (Peripheral Component Interconnect Express) bus. The first PCIe device can include internal server components such as the CPU (Central Processing Unit). The second PCIe device can include external server components such as NVMe (Non-Volatile Memory Express) hard drives and GPUs (Graphics Processing Units).

[0005] Currently, in some technologies, to reduce server costs, some secondary PCIe devices use equipment from non-mainstream manufacturers. For example, the price of NVMe hard drives from mainstream manufacturers is much higher than that from non-mainstream manufacturers. If a server is configured with 24 hard drives, using NVMe hard drives from mainstream manufacturers would result in enormous server costs. Therefore, to reduce server costs, NVMe hard drives from non-mainstream manufacturers are sometimes used.

[0006] However, due to a lack of large-scale batch testing and limited R&D experience among manufacturers, the data transfer rate between the second PCIe device and the first PCIe device provided by these non-mainstream manufacturers in some servers cannot reach the maximum data transfer rate supported by the second PCIe device, thus greatly affecting the data transfer performance of the server. Summary of the Invention

[0007] In view of this, this application provides a data transmission rate control method, electronic device, computer non-volatile readable storage medium, and computer program product, which can improve the data transmission performance of the server while reducing server costs.

[0008] In a first aspect, this application provides a method for controlling data transmission rate, applied to a basic input / output system in a target server; the method includes:

[0009] In response to the target server performing a specified operation, the system controls the first PCIe device and the second PCIe device to negotiate the data transmission rate and obtain the first actual data transmission rate of the link between the first PCIe device and the second PCIe device.

[0010] If the first actual data transmission rate does not reach the maximum data transmission rate supported by the second PCIe device, the first actual data transmission rate is sent to the second PCIe device so that the second PCIe device can modify the parameter value of the data transmission control parameter to the target value.

[0011] Based on the data transmission control parameters, the first PCIe device and the second PCIe device continue to negotiate the data transmission rate to obtain the second actual data transmission rate of the link where the first PCIe device and the second PCIe device are located.

[0012] If the second actual data transmission rate reaches the maximum data transmission rate supported by the second PCIe device, the first PCIe device and the second PCIe device are controlled to communicate according to the maximum data transmission rate supported by the second PCIe device.

[0013] Secondly, this application provides a method for controlling data transmission rate, applied to a first PCIe device in a target server; the method includes:

[0014] In response to receiving a negotiation command from the basic input / output system in the target server, the system negotiates the data transmission rate with the connected second PCIe device to obtain the first actual data transmission rate of the link where the second PCIe device is located.

[0015] If the first actual data transmission rate does not reach the maximum data transmission rate supported by the second PCIe device, the first actual data transmission rate is sent to the second PCIe device so that the second PCIe device can modify the parameter value of the data transmission control parameter to the target value.

[0016] Based on the data transmission control parameters, continue to negotiate the data transmission rate with the second PCIe device to obtain the second actual data transmission rate of the link where the second PCIe device is located.

[0017] If the second actual data transmission rate reaches the maximum data transmission rate supported by the second PCIe device, then communication with the second PCIe device shall be conducted according to the maximum data transmission rate supported by the second PCIe device.

[0018] Thirdly, this application provides a data transmission rate control device, the device comprising:

[0019] The first control module is used to control the first PCIe device and the second PCIe device to negotiate the data transmission rate in response to the target server performing a specified operation, so as to obtain the first actual data transmission rate of the link where the first PCIe device and the second PCIe device are located.

[0020] The rate transmission module is used to send the first actual data transmission rate to the second PCIe device if the first actual data transmission rate does not reach the maximum data transmission rate supported by the second PCIe device, so that the second PCIe device can modify the parameter value of the data transmission control parameter to the target value.

[0021] The second control module is used to control the first PCIe device and the second PCIe device to continue negotiating the data transmission rate based on the data transmission control parameters, so as to obtain the second actual data transmission rate of the link where the first PCIe device and the second PCIe device are located.

[0022] The third control module is used to control the first PCIe device and the second PCIe device to communicate according to the maximum data transmission rate supported by the second PCIe device if the second actual data transmission rate reaches the maximum data transmission rate supported by the second PCIe device.

[0023] Fourthly, this application provides a data transmission rate control device, the device comprising:

[0024] The first transmission rate acquisition module is used to respond to the negotiation command issued by the basic input / output system in the target server, negotiate the data transmission rate with the connected second PCIe device, and obtain the first actual data transmission rate of the link where the second PCIe device is located.

[0025] The rate transmission module is used to send the first actual data transmission rate to the second PCIe device if the first actual data transmission rate does not reach the maximum data transmission rate supported by the second PCIe device, so that the second PCIe device can modify the parameter value of the data transmission control parameter to the target value.

[0026] The second transmission rate acquisition module is used to continue negotiating the data transmission rate with the second PCIe device based on the data transmission control parameters, and to obtain the second actual data transmission rate of the link where the second PCIe device is located.

[0027] The communication module is used to communicate with the second PCIe device according to the maximum data transmission rate supported by the second PCIe device if the second actual data transmission rate reaches the maximum data transmission rate supported by the second PCIe device.

[0028] Fifthly, this application provides an electronic device, including: a memory and a processor, which are communicatively connected to each other. The memory stores computer instructions, and the processor executes the computer instructions to perform the above method.

[0029] Sixthly, this application provides a computer non-volatile readable storage medium storing computer instructions for causing a computer to perform the above-described method.

[0030] In a seventh aspect, this application provides a computer program product, including computer instructions for causing a computer to perform the above-described methods.

[0031] In some embodiments of this application, after controlling the first PCIe device and the second PCIe device to negotiate the data transmission rate and obtain a first actual data transmission rate, if the first actual data transmission rate does not reach the maximum data transmission rate supported by the second PCIe device, the first actual data transmission rate is sent to the second PCIe device. The second PCIe device then modifies the parameter value of its data transmission control parameters to the target value. This allows adjustment of the data transmission signal regulation between the first and second PCIe devices. Furthermore, based on the modified data transmission control parameters, after controlling the first and second PCIe devices to continue negotiating the data transmission rate, the obtained second actual data transmission rate may reach the maximum data transmission rate supported by the second PCIe device. Thus, communication between the first and second PCIe devices can be controlled based on the maximum data transmission rate supported by the second PCIe device. Based on this principle, even when the second PCIe device is not provided by a mainstream manufacturer, the method described in this application can still be used to adjust the data transfer rate between the first and second PCIe devices, ensuring that the data transfer rate reaches the maximum data transfer rate supported by the second PCIe device. Therefore, server data transfer performance can be improved while reducing server costs. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the specific embodiments or related technologies of this application, the drawings used in the description of the specific embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0033] Figure 1 is a schematic diagram of the connection between the central processing unit and the NVMe hard disk in some scenarios provided by some embodiments of this application;

[0034] Figure 2 is a flowchart illustrating a data transmission rate control method provided in some embodiments of this application;

[0035] Figure 3 is a schematic diagram of the connection between a first PCIe device and other PCIe devices provided in some embodiments of this application;

[0036] Figure 4 is a flowchart illustrating a data transmission rate control method provided in some other embodiments of this application;

[0037] Figure 5 is a schematic diagram of the startup process of the target server provided in some embodiments of this application;

[0038] Figure 6 is a schematic diagram of a data transmission rate control device provided in some embodiments of this application;

[0039] Figure 7 is a schematic diagram of a data transmission rate control device provided in some other embodiments of this application;

[0040] Figure 8 is a schematic diagram of the structure of an electronic device provided in some embodiments of this application. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of some embodiments of this application clearer, the technical solutions of some embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on some embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0042] According to the PCIe protocol, before the server powers on and enters the operating system, the first and second PCIe devices in the PCIe link negotiate the data transmission rate. This negotiation involves the first and second PCIe devices determining a suitable data transmission rate based on the current hardware conditions and system configuration. Specifically, the data transmission rate negotiation process mainly includes phase 0 / 1. In phase 0 / 1, the first and second PCIe devices can determine a suitable data transmission rate based on the values ​​of the data transmission control parameters by exchanging training sequences. These control parameters, also known as preset parameters, are used to adjust the signal amplitude, swing, and de-emphasis of the data transmission signal between the first and second PCIe devices. This compensates for signal attenuation and distortion during transmission, thereby improving signal integrity and reducing the bit error rate. The PCIe protocol defines multiple values ​​for the control parameters, with different values ​​corresponding to different signal amplitudes, swings, and de-emphasis settings.

[0043] Furthermore, the data transfer rate determined through data transfer rate negotiation is typically a standard rate defined in the PCIe protocol, such as 8GT / s for PCIe 3.0 and 16GT / s for PCIe 4.0. Before each second PCIe device leaves the factory, the manufacturer writes the maximum data transfer rate supported by each second PCIe device into the device firmware, according to the standard rates defined in the PCIe protocol, such as 8GT / s or 16GT / s. Generally, the data transfer rate determined through data transfer rate negotiation between the first and second PCIe devices is the maximum data transfer rate supported by the second PCIe device.

[0044] However, in some current technologies, the data transfer rate negotiated between the first PCIe device and a second PCIe device from a non-mainstream manufacturer is not necessarily the maximum data transfer rate supported by the second PCIe device. For example, suppose the first PCIe device is a central processing unit (CPU), and the second PCIe device is an NVMe hard drive from a non-mainstream manufacturer, and the maximum data transfer rate supported by the NVMe hard drive is 16GT / s. Referring to Figure 1, a schematic diagram of the connection between the CPU 121 and the NVMe hard drive in some scenarios provided by some embodiments of this application is shown. In Figure 1, the PCIe link extends directly from port 1211 of the CPU 121, passes through the high-speed signal trace 122 of the PCIe link on the motherboard 12, and provides an external interface 123 for the motherboard 12. The external interface 123 is connected to the NVMe hard drive backplane 14 via a slimline cable or a Gen-Z cable (a cable of the Gen-Z interconnect standard) 13, and the NVMe hard drive backplane 14 is then physically connected to the NVMe hard drive 15. Based on the connection structure shown in Figure 1, after the central processing unit 121 and the NVMe hard disk 15 negotiate the data transfer rate, the data transfer rate in the PCIe link will likely drop to 8GT / s, which greatly reduces the data transfer performance of the server.

[0045] Analysis of the PCIe link data showing a decrease in data transfer rate revealed that the PCIe link was too long, resulting in excessive signal attenuation and weakened signal quality. Consequently, during phase 0 / 1, the CPU 121's request for the NVMe hard drive preset link did not fully meet the negotiation criteria, leading to a probabilistic occurrence of PCIe link establishment timeouts between the CPU 121 and the NVMe hard drive 15, with the negotiated speed only reaching 8GT / s.

[0046] In view of this, referring to Figure 2, a data transmission rate control method is provided for some embodiments of this application, which can improve the data transmission performance of the server while reducing server costs. The control method in Figure 2 can be applied to the basic input / output system in the target server, or it can also be applied to the controller in the target server that runs the basic input / output system. The target server refers to the server where the PCIe device experiencing a probabilistic decrease in data transmission rate resides. The basic input / output system, also known as the BIOS (Basic Input / Output System), is mainly used to complete hardware self-tests, load the operating system boot program, perform system settings and configurations, and provide the necessary operating environment for the operating system before the server enters the operating system.

[0047] In this application, by improving the program code in the basic input / output system, the data transfer rate control method shown in Figure 2 can be executed during its runtime to determine the optimal data transfer rate between PCIe devices before the server enters the operating system. Specifically, the data transfer rate control method in Figure 2 may include the following steps:

[0048] Step S201: In response to the target server performing a specified operation, control the first PCIe device and the second PCIe device to negotiate the data transmission rate and obtain the first actual data transmission rate of the link where the first PCIe device and the second PCIe device are located.

[0049] Specifically, as described above, the first PCIe device can include internal devices of the target server, such as a central processing unit (CPU). The second PCIe device can include external devices of the target server, such as NVMe hard drives and GPUs. The first and second PCIe devices are connected via a PCIe bus. The link between the first and second PCIe devices can include a physical link and a data link. The physical link refers to the physical connection medium between the first and second PCIe devices, while the data link refers to the data transmission line formed based on the PCIe protocol and the physical link.

[0050] The specified operation for the target server can be a power-on operation. That is, after the target server is powered on, by running the basic input / output system provided in this application, on the one hand, the target server can be booted into the operating system; on the other hand, before entering the operating system, by executing the control method of this application, the optimal data transfer rate between the first PCIe device and the second PCIe device can be determined.

[0051] It should be noted that, according to the above description of the PCIe protocol, in some technologies, after each power-on operation of the target server, a data transfer rate negotiation is also performed between the first PCIe device and the second PCIe device to determine the data transfer rate between them. However, in these technologies, after the data transfer rate negotiation is successful, regardless of whether the obtained first actual data transfer rate reaches the maximum data transfer rate supported by the second PCIe device, the communication between the first PCIe device and the second PCIe device will be controlled according to the first actual data transfer rate. However, in the solution of this application, steps S202 and S203 are performed based on the obtained first actual data transfer rate to determine the optimal data transfer rate between the first PCIe device and the second PCIe device.

[0052] Step S202: If the first actual data transmission rate does not reach the maximum data transmission rate supported by the second PCIe device, the first actual data transmission rate is sent to the second PCIe device so that the second PCIe device modifies the parameter value of the data transmission control parameter to the target value.

[0053] Specifically, the data transfer rate negotiation between the first and second PCIe devices can be understood as finding the maximum data transfer rate supported by the link between the first and second PCIe devices. If the first actual data transfer rate does not reach the maximum data transfer rate supported by the second PCIe device, it means that the maximum data transfer rate supported by the link between the first and second PCIe devices cannot be reached by the second PCIe device. Therefore, data transfer cannot be performed according to the maximum data transfer rate supported by the second PCIe device. Obviously, this is unreasonable and will greatly reduce the data transfer performance of the target server. Therefore, the first actual data transfer rate can be sent to the second PCIe device so that the second PCIe device can modify the parameter value of the data transfer control parameter to the target value. In this way, the adjustment method of the data transmission signal between the first and second PCIe devices can be adjusted, thereby adjusting the maximum data transfer rate supported by the link between the first and second PCIe devices.

[0054] In some embodiments, to adapt to the logic of modifying data transmission control parameters in the method of this application, the firmware in the management controller of the second PCIe device can be improved. Here, firmware refers to the program code burned into the management controller of the second PCIe device by the manufacturer before the second PCIe device leaves the factory. The firmware improvement of the management controller of the second PCIe device can be performed by the manufacturer of the second PCIe device.

[0055] Based on the improved firmware, after the first actual data transfer rate is sent to the second PCIe device, the management controller of the second PCIe device can compare the first actual data transfer rate with the maximum data transfer rate supported by the second PCIe device by running the improved firmware. If the first actual data transfer rate does not reach the maximum data transfer rate supported by the second PCIe device, the parameter value of the data transfer control parameter (i.e., the preset parameter) will be modified from the default value to the target value.

[0056] In some embodiments, the value of the data transmission control parameter is modified from the default value to 7. Of course, in other embodiments, the value of the data transmission control parameter can also be modified to other values ​​besides 7. This application does not impose any limitations on this.

[0057] Step S203: Based on the data transmission control parameters, control the first PCIe device and the second PCIe device to continue negotiating the data transmission rate to obtain the second actual data transmission rate of the link where the first PCIe device and the second PCIe device are located.

[0058] Because the parameter values ​​of the data transmission control parameters were modified in step S202 (i.e., the adjustment method of the data transmission signal between the first PCIe device and the second PCIe device was adjusted), the obtained second actual data transmission rate may be different from the first actual data transmission rate. Specifically, the second actual data transmission rate may be greater than or less than the first actual data transmission rate.

[0059] Step S204: If the second actual data transmission rate reaches the maximum data transmission rate supported by the second PCIe device, control the first PCIe device and the second PCIe device to communicate according to the maximum data transmission rate supported by the second PCIe device.

[0060] This improves the data transmission capability between the first PCIe device and the second PCIe device. In summary, in some embodiments of this application, after controlling the first and second PCIe devices to negotiate data transmission rates and obtaining a first actual data transmission rate, if the first actual data transmission rate does not reach the maximum data transmission rate supported by the second PCIe device, the first actual data transmission rate is sent to the second PCIe device. The second PCIe device then modifies the data transmission control parameter value to the target value, adjusting the data transmission signal regulation method between the first and second PCIe devices. Furthermore, based on the modified data transmission control parameters, after controlling the first and second PCIe devices to continue negotiating data transmission rates, the resulting second actual data transmission rate may reach the maximum data transmission rate supported by the second PCIe device. Thus, communication between the first and second PCIe devices can be controlled based on the maximum data transmission rate supported by the second PCIe device. Based on this principle, even when the second PCIe device is not provided by a mainstream manufacturer, the method described in this application can still be used to adjust the data transfer rate between the first and second PCIe devices, ensuring that the data transfer rate reaches the maximum data transfer rate supported by the second PCIe device. Therefore, server data transfer performance can be improved while reducing server costs.

[0061] Furthermore, in some embodiments, corresponding to step S202, if the first actual data transmission rate obtained through data transmission rate negotiation reaches the maximum data transmission rate supported by the second PCIe device, it means that the maximum data transmission rate supported by the link where the first PCIe device and the second PCIe device are located can reach the maximum data transmission rate supported by the second PCIe device. In this case, the following operation can be performed:

[0062] Stop sending the actual data transfer rate to the second PCIe device, and control the first PCIe device and the second PCIe device to stop negotiating the data transfer rate;

[0063] The system controls the communication between the first PCIe device and the second PCIe device according to the maximum data transfer rate supported by the second PCIe device.

[0064] The aforementioned "stop" can be understood as "not executing". Simply put, when the actual data transfer rate reaches the maximum data transfer rate supported by the second PCIe device, it is no longer necessary to modify the data transfer control parameters (i.e., it is no longer necessary to send the actual data transfer rate to the second PCIe device), nor is it necessary to control the first and second PCIe devices to continue negotiating the data transfer rate. Furthermore, communication between the first and second PCIe devices can be controlled according to the maximum data transfer rate supported by the second PCIe device.

[0065] This avoids repeated data transfer rate negotiation between the first and second PCIe devices, allowing the target server to boot into the operating system as quickly as possible and reducing its startup time.

[0066] In some embodiments, in step S202, if the second actual data transmission rate does not reach the maximum data transmission rate supported by the second PCIe device after obtaining the second actual data transmission rate, the method of this application may further include:

[0067] Stop sending the second actual data transfer rate to the second PCIe device so that the parameter value of the data transfer control parameter remains at the target value;

[0068] Control the first PCIe device and the second PCIe device to continue negotiating the data transfer rate.

[0069] Specifically, the target value can be a better value determined based on the link between the first PCIe device and the second PCIe device. Therefore, after modifying the parameter value of the data transmission control parameter to the target value, the parameter value of the data transmission control parameter can be kept at the target value.

[0070] If the second actual data transmission rate does not reach the maximum data transmission rate, maintaining the data transmission control parameters at the target value and controlling the first and second PCIe devices to continue negotiating data transmission rates one or more times can avoid inaccuracies in the actual data transmission rate obtained due to fluctuations in the physical link between the first and second PCIe devices. For example, during the second data transmission rate negotiation between the first and second PCIe devices, fluctuations in the physical link might cause the obtained actual data transmission rate to fall short of the maximum data transmission rate supported by the second PCIe device. In this case, if the fluctuation is eliminated during the third data transmission rate negotiation, the obtained actual data transmission rate will reach the maximum data transmission rate supported by the second PCIe device. Therefore, by negotiating the data transmission rate multiple times, the inaccuracy of the negotiated actual data transmission rate caused by fluctuations in the physical link can be reduced, thereby improving the control accuracy of the data transmission rate between the first and second PCIe devices.

[0071] It is understandable that multiple data transfer rate negotiations between the first and second PCIe devices will delay the target server's entry into the operating system, thus extending the target server's startup time. Therefore, the number of data transfer rate negotiations between the first and second PCIe devices can be controlled based on a threshold to regulate the target server's startup time.

[0072] Specifically, in some embodiments, before controlling the first PCIe device and the second PCIe device to continue negotiating the data transfer rate, the method of this application may further include:

[0073] Determine if the following conditions are met:

[0074] When the number of data transfer rate negotiations between the first PCIe device and the second PCIe device is controlled by a threshold, the number of data transfer rate negotiations between the first PCIe device and the second PCIe device has not reached the threshold.

[0075] Specifically, if the number of data transfer rate negotiations between the first and second PCIe devices has not reached a threshold, the first and second PCIe devices can continue negotiating the data transfer rate. Conversely, if the number of negotiations reaches the threshold, the first and second PCIe devices can stop negotiating the data transfer rate. This allows for effective control of the target server's startup time while improving the precision of data transfer rate control.

[0076] In some embodiments, if the number of data transfer rate negotiations between the first PCIe device and the second PCIe device reaches a threshold, the method of this application may further include:

[0077] Based on the actual data transmission rate obtained from the last data transmission rate negotiation, control the first PCIe device to communicate with the second PCIe device.

[0078] For example, assuming the threshold for the number of attempts is 4. After the fourth time the first PCIe device and the second PCIe device negotiate the data transfer rate, if the actual data transfer rate obtained still does not reach the maximum data transfer rate supported by the second PCIe device, then the first PCIe device and the second PCIe device can be controlled to stop negotiating the data transfer rate, and communication between the first PCIe device and the second PCIe device can be controlled according to the actual data transfer rate obtained after the fourth time the first PCIe device and the second PCIe device negotiate the data transfer rate.

[0079] In the above embodiments, since the actual data transfer rates between the first and second PCIe devices, obtained through multiple data transfer rate negotiations, do not reach the maximum data transfer rate supported by the second PCIe device, it can be considered that communication between the first and second PCIe devices is not permitted at the maximum data transfer rate supported by the second PCIe device. In this case, controlling communication between the first and second PCIe devices according to the actual data transfer rate obtained from the last data transfer rate negotiation is more accurate and can reduce problems such as data loss.

[0080] Referring to Figure 3, a schematic diagram illustrating the connection between a first PCIe device and other PCIe devices is provided for some embodiments of this application. In Figure 3, the first PCIe device is connected to multiple PCIe devices via different links. The second PCIe device is a PCIe device connected to the first PCIe device that meets specified conditions. Specifically, among the multiple PCIe devices connected to the first PCIe device, some PCIe devices may be provided by mainstream manufacturers, while some PCIe devices may be provided by non-mainstream manufacturers. The second PCIe device may be a PCIe device provided by a non-mainstream manufacturer.

[0081] For PCIe devices from mainstream manufacturers, their functions are relatively stable, and the data transfer rate between them and the first PCIe device can be determined using conventional methods, meaning only one data transfer rate negotiation is required. For second PCIe devices from non-mainstream manufacturers, their functions are less stable, and the data transfer rate between them and the first PCIe device can be determined using the method provided in this application. This involves modifying the data transfer control parameters and performing multiple data transfer rate negotiations. By applying different negotiation controls to mainstream and non-mainstream PCIe devices, the time consumed by mainstream PCIe devices during the target server startup process can be reduced, thereby lowering the target server's startup time.

[0082] To implement different negotiation controls for PCIe devices from mainstream and non-mainstream manufacturers, in some embodiments, each link in Figure 2 may have its own corresponding enable register. Before the first control of the first PCIe device and the second PCIe device to negotiate the data transfer rate, the method of this application may further include:

[0083] Iterate through all the PCIe devices connected to the first PCIe device;

[0084] If the PCIe device traversed is the second PCIe device, determine the first target link where the first PCIe device and the traversed PCIe device are located, and the first enable register corresponding to the first target link.

[0085] Set the enable parameter value in the first enable register to the first function value to enable the repeat negotiation function of the first target link.

[0086] In addition, if the PCIe device traversed is not the second PCIe device, determine the second target link where the first PCIe device and the traversed PCIe device are located, and the second enable register corresponding to the second target link.

[0087] Set the enable parameter value in the second enable register to the second function value to disable the repeat negotiation function of the second target link.

[0088] In this way, based on the functional values ​​in the enable registers corresponding to each link, it can be determined whether to follow the method of this application to determine the data transmission rate between PCIe devices on the corresponding link.

[0089] In some embodiments, for a second PCIe device provided by a non-mainstream manufacturer, the function may be stable when the second PCIe device is connected to the first PCIe device in the first type of server, and the function may be unstable when connected to the first PCIe device in the second type of server. To further reduce server startup time, before enabling the renegotiation function of the first target link in the first enable register corresponding to the first target link, the method of this application may further include:

[0090] Determine the target type of the target server;

[0091] If, based on the target type of the target server, it is determined that the target server is a server compatible with the second PCIe device, then the parameter value of the enable parameter in the first enable register is set to the second function value to disable the renegotiation function of the first target link.

[0092] If the target server is not compatible with the second PCIe device, the enable parameter in the first enable register is set to the first function value to enable the repeat negotiation function of the first target link.

[0093] Accordingly, before controlling the first PCIe device and the second PCIe device to continue negotiating the data transmission rate, if the function of repeatedly negotiating the data transmission rate between the first PCIe device and the second PCIe device is controlled by an enable parameter, the value of the enable parameter can be used to determine whether the repeated negotiation function of the link where the first PCIe device and the second PCIe device are located is enabled. If the repeated negotiation function of the link where the first PCIe device and the second PCIe device are located is enabled, then the first PCIe device and the second PCIe device are controlled to continue negotiating the data transmission rate. If the repeated negotiation function of the link where the first PCIe device and the second PCIe device are located is not enabled, then the control of the first PCIe device and the second PCIe device to continue negotiating the data transmission rate is stopped.

[0094] Referring again to Figure 3, in some embodiments, each link may also have its own corresponding count register. When the repeat negotiation function of the first target link is enabled, the method of this application may further include:

[0095] A threshold number is set in the count register corresponding to the first target link to control the number of times the maximum data transfer rate is negotiated between the first PCIe device and the second PCIe device.

[0096] Specifically, in the presence of multiple second PCIe devices and multiple first target links, the number of times thresholds set in the count registers corresponding to at least some of the first target links are different.

[0097] In simple terms, each first target link can have its own corresponding threshold number of attempts, and these threshold numbers can differ for different first target links. When controlling the data transfer rate negotiation between a first PCIe device and a second PCIe device within one of the first target links, the maximum number of data transfer rate negotiations between the first and second PCIe devices can be controlled according to the threshold number corresponding to that first target link. This makes the control more flexible.

[0098] In some embodiments, the maximum data transfer rate supported by the second PCIe device may be pre-programmed into the management controller firmware of the second PCIe device by the manufacturer. Before controlling the first PCIe device and the second PCIe device to perform the first data transfer rate negotiation, the method of this application may further include:

[0099] Obtain the maximum data transfer rate supported by the second PCIe device from its firmware;

[0100] Save the obtained maximum data transmission rate so that after each data transmission rate negotiation, the actual data transmission rate obtained can be determined based on the saved maximum data transmission rate to see if it reaches the maximum data transmission rate.

[0101] Since the maximum data transfer rate included in the firmware of the second PCIe device is burned by the manufacturer, obtaining the maximum data transfer rate supported by the second PCIe device from its firmware yields a more accurate result.

[0102] In some embodiments, the firmware of the second PCIe device includes a maximum data transfer rate adapted to different types of servers;

[0103] The maximum data transfer rate supported by the second PCIe device is obtained from the firmware of the second PCIe device, including:

[0104] Send the target server type of the target server to the second PCIe device so that the second PCIe device returns the maximum data transfer rate that is compatible with the target server type.

[0105] In this way, the results can be more accurate.

[0106] Referring to Figure 4, a flowchart illustrating a data transfer rate control method is provided for some other embodiments of this application. The control method in Figure 4 can be applied to a first PCIe device in a target server, such as a central processing unit. Referring to the relevant description in Figure 3, before the first PCIe device executes the method in Figure 4, the basic input / output system can pre-perform the following operations:

[0107] 1) Obtain the maximum data transfer rate supported by the second PCIe device from the firmware of the second PCIe device in advance and save it to the rate register;

[0108] 2) Sequentially obtain the device information of each PCIe device connected to the first PCIe device, and based on the device information, determine whether it is necessary to enable the repeat negotiation function of the link where the PCIe device is located, and complete the relevant configuration in the enable register corresponding to the link.

[0109] 3) When the repeated negotiation function of a link is enabled, set the number threshold in the number register corresponding to the link.

[0110] Based on the configuration information in steps 1) to 3) above, the first PCIe device can execute the control method shown in Figure 4. Specifically, the control method in Figure 4 includes the following steps:

[0111] Step 401: In response to receiving a negotiation command from the basic input / output system in the target server, negotiate the data transmission rate with the connected second PCIe device to obtain the first actual data transmission rate of the link where the second PCIe device is located.

[0112] Specifically, during the boot process of the server, after completing the relevant operations in steps 1) to 3) above and before the server enters the operating system, the BIOS can send a negotiation command to the first PCIe device to trigger the first PCIe device to execute the methods in steps S401 to S403.

[0113] Step 402: If the first actual data transmission rate does not reach the maximum data transmission rate supported by the second PCIe device, the first actual data transmission rate is sent to the second PCIe device so that the second PCIe device modifies the parameter value of the data transmission control parameter to the target value.

[0114] Specifically, the first PCIe device can compare the acquired first actual data transfer rate with the rate in the aforementioned rate register. If the first actual data transfer rate does not reach the rate in the rate register, it indicates that the first actual data transfer rate has not reached the maximum data transfer rate supported by the second PCIe device. In this case, the first PCIe device can send the first actual data transfer rate to the second PCIe device so that the second PCIe device can modify the parameter value of the data transfer control parameter to the target value.

[0115] Step 403: Based on the data transmission control parameters, continue to negotiate the data transmission rate with the second PCIe device to obtain the second actual data transmission rate of the link where the second PCIe device is located.

[0116] Step S404: If the second actual data transmission rate reaches the maximum data transmission rate supported by the second PCIe device, then communicate with the second PCIe device according to the maximum data transmission rate supported by the second PCIe device.

[0117] The control method in Figure 4 is basically similar to that in Figure 2, the main difference being the executing entity. The relevant principles can be found in Figure 3, and will not be repeated here. Similar to Figure 3:

[0118] In some embodiments, if the first actual data transfer rate reaches the maximum data transfer rate supported by the second PCIe device, the method of this application further includes:

[0119] Stop sending the actual data transfer rate to the second PCIe device, and stop negotiating the second data transfer rate with the second PCIe device;

[0120] Communicate with the second PCIe device at the maximum data transfer rate.

[0121] In some embodiments, after obtaining the second actual data transmission rate, the method of this application further includes:

[0122] If the second actual data transmission rate does not reach the maximum data transmission rate supported by the second PCIe device, stop sending the second actual data transmission rate to the second PCIe device so that the parameter value of the data transmission control parameter remains at the target value.

[0123] Control the first PCIe device and the second PCIe device to continue negotiating the data transfer rate.

[0124] In some embodiments, before continuing data transfer rate negotiation with the second PCIe device, the method of this application further includes:

[0125] Determine whether at least one of the following conditions is met:

[0126] When the number of data transfer rate negotiations with the second PCIe device is controlled by a number threshold, the number of data transfer rate negotiations already conducted with the second PCIe device has not reached the number threshold.

[0127] When the function of repeated data transmission rate negotiation between the first PCIe device and the second PCIe device is controlled by the enable parameter, the repeated negotiation function of the link where the second PCIe device is located is determined to be enabled based on the value of the enable parameter.

[0128] If at least one of the above conditions is met, data transmission rate negotiation with the second PCIe device continues; if at least one of the above conditions is not met, data transmission rate negotiation with the second PCIe device stops.

[0129] In some embodiments, if at least one of the above conditions is not met and data transfer rate negotiation with the second PCIe device is stopped, the method of this application further includes:

[0130] The device communicates with the second PCIe device based on the actual data transmission rate obtained from the last data transmission rate negotiation.

[0131] In some embodiments, starting at least from the second data transfer rate negotiation, after each data transfer rate negotiation with the second PCIe device, the method of this application further includes:

[0132] Determine whether the actual data transmission rate obtained through data transmission rate negotiation has reached the maximum data transmission rate. If the actual data transmission rate has reached the maximum data transmission rate, communicate with the second PCIe device according to the maximum data transmission rate.

[0133] Similar to the control method in Figure 3, in Figure 4, after the first data transmission rate negotiation with the second PCIe device and obtaining the first actual data transmission rate, if the first actual data transmission rate does not reach the maximum data transmission rate supported by the second PCIe device, the first actual data transmission rate is sent to the second PCIe device. The second PCIe device then modifies the data transmission control parameter value to the target value, adjusting the data transmission signal regulation between the first and second PCIe devices. Based on the modified data transmission control parameters, after the second data transmission rate negotiation with the second PCIe device, the obtained second actual data transmission rate may reach the maximum data transmission rate supported by the second PCIe device. Thus, communication with the second PCIe device can be achieved based on its maximum supported data transmission rate. Based on this principle, even when the second PCIe device is not from a mainstream manufacturer, the method of this application can be used to adjust the data transmission rate between the first and second PCIe devices to achieve the maximum data transmission rate supported by the second PCIe device. Therefore, it is possible to improve server data transmission performance while reducing server costs.

[0134] To clearly illustrate the position of the method of this application in the target server startup process, please refer to Figure 5, which provides a schematic diagram of the target server startup process for some embodiments of this application. In Figure 5, the target server startup process includes the following steps:

[0135] Step S501: Power on the target server.

[0136] Specifically, this step can be performed manually by staff or automatically through server management software. This application does not impose any restrictions on this.

[0137] Step S502: The target server starts.

[0138] Step S503: The basic input / output system enumerates PCIe devices.

[0139] Step S504: Load the device firmware of the PCIe device.

[0140] Specifically, the PCIe devices here refer to PCIe devices connected to the target server, including PCIe devices provided by mainstream manufacturers and PCIe devices provided by non-mainstream manufacturers.

[0141] Step S505: The PCIe device sets the data transmission control parameter values ​​according to the default values.

[0142] Specifically, both mainstream and non-mainstream PCIe devices can have their data transmission control parameters set to default values ​​for their respective PCIe links.

[0143] Step S506: Traverse the PCIe devices and negotiate the data transmission rate in sequence.

[0144] Specifically, in this step, if the PCIe device connected to the first PCIe device is provided by a non-mainstream manufacturer, the optimal data transfer rate between the PCIe devices can be determined according to the method of this application; if the PCIe device connected to the first PCIe device is provided by a mainstream manufacturer, the optimal data transfer rate between the PCIe devices can be determined according to conventional methods.

[0145] In step S507, the PCIe devices connect according to the negotiated data transfer rate.

[0146] Step S508: The target server enters the operating system.

[0147] This concludes the complete description of the control method in this application.

[0148] Corresponding to the data transmission rate control method in Figure 2, this application also provides a data transmission rate control device. Referring to Figure 6, a block diagram of a data transmission rate control device provided in some embodiments of this application is shown. In Figure 6, the control device includes:

[0149] The first control module 601 is used to control the first PCIe device and the second PCIe device to negotiate the data transmission rate in response to the target server performing a specified operation, so as to obtain the first actual data transmission rate of the link where the first PCIe device and the second PCIe device are located.

[0150] The rate transmission module 602 is used to send the first actual data transmission rate to the second PCIe device if the first actual data transmission rate does not reach the maximum data transmission rate supported by the second PCIe device, so that the second PCIe device modifies the parameter value of the data transmission control parameter to the target value.

[0151] The second control module 603 is used to control the first PCIe device and the second PCIe device to continue negotiating the data transmission rate based on the data transmission control parameters, so as to obtain the second actual data transmission rate of the link where the first PCIe device and the second PCIe device are located.

[0152] The third control module 604 is used to control the first PCIe device and the second PCIe device to communicate according to the maximum data transmission rate supported by the second PCIe device if the second actual data transmission rate reaches the maximum data transmission rate supported by the second PCIe device.

[0153] In some embodiments, if the first actual data transmission rate reaches the maximum data transmission rate supported by the second PCIe device, the rate transmission module 602 is further configured to stop transmitting the actual data transmission rate to the second PCIe device; the second control module 603 is further configured to control the first PCIe device and the second PCIe device to stop negotiating the data transmission rate; and the third control module 604 is further configured to control the first PCIe device and the second PCIe device to communicate according to the maximum data transmission rate supported by the second PCIe device.

[0154] In some embodiments, after obtaining the second actual data transmission rate, if the second actual data transmission rate does not reach the maximum data transmission rate supported by the second PCIe device, the rate transmission module 602 is further configured to stop sending the second actual data transmission rate to the second PCIe device so that the parameter value of the data transmission control parameter continues to remain at the target value; the second control module 603 is further configured to control the first PCIe device and the second PCIe device to continue negotiating the data transmission rate.

[0155] In some embodiments, before controlling the first PCIe device and the second PCIe device to continue negotiating the data transfer rate, the second control module 603 is further configured to determine whether at least one of the following conditions is met:

[0156] When the number of times the first PCIe device and the second PCIe device negotiate the data transfer rate is controlled by a threshold, the number of times the data transfer rate negotiation has been conducted between the first PCIe device and the second PCIe device has not reached the threshold.

[0157] When the function of repeatedly negotiating the data transmission rate on the link where the first PCIe device and the second PCIe device are located is controlled by the enable parameter, it is determined that the repeated negotiation function of the link where the first PCIe device and the second PCIe device are located is enabled based on the value of the enable parameter.

[0158] Specifically, if at least one of the above conditions is met, the first PCIe device and the second PCIe device are controlled to continue negotiating the data transmission rate; if at least one of the above conditions is not met, the first PCIe device and the second PCIe device are controlled to stop negotiating the data transmission rate.

[0159] In some embodiments, if at least one of the above conditions is not met, and the first PCIe device and the second PCIe device are controlled to stop negotiating the data transmission rate, the third control module 604 is further configured to control the first PCIe device and the second PCIe device to communicate according to the actual data transmission rate obtained from the last data transmission rate negotiation.

[0160] In some embodiments, the first PCIe device is connected to multiple PCIe devices via different links, and each link has its own corresponding enable register. The second PCIe device is a PCIe device connected to the first PCIe device and meeting specified conditions. Before the first control module 601 controls the first PCIe device and the second PCIe device to negotiate the data transfer rate for the first time, the first control module 601 is further configured to:

[0161] Iterate through all the PCIe devices connected to the first PCIe device;

[0162] If the PCIe device traversed is the second PCIe device, determine the first target link where the first PCIe device and the traversed PCIe device are located, and the first enable register corresponding to the first target link.

[0163] Set the enable parameter value in the first enable register to the first function value to enable the repeat negotiation function of the first target link.

[0164] In some embodiments, if the PCIe device being traversed is not the second PCIe device, the first control module 601 is further configured to:

[0165] Determine the second target link where the first PCIe device and the traversed PCIe devices are located, and the second enable register corresponding to the second target link;

[0166] Set the enable parameter value in the second enable register to the second function value to disable the repeat negotiation function of the second target link.

[0167] In some embodiments, each link also has its own corresponding count register; when the repeat negotiation function of the first target link is enabled, the first control module 601 is further configured to:

[0168] A threshold number is set in the count register corresponding to the first target link to control the number of times the maximum data transfer rate is negotiated between the first PCIe device and the second PCIe device.

[0169] In some embodiments, where multiple second PCIe devices and multiple first target links exist, the first control module 601 is further configured to:

[0170] The number of count thresholds set in the count registers corresponding to at least some of the first target links are different.

[0171] In some embodiments, before the first control module 601 initiates the data transfer rate negotiation between the first PCIe device and the second PCIe device, it is further configured to:

[0172] Obtain the maximum data transfer rate supported by the second PCIe device from its firmware;

[0173] Save the obtained maximum data transmission rate so that after each data transmission rate negotiation, the actual data transmission rate obtained can be determined based on the saved maximum data transmission rate to see if it reaches the maximum data transmission rate.

[0174] In some embodiments, the firmware of the second PCIe device includes a maximum data transfer rate adapted to different types of servers; the first control module 601 is specifically used for:

[0175] Send the target server type of the target server to the second PCIe device so that the second PCIe device returns the maximum data transfer rate that is compatible with the target server type.

[0176] Corresponding to the data transmission rate control method in Figure 4, this application also provides a data transmission rate control device. Referring to Figure 7, a schematic diagram of the data transmission rate control device provided in some embodiments of this application is shown. In Figure 7, the control device includes:

[0177] The first transmission rate acquisition module 701 is used to negotiate the data transmission rate with the connected second PCIe device in response to receiving a negotiation command issued by the basic input / output system in the target server, and to obtain the first actual data transmission rate of the link where the second PCIe device is located.

[0178] The rate transmission module 702 is used to send the first actual data transmission rate to the second PCIe device if the first actual data transmission rate does not reach the maximum data transmission rate supported by the second PCIe device, so that the second PCIe device modifies the parameter value of the data transmission control parameter to the target value.

[0179] The second transmission rate acquisition module 703 is used to continue negotiating the data transmission rate with the second PCIe device based on the data transmission control parameters, and to obtain the second actual data transmission rate of the link where the second PCIe device is located.

[0180] The communication module 704 is used to communicate with the second PCIe device according to the maximum data transmission rate supported by the second PCIe device if the second actual data transmission rate reaches the maximum data transmission rate supported by the second PCIe device.

[0181] In some embodiments, if the first actual data transmission rate reaches the maximum data transmission rate supported by the second PCIe device, the rate sending module 702 is further configured to stop sending the actual data transmission rate to the second PCIe device, and the second transmission rate acquisition module 703 is further configured to stop negotiating the second data transmission rate with the second PCIe device; the communication module 704 is further configured to communicate with the second PCIe device according to the maximum data transmission rate.

[0182] In some embodiments, after obtaining the second actual data transmission rate, if the second actual data transmission rate does not reach the maximum data transmission rate supported by the second PCIe device, the second transmission rate acquisition module 703 is further configured to stop sending the second actual data transmission rate to the second PCIe device so that the parameter value of the data transmission control parameter continues to remain at the target value; the communication module 704 is further configured to control the first PCIe device and the second PCIe device to continue negotiating the data transmission rate.

[0183] In some embodiments, before continuing data transfer rate negotiation with the second PCIe device, the second transfer rate acquisition module 703 is further configured to determine whether at least one of the following conditions is met:

[0184] When the number of data transfer rate negotiations with the second PCIe device is controlled by a number threshold, the number of data transfer rate negotiations already conducted with the second PCIe device has not reached the number threshold.

[0185] When the function of repeatedly negotiating the data transmission rate on the link where the first PCIe device and the second PCIe device are located is controlled by the enable parameter, it is determined that the repeated negotiation function of the link where the second PCIe device is located is enabled based on the value of the enable parameter.

[0186] If at least one of the above conditions is met, data transmission rate negotiation with the second PCIe device continues; if at least one of the above conditions is not met, data transmission rate negotiation with the second PCIe device stops.

[0187] In some embodiments, if at least one of the above conditions is not met and data transfer rate negotiation with the second PCIe device is stopped, the second transfer rate acquisition module 703 is further configured to:

[0188] The device communicates with the second PCIe device based on the actual data transmission rate obtained from the last data transmission rate negotiation.

[0189] In some embodiments, at least starting from the second data transfer rate negotiation, after each data transfer rate negotiation with the second PCIe device, the communication module 704 is further configured to:

[0190] Determine whether the actual data transmission rate obtained through data transmission rate negotiation has reached the maximum data transmission rate. If the actual data transmission rate has reached the maximum data transmission rate, communicate with the second PCIe device according to the maximum data transmission rate.

[0191] In some embodiments of this application, the inference device is presented in the form of a functional unit, where a unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that execute one or more software or fixed programs, and / or other devices that can provide the above-mentioned functions.

[0192] The reasoning device of this application has the same beneficial effects as the reasoning method described above, which will not be elaborated here.

[0193] Referring to Figure 8, a schematic diagram of the structure of an electronic device provided in some embodiments of this application is shown. As shown in Figure 8, the electronic device includes: one or more processors 10, a memory 20, and interfaces for connecting the various components, including high-speed interfaces and low-speed interfaces. The various components are interconnected via different buses and can be mounted on a common motherboard or otherwise installed as needed. The processor can process instructions executed within the electronic device, including instructions stored in or on memory to display graphical information of a GUI on an external input / output device (such as a display device coupled to the interface). In some embodiments, multiple processors and / or multiple buses can be used with multiple memories and multiple storage devices, if needed. Similarly, multiple electronic devices can be connected, each providing some of the necessary operations (e.g., as a server array, a set of blade servers, or a multiprocessor system). Figure 8 shows an example of a single processor 10.

[0194] Processor 10 may be a first PCIe device, a network processor, or a combination thereof. Processor 10 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The programmable logic device may be a complex programmable logic device (CAMP), a field-programmable gate array (FPGA), a general-purpose array logic (GDA), or any combination thereof.

[0195] The memory 20 stores instructions executable by at least one processor 10 to cause at least one processor 10 to perform the method shown in the above embodiments.

[0196] The memory 20 may include a program storage area and a data storage area. The program storage area may store the operating system and applications required for at least one function; the data storage area may store data created based on the use of the electronic device. Furthermore, the memory 20 may include high-speed random access memory and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, the memory 20 includes memories remotely located relative to the processor 10, which can be connected to the electronic device via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0197] The memory 20 may include volatile memory, such as random access memory; the memory may also include non-volatile memory, such as flash memory, hard disk or solid-state drive; the memory 20 may also include a combination of the above types of memory.

[0198] The electronic device also includes a communication interface 30 for communicating with other devices or communication networks.

[0199] Some embodiments of this application also provide a computer non-volatile readable storage medium. The methods described above according to some embodiments of this application can be implemented in hardware or firmware, or implemented as computer code that can be recorded on a storage medium, or implemented as computer code downloaded over a network and originally stored on a remote storage medium or a non-transitory machine-readable storage medium and then stored on a local storage medium. Thus, the methods described herein can be processed by software stored on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. The storage medium can be a magnetic disk, optical disk, read-only memory, random access memory, flash memory, hard disk, or solid-state drive, etc.; the storage medium can also include combinations of the above types of memory. It is understood that a computer, processor, microprocessor controller, or programmable hardware includes storage components capable of storing or receiving software or computer code that, when accessed and executed by the computer, processor, or hardware, implements the methods shown in the above embodiments.

[0200] A portion of this application can be used as a computer program product, such as computer program instructions, which, when executed by a computer, can invoke or provide the methods and / or technical solutions according to this application through the operation of the computer. Those skilled in the art will understand that the forms in which computer program instructions exist in a computer-readable medium include, but are not limited to, source files, executable files, installation package files, etc. Correspondingly, the ways in which computer program instructions are executed by a computer include, but are not limited to: the computer directly executing the instructions, or the computer compiling the instructions and then executing the corresponding compiled program, or the computer reading and executing the instructions, or the computer reading and installing the instructions and then executing the corresponding installed program. Here, the computer-readable medium can be any available computer-nonvolatile readable storage medium or communication medium accessible to a computer.

[0201] Although some embodiments of this application have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of this application, and such modifications and variations all fall within the scope defined by the appended claims.

Claims

1. A method for controlling data transmission rate, characterized in that, A basic input / output system applied in a target server; the method includes: In response to the target server performing a specified operation, the first peripheral component interconnect high-speed bus device and the second peripheral component interconnect high-speed bus device are controlled to negotiate the data transmission rate to obtain the first actual data transmission rate of the link where the first peripheral component interconnect high-speed bus device and the second peripheral component interconnect high-speed bus device are located; If the first actual data transmission rate does not reach the maximum data transmission rate supported by the second peripheral component interconnect high-speed bus device, the first actual data transmission rate is sent to the second peripheral component interconnect high-speed bus device so that the second peripheral component interconnect high-speed bus device modifies the parameter value of the data transmission control parameter to the target value; Based on the data transmission control parameters, the first peripheral component interconnect high-speed bus device and the second peripheral component interconnect high-speed bus device are controlled to continue negotiating the data transmission rate to obtain the second actual data transmission rate of the link where the first peripheral component interconnect high-speed bus device and the second peripheral component interconnect high-speed bus device are located; If the second actual data transmission rate reaches the maximum data transmission rate supported by the second peripheral component interconnect high-speed bus device, the first peripheral component interconnect high-speed bus device and the second peripheral component interconnect high-speed bus device are controlled to communicate according to the maximum data transmission rate supported by the second peripheral component interconnect high-speed bus device.

2. The method according to claim 1, characterized in that, If the first actual data transmission rate reaches the maximum data transmission rate supported by the second peripheral component interconnect high-speed bus device, the method further includes: Stop sending the first actual data transmission rate to the second peripheral component interconnect high-speed bus device, and control the first peripheral component interconnect high-speed bus device and the second peripheral component interconnect high-speed bus device to stop negotiating the data transmission rate; The first peripheral component interconnect high-speed bus device is controlled to communicate with the second peripheral component interconnect high-speed bus device according to the maximum data transmission rate supported by the second peripheral component interconnect high-speed bus device.

3. The method according to claim 1, characterized in that, After obtaining the second actual data transmission rate, the method further includes: If the second actual data transmission rate does not reach the maximum data transmission rate supported by the second peripheral component interconnect high-speed bus device, the transmission of the second actual data transmission rate to the second peripheral component interconnect high-speed bus device shall be stopped, so that the parameter value of the data transmission control parameter continues to remain at the target value; The first peripheral component interconnect high-speed bus device and the second peripheral component interconnect high-speed bus device are controlled to continue negotiating the data transmission rate.

4. The method according to claim 3, characterized in that, The step of controlling the first peripheral component interconnect high-speed bus device and the second peripheral component interconnect high-speed bus device to continue negotiating the data transmission rate includes: Based on a threshold number, the number of times data transmission rate negotiation occurs between the first peripheral component interconnect high-speed bus device and the second peripheral component interconnect high-speed bus device is controlled.

5. The method according to any one of claims 1 to 4, characterized in that, Before the first peripheral component interconnect high-speed bus device and the second peripheral component interconnect high-speed bus device continue to negotiate the data transmission rate, the method further includes: Determine whether at least one of the following conditions is met: When the number of times the first peripheral component interconnect high-speed bus device and the second peripheral component interconnect high-speed bus device negotiate the data transmission rate is controlled by a number threshold, the number of times the data transmission rate negotiation has been performed between the first peripheral component interconnect high-speed bus device and the second peripheral component interconnect high-speed bus device has not reached the number threshold. When the function of repeated data transmission rate negotiation between the first peripheral component interconnect high-speed bus device and the second peripheral component interconnect high-speed bus device is controlled by an enable parameter, it is determined that the repeated negotiation function of the link where the first peripheral component interconnect high-speed bus device and the second peripheral component interconnect high-speed bus device are located is enabled based on the value of the enable parameter. Specifically, if at least one of the above conditions is met, the first peripheral component interconnect high-speed bus device and the second peripheral component interconnect high-speed bus device are controlled to continue negotiating the data transmission rate; if at least one of the above conditions is not met, the first peripheral component interconnect high-speed bus device and the second peripheral component interconnect high-speed bus device are controlled to stop negotiating the data transmission rate.

6. The method according to claim 5, characterized in that, If at least one of the above conditions is not met, and the first peripheral component interconnect high-speed bus device and the second peripheral component interconnect high-speed bus device are controlled to stop negotiating the data transmission rate, the method further includes: Based on the actual data transmission rate obtained from the last data transmission rate negotiation, control the first peripheral component interconnect high-speed bus device to communicate with the second peripheral component interconnect high-speed bus device.

7. The method according to claim 5, characterized in that, The first peripheral component interconnect high-speed bus device is connected to multiple peripheral component interconnect high-speed bus devices through different links, and each link has its own corresponding enable register. The second peripheral component interconnect high-speed bus device is a peripheral component interconnect high-speed bus device connected to the first peripheral component interconnect high-speed bus device and meets the specified conditions. Before the first data transmission rate negotiation between the first peripheral component interconnect high-speed bus device and the second peripheral component interconnect high-speed bus device, the method further includes: Iterate through each of the peripheral component interconnect high-speed bus devices connected to the first peripheral component interconnect high-speed bus device; If the peripheral component interconnect high-speed bus device traversed is the second peripheral component interconnect high-speed bus device, determine the first target link where the first peripheral component interconnect high-speed bus device and the traversed peripheral component interconnect high-speed bus device are located, and the first enable register corresponding to the first target link; The enable parameter is set to a first function value in the first enable register to enable the repeat negotiation function of the first target link.

8. The method according to claim 7, characterized in that, Before enabling the renegotiation function of the first target link, the method further includes: Determine the target type of the target server; If, based on the target type, it is determined that the target server is a server adapted to the high-speed bus device interconnected with the second peripheral component, then the parameter value of the enable parameter in the first enable register is set to the second function value to disable the renegotiation function of the first target link.

9. The method according to claim 8, characterized in that, Setting the enable parameter value in the first enable register to a first function value to enable the repeat negotiation function of the first target link includes: If the target server is a server that is not compatible with the high-speed bus device interconnected with the second peripheral component, the parameter value of the enable parameter in the first enable register is set to the first function value to enable the repeat negotiation function of the first target link.

10. The method according to claim 7, characterized in that, If the peripheral component interconnect high-speed bus device traversed is not the second peripheral component interconnect high-speed bus device, the method further includes: Determine the second target link where the first peripheral component interconnect high-speed bus device and the traversed peripheral component interconnect high-speed bus device are located, and the second enable register corresponding to the second target link; In the second enable register, the parameter value of the enable parameter is set to the second function value to disable the repeat negotiation function of the second target link.

11. The method according to claim 7, characterized in that, Each of the links also has its own corresponding count register; When the repeat negotiation function of the first target link is enabled, the method further includes: A count threshold is set in the count register corresponding to the first target link. The count threshold is configured to control the number of times the maximum data transmission rate is negotiated between the first peripheral component interconnect high-speed bus device and the second peripheral component interconnect high-speed bus device.

12. The method according to claim 11, characterized in that, In the presence of multiple second peripheral component interconnect high-speed bus devices and multiple first target links, the method further includes: The number of count thresholds set in the count registers corresponding to at least some of the first target links are different.

13. The method according to claim 1, characterized in that, Before the first data transmission rate negotiation between the first peripheral component interconnect high-speed bus device and the second peripheral component interconnect high-speed bus device, the method further includes: Obtain the maximum data transfer rate supported by the second peripheral component interconnect high-speed bus device from the firmware of the second peripheral component interconnect high-speed bus device; The obtained maximum data transmission rate is saved so that, after each data transmission rate negotiation, the actual data transmission rate obtained can be determined based on the saved maximum data transmission rate to determine whether the actual data transmission rate reaches the maximum data transmission rate.

14. The method according to claim 13, characterized in that, The firmware of the second peripheral component interconnect high-speed bus device includes a maximum data transfer rate adapted to different types of servers; Obtaining the maximum data transfer rate supported by the second peripheral component interconnect high-speed bus device from the firmware of the second peripheral component interconnect high-speed bus device includes: The target server type of the target server is sent to the second peripheral component interconnect high-speed bus device so that the second peripheral component interconnect high-speed bus device returns the maximum data transfer rate adapted to the target server type.

15. The method according to claim 1, characterized in that, The specified operation is a power-on operation.

16. The method according to claim 1, characterized in that, The second peripheral component interconnect high-speed bus device includes improved firmware, which is configured to compare the first actual data transmission rate with the maximum data transmission rate supported by the second peripheral component interconnect high-speed bus device, and modify the parameter value of the data transmission control parameter from the default value to the target value if the first actual data transmission efficiency does not reach the maximum data transmission rate supported by the second peripheral component interconnect high-speed bus device.

17. A method for controlling data transmission rate, characterized in that, A high-speed bus device for first peripheral component interconnection in a target server; the method includes: In response to receiving a negotiation command from the basic input / output system in the target server, the system negotiates the data transmission rate with the connected second peripheral component interconnect high-speed bus device to obtain the first actual data transmission rate of the link where the second peripheral component interconnect high-speed bus device is located; If the first actual data transmission rate does not reach the maximum data transmission rate supported by the second peripheral component interconnect high-speed bus device, the first actual data transmission rate is sent to the second peripheral component interconnect high-speed bus device so that the second peripheral component interconnect high-speed bus device modifies the parameter value of the data transmission control parameter to the target value; Based on the data transmission control parameters, the data transmission rate negotiation continues with the second peripheral component interconnect high-speed bus device to obtain the second actual data transmission rate of the link where the second peripheral component interconnect high-speed bus device is located. If the second actual data transmission rate reaches the maximum data transmission rate supported by the second peripheral component interconnect high-speed bus device, then communication is performed with the second peripheral component interconnect high-speed bus device according to the maximum data transmission rate supported by the second peripheral component interconnect high-speed bus device.

18. An electronic device, characterized in that, include: A memory and a processor are communicatively connected, the memory stores computer instructions, and the processor executes the computer instructions to perform the data transmission rate control method of any one of claims 1 to 16, or the data transmission rate control method of claim 17.

19. A computer non-volatile readable storage medium, characterized in that, The computer non-volatile readable storage medium stores computer instructions configured to cause the computer to execute the data transmission rate control method of any one of claims 1 to 16, or to execute the data transmission rate control method of claim 17.

20. A computer program product, characterized in that, Includes computer instructions configured to cause a computer to execute the data transmission rate control method of any one of claims 1 to 16, or to execute the data transmission rate control method of claim 17.

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