Method for producing a device comprising a plurality of thin layers and device thus produced

Abstract

The invention relates in particular to a method for producing a device comprising at least two thin layers and intended to be implemented in particular in the fields of optoelectronics and photovoltaics, the method comprising the following steps: providing a silicon wafer (c-Si) (2); loading the silicon wafer (c-Si) (2) into a first reactor in order to produce a thin germanium layer (Ge) (3) by plasma-assisted chemical vapor deposition, optionally with a silicon gradient (Si) in the first nanometers, so as to obtain an intermediate device; loading the intermediate device into a second reactor; then depositing and epitaxially growing a thin gallium arsenide layer (AsGa) (4) by chemical vapor deposition at low temperature and reduced pressure (Remote Plasma Chemical Vapor Deposition or RP-CVD).

Description

METHOD FOR MAKING A DEVICE COMPRISING SEVERAL THIN LAYERS AND THE DEVICE THUS MAKING

[0001] The present invention relates to the field of devices comprising one or more thin layers, also called multilayer materials, of electronic or optoelectronic devices and in particular of semiconductor devices, and especially of photovoltaic cells.

[0002] The invention finds particular application in the fields of nanotechnology, optoelectronics and photovoltaics.

[0003] The process according to the invention is particularly concerned with the production of substrates used as supports for the growth by epitaxy of a particular chemical compound and also usable for the production of tandem photovoltaic cells. State of the art

[0004] Various methods for manufacturing devices with thin films are known from the prior art.

[0005] More specifically, various methods are known for preparing semiconductor devices (solar cells or optoelectronics in the broadest sense) using gallium arsenide (GaAs - III-V materials) as their base material. These methods are mainly based on the growth of single-crystal layers (epitaxial growth process) on a substrate of the same nature or on a substrate with a lattice parameter close to that of the substrate (typically germanium c-Ge for GaAs growth).

[0006] In both cases, gallium arsenide (GaAs) or germanium (c-Ge) substrates are expensive, thus limiting the development of the III-V technology to niche markets. Furthermore, current solutions rely, among other things, on thick c-Ge intermediate layers, which do not allow the use of the c-Si substrate as the active layer (also called the absorber) in a tandem cell.

[0007] The invention relates to the realization of devices usable in particular as virtual substrates of gallium arsenide (GaAs), that is to say as substrates which allow a use similar to that of real substrates of gallium arsenide (GaAs), in particular for the growth by epitaxy of gallium arsenide (GaAs).

[0008] Furthermore, the invention enables the fabrication of low-cost devices that can replace expensive gallium arsenide (GaAs) substrates, are suitable for direct growth by gallium arsenide (GaAs) epitaxy, and have several potential applications. Indeed, conventional fabrication processes are considered costly and difficult to implement: they involve, for example, heat treatment and high-temperature growth steps (above 700°C). They utilize either ultra-high vacuum (MBE) or ultra-high-pressure (MOCVD) processes, requiring large and costly reactive gas flows.

[0009] A known process for the production of such devices is metal-organic vapor deposition (also called MOCVD for Metal Organic Chemical Vapor Deposition).

[0010] We also know from document FR3073665 an alternative thin film production process, which is less expensive to implement than the usual processes: the process, described in this document, allows in particular the production of thin films transferable from one support to another, allowing reuse of the support and allowing the production of devices at so-called "low" temperatures, not exceeding or only slightly exceeding 200 °C: the thin film deposits are, in fact, carried out by PECVD (plasma-assisted chemical vapor deposition).

[0011] Document FR3073665 describes in more detail a process for manufacturing a semiconductor material (silicon and germanium) comprising a commercial c-Si substrate receiving a first layer of single-crystal silicon (Si) and on which a second layer of single-crystal semiconductor material is grown epitaxially. The process allows the layer(s) to be detached from the substrate and placed on another substrate.

[0012] One aim of the present invention is to further reduce the production costs of devices, particularly those comprising elements belonging to groups III and V of the periodic table of elements.

[0013] To this end, the invention relates to a method for making a device comprising at least two thin layers and intended to be implemented in particular in the fields of optoelectronics and photovoltaics, said method comprising the following steps:- (i) supplying a Silicon (Si) wafer,- (ii) loading said silicon (c-Si) wafer into a first reactor to produce a thin layer of germanium (Ge) by plasma-enhanced chemical vapor deposition (PECVD), optionally with a silicon (Si) gradient in the first nanometers, so as to obtain an intermediate device.The process according to the invention is remarkable in that it includes the following step, after step (ii): (iii) loading said intermediate device into a second reactor, then deposition and growth by epitaxy of a thin layer of gallium arsenide (GaAs) by low temperature and reduced pressure chemical vapor deposition (Remote Plasma Chemical Vapor Deposition or RP-CVD).

[0014] The process thus makes it possible to produce a device which includes a layer of gallium arsenide (GaAs) on the surface, the device being able to be used to perform gallium arsenide epitaxy by acting as a virtual substrate in place of commercial bulk gallium arsenide (GaAs) substrates which are much more expensive to produce and also sold at a higher price.

[0015] The process reduces manufacturing costs, primarily because the materials used are less expensive (silicon wafers (c-Si) are readily available and reasonably priced), and the thin layers of elements made from germanium (Ge) and gallium arsenide require minimal material. The thin germanium layer facilitates the deposition of gallium arsenide because the two elements have nearly identical lattice parameters.

[0016] Furthermore, the production of the thin layer of gallium arsenide (GaAs) is done by RP-CVD which requires less energy to be implemented than if it were carried out by a conventional CVD process, because it requires a lower growth temperature: instead of dissociating the molecules thermally, the dissociation of molecules by plasma is used at much lower temperatures.

[0017] Furthermore, since the working pressures are lower, the process reduces the consumption of (very expensive) gas for the deposition of the elements, which further contributes to a decrease in the cost of production.

[0018] Finally, working at lower temperatures improves the overall strength of the device: indeed, when the layers are produced at high temperatures, mechanical failures (also called "stress") can occur at the junctions between the layers during cooling due to differences in the coefficient of thermal expansion between the various materials constituting the stack (see, for example, the embodiment that will be described and illustrated later). Since the invention ensures operation at lower temperatures (because the steps are performed by PE-CVD and RP-CVD, instead of MOCVD), the junctions between the layers exhibit few defects, or at the very least, far fewer defects than when the multilayer device is produced by MOCVD.

[0019] Advantageously, the process according to the invention may provide that step (iii) is carried out in a chamber of said second RP-CVD reactor where the temperature of said intermediate device is progressively increased by 100 °C per minute until reaching between 400 and 600 °C (or between substantially 400 and 600 °C), preferably between 450 and 550 °C (or between substantially 450 and 550 °C), even more preferably 500 °C.Preferably, step (iii) is carried out under the following conditions: - the pressure of the chamber of said second reactor is between approximately 0.3 and 2 mbar, preferably approximately 0.5 mbar, or 0.5 mbar, - the power of the plasma is approximately 150 W, or 150 W, - a gallium precursor flux of a first group comprising preferably a flux between approximately 0.1 and 10 sccm (or between 0.1 and 10 sccm), preferably approximately 0.5 sccm (or preferably 0.5 sccm) of trimethylgallium TMGa for a flux of approximately 20 and 60 sccm (or between 20 and 60 sccm) preferably approximately 30 sccm of dihydrogen H2 (or preferably 30 sccm of dihydrogen H. 2),- un flux de précurseur d’arsenic d’un second groupe comprenant de préférence une quantité comprise entre sensiblement 100 et 600 sccm (ou entre 100 et 600 sccm), de préférence sensiblement de 300 sccm de trihydrure d’arsenic AsH3à 3% (ou de préférence de 300 sccm de trihydrure d’arsenic AsH3à 3%).

[0020] According to an advantageous embodiment which will be described later, after step (ii) and before step (iii), a hydrogen plasma treatment step is provided, the treatment being applied to the intermediate device, in order to eliminate potential organic surface contaminations.

[0021] Advantageously, said plasma treatment is carried out under the following conditions: - 150 sccm of total hydrogen, - application of a pressure of 0.3 mbar and - application of a plasma with a power of 100 W for 5 minutes.

[0022] Following yet another advantageous implementation, the deposition temperature of step (ii) is less than 400°C, preferably substantially equal to 200°C.

[0023] In addition, after step (i) and before step (ii), the silicon (c-Si) wafer can be soaked in a bath of hydrofluoric acid diluted to 5% with deionized water, preferably for approximately 30 seconds.

[0024] Finally, in the context of an embodiment of a device intended for application as a tandem cell in a photovoltaic installation, the following additional steps are carried out on the device produced: - On a substrate of n-doped crystalline silicon, a first layer of p-doped c-Si crystalline silicon (homoepitaxy) is deposited by PECVD epitaxy: in other words, a layer of crystalline silicon with doping opposite to that of the silicon wafer is deposited by plasma.

[0025] Next, a layer of n(p)-doped c-Ge crystalline germanium is deposited using PECVD. This heteroepitaxy (silicon and germanium materials have different properties, particularly their lattice parameters) can induce defects at the interface, but it promotes charge recombination in this region. This recombination is sought in a recombinant tunnel junction to ensure good tandem cell performance.

[0026] According to the method, a layer of GaAs is then deposited by RPCVD, which constitutes the absorber of the front cell in the tandem device (this layer may be lightly doped p or n). Then, a final layer of gallium arsenide (GaAs) or other wide-bandgap doped III-V material is deposited over the entire assembly to complete the front cell of said tandem device. The invention also relates to a device obtained by the method as defined above, said device constituting a virtual substrate of gallium arsenide (GaAs) intended for the fields of optoelectronics and photovoltaics, for the growth of gallium arsenide (GaAs) by epitaxial growth.

[0027] According to a preferred embodiment of the invention, the device comprises: - a silicon (c-Si) wafer having a thickness of approximately 100 to 500 µm, preferably between 150 and 400 µm, preferably between 200 and 300 µm, and preferably 200 µm; - a thin layer of germanium (Ge), optionally with a silicon (Si) gradient in the first few nanometers, said thin layer having a thickness of approximately 10 to 200 nm (or between 10 and 200 nm), preferably between 10 and 40 nm (or between 10 and 40 nm), preferably 40 nm; and - a layer of gallium arsenide (GaAs) having a thickness of approximately 0.1 µm to 10 µm, preferably between 0.5 µm. and 6 µm, preferably 1 µm.

[0028] According to yet another advantageous embodiment, the wafer constituting said virtual substrate of gallium arsenide is a disk having a diameter greater than 100 mm, preferably greater than or equal to 300 mm.

[0029] The invention finally relates to a device obtained by the process according to the invention, according to which a doping of the silicon wafer (c-Si) of step (i) is carried out, and a doping of the thin layer of germanium (Ge) with optionally a silicon gradient (Si) of step (ii), said device constituting a tandem cell intended for the field of photovoltaics for the production of solar panels.

[0030] More specifically, the tandem cell assembly comprises: - a silicon wafer doped with a certain polarity, - a layer of crystalline silicon doped with the opposite polarity to that of the doped silicon wafer, - a doped germanium layer, separated from the doped silicon layer by a recombinant interface, the two layers together forming the recombinant tunnel junction which connects in series the front GaAs cell with the rear c-Si cell, - a layer of gallium arsenide GaAs doped p or n (weakly doped, on the order of 10 16 cm -3 )- and a layer of doped AsGa arsenide, forming the upper contact of the upper cell of said device. Brief description of the figures

[0031] The invention will be better understood upon reading the following description, given solely by way of non-limiting example and made with reference to the accompanying drawings in which:

[0032] : this is a device conforming to a first embodiment of the invention, represented schematically and in cross-section,

[0033] This is another device conforming to a second embodiment of the invention, shown schematically and in cross-section.

[0034] This is a schematic representation of an RP-CVD reactor implemented for the epitaxial growth of gallium arsenide (GaAs) according to a step of the process according to the invention, and

[0035] : laest a diagram illustrating a comparison of the photoluminescence spectrum of the gallium arsenide (GaAs) layer in a device according to the invention and in a device usually offered commercially.

[0036] It is understood that the embodiments described below are by no means exhaustive. In particular, variants of the invention may be conceived comprising only a selection of the features described below, isolated from the other features described, if this selection of features is sufficient to confer a technical advantage or to differentiate the invention from the prior art. This selection includes at least one preferably functional feature without structural details, or with only a portion of the structural details if this portion alone is sufficient to confer a technical advantage or to differentiate the invention from the prior art.

[0037] In particular, all the variants and embodiments described can be combined with each other if there are no technical obstacles to this combination.

[0038] In the figures and in the rest of the description, elements common to several figures retain the same reference. Detailed description

[0039] The diagram schematically illustrates a device obtained by the process according to the invention, and which constitutes as a whole a virtual substrate of gallium arsenide (GaAs) 1 intended to replace the thick GaAs or c-Ge substrates in the field of optoelectronics and photovoltaics, for the growth by epitaxy of gallium arsenide (GaAs) or other III-V material.

[0040] Device 1 (or virtual substrate 1) comprises: - a silicon wafer 2 (c-Si) with a thickness of approximately 100 to 500 µm, preferably between 150 and 250 µm, (200 µm thick in this example of embodiment), - a thin layer 3 of germanium (Ge) with, in this example, a silicon (Si) gradient in the first nanometers, said thin layer 3 having a thickness of between 10 nm and 1 µm, preferably between 10 nm and 40 nm, and - a layer 4 of gallium arsenide (GaAs) having a thickness of approximately 0.1µm and 10 µm, preferably 1 µm.

[0041] It should be understood that the invention is not limited to the presence of a silicon gradient.

[0042] The term "silicon wafer" refers to a slice, wafer, plate, or plate of silicon (Si). Silicon (Si) wafers can be of various sizes and are generally in the form of discs with diameters ranging from approximately 100 mm to 300 mm, or as square blocks with sides measuring approximately 20 mm to 500 mm. The total thickness of the wafer is generally between approximately 0.1 mm and 1 mm, typically around 0.3 mm.

[0043] In the example shown in the figure below, wafers can be obtained with the desired type and level of doping.

[0044] The invention makes it possible to create GaAs substrates with larger diameters: the virtual substrate obtained by the invention can have a diameter greater than 250 mm; preferably, the diameter is even greater than or equal to 300 mm. The diameter of the virtual substrate is equal to that of the c-Si substrate which serves as the basis for epitaxial deposition.

[0045] This virtual substrate obtained by the process which will be described later constitutes a substrate of equivalent quality to a commercial gallium arsenide (GaAs) substrate, ready for growth by gallium arsenide (GaAs) epitaxy or any other III-V material.

[0046] Laillustrate a second device obtained by the process according to the invention which will be described later: the device is a tandem cell 5 intended for the field of photovoltaics for the production of solar panels.

[0047] The tandem cell comprises the following layers:

[0048] A silicon wafer 2 doped n(p) – illustrates n(p) doping but the reverse would be in accordance with the invention) on which a layer of crystalline silicon doped p(n) (or, respectively n(p)) is deposited by PECVD if the first layer constituted by the doped silicon wafer is doped p(n)).

[0049] It will be understood that "n(p)" means that the wafer that we buy is of type n or type p (n for "negative" and p for "positive").

[0050] A layer of n(p)-doped crystalline germanium 3 (Ge) is deposited over the whole.

[0051] The crystalline germanium layer 3 may possibly include a silicon (Si) gradient in the first few nanometers,

[0052] The assembly consisting of the p(n)-doped crystalline silicon layer on the, and the n(p)-doped germanium layer, constitutes a recombinant tunnel junction, recombination being favored by potential defects at the interface between the two layers, symbolized by a dotted line, the usefulness of which will be explained later.

[0053] Above the doped germanium-3 layer is a gallium arsenide (GaAs) layer obtained by epitaxy in the RP-CVD reactor. This layer constitutes the absorber of the front cell of the tandem device. Its p or n doping is on the order of 10 16 cm -3 .

[0054] Finally, a final layer of p(n)-doped gallium 4 arsenide or other III-V material with a larger gap (AlGaAs or GaInP) than AsGa covers the gallium 4 arsenide layer, to form a second recombinant junction whose usefulness will be explained later.

[0055] Each of the layers forming the junction of the tandem cell thus obtained is doped with a doping level of approximately 5x 10 19 and 10 21 cm -3 Preferably, the doping level of each layer is p on the order of 10 20 cm -3 .

[0056] As mentioned previously, the recombinant junction between the p(n)-doped crystalline silicon 2 layers and the ultrathin n(p)-doped germanium (Ge) 3 layer ensures an essential function for the proper functioning of the tandem cell: the defects at the interface between the doped crystalline silicon and doped germanium layers promote the recombination of electrons coming from the upper layer with the holes in the lower layer, which makes it possible to cancel the charges.

[0057] In other words, the defects that may exist between the germanium (Ge) layer and the silicon (Si) layer are an advantage here because they promote the recombination of charges and prevent their accumulation at the interface (the accumulation of charges leading to a malfunction of the cell).

[0058] The resulting tandem cell functions as follows: the gallium arsenide (GaAs) layer (the front cell absorber), which has a wider band gap than silicon, absorbs and generates energy from high-energy photons in the solar spectrum. Photons not absorbed by the gallium arsenide are absorbed by the silicon (in the bottom cell), thus combining a wider band gap cell (GaAs) with a narrower band gap cell (Si) to convert more energy from the solar spectrum.

[0059] In the embodiment shown, positive and negative charges are thus generated, allowing for layers with electrons (n-shell) and layers with holes (p-shell).

[0060] Reference will now be made to the process of the invention enabling the realization of device 1 or 5.

[0061] First, a silicon (c-Si)2 wafer is provided: this is a commercially available silicon (c-Si) wafer.

[0062] Once the silicon (c-Si) wafer is obtained, it is immersed in a bath of hydrofluoric acid diluted to 5% with deionized water, preferably for approximately 30 seconds. This operation removes the native oxide.

[0063] Then, the silicon (c-Si) wafer is loaded into a first reactor to create a thin layer of germanium (Ge) by plasma-enhanced chemical vapor deposition (PECVD), possibly with a silicon (Si) gradient in the first nanometers, in order to obtain an intermediate device.

[0064] The process begins with the deposition of a first Si-Ge gradient layer, followed by a Ge layer, all using the PECVD process: the deposition temperature is approximately 200°C. The deposition of very thin single-crystal silicon (Si) layers (or ultrathin layers) by PECVD has already been described, for example in Roca i Cabarrocas et al. 2012 (Pere Roca i Cabarrocas, Romain Cariou, Martin Labrune. Low temperature plasma deposition of silicon thin films: From amorphous to crystalline. Journal of Non-Crystalline Solids, Elsevier, 2012, 358 (17), pp.2000-2003. <10.1016 / j.jnoncrysol.2011.12.113>).<hal00806450>).

[0065] This results in an intermediate device comprising a thin layer of germanium (Ge) on a silicon (c-Si) wafer with, between the two, a gradient layer of Ge-Si.

[0066] In accordance with the process according to the invention, a third step is implemented to create a layer of gallium arsenide (GaAs) on the treated intermediate device thus obtained: the intermediate device is loaded into a second reactor, shown in.

[0067] This schematically illustrates an RP-CVD reactor.

[0068] It includes: an RF 6 (Radio Frequency) power generator, connected to a BA 7 tuning box device, itself connected to an ICP 8 (inductive coupling) coil located at the top of the reactor.

[0069] Below coil 8, there is an alumina window 9.

[0070] Below window 9 is a chamber 10 in which a plasma containing dihydrogen H2 and arsenic trihydride AsH3 or arsine is generated. Reference 11 corresponds to the point of gas injection on the.

[0071] Under chamber 10 containing the plasma, a "shower head" type device 12 is provided, allowing the introduction of pressurized gases at predefined temperatures: the introduced gases include trimethylgallium (which can also be called TMGa in the literature) or any other Ga precursor gas and dihydrogen.

[0072] The shower head type device 12 allows the introduction of the gallium precursor Ga into a second chamber 13 in which deposition occurs on a substrate 14, positioned on a graphite susceptor 15.

[0073] Substrate 14 is, in the context of this application, a four-inch substrate.

[0074] The temperature of the substrate and of the growth zone by epitaxy of a compound on the substrate 14 is monitored by a pyrometer 16.

[0075] Under the graphite susceptor 15, there is a quartz bell 17 covering a device 18 equipped with an inductive heating coil allowing the substrate to be heated to the desired temperature.

[0076] Finally, a pumping device 19 is planned to create a vacuum in chambers 10 and 13.

[0077] A hydrogen plasma treatment is applied to the intermediate device in order to eliminate potential organic surface contamination.

[0078] Plasma treatment is carried out under the following conditions: - 150 sccm of total hydrogen, - application of a plasma with a power of 100 W, and - application of a pressure of 0.3 mbar for 5 minutes.

[0079]

[0080] The epitaxial deposition of a thin layer of gallium arsenide (GaAs) is carried out in this second reactor by low temperature and reduced pressure chemical vapor deposition (Remote Plasma Chemical Vapor Deposition or RP-CVD).

[0081] It is thus carried out in chamber 13 where the temperature of the intermediate device is controlled by the pyrometer 16 and by the heating coil 18: it is gradually increased by 100 °C per minute until reaching 500 °C.

[0082] Furthermore, the other parameters applied for this deposition and for the gallium arsenide (GaAs) epitaxy are as follows: - the pressure of chamber 13 of said second reactor is between 0.3 mbar and 2 mbar, preferably approximately 0.5 mbar, - the plasma power in chamber 10 is approximately 150 W, - a precursor flux of a first group is planned, comprising a flux of 0.5 sccm of trimethylgallium (TMGa) for a flux of 30 sccm of dihydrogen (H₂). 2, -on prévoit un flux de précurseur d’un second groupe comprenant une quantité de 300 sccm de trihydrure d’arsine AsH3diluée à 3% dans du dihydrogène.

[0083] This allows us to create a virtual substrate of gallium arsenide (GaAs) at a lower cost, which can replace real substrates of gallium arsenide (GaAs) for the epitaxy of the latter.

[0084] This allows us to compare the performance of the two substrates, real 20 and virtual 1: we observe that the two curves almost overlap, which implies that the two substrates exhibit essentially the same performance in terms of emitted photon energy relative to the normalized PL intensity. The PL spectrum of virtual substrate 1 is narrower (characteristic of better crystalline quality) than that of the commercial substrate 20.

[0085] According to the invention, the method for producing such a substrate can also be modified to allow obtaining a tandem cell such as that schematically illustrated in.

[0086] The manufacturing process for the tandem cell is as follows:

[0087] The first step involves depositing, using plasma, a layer of doped crystalline silicon with the opposite polarity to that of the commercially available doped crystalline silicon substrate. If the doped crystalline silicon substrate is n-type, then a layer of p-type doped crystalline silicon is deposited. This process is homoepitaxy.

[0088] Then, a layer of crystalline germanium is deposited by plasma, which has a lattice parameter different from that of crystalline silicon: we then move from homoepitaxy to heteroepitaxy.

[0089] In this heteroepitaxy process, the difference in lattice parameters is represented by the dashed lines on the diagram shown previously, characterizing the appearance of defects. The entire epitaxial layer of silicon and the germanium layer constitute the recombinant tunnel junction: the dashed lines represent defects located at the interface between the two layers of doped silicon 2 and doped germanium 3.

[0090] As mentioned previously, the defects promote the recombination of the carriers for the proper functioning of the tandem cell when it will be used.

[0091] In another embodiment, the epitaxially grown silicon layer can be replaced by an epitaxially grown crystalline germanium layer using the same method.

[0092] After deposition of the n (or p) layer in doped germanium 3, the gallium arsenide layer (doped or undoped) is deposited, then the cell is finalized by depositing a layer of n or p doped gallium 5 arsenide AsGa: a second junction is thus created in the upper part of the cell.

[0093] The final layer can also be an alternative alloy of the GaAlAs or GaInP type (also known as the "window layer" in the jargon of the Man Skilled), without going out of the scope of the invention.

[0094] To dopectic doping of epitaxial silicon and germanium, a plasma reactor is used with, for example, silane (SiH4) mixed with phosphine (PH3) to obtain n-type doping. To obtain p-type doping, boron (B) is used, for example. Similarly, p-type doping of GaAs can be achieved by adding carbon during the growth of the GaAs layer, while n-type doping can be achieved by adding silicon.

[0095] These doping operations are known to those skilled in the art and will not be described in further detail in order to simplify the understanding of this description.

[0096] The recombinant tunnel junction thus created ensures current continuity and prevents charge accumulation because each electron generated in one half-cell must recombine with a positive charge (hole) in the second half-cell of the tandem device. This recombination is facilitated by the presence of defects at the interface.

[0097] Thanks to the deposition and epitaxy of gallium arsenide (GaAs) in an RP-CVD reactor such as that described in the, under the conditions of implementation of the process which are presented above, combined with the realization of an inexpensive intermediate device because obtained by PECVD, it is understood how the invention makes it possible to realize a virtual substrate for the epitaxy of gallium arsenide (GaAs) at a lower cost, because the process is carried out overall at low temperature (i.e. at temperatures between 100 and 500 °C, against temperatures which can exceed 700 °C in the usual processes of epitaxy of gallium arsenide (GaAs)) and at lower pressures.

[0098] We also understand how this substrate can undergo simple additional process steps, to allow it to be used as a tandem cell in a dedicated photovoltaic application.

[0099] Of course, the invention is not limited to the examples just described and extends to the implementation of means equivalent to those illustrated in particular in.

Claims

Method of making a device (1, 5) comprising at least two thin layers and intended to be implemented in particular in the fields of optoelectronics and photovoltaics, said method comprising the following steps:- (i) supplying a silicon (Si) wafer (2),- (ii) loading said silicon (c-Si) wafer (2) into a first reactor to produce a thin layer of germanium (Ge) (3), by plasma-assisted chemical vapor deposition PECVD, optionally with a silicon (Si) gradient in the first nanometers, so as to obtain an intermediate device, characterized in that it comprises the following step, after step (ii):- (iii) loading said intermediate device into a second reactor, A. Method according to claim 1, characterized in that, step (iii) is carried out in a chamber (13) of said second RP-CVD reactor where the temperature of said intermediate device is progressively increased by 100 °C per minute until reaching between 400 and 600 °C, preferably between 450 and 550 °C, even more preferably 500 °C. A method according to claim 2, characterized in that step (iii) is carried out under the following conditions: - the pressure of the chamber (13) of said second reactor is between approximately 0.3 and 2 mbar, preferably approximately 0.5 mbar, or 0.5 mbar, - the plasma power is approximately 150 W, or 150 W, - a gallium precursor flux from a first group preferably comprising a flux between approximately 0.1 and 10 cm 3 / min (sccm in English), preferably approximately 0.5 cm 3 / min of trimethylgallium TMGa for a flux of approximately 20 and 60 cm 3 / min, preferably approximately 30 s cm 3 / min of dihydrogen H2 , -un flux de précurseur d’arsenic d’un second groupe comprenant de préférence une quantité comprise entre sensiblement 100 et 600 cm3 / min, de préférence sensiblement de 300 cm3 / min de trihydrure d’arsenic AsH3à 3%. A method according to any one of the preceding claims, characterized in that, after step (ii) and before step (iii), a hydrogen plasma treatment is applied to the intermediate device in order to eliminate potential organic surface contamination. A method according to claim 4, characterized in that said plasma treatment is carried out under the following conditions: - 150 cm 3 / min of total hydrogen,- application of a plasma with a power of 100 W, and- application of a pressure of 0.3 mbar for 5 minutes. A process according to any one of the preceding claims, characterized in that the deposition temperature of step (ii) is less than 400°C, preferably equal to 200°C. A method according to any one of the preceding claims, characterized in that, after step (i) and before step (ii), the silicon (c-Si) wafer is dipped in a bath of hydrofluoric acid diluted to 5% with deionized water, preferably for approximately 30 seconds. A method according to any one of the preceding claims, characterized in that said silicon wafer (Si) (2) of step (i) is a silicon wafer doped with a certain polarity, in that a layer of crystalline silicon doped with polarity opposite to that of the doped silicon wafer is deposited by plasma, in that in step (ii) the deposition of the thin layer of germanium according to step (ii) promotes recombination of charge carriers between the two subcells in that in step (iii) a final layer of doped gallium arsenide AsGa is deposited. A device produced according to the method of any one of claims 1 to 7, said device constituting a virtual substrate (1) of gallium arsenide (GaAs) intended for the field of optoelectronics and photovoltaics, for the epitaxial growth of gallium arsenide (GaAs), characterized in that it comprises: - a silicon (c-Si) wafer (2) having a silicon (Si) layer with a thickness of between approximately 150 and 500 µm, preferably between 150 and 400 µm, preferably further between 200 and 300 µm, and preferably 200 µm, - a thin layer of germanium (Ge) (3), optionally with a silicon (Si) gradient in the first few nanometers, said thin layer having a thickness of between approximately 10 and 200 nm, preferably 40 nm, and - a gallium arsenide layer (AsGa) (4) having a thickness of between approximately 0.1 µm and 10 µm, preferably still between 0.5 µm and 6 µm, preferably 1 µm. Device according to claim 9, characterized in that the wafer constituting said virtual substrate (1) of gallium arsenide (GaAs) is a disk having a diameter greater than 250 mm, preferably greater than or equal to 300 mm. Device made according to the method according to claim 8, said device constituting a tandem cell (5) intended for the field of photovoltaics for the production of solar panels, said tandem cell comprising: - a silicon (Si) wafer (2) doped with a certain polarity, - a layer of crystalline silicon doped with polarity opposite to that of the doped silicon wafer, - a layer of doped germanium, separated from the layer of doped silicon by a recombinant interface, the whole of the two layers constituting the recombinant tunnel junction which connects in series the front cell in gallium arsenide (GaAs) with the rear cell in crystalline silicon (c-Si) - a layer of gallium arsenide (GaAs) doped p or n, - and a layer of doped (GaAs) arsenide, forming the upper contact of the upper cell of said device.

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