Method for manufacturing light-emitting element and light-emitting element

Abstract

This method for manufacturing a light-emitting element comprises: a preparation step; an insulating layer formation step; a metal layer formation step; and a singulation step. In the preparation step, a wafer, in which a conductive layer is disposed beneath a semiconductor layer, is prepared. In the insulating layer formation step, an insulating layer is formed beneath a part of the conductive layer. In the metal layer formation step, a metal layer is formed, which covers the lower surface of the conductive layer and the lower surface of the insulating layer, and which has a groove recessed upward at a position overlapping the insulating layer in plan view. In the singulation step, after the metal layer formation step, the wafer is singulated at the position overlapping the insulating layer in plan view. The present invention thereby provides a light-emitting element manufacturing method and a light-emitting element which are capable of improving heat dissipation.

Description

Method for manufacturing a light-emitting device and a light-emitting device

[0001] Embodiments relate to a method for manufacturing a light-emitting device and a light-emitting device.

[0002] Patent Document 1 discloses that when manufacturing a light-emitting device, a metal layer is formed on a semiconductor laminate.

[0003] Japanese Patent Application Laid-Open No. 2016-009749

[0004] An object of the embodiments is to provide a method for manufacturing a light-emitting device and a light-emitting device that can improve heat dissipation.

[0005] A method for manufacturing a light-emitting device according to an embodiment of the present invention includes a preparation step, an insulating layer formation step, a metal layer formation step, and a dicing step. In the preparation step, a wafer in which a conductive layer is disposed under a semiconductor layer is prepared. In the insulating layer formation step, an insulating layer is formed under a part of the conductive layer. In the metal layer formation step, a metal layer that covers the lower surface of the conductive layer and the lower surface of the insulating layer and has a groove that depresses upward at a position overlapping the insulating layer in a plan view is formed. In the dicing step, after the metal layer formation step, the wafer is diced at a position overlapping the insulating layer in a plan view.

[0006] According to an embodiment of the present invention, it is possible to provide a method for manufacturing a light-emitting device and a light-emitting device that can improve heat dissipation.

[0007] This is a plan view showing a light-emitting element according to the first embodiment. This is a cross-sectional view showing a light-emitting element according to the first embodiment. This is a cross-sectional view showing the preparation steps for the manufacturing method of the light-emitting element according to the first embodiment. This is a cross-sectional view showing the preparation steps for the manufacturing method of the light-emitting element according to the first embodiment. This is a cross-sectional view showing the preparation steps for the manufacturing method of the light-emitting element according to the first embodiment. This is a cross-sectional view showing the insulating layer formation step of the manufacturing method of the light-emitting element according to the first embodiment. This is a cross-sectional view showing the metal layer formation step of the manufacturing method of the light-emitting element according to the first embodiment. This is a plan view showing the metal layer formation step of the manufacturing method of the light-emitting element according to the first embodiment. This is a cross-sectional view showing the metal film formation step of the manufacturing method of the light-emitting element according to the first embodiment. This is a cross-sectional view showing the second substrate bonding step of the manufacturing method of the light-emitting element according to the first embodiment. This is a cross-sectional view showing the first substrate removal step of the manufacturing method of the light-emitting element according to the first embodiment. This is a cross-sectional view showing the polishing step of the manufacturing method of the light-emitting element according to the first embodiment. This is a cross-sectional view showing the roughening step of the manufacturing method of the light-emitting element according to the first embodiment. This is a cross-sectional view showing the splitting step of the manufacturing method of the light-emitting element according to the first embodiment. This is a cross-sectional view showing the protective film formation step of the manufacturing method of the light-emitting element according to the first embodiment. This is a cross-sectional view showing the pad electrode formation step of the manufacturing method of the light-emitting element according to the first embodiment. This is a cross-sectional view showing the second substrate removal step of the manufacturing method of the light-emitting element according to the first embodiment. This is a plan view showing the splitting step of the manufacturing method of the light-emitting element according to the first embodiment. This is a cross-sectional view showing the framing process of the method for manufacturing a light-emitting element according to the first embodiment. This is a plan view showing an example of the width of the insulating layer in the method for manufacturing a light-emitting element according to the first embodiment. This is a plan view showing an example a light-emitting element according to the second embodiment. This is a cross-sectional view showing a light-emitting element according to the second embodiment. This is a cross-sectional view showing a preparation process for the method for manufacturing a light-emitting element according to the second embodiment. This is a cross-sectional view showing a preparation process for the method for manufacturing a light-emitting element according to the second embodiment.This is a cross-sectional view showing the preparation step for the manufacturing method of a light-emitting element according to the second embodiment. This is a cross-sectional view showing the preparation step for the manufacturing method of a light-emitting element according to the second embodiment. This is a cross-sectional view showing the insulating layer formation step for the manufacturing method of a light-emitting element according to the second embodiment. This is a cross-sectional view showing the metal layer formation step for the manufacturing method of a light-emitting element according to the second embodiment. This is a plan view showing the metal layer formation step for the manufacturing method of a light-emitting element according to the second embodiment. This is a cross-sectional view showing the metal film formation step for the manufacturing method of a light-emitting element according to the second embodiment. This is a cross-sectional view showing the second substrate bonding step for the manufacturing method of a light-emitting element according to the second embodiment. This is a cross-sectional view showing the first substrate removal step for the manufacturing method of a light-emitting element according to the second embodiment. This is a cross-sectional view showing the removal step for the manufacturing method of a light-emitting element according to the second embodiment. This is a cross-sectional view showing the roughening step for the manufacturing method of a light-emitting element according to the second embodiment. This is a cross-sectional view showing the protective film formation step for the manufacturing method of a light-emitting element according to the second embodiment. This is a cross-sectional view showing the pad electrode formation step for the manufacturing method of a light-emitting element according to the second embodiment. This is a cross-sectional view showing the second substrate removal step for the manufacturing method of a light-emitting element according to the second embodiment. This is a plan view showing the individualization step for the manufacturing method of a light-emitting element according to the second embodiment. This is a cross-sectional view showing the individualization step for the manufacturing method of a light-emitting element according to the third embodiment.

[0008] The embodiments of the present invention will be described below with reference to the drawings. The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the ratio of the sizes of the parts, etc., are not necessarily the same as those of reality. Even when representing the same part, the dimensions and ratios may be represented differently in the drawings. In this specification and each drawing, elements similar to those already described are denoted by the same reference numerals, and detailed explanations are omitted as appropriate.

[0009] Furthermore, in order to make the explanation easier to understand, the arrangement and configuration of each part will be described using the XYZ Cartesian coordinate system. The X, Y, and Z axes are mutually orthogonal. The direction in which the X axis extends will be referred to as the "X direction," the direction in which the Y axis extends as the "Y direction," and the direction in which the Z axis extends as the "Z direction." Also, in order to make the explanation easier to understand, the direction of the arrow in the Z direction will be considered upward, and the opposite direction will be considered downward, but these directions are unrelated to the direction of gravity. Viewing along the Z direction will be referred to as a "plan view." The length in the Z direction will be referred to as the "thickness." Furthermore, in the first and second embodiments, the first direction will be the X direction and the second direction will be the Y direction.

[0010] (First Embodiment) Figure 1 is a plan view showing a light-emitting element according to the first embodiment. Figure 2 is a cross-sectional view showing a light-emitting element according to the first embodiment. Figure 2 shows a cross-section along line II-II shown in Figure 1. As shown in Figures 1 and 2, the light-emitting element 100 according to the first embodiment comprises a metal layer 50, a conductive layer 30, a semiconductor layer 20, a pad electrode 80, and an insulating portion 45. As shown in Figure 1, the shape of the light-emitting element 100 in plan view is rectangular. When the shape of the light-emitting element 100 in plan view is rectangular, the length of one side of the rectangle is, for example, 50 μm or more and 2000 μm or less.

[0011] The metal layer 50 includes a first metal region 51 and a second metal region 52. The first metal region 51 covers the lower surface of the conductive layer 30. The second metal region 52 covers the lower surface of the insulating portion 45. The second metal region 52 covers, for example, the entire lower surface of the insulating portion 45. The second metal region 52 does not have to cover, for example, a part of the lower surface of the insulating portion 45. In a plan view, the second metal region 52 is located outside the first metal region 51. The first metal region 51 is a region of the metal layer 50 that does not overlap with the insulating portion 45 in the Z direction. The second metal region 52 is a region of the metal layer 50 that overlaps with the insulating portion 45 in the Z direction.

[0012] The second metal region 52 has a portion that is thinner than the first metal region 51. In the light-emitting element 100, the thickness of the second metal region 52 decreases as it moves outward from the side of the first metal region 51. The thickness T2 of the second metal region 52 is, for example, thinner than the thickness T1 of the first metal region 51. The thickness T1 of the first metal region 51 is, for example, 30 μm or more and 500 μm or less. The thickness T1 of the first metal region 51 refers to the maximum thickness in the Z direction of the first metal region 51 that overlaps with the p-side semiconductor layer 20a in a plan view. The thickness T2 of the second metal region 52 is, for example, 10 μm or more and 100 μm or less. The thickness T2 of the second metal region 52 refers to the minimum thickness in the Z direction of the second metal region 52.

[0013] The conductive layer 30 is located on top of the metal layer 50. The conductive layer 30 electrically connects the semiconductor layer 20 and the pad electrode 80. The conductive layer 30 includes a first conductive layer 31, a second conductive layer 32, and a third conductive layer 33. The second conductive layer 32 is located on top of the metal layer 50. The second conductive layer 32 is in contact with the metal layer 50. The second conductive layer 32 is located on top of the first metal region 51 and the second metal region 52. The second conductive layer 32 is located below the semiconductor layer 20 and below the pad electrode 80 (second pad electrode 82). The third conductive layer 33 is located between the second conductive layer 32 and the pad electrode 80 (second pad electrode 82). The first conductive layer 31 is located on top of the second conductive layer 32. The first conductive layer 31 is located below the semiconductor layer 20 and below the pad electrode 80. The first conductive layer 31 is in contact with the pad electrode 80 (first pad electrode 81). A second interlayer insulating film 26 is disposed between the first conductive layer 31 and the second conductive layer 32. The thickness of the first conductive layer 31 and the thickness of the third conductive layer 33 are, for example, 100 nm to 2000 nm. The thickness of the second conductive layer 32 is, for example, 100 nm to 1000 nm. The thickness of the second interlayer insulating film 26 is, for example, 200 nm to 1500 nm.

[0014] The semiconductor layer 20 is located on top of the conductive layer 30. The semiconductor layer 20 is electrically connected to the conductive layer 30. The semiconductor layer 20 includes a p-side semiconductor layer 20a, an active layer 20b, and an n-side semiconductor layer 20c. The p-side semiconductor layer 20a is located at the bottom of the semiconductor layer 20. The active layer 20b is located on top of the p-side semiconductor layer 20a. The n-side semiconductor layer 20c is located on top of the active layer 20b. The maximum thickness of the semiconductor layer 20 is, for example, 100 nm or more and 10,000 nm or less.

[0015] In the light-emitting element 100, a portion of the semiconductor layer 20 protrudes upward from the upper surface of the pad electrode 80. For example, in the light-emitting element 100, a portion of the n-side semiconductor layer 20c is located above the upper surface of the pad electrode 80.

[0016] The semiconductor layer 20 has a plurality of openings 21. The plurality of openings 21 are arranged continuously in the p-side semiconductor layer 20a, the active layer 20b, and the n-side semiconductor layer 20c. The plurality of openings 21 are holes that penetrate the p-side semiconductor layer 20a and the active layer 20b in the Z direction and reach the n-side semiconductor layer 20c. The plurality of openings 21 do not penetrate the n-side semiconductor layer 20c.

[0017] In the light-emitting element 100, the shape of each of the multiple apertures 21 in a plan view is a perfect circle. However, the shape of each of the multiple apertures 21 in a plan view may also be an ellipse, a polygon, or the like.

[0018] The pad electrode 80 is positioned on the conductive layer 30. The pad electrode 80 is electrically connected to the conductive layer 30 outside the semiconductor layer 20 in a plan view. The pad electrode 80 includes a first pad electrode 81 and a second pad electrode 82. The first pad electrode 81 is electrically connected to the p-side semiconductor layer 20a. In a plan view, the first pad electrode 81 is positioned away from the semiconductor layer 20. In the Z direction, the first pad electrode 81 does not overlap with the semiconductor layer 20. The thickness of the first pad electrode 81 is, for example, 100 nm or more and 1000 nm or less.

[0019] The second pad electrode 82 is electrically connected to the n-side semiconductor layer 20c. In a plan view, the second pad electrode 82 is located away from the semiconductor layer 20. In the Z direction, the second pad electrode 82 does not overlap with the semiconductor layer 20. For example, in a plan view, the second pad electrode 82 is positioned opposite the first pad electrode 81. The thickness of the second pad electrode 82 is, for example, 100 nm to 1000 nm.

[0020] The first conductive layer 31 electrically connects the first pad electrode 81 and the p-side semiconductor layer 20a. In the light-emitting element 100, the first conductive layer 31 extends from below the first pad electrode 81 to below the p-side semiconductor layer 20a. In the light-emitting element 100, the first conductive layer 31 and the p-side semiconductor layer 20a are electrically connected via a conductive member 22 located between the first conductive layer 31 and the p-side semiconductor layer 20a.

[0021] The second conductive layer 32 electrically connects the second pad electrode 82 and the n-side semiconductor layer 20c. The second pad electrode 82 and the second conductive layer 32 are electrically connected via the third conductive layer 33. The third conductive layer 33 is, for example, a layer made of the same material as the first conductive layer 31. The second conductive layer 32 is located inside a plurality of openings 21. In the light-emitting element 100, the second conductive layer 32 extends from below the second pad electrode 82 to below the n-side semiconductor layer 20c. In the light-emitting element 100, the second conductive layer 32 and the n-side semiconductor layer 20c are electrically connected by contact between the second conductive layer 32 and the n-side semiconductor layer 20c.

[0022] The insulating portion 45 is positioned between a part of the metal layer 50 and a part of the conductive layer 30. The insulating portion 45 is positioned between the second metal region 52 and the second conductive layer 32. In a plan view, the insulating portion 45 is positioned near the outer edge of the light-emitting element 100. For example, in a plan view, the insulating portion 45 is positioned within 300 μm, preferably within 200 μm, from the outer edge of the light-emitting element 100. In a plan view, the insulating portion 45 is positioned to surround the semiconductor layer 20. The sides of the insulating portion 45 are exposed from the metal layer 50 and the second conductive layer 32. The thickness of the insulating portion 45 is, for example, 5 nm to 2 μm, preferably 10 nm to 100 nm. For example, in a plan view, the insulating portion 45 does not overlap with the pad electrode 80.

[0023] In the light-emitting element 100, the insulating portion 45 includes two first insulating region 45a and two second insulating region 45b. One first insulating region 45a extends in a first direction (X direction). The other first insulating region 45a extends in a first direction and is separated from the first insulating region 45a in a second direction (Y direction). One second insulating region 45b extends in a second direction. The other second insulating region 45b extends in a second direction and is separated from the first insulating region 45b in a first direction. The second direction is perpendicular to the first direction. The thickness T1 of the first metal region 51 is, for example, 1 to 4 times the width W11 of the first insulating region 45a in the second direction (Y direction). The thickness T1 of the first metal region 51 is, for example, 1 to 4 times the width W12 of the second insulating region 45b in the first direction (X direction). The width W11 is, for example, 20 μm to 150 μm. The width W12 is, for example, 20 μm to 150 μm.

[0024] The light-emitting element 100 further comprises a first interlayer insulating film 25. The first interlayer insulating film 25 is disposed between the semiconductor layer 20 and the first conductive layer 31, and between the semiconductor layer 20 and the second conductive layer 32. A portion of the first interlayer insulating film 25 is disposed between the semiconductor layer 20 and the second conductive layer 32 inside a plurality of openings 21. The thickness of the first interlayer insulating film 25 is, for example, 200 nm or more and 1500 nm or less.

[0025] The light-emitting element 100 further comprises a coating film 23. The coating film 23 is disposed between the semiconductor layer 20 and the first interlayer insulating film 25, and between the conductive member 22 and the first interlayer insulating film 25. The thickness of the coating film 23 is, for example, 100 nm or more and 1000 nm or less.

[0026] The light-emitting element 100 further comprises a protective film 70. The protective film 70 is disposed on the semiconductor layer 20. The protective film 70 is in contact with the semiconductor layer 20. The protective film 70 protects the semiconductor layer 20. A portion of the protective film 70 is disposed on the first interlayer insulating film 25. A portion of the protective film 70 is in contact with the first interlayer insulating film 25. The thickness of the protective film 70 is, for example, 200 nm or more and 1500 nm or less.

[0027] The light-emitting element 100 further comprises a metal film 55. The metal film 55 is located beneath the metal layer 50. The metal film 55 is located beneath the first metal region 51 and the second metal region 52. The thickness of the metal film 55 is, for example, 50 nm to 2000 nm. The presence of the metal film 55 improves mountability, for example, when mounting the metal layer 50 side of the light-emitting element 100 onto a mounting substrate.

[0028] A support member 90 is positioned beneath the light-emitting element 100. The support member 90 is positioned beneath the metal film 55. The support member 90 is in contact with the bottom of the light-emitting element 100. The support member 90 is, for example, a sheet that supports the light-emitting element 100.

[0029] The materials used for each part are described below.

[0030] The p-side semiconductor layer 20a, the active layer 20b, and the n-side semiconductor layer 20c are each made of, for example, a nitride semiconductor. In this specification, "nitride semiconductor" means, for example, In ｘ Al ｙ Ga １－ｘ－ｙThis term includes semiconductors of all compositions obtained by varying the composition ratios x and y within the respective ranges in the chemical formula N (0 ≤ x ≤ 1, 0 ≤ y ≤ 1, x + y ≤ 1). Furthermore, "nitride semiconductors" also include those that further contain group V elements other than N (nitrogen) in the above chemical formula, and those that further contain various elements added to control various physical properties such as conductivity.

[0031] The n-side semiconductor layer 20c contains, for example, Si (silicon) as an n-type impurity. The p-side semiconductor layer 20a contains, for example, Mg (magnesium) as a p-type impurity. The active layer 20b is a light-emitting layer and has, for example, an MQW (multiple quantum well) structure including a plurality of barrier layers and a plurality of well layers.

[0032] The conductive member 22 includes, for example, Ag (silver), ITO (indium tin oxide), and the like.

[0033] The coating film 23, the first interlayer insulating film 25, and the second interlayer insulating film 26 are made of, for example, an insulating material. As the insulating material, at least one of silicon oxide and silicon nitride can be used.

[0034] The first conductive layer 31 is made of, for example, a metallic material. As the metallic material, at least one of the following can be used: metals such as Ni (nickel), Pt (platinum), Pd (palladium), Rh (rhodium), Cu (copper), Ag (silver), Al (aluminum), Au (gold), and alloys containing these metals.

[0035] The second conductive layer 32 is made of, for example, a metallic material. As the metallic material, at least one of the following can be used: metals such as Ti (titanium), ASC (alloy containing Al, Si, and Cu), Ni (nickel), Au (gold), and alloys containing these metals.

[0036] The insulating portion 45 includes, for example, an insulating material. As the insulating material, at least one of silicon oxide, silicon nitride, and titanium oxide can be used. The insulating portion 45 only needs to have at least its surface covered with an insulating material, and may contain a conductive material such as a metal inside.

[0037] The metal layer 50 is made of a metallic material. As the metallic material, at least one of the following can be used: metals such as Cu (copper), Au, W (tungsten), and alloys containing these metals.

[0038] The metal film 55 is made of a metallic material. As the metallic material, at least one of the following can be used: metals such as Ti (titanium), W (tungsten), Pt (platinum), Au (gold), and alloys containing these metals.

[0039] The protective film 70 is made of, for example, an insulating material. As the insulating material, for example, an oxide or nitride containing at least one selected from the group consisting of Si (silicon), Ti (titanium), Zr (zirconium), Nb (niobium), Ta (tantalum), Al (aluminum), and Hf (hafnium) can be used. As the insulating material, for example, at least one of silicon oxide and silicon nitride can be used.

[0040] The first pad electrode 81 and the second pad electrode 82 are made of, for example, a metallic material. As the metallic material, at least one of the following can be used: metals such as Ti (titanium), Pt (platinum), Rh (rhodium), Au (gold), Ni (nickel), Ta (tantalum), Zr (zirconium), and alloys containing these metals. The first pad electrode 81 and the second pad electrode 82 may each be a single layer or a laminate in which multiple layers are stacked. For example, the first pad electrode 81 and the second pad electrode 82 can each be a laminate in which a Ti layer, a Pt layer, and an Au layer are stacked in that order.

[0041] For example, an ultraviolet-curing sheet can be used as the support member 90.

[0042] Thus, in the light-emitting element 100, since the metal layer 50 is disposed at the lower part, the heat dissipation property can be improved. Further, as will be described later, when the wafer 5 is singulated into the light-emitting elements 100, the wafer 5 is singulated into the light-emitting elements 100 at the second metal region 52. Therefore, even if burrs are generated in the metal layer 50 during singulation, the burrs are generated in the second metal region 52. Even when the light-emitting element 100 is mounted such that the side of the metal layer 50 of the light-emitting element 100 faces the mounting substrate, since the second metal region 52 is farther from the mounting substrate than the first metal region 51, the burrs generated in the second metal region 52 are unlikely to contact the mounting substrate. Therefore, the burrs generated in the second metal region 52 are unlikely to cause the light-emitting element 100 to be mounted in an inclined state.

[0043] Further, in the light-emitting element 100, the insulating portion 45 does not overlap the second pad electrode 82 in a plan view. Therefore, directly below the second pad electrode 82, current flows through the insulating portion 45 without being obstructed and flows into the metal layer 50, so that an increase in the forward voltage VF can be reduced.

[0044] Further, in the light-emitting element 100, since the second metal region 52 covers the entire lower surface of the insulating layer 40, the volume of the metal layer 50 can be increased to improve the heat dissipation property.

[0045] Further, in the light-emitting element 100, since the thickness T1 of the first metal region 51 is not less than 1 times and not more than 4 times the width W11 of the first insulating portion region 45a in the second direction (Y direction), the heat dissipation property can be improved by the large volume of the metal layer 50.

[0046] Hereinafter, a method for manufacturing a light-emitting element according to the first embodiment will be described. FIGS. 3 to 6 are cross-sectional views showing a preparation process of the method for manufacturing a light-emitting element according to the first embodiment. FIG. 7 is a cross-sectional view showing an insulating layer formation process of the method for manufacturing a light-emitting element according to the first embodiment. FIG. 8 is a cross-sectional view showing a metal layer formation process of the method for manufacturing a light-emitting element according to the first embodiment. FIG. 9 is a plan view showing a metal layer formation process of the method for manufacturing a light-emitting element according to the first embodiment. FIG. 10 is a cross-sectional view showing a metal film formation process of the method for manufacturing a light-emitting element according to the first embodiment. FIG. 11 is a cross-sectional view showing a second substrate bonding process of the method for manufacturing a light-emitting element according to the first embodiment. FIG. 12 is a cross-sectional view showing a first substrate removal process of the method for manufacturing a light-emitting element according to the first embodiment. FIG. 13 is a cross-sectional view showing a polishing process of the method for manufacturing a light-emitting element according to the first embodiment. FIG. 14 is a cross-sectional view showing a roughening process of the method for manufacturing a light-emitting element according to the first embodiment. FIG. 15 is a cross-sectional view showing a dicing process of the method for manufacturing a light-emitting element according to the first embodiment. FIG. 16 is a cross-sectional view showing a protective film formation process of the method for manufacturing a light-emitting element according to the first embodiment. FIG. 17 is a cross-sectional view showing a pad electrode formation process of the method for manufacturing a light-emitting element according to the first embodiment. FIG. 18 is a cross-sectional view showing a second substrate removal process of the method for manufacturing a light-emitting element according to the first embodiment. FIGS. 19 and 21 are cross-sectional views showing a singulation process of the method for manufacturing a light-emitting element according to the first embodiment. FIG. 20 is a plan view showing a singulation process of the method for manufacturing a light-emitting element according to the first embodiment. As shown in FIGS. 3 to 21, the method for manufacturing a light-emitting element according to the first embodiment includes a preparation process, an insulating layer formation process, a metal layer formation process, a metal film formation process, a second substrate bonding process, a first substrate removal process, a polishing process, a roughening process, a dicing process, a protective film formation process, a pad electrode formation process, a second substrate removal process, and a singulation process.

[0047] As shown in FIGS. 3 to 6, in the method for manufacturing a light-emitting element according to the first embodiment, first, a preparation process is performed. In the preparation process, a wafer 5 in which a conductive layer 30 is disposed under a semiconductor layer 20 is prepared.

[0048] In the preparation step, for example, a laminate is prepared in which a semiconductor layer 20 is placed beneath a first substrate 10, and then the laminate is processed. The first substrate 10 is a growth substrate for forming the semiconductor layer 20. The semiconductor layer 20 is formed on the first substrate 10 by, for example, the MOCVD (Metal Organic Vapor Deposition) method. The first substrate 10 is, for example, a sapphire substrate. The semiconductor layer 20 includes an n-side semiconductor layer 20c placed beneath the first substrate 10, an active layer 20b placed beneath the n-side semiconductor layer 20c, and a p-side semiconductor layer 20a placed beneath the active layer 20b. In this laminate, a portion of the p-side semiconductor layer 20a, the active layer 20b, and the n-side semiconductor layer 20c are removed to expose a portion of the n-side semiconductor layer 20c, a conductive member 22 is placed beneath the p-side semiconductor layer 20a, and a coating film 23 is placed beneath the conductive member 22 to cover the lower surface of the conductive member 22. This prepares a laminate as shown in Figure 3. The active layer 20b and the p-side semiconductor layer 20a are removed, for example, by reactive ion etching (RIE). The conductive members 22 are arranged, for example, by sputtering. The coating film 23 is arranged, for example, by sputtering or vapor deposition.

[0049] In the preparation step, the first interlayer insulating film 25 is then placed beneath the n-side semiconductor layer 20c and the coating film 23, as shown in Figure 4. The placement of the first interlayer insulating film 25 is carried out, for example, by sputtering.

[0050] In the preparation step, as shown in Figure 5, the first conductive layer 31 and the third conductive layer 33 are placed beneath a portion of the first interlayer insulating film 25. The placement of the first conductive layer 31 and the third conductive layer 33 is carried out, for example, by sputtering. Next, the second interlayer insulating film 26 is placed beneath the first conductive layer 31, beneath a portion of the third conductive layer 33, and beneath a portion of the first interlayer insulating film 25. The placement of the second interlayer insulating film 26 is carried out, for example, by sputtering. Next, an opening 21 is formed by removing a portion of the n-side semiconductor layer 20c, a portion of the first interlayer insulating film 25, and a portion of the second interlayer insulating film 26. The removal of a portion of the n-side semiconductor layer 20c, a portion of the first interlayer insulating film 25, and a portion of the second interlayer insulating film 26 is carried out, for example, by the RIE method.

[0051] In the preparation step, the second conductive layer 32 is then placed beneath the second interlayer insulating film 26, beneath the third conductive layer 33, and inside the opening 21, as shown in Figure 6. The placement of the second conductive layer 32 is carried out, for example, by sputtering.

[0052] Thus, in the preparation step, for example, a wafer 5 is prepared in which a semiconductor layer 20, a conductive member 22, a coating film 23, a first interlayer insulating film 25, a first conductive layer 31, a third conductive layer 33, a second interlayer insulating film 26, and a second conductive layer 32 are arranged beneath a first substrate 10.

[0053] As shown in Figure 7, in the manufacturing method of the light-emitting element according to the first embodiment, the next step is to form an insulating layer. In the insulating layer formation step, an insulating layer 40 is formed beneath a portion of the conductive layer 30. The insulating layer 40 is formed beneath a portion of the second conductive layer 32. The insulating layer 40 is formed in a position that does not overlap with the first conductive layer 31 in the Z direction. The insulating layer 40 is formed at a position that will be cut in the individualization step. The insulating layer 40 is formed, for example, by sputtering. The thickness of the insulating layer 40 is, for example, 5 nm or more and 2 μm or less, preferably 10 nm or more and 100 nm or less. The width of the insulating layer 40 will be described later.

[0054] As shown in Figures 8 and 9, in the manufacturing method of the light-emitting element according to the first embodiment, the next step is to form a metal layer. In the metal layer formation step, a metal layer 50 is formed below the conductive layer 30 and below the insulating layer 40. The metal layer 50 covers the lower surface of the conductive layer 30 and the lower surface of the insulating layer 40. The metal layer 50 covers the lower surface of the second conductive layer 32 and the lower surface of the insulating layer 40. The metal layer 50, for example, completely covers the lower surface of the insulating layer 40. The metal layer 50 does not have to cover a part of the lower surface of the insulating layer 40, for example. The metal layer 50 is formed by, for example, an electroplating method.

[0055] The metal layer 50 has a groove 53 that is recessed upward in a position where it overlaps with the insulating layer 40 in a plan view (in the Z direction). The metal layer 50 includes a first metal region 51 and a second metal region 52. The first metal region 51 covers the lower surface of the conductive layer 30. The second metal region 52 covers the lower surface of the insulating layer 40. The first metal region 51 is a region of the metal layer 50 that does not overlap with the insulating layer 40 in the Z direction. The second metal region 52 is a region of the metal layer 50 that overlaps with the insulating layer 40 in the Z direction. The groove 53 is located in the second metal region 52. In other words, the second metal region 52 has a portion that is thinner than the first metal region 51. In the examples of Figures 8 and 9, the thickness of the second metal region 52 decreases as it moves outward from the side of the first metal region 51.

[0056] As shown in Figure 10, in the manufacturing method of the light-emitting element according to the first embodiment, the next step is to form a metal film. In the metal film formation step, a metal film 55 is formed beneath the metal layer 50. The metal film 55 is formed beneath the first metal region 51 and beneath the second metal region 52. In other words, the metal film 55 is also formed inside the groove 53. The metal film 55 is formed, for example, by sputtering.

[0057] As shown in Figure 11, in the manufacturing method of the light-emitting element according to the first embodiment, the next step is to perform a second substrate bonding step. In the second substrate bonding step, a second substrate 65 is bonded beneath the metal film 55. The second substrate 65 is a support substrate. The second substrate 65 includes, for example, sapphire. The bonding of the second substrate 65 is performed, for example, by bonding the second substrate 65 beneath the metal film 55 via a resin layer 60.

[0058] As shown in Figure 12, in the manufacturing method of the light-emitting element according to the first embodiment, the next step is to perform a first substrate removal step. In the first substrate removal step, the first substrate 10 is removed. The removal of the first substrate 10 is performed, for example, by laser lift-off (LLO).

[0059] As shown in Figure 13, in the manufacturing method of the light-emitting element according to the first embodiment, the next step is a polishing step. In the polishing step, the upper surface of the semiconductor layer 20 is polished. The upper surface of the semiconductor layer 20 is the surface that was in contact with the first substrate 10. By polishing the upper surface of the semiconductor layer 20, the thickness of the semiconductor layer 20 (n-side semiconductor layer 20c) is adjusted. Polishing of the upper surface of the semiconductor layer 20 is performed, for example, by chemical mechanical polishing (CMP).

[0060] As shown in Figure 14, in the manufacturing method of the light-emitting element according to the first embodiment, the next step is a surface roughening step. In the surface roughening step, the upper surface of the semiconductor layer 20 is roughened. The upper surface of the semiconductor layer 20 is roughened by, for example, wet etching or dry etching.

[0061] As shown in Figure 15, in the manufacturing method of the light-emitting element according to the first embodiment, the next step is a splitting step. The splitting step is performed at least after the metal layer formation step and before the piece formation step. In the splitting step, the semiconductor layer 20 is divided into a plurality of regions. The splitting of the semiconductor layer 20 is performed, for example, by dry etching or wet etching. Figure 15 shows an example in which the semiconductor layer 20 is divided into two regions. In the splitting step, the semiconductor layer 20 is divided into a plurality of regions at a position that overlaps with the insulating layer 40 in a plan view (in the Z direction). In the example shown in Figure 15, the plurality of regions of the divided semiconductor layer 20 do not overlap with the insulating layer 40 in the Z direction.

[0062] As shown in Figure 16, in the manufacturing method of the light-emitting element according to the first embodiment, the next step is to form a protective film. In the protective film formation step, a protective film 70 is formed on the semiconductor layer 20. In the example in Figure 16, the protective film 70 is placed on the semiconductor layer 20, on the portion of the first conductive layer 31 that does not overlap with the semiconductor layer 20 in the Z direction, and on the portion of the first interlayer insulating film 25 that does not overlap with the semiconductor layer 20 in the Z direction. The protective film 70 is formed, for example, by sputtering.

[0063] As shown in Figure 17, in the manufacturing method of the light-emitting element according to the first embodiment, the next step is to form a pad electrode. The pad electrode formation step is performed after the metal layer formation step and before the individualization step. The pad electrode 80 is placed in the portion of the first conductive layer 31 that is exposed by removing a part of the protective film 70 and a part of the first interlayer insulating film 25. The part of the protective film 70 and a part of the first interlayer insulating film 25 can be removed, for example, by dry etching. In the pad electrode formation step, the pad electrode 80 is formed in a position that does not overlap with the semiconductor layer 20 in a plan view. For example, the pad electrode 80 is formed in a position that does not overlap with the insulating layer 40 in a plan view (in the Z direction). In the pad electrode formation step, a first pad electrode 81 and a second pad electrode 82 are formed. The pad electrode 80 is formed, for example, by sputtering.

[0064] As shown in Figure 18, in the method for manufacturing a light-emitting element according to the first embodiment, the next step is to perform a second substrate removal step. In the second substrate removal step, the second substrate 65 is removed. The removal of the second substrate 65 is performed, for example, by laser lift-off (LLO). In the second substrate removal step, for example, after removing the second substrate 65, the resin layer 60 remaining on the underside of the metal film 55 may be removed by cleaning. Alternatively, after the second substrate removal step, for example, after removing the resin layer 60, a support member 90 may be placed on the underside of the metal film 55.

[0065] As shown in Figures 19 to 21, in the method for manufacturing a light-emitting element according to the first embodiment, the next step is to perform a fragmentation step. The fragmentation step is performed at least after the metal layer formation step. In the fragmentation step, the wafer 5 is fragmented at positions that overlap with the insulating layer 40 in a plan view (in the Z direction). The fragmentation step includes a removal step and a cutting step. The cutting step is performed after the removal step.

[0066] As shown in Figures 19 and 20, the individualization process first involves a removal process. In the removal process, a portion of the conductive layer 30 that overlaps with the insulating layer 40 in a plan view (in the Z direction) is removed from the side opposite to the metal layer 50. In the examples of Figures 19 and 20, the removal process removes a portion of the protective film 70 that overlaps with the insulating layer 40 in a plan view (in the Z direction), a portion of the first interlayer insulating film 25 that overlaps with the insulating layer 40 in a plan view (in the Z direction), a portion of the second interlayer insulating film 26 that overlaps with the insulating layer 40 in a plan view (in the Z direction), a portion of the second conductive layer 32 that overlaps with the insulating layer 40 in a plan view (in the Z direction), a portion of the insulating layer 40, and a portion of the metal layer 50 that overlaps with the insulating layer 40 in a plan view (in the Z direction). In the examples of Figures 19 and 20, the removal process removes the central portion 40a of the insulating layer 40 shown in Figure 18, leaving both ends 40b of the insulating layer 40. The central portion 40a is located between the pair of end portions 40b. By removing the central portion 40a while leaving the end portions 40b, the insulating portion 45 corresponding to the end portions 40b remains in the individualized light-emitting element 100. The removal of a portion of the protective film 70, a portion of the first interlayer insulating film 25, a portion of the second interlayer insulating film 26, a portion of the second conductive layer 32, a portion of the insulating layer 40, and a portion of the metal layer 50 is performed, for example, by irradiation with laser light.

[0067] As shown in Figure 21, the next step in the individualization process is a cutting process. In the cutting process, the metal layer 50 is cut by pressing it. In the example in Figure 21, the metal layer 50 and the metal film 55 are cut in the cutting process.

[0068] Figure 22 is a plan view showing an example of the width of the insulating layer in the manufacturing method of a light-emitting element according to the first embodiment. As shown in Figure 22, in the insulating layer formation step, an insulating layer 40 is formed which includes, for example, a first insulating region 41 extending in a first direction (X direction) in a plan view, and a second insulating region 42 extending in a second direction (Y direction) in a plan view. The second direction is perpendicular to the first direction. The width W21 of the first insulating region 41 in the second direction (Y direction) is, for example, 50 μm or more and 250 μm or less. The width W22 of the second insulating region 42 in the first direction (X direction) is, for example, 50 μm or more and 250 μm or less.

[0069] In the metal layer formation process, for example, the metal layer is formed such that the thickness T1 (see Figure 8) of the metal layer 50 in the portion that does not overlap with the first insulating region 41 in a plan view (in the Z direction) is between 0.5 and 2 times the width W21 of the first insulating region 41. Also, in the metal layer formation process, for example, the metal layer is formed such that the thickness T1 of the metal layer 50 in the portion that does not overlap with the second insulating region 42 in a plan view (in the Z direction) is between 1 and 4 times the width W22 of the second insulating region 42.

[0070] Figures 23 to 25 are plan views showing an example of an insulating layer in the manufacturing method of a light-emitting element according to the first embodiment. Figures 23 to 25 show an example of the insulating layer 40 when the region R1 shown in Figure 22 is viewed from below.

[0071] As shown in Figure 23, the insulating layer formation process forms an insulating layer 40 that includes, for example, a first insulating region 41, a second insulating region 42, and a third insulating region 43. The first insulating region 41 extends in a first direction (X direction) in a plan view. The second insulating region 42 extends in a second direction (Y direction) in a plan view. The third insulating region 43 connects the first insulating region 41 and the second insulating region 42.

[0072] In the example shown in Figure 23, multiple first insulating regions 41 are intermittently arranged in the first direction (X direction). The third insulating region 43 is located between the multiple first insulating regions 41 and connects them to each other. Also in the example shown in Figure 23, multiple second insulating regions 42 are intermittently arranged in the second direction (Y direction). The third insulating region 43 is located between the multiple second insulating regions 42 and connects them to each other.

[0073] An opening 44 is formed in the third insulating region 43, in which the conductive layer 30 is exposed. In the example shown in Figure 23, the shape of the opening 44 in plan view is circular. The shape of the opening 44 in plan view may also be polygonal or other shapes. For example, an insulating layer 40 having an opening 44 can be formed by forming the insulating layer 40 with a mask placed at a position corresponding to the opening 44.

[0074] As shown in Figure 24, in the insulating layer formation process, an insulating layer 40 is formed, for example, including a first insulating region 41 and a second insulating region 42. The first insulating region 41 extends in a first direction (X direction) in a plan view. The second insulating region 42 extends in a second direction (Y direction) in a plan view. In the example of Figure 24, the region of the insulating layer 40 connecting the first insulating region 41 and the second insulating region 42 (the third insulating region 43 described above) is not formed. In other words, in the example of Figure 24, the second insulating region 42 is not connected to the first insulating region 41.

[0075] In the example shown in Figure 24, multiple first insulating regions 41 are intermittently arranged in the first direction (X direction). No insulating layer 40 is placed between the multiple first insulating regions 41. Also in the example shown in Figure 24, multiple second insulating regions 42 are intermittently arranged in the second direction (Y direction). No insulating layer 40 is placed between the multiple second insulating regions 42. In a plan view, the regions between the multiple first insulating regions 41 overlap with the regions between the multiple second insulating regions 42.

[0076] As shown in Figure 25, the insulating layer formation process forms an insulating layer 40 that includes, for example, a first insulating region 41, a second insulating region 42, and a third insulating region 43. The first insulating region 41 extends in a first direction (X direction) in a plan view. The second insulating region 42 extends in a second direction (Y direction) in a plan view. The third insulating region 43 connects the first insulating region 41 and the second insulating region 42.

[0077] In the example shown in Figure 25, the maximum width W43y of the third insulating region 43 in the second direction (Y direction) is smaller than the maximum width W41 of the first insulating region 41 in the second direction (Y direction). Also, the maximum width W43x of the third insulating region 43 in the first direction (X direction) is smaller than the maximum width W42 of the second insulating region 42 in the first direction (X direction). The maximum width W41 is, for example, 50 μm or more and 250 μm or less. The maximum width W42 is, for example, 50 μm or more and 250 μm or less. The maximum width W43x is, for example, 30 μm or more and 150 μm or less. The maximum width W43y is, for example, 30 μm or more and 150 μm or less.

[0078] As described above, in the manufacturing method of the light-emitting element according to the first embodiment, an insulating layer 40 is formed beneath a part of the conductive layer 30, and a metal layer 50 having an upwardly recessed groove 53 is formed by electroplating or the like at a position that overlaps with the insulating layer 40 in a plan view. After that, the wafer 5 is separated into individual pieces at the position that overlaps with the insulating layer 40 in a plan view. In the manufacturing method of the light-emitting element according to the first embodiment, the metal layer 50 can be placed at the bottom of the light-emitting element 100, which improves heat dissipation. In addition, since the metal layer 50 can be cut at the point where its thickness is reduced by the groove 53, the wafer can be easily separated into individual pieces even with the metal layer 50 present.

[0079] Furthermore, in the manufacturing method of the light-emitting element according to the first embodiment, the strength of the wafer 5 after the formation of the metal layer 50 can be increased by forming the metal layer 50 so as to completely cover the lower surface of the insulating layer 40. This reduces the likelihood of the wafer 5 cracking at an unintended time.

[0080] Furthermore, in the manufacturing method of the light-emitting element according to the first embodiment, by forming the metal layer 50 by electroplating, the thickness of the metal layer 50 formed in a position overlapping with the insulating layer 40 is thinner than the thickness of the metal layer 50 formed in a position not overlapping with the insulating layer 40, so that a groove 53 can be easily formed in a position overlapping with the insulating layer 40.

[0081] Furthermore, in the manufacturing method of the light-emitting element according to the first embodiment, by forming the pad electrode 80 at a position that does not overlap with the insulating layer 40 in a plan view, the metal layer 50 directly beneath the pad electrode 80 does not become too thin, thereby reducing the rise in the forward voltage VF.

[0082] Furthermore, in the manufacturing method of the light-emitting element according to the first embodiment, a portion of the conductive layer 30 that overlaps with the insulating layer 40 in a plan view is removed from the side opposite to the metal layer 50, and then the metal layer 50 is pressed and cut, thereby reducing the likelihood of the conductive layer 30 or other components unintentionally peeling off or cracking during the cutting process.

[0083] Furthermore, in the first embodiment, the method for manufacturing a light-emitting element shown in Figure 23, an insulating layer 40 is formed including a first insulating region 41, a second insulating region 42, and a third insulating region 43, and an opening 44 is formed in the third insulating region 43 through which the conductive layer 30 is exposed. By forming the opening 44, for example, when forming the metal layer 50 by electroplating, it is possible to reduce the likelihood of the metal layer 50 becoming too thin under the third insulating region 43, where the metal layer 50 tends to become thin. This reduces the likelihood of the wafer 5 cracking at an unintended time.

[0084] Furthermore, in the first embodiment, the method for manufacturing a light-emitting element shown in Figure 24, an insulating layer 40 is formed that includes a first insulating region 41 and a second insulating region 42. At that time, a region of the insulating layer 40 connecting the first insulating region 41 and the second insulating region 42 is not formed. As a result, for example, when forming a metal layer 50 by electroplating, it is possible to reduce the likelihood of the metal layer 50 becoming too thin under the region of the insulating layer 40 connecting the first insulating region 41 and the second insulating region 42, where the metal layer 50 tends to become thin. This reduces the likelihood of the wafer 5 cracking at an unintended time.

[0085] Furthermore, in the first embodiment, the method for manufacturing a light-emitting element shown in Figure 25, an insulating layer 40 is formed that includes a first insulating region 41, a second insulating region 42, and a third insulating region 43. The maximum width W43y of the third insulating region 43 is made smaller than the maximum width W41 of the first insulating region 41, and the maximum width W43x of the third insulating region 43 is made smaller than the maximum width W42 of the second insulating region 42. As a result, for example, when forming a metal layer 50 by electroplating, it is possible to reduce the likelihood of the metal layer 50 becoming too thin under the third insulating region 43, where the metal layer 50 tends to become thin. This reduces the likelihood of the wafer 5 cracking at an unintended time.

[0086] Furthermore, in the manufacturing method of the light-emitting element according to the first embodiment, the metal layer 50 is formed such that the thickness T1 of the metal layer 50 in the portion that does not overlap with the first insulating region 41 in a plan view is 0.5 times or more and 2 times or less the width W21 of the first insulating region 41, thereby reducing the likelihood of the metal layer 50 becoming too thin. This reduces the likelihood of the wafer 5 cracking at an unintended time.

[0087] (Second Embodiment) Figure 26 is a plan view showing a light-emitting element according to the second embodiment. Figure 27 is a cross-sectional view showing a light-emitting element according to the second embodiment. Figure 27 shows the cross-section along the line XXVII-XXVII shown in Figure 26. As shown in Figures 26 and 27, the light-emitting element 100A according to the second embodiment is substantially the same as the light-emitting element 100 according to the first embodiment, except that the shape of the semiconductor layer 20 is different.

[0088] In the light-emitting element 100A, the entire n-side semiconductor layer 20c is located below the upper surface of the pad electrode 80.

[0089] The following describes a method for manufacturing a light-emitting element according to the second embodiment. Figures 28 to 32 are cross-sectional views showing the preparation steps for the method for manufacturing a light-emitting element according to the second embodiment. Figure 33 is a cross-sectional view showing the insulating layer formation step for the method for manufacturing a light-emitting element according to the second embodiment. Figure 34 is a cross-sectional view showing the metal layer formation step for the method for manufacturing a light-emitting element according to the second embodiment. Figure 35 is a plan view showing the metal layer formation step for the method for manufacturing a light-emitting element according to the second embodiment. Figure 36 is a cross-sectional view showing the metal film formation step for the method for manufacturing a light-emitting element according to the second embodiment. Figure 37 is a cross-sectional view showing the second substrate bonding step for the method for manufacturing a light-emitting element according to the second embodiment. Figure 38 is a cross-sectional view showing the first substrate removal step for the method for manufacturing a light-emitting element according to the second embodiment. Figure 39 is a cross-sectional view showing the removal step for the method for manufacturing a light-emitting element according to the second embodiment. Figure 40 is a cross-sectional view showing the roughening step for the method for manufacturing a light-emitting element according to the second embodiment. Figure 41 is a cross-sectional view showing the protective film formation step for the method for manufacturing a light-emitting element according to the second embodiment. Figure 42 is a cross-sectional view showing the pad electrode formation step for the method for manufacturing a light-emitting element according to the second embodiment. Figure 43 is a cross-sectional view showing the second substrate removal step for the method for manufacturing a light-emitting element according to the second embodiment. Figures 44 and 46 are cross-sectional views showing the individualization step of the method for manufacturing a light-emitting element according to the second embodiment. Figure 45 is a plan view showing the individualization step of the method for manufacturing a light-emitting element according to the second embodiment. As shown in Figures 28 to 46, the method for manufacturing a light-emitting element according to the second embodiment comprises a preparation step, an insulating layer formation step, a metal layer formation step, a metal film formation step, a second substrate bonding step, a first substrate removal step, a removal step, a roughening step, a protective film formation step, a pad electrode formation step, a second substrate removal step, and an individualization step.

[0090] The method for manufacturing a light-emitting element according to the second embodiment is substantially the same as the method for manufacturing a light-emitting element according to the first embodiment, except that the preparation step and the insulating layer formation step are different, the division step is omitted, and the removal step is performed instead of the polishing step.

[0091] As shown in Figures 28 to 32, in the method for manufacturing a light-emitting element according to the second embodiment, in the preparation step, a wafer is prepared in which a conductive layer 30 is placed below a semiconductor layer 20 in which a recess 24 that is recessed upward is formed.

[0092] In the preparation step for the manufacturing method of the light-emitting element according to the second embodiment, first, similar to the preparation step for the manufacturing method of the light-emitting element according to the first embodiment, a portion of the p-side semiconductor layer 20a, the active layer 20b, and the n-side semiconductor layer 20c are removed from the laminate to form a recess in the semiconductor layer 20 and expose a portion of the n-side semiconductor layer 20c. Then, a conductive member 22 is placed below the p-side semiconductor layer 20a, and a coating film 23 is placed below the conductive member 22, thereby covering the lower surface of the conductive member 22 with the coating film 23. This prepares a laminate as shown in Figure 28.

[0093] In the preparation step for the manufacturing method of the light-emitting element according to the second embodiment, a recess 24 is formed as shown in Figure 29. More specifically, a recess 24 that slopes upward is formed by removing the coating film 23, a portion of the p-side semiconductor layer 20a, the active layer 20b, and the n-side semiconductor layer 20c that was removed in the step shown in Figure 28, as well as a portion of the p-side semiconductor layer 20a, the active layer 20b, and the n-side semiconductor layer 20c. The recess 24 is formed, for example, by the RIE method. The depth of the recess 24 is greater than the depth of the recess formed in the step shown in Figure 28.

[0094] In the preparation step for the manufacturing method of the light-emitting element according to the second embodiment, the first interlayer insulating film 25 is then placed below the n-side semiconductor layer 20c and below the coating film 23, as shown in Figure 30, similar to the preparation step for the manufacturing method of the light-emitting element according to the first embodiment.

[0095] In the preparation step for the manufacturing method of the light-emitting element according to the second embodiment, the first conductive layer 31 and the third conductive layer 33 are placed below a part of the first interlayer insulating film 25, as shown in Figure 31, and the second interlayer insulating film 26 is placed below the first conductive layer 31, below a part of the third conductive layer 33, and below a part of the first interlayer insulating film 25. An opening 21 is formed by removing a part of the n-side semiconductor layer 20c, a part of the first interlayer insulating film 25, and a part of the second interlayer insulating film 26.

[0096] In the preparation step for the manufacturing method of the light-emitting element according to the second embodiment, the second conductive layer 32 is then placed under the second interlayer insulating film 26, under the third conductive layer 33, and inside the opening 21, as shown in Figure 32, similar to the preparation step for the manufacturing method of the light-emitting element according to the first embodiment.

[0097] Thus, in the method for manufacturing a light-emitting element according to the second embodiment, the preparation step includes a first step of forming a recess 24 that is recessed upward in the semiconductor layer 20, and a second step of placing a conductive layer 30 below the semiconductor layer 20.

[0098] As shown in Figure 33, in the method for manufacturing a light-emitting element according to the second embodiment, an insulating layer 40 is formed below the recess 24 in the insulating layer formation step.

[0099] The metal layer formation step (Figures 34 and 35), metal film formation step (Figure 36), second substrate bonding step (Figure 37), and first substrate removal step (Figure 38) of the method for manufacturing a light-emitting element according to the second embodiment are substantially the same as the metal layer formation step, metal film formation step, second substrate bonding step, and first substrate removal step of the method for manufacturing a light-emitting element according to the first embodiment, so their description is omitted.

[0100] In the method for manufacturing a light-emitting element according to the second embodiment, a removal step is performed after the first substrate removal step. The removal step is performed at least after the metal layer formation step and before the piece formation step. As shown in Figure 39, in the removal step, the portion of the semiconductor layer 20 located above the recess 24 is removed so as to reach the recess 24. In other words, in the removal step, the semiconductor layer 20 is removed until the semiconductor layer 20 located above the recess 24 is gone. As a result of the removal step, a portion of the first interlayer insulating film 25 is exposed from the semiconductor layer 20. The removal of the semiconductor layer 20 is performed, for example, by CMP, dry etching, or wet etching.

[0101] The surface roughening step (Figure 40), protective film formation step (Figure 41), pad electrode formation step (Figure 42), second substrate removal step (Figure 43), and individualization step (Figures 44 to 46) of the method for manufacturing a light-emitting element according to the second embodiment are substantially the same as the surface roughening step, protective film formation step, pad electrode formation step, second substrate removal step, and individualization step of the method for manufacturing a light-emitting element according to the first embodiment, so their description is omitted.

[0102] Thus, in the method for manufacturing a light-emitting element according to the second embodiment, a wafer 5A is prepared in which a conductive layer 30 is disposed below a semiconductor layer 20 in which a recess 24 that is indented upward is formed, an insulating layer 40 is formed below the recess 24, and the portion of the semiconductor layer 20 located above the recess 24 is removed so as to reach the recess 24, thereby improving the in-plane distribution of the upper surface of the semiconductor layer 20 after the removal process. Furthermore, the thickness of the light-emitting element 100A can be reduced compared to the case in which a part of the semiconductor layer 20 is located above the pad electrode 80.

[0103] The embodiment may include the following configurations.

[0104] (Configuration 1) A method for manufacturing a light-emitting element, comprising: a preparation step of preparing a wafer in which a conductive layer is disposed beneath a semiconductor layer; an insulating layer formation step of forming an insulating layer beneath a part of the conductive layer; a metal layer formation step of forming a metal layer that covers the lower surface of the conductive layer and the lower surface of the insulating layer and has grooves that are recessed upward at a position that overlaps with the insulating layer in a plan view; and a framing step after the metal layer formation step of framing the wafer at a position that overlaps with the insulating layer in a plan view.

[0105] (Configuration 2) The method for manufacturing a light-emitting element according to Configuration 1, wherein in the metal layer formation step, the metal layer is formed so as to completely cover the lower surface of the insulating layer.

[0106] (Configuration 3) A method for manufacturing an light-emitting element according to Configuration 1 or 2, wherein the metal layer is formed by an electrolytic plating method in the metal layer formation step.

[0107] (Configuration 4) A method for manufacturing a light-emitting element according to any one of Configurations 1 to 3, further comprising a pad electrode formation step performed after the metal layer formation step and before the individualization step, wherein a pad electrode is formed at a position that does not overlap with the semiconductor layer in a plan view, and in the pad electrode formation step, the pad electrode is formed at a position that does not overlap with the insulating layer in a plan view.

[0108] (Configuration 5) A method for manufacturing a light-emitting element according to any one of Configurations 1 to 4, wherein the individualization step includes a removal step of removing a portion of the conductive layer that overlaps with the insulating layer in a plan view from the side opposite to the metal layer, and a cleavage step of pressing and cleaving the metal layer after the removal step.

[0109] (Configuration 6) A method for manufacturing a light-emitting element according to any one of Configurations 1 to 5, wherein in the insulating layer forming step, an insulating layer is formed that includes a first insulating region extending in a first direction in a plan view, a second insulating region extending in a second direction intersecting the first direction in a plan view, and a third insulating region connecting the first insulating region and the second insulating region, with an opening formed therein in which the conductive layer is exposed.

[0110] (Configuration 7) A method for manufacturing a light-emitting element according to any one of Configurations 1 to 5, wherein in the insulating layer forming step, an insulating layer is formed that includes a first insulating region extending in a first direction in a plan view and a second insulating region extending in a second direction intersecting the first direction in a plan view, and no region of the insulating layer connecting the first insulating region and the second insulating region is formed.

[0111] (Configuration 8) A method for manufacturing a light-emitting element according to any one of Configurations 1 to 5, wherein in the insulating layer forming step, an insulating layer is formed including a first insulating region extending in a first direction in a plan view, a second insulating region extending in a second direction intersecting the first direction in a plan view, and a third insulating region connecting the first insulating region and the second insulating region, the maximum width of the third insulating region in the second direction being smaller than the maximum width of the first insulating region in the second direction, and the maximum width of the third insulating region in the first direction being smaller than the maximum width of the second insulating region in the first direction.

[0112] (Configuration 9) A method for manufacturing a light-emitting element according to any one of Configurations 1 to 8, wherein in the insulating layer forming step, the insulating layer is formed including a first insulating region extending in a first direction in a plan view, and in the metal layer forming step, the metal layer is formed such that the thickness of the metal layer in the portion that does not overlap with the first insulating region in a plan view is 0.5 times or more and 2 times or less the width of the first insulating region in a second direction perpendicular to the first direction.

[0113] (Configuration 10) A method for manufacturing a light-emitting element according to any one of Configurations 1 to 9, further comprising a division step performed after the metal layer formation step and before the piece formation step, for dividing the semiconductor layer into a plurality of regions, wherein in the division step, the semiconductor layer is divided into a plurality of regions at a position that overlaps with the insulating layer in a plan view.

[0114] (Configuration 11) A method for manufacturing a light-emitting element according to any one of Configurations 1 to 9, further comprising: preparing the wafer in which the conductive layer is disposed below the semiconductor layer in which a recess is formed that is indented upward in the preparation step; forming the insulating layer below the recess in the insulating layer formation step; and performing a removal step after the metal layer formation step and before the piece formation step, in which the portion of the semiconductor layer located above the recess is removed so as to reach the recess.

[0115] (Configuration 12) A light-emitting element comprising: a metal layer; a conductive layer disposed on the metal layer; a semiconductor layer disposed on the conductive layer and electrically connected to the conductive layer; a pad electrode disposed on the conductive layer and electrically connected to the conductive layer on the outside of the semiconductor layer in a plan view; and an insulating portion disposed between a part of the metal layer and a part of the conductive layer, wherein the metal layer includes a first metal region covering the lower surface of the conductive layer and a second metal region covering the lower surface of the insulating portion and located outside the first metal region in a plan view, the second metal region having a portion that is thinner than the first metal region, and the side surface of the insulating portion is exposed.

[0116] (Configuration 13) The insulating portion is the light-emitting element described in Configuration 12, which does not overlap with the pad electrode in a plan view.

[0117] (Configuration 14) The second metal region covers the entire lower surface of the insulating portion, as described in Configuration 12 or 13.

[0118] (Configuration 15) The light-emitting element according to any one of Configurations 12 to 14, wherein the insulating portion includes a first insulating portion region extending in a first direction, and the thickness of the first metal region is 1 to 4 times the width of the first insulating portion region in a second direction perpendicular to the first direction.

[0119] As described above, according to the embodiment, a method for manufacturing a light-emitting element and a light-emitting element that can improve heat dissipation are provided.

[0120] The embodiments described above are examples of the present invention, and the present invention is not limited to these embodiments. For example, the present invention is also included in the embodiments described above in which some components or processes are added, deleted, or modified. Furthermore, the embodiments described above can be implemented in combination with each other.

[0121] 5, 5A: Wafer 10: First substrate 20: Semiconductor layer 20a: p-side semiconductor layer 20b: Active layer 20c: n-side semiconductor layer 21: Aperture 22: Conductive member 23: Coating film 24: Recess 25: First interlayer insulating film 26: Second interlayer insulating film 30: Conductive layer 31: First conductive layer 32: Second conductive layer 33: Third conductive layer 40: Insulating layer 40a: Center 40b: Both ends 41: First insulating region 42: Second insulating region 43: Third insulating region 44: Aperture 45: Insulating region 45a: First insulating region 45b: Second insulating region 50: Metal layer 51: First metal region 52: Second metal region 53: Groove 55: Metal film 60: Resin layer 65: Second substrate 70: Protective film 80: Pad electrode 81: First pad electrode 82: Second pad electrode 90: Support member 100, 100A: Light-emitting element

Claims

1. A method for manufacturing a light-emitting element, comprising: a preparation step of preparing a wafer in which a conductive layer is disposed beneath a semiconductor layer; an insulating layer formation step of forming an insulating layer beneath a part of the conductive layer; a metal layer formation step of forming a metal layer that covers the lower surface of the conductive layer and the lower surface of the insulating layer and has an upwardly recessed groove at a position that overlaps with the insulating layer in a plan view; and a framing step after the metal layer formation step of framing the wafer at a position that overlaps with the insulating layer in a plan view.

2. The method for manufacturing a light-emitting element according to claim 1, wherein in the metal layer formation step, the metal layer is formed so as to completely cover the lower surface of the insulating layer.

3. The method for manufacturing a light-emitting element according to claim 1, wherein the metal layer is formed by an electrolytic plating method in the metal layer formation step.

4. The method for manufacturing a light-emitting element according to claim 1, further comprising a pad electrode forming step performed after the metal layer forming step and before the individualizing step, wherein a pad electrode is formed at a position that does not overlap with the semiconductor layer in a plan view, and in the pad electrode forming step, the pad electrode is formed at a position that does not overlap with the insulating layer in a plan view.

5. The method for manufacturing a light-emitting element according to claim 1, wherein the fractionation step includes a removal step of removing a portion of the conductive layer that overlaps with the insulating layer in a plan view from the side opposite to the metal layer, and a cleavage step of pressing and cleaving the metal layer after the removal step.

6. The method for manufacturing a light-emitting element according to claim 1, wherein in the insulating layer forming step, the insulating layer is formed including a first insulating region extending in a first direction in a plan view, a second insulating region extending in a second direction intersecting the first direction in a plan view, and a third insulating region connecting the first insulating region and the second insulating region, with an opening formed therein in which the conductive layer is exposed.

7. The method for manufacturing a light-emitting element according to claim 1, wherein in the insulating layer forming step, an insulating layer is formed that includes a first insulating region extending in a first direction in a plan view and a second insulating region extending in a second direction intersecting the first direction in a plan view, and no region of the insulating layer connecting the first insulating region and the second insulating region is formed.

8. The method for manufacturing a light-emitting element according to claim 1, wherein in the insulating layer forming step, an insulating layer is formed including a first insulating region extending in a first direction in a plan view, a second insulating region extending in a second direction intersecting the first direction in a plan view, and a third insulating region connecting the first insulating region and the second insulating region, the maximum width of the third insulating region in the second direction being smaller than the maximum width of the first insulating region in the second direction, and the maximum width of the third insulating region in the first direction being smaller than the maximum width of the second insulating region in the first direction.

9. The method for manufacturing a light-emitting element according to claim 1, wherein in the insulating layer forming step, the insulating layer is formed including a first insulating region extending in a first direction in a plan view, and in the metal layer forming step, the metal layer is formed such that the thickness of the metal layer in the portion that does not overlap with the first insulating region in a plan view is 0.5 times or more and 2 times or less the width of the first insulating region in a second direction perpendicular to the first direction.

10. The method for manufacturing a light-emitting element according to claim 1, further comprising a division step performed after the metal layer formation step and before the piece formation step, for dividing the semiconductor layer into a plurality of regions, wherein in the division step, the semiconductor layer is divided into a plurality of regions at positions that overlap with the insulating layer in a plan view.

11. A method for manufacturing a light-emitting element according to claim 1, further comprising: preparing a wafer in which a conductive layer is disposed beneath a semiconductor layer having a recess that is indented upward in the preparation step; forming the insulating layer beneath the recess in the insulating layer formation step; and performing a removal step after the metal layer formation step and before the piece formation step, in which a portion of the semiconductor layer located above the recess is removed so as to reach the recess.

12. A light-emitting element comprising: a metal layer; a conductive layer disposed on the metal layer; a semiconductor layer disposed on the conductive layer and electrically connected to the conductive layer; a pad electrode disposed on the conductive layer and electrically connected to the conductive layer on the outside of the semiconductor layer in a plan view; and an insulating portion disposed between a part of the metal layer and a part of the conductive layer, wherein the metal layer includes a first metal region covering the lower surface of the conductive layer and a second metal region covering the lower surface of the insulating portion and located outside the first metal region in a plan view, the second metal region having a portion that is thinner than the first metal region, and the side surface of the insulating portion is exposed.

13. The light-emitting element according to claim 12, wherein the insulating portion does not overlap with the pad electrode in a plan view.

14. The light-emitting element according to claim 12, wherein the second metal region covers the entire lower surface of the insulating portion.

15. The light-emitting element according to claim 12, wherein the insulating portion includes a first insulating region extending in a first direction, and the thickness of the first metal region is one to four times the width of the first insulating region in a second direction perpendicular to the first direction.

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