Display panel and electronic apparatus including same

Abstract

An embodiment of the present invention provides a display panel and an electronic apparatus. The display panel comprises: a substrate; a pixel circuit layer including a pixel circuit and insulation layers and disposed on the substrate; and a light-emitting diode disposed on the pixel circuit layer and electrically connected to the pixel circuit. The pixel circuit of the pixel circuit layer includes a driving transistor and a storage capacitor. The driving transistor includes a semiconductor layer and a gate electrode, the insulation layers of the pixel circuit layer include a first insulation layer disposed between the semiconductor layer and the gate electrode, and the first insulation layer includes a first inorganic material portion overlapping the gate electrode and a first organic material portion around the first inorganic material portion.

Description

Display panel and electronic device including the same

[0001] The embodiments relate to a display panel. The embodiments disclose a display panel, a manufacturing process of the display panel, and an electronic device including the display panel.

[0002] In general, as display panels that visually display electrical signals advance, various display panels with excellent characteristics such as being relatively thin, relatively light, and having relatively low power consumption, as well as electronic devices containing them, are being introduced. For example, research and development are actively underway on display panels of various structures, such as flexible display panels that can be folded or rolled into a roll shape, and stretchable display panels, as well as electronic devices containing them.

[0003] The embodiments may provide a structure of a display panel and an electronic device including the same.

[0004] Additional features will be partially presented in the following description, and will also become apparent in part from the description or by practicing the presented embodiments of the invention.

[0005] One embodiment of the present invention includes a substrate, a pixel circuit, and a plurality of insulating layers, and comprises a pixel circuit layer disposed on the substrate, and a light-emitting diode disposed on the pixel circuit layer and electrically connected to the pixel circuit. The pixel circuit of the pixel circuit layer comprises a driving transistor and a storage capacitor. The driving transistor comprises a semiconductor layer and a gate electrode, and the plurality of insulating layers of the pixel circuit layer comprise a first insulating layer between the semiconductor layer and the gate electrode, wherein the first insulating layer comprises a first inorganic portion overlapping with the gate electrode and a first organic portion surrounding the first inorganic portion. A display panel is disclosed.

[0006] In one embodiment, the upper surface of the first inorganic part and the upper surface of the first organic part may be arranged in the same plane.

[0007] In one embodiment, the first organic part may surround the entire first inorganic part on a plane.

[0008] In one embodiment, the first organic part comprises a first-1 organic part that overlaps with the semiconductor layer; and a first-2 organic part that does not overlap with the semiconductor layer; and the thickness of the first inorganic part may be smaller than the thickness of the first-2 organic part.

[0009] In one embodiment, the thickness of the first organic part may be substantially the same as the thickness of the first inorganic part.

[0010] In one embodiment, the plurality of insulating layers further include a second insulating layer between the first electrode and the second electrode of the storage capacitor, and the second insulating layer may include a second inorganic portion superimposed on the first electrode and the second electrode and a second organic portion surrounding the second inorganic portion.

[0011] In one embodiment, the upper surface of the second inorganic part and the upper surface of the second organic part may be arranged in the same plane.

[0012] In one embodiment, the second inorganic part may overlap with the first inorganic part.

[0013] In one embodiment, the pixel circuit layer further comprises a switching transistor electrically connected to the driving transistor and a connecting piece connected to the semiconductor layer of the switching transistor, wherein the connecting piece directly contacts the semiconductor layer through a contact hole penetrating the insulating layers between the semiconductor layer of the switching transistor and the connecting piece among the plurality of insulating layers, and the contact hole may pass through each of the organic portions of the insulating layers between the semiconductor layer and the connecting piece.

[0014] One embodiment of the present invention discloses a display panel comprising a substrate, a pixel circuit, and a plurality of insulating layers, wherein the pixel circuit layer disposed on the substrate, and a light-emitting diode disposed on the pixel circuit layer and electrically connected to the pixel circuit. The pixel circuit of the pixel circuit layer comprises a driving transistor and a storage capacitor, wherein the driving transistor comprises a semiconductor layer and a gate electrode, and the plurality of insulating layers of the pixel circuit layer comprises a first insulating layer between the substrate and the semiconductor layer; a second insulating layer between the semiconductor layer and the gate electrode; and a third insulating layer on the second insulating layer; wherein at least one insulating layer among the first insulating layer to the third insulating layer comprises a plurality of mutually spaced inorganic portions and an organic portion surrounding each of the plurality of inorganic portions on a plane.

[0015] In one embodiment, the upper surface of each of the plurality of inorganic parts and the upper surface of the organic part may be arranged in the same plane.

[0016] In one embodiment, the first insulating layer may include a first inorganic portion overlapping with the semiconductor layer and a first organic portion surrounding the first inorganic portion.

[0017] In one embodiment, the second insulating layer may include a second inorganic portion overlapping with the gate electrode and a second organic portion surrounding the second inorganic portion.

[0018] In one embodiment, the second organic part comprises a second-1 organic part that overlaps with the semiconductor layer; and a second-2 organic part that does not overlap with the semiconductor layer; and the thickness of the second-2 organic part may be greater than the thickness of the second-1 organic part.

[0019] In one embodiment, the thickness of the second inorganic part may be smaller than the thickness of the second-2 organic part.

[0020] In one embodiment, the thickness of the second inorganic part may be substantially the same as the thickness of the second-1 organic part.

[0021] In one embodiment, the storage capacitor includes a first electrode and a second electrode, wherein the first electrode and the gate electrode of the storage capacitor are integrally connected, and the third insulating layer may include a third inorganic part superimposed on the first electrode and the second electrode of the storage capacitor and a third organic part surrounding the third inorganic part.

[0022] In one embodiment, the upper surface of the second inorganic part and the upper surface of the second organic part may be arranged in the same plane.

[0023] In one embodiment, the third inorganic part may overlap with the second inorganic part.

[0024] In one embodiment, the pixel circuit layer further comprises: a switching transistor electrically connected to the driving transistor; and a connecting piece connected to the semiconductor layer of the switching transistor; wherein the connecting piece directly contacts the semiconductor layer through a contact hole penetrating the insulating layers between the semiconductor layer of the switching transistor and the connecting piece among the plurality of insulating layers, and the contact hole may pass through each of the organic portions of the insulating layers between the semiconductor layer and the connecting piece.

[0025] In one embodiment of the present invention, the electronic device may include a display panel according to the aforementioned embodiments. The electronic device may include a frame, a display panel assembled to the frame and corresponding to a display part and the aforementioned display panel, and a stroke assembled to the frame and disposed below the display panel.

[0026] In one embodiment, the electronic device may be a wearable electronic device.

[0027] In one embodiment, the display panel can be stretched three-dimensionally by the stroke.

[0028] In one embodiment, the display part may have a dome shape when the display panel is not stretched three-dimensionally.

[0029] According to embodiments of the present invention, a stretchable display panel capable of realizing high-definition images can be provided. The aforementioned effects are exemplary, and the effects of the present invention are not limited to those described above.

[0030] FIG. 1 is a schematic perspective view of one embodiment of a display panel.

[0031] FIGS. 2A and FIGS. 2B are perspective views showing the display panel of FIG. 1 extended in a first direction.

[0032] FIG. 2c is a perspective view showing the display panel of FIG. 1 extended in a second direction.

[0033] FIG. 2d is a perspective view showing the display panel of FIG. 1 extended in the first direction and the second direction.

[0034] FIG. 2e is a perspective view showing the display panel of FIG. 1 extended in a third direction.

[0035] FIGS. 3a to 3c are each schematic plan views illustrating an embodiment of a part of the display area of ​​a display panel.

[0036] FIGS. 4a to 4c are equivalent circuit diagrams of one embodiment of pixels of a display panel, respectively.

[0037] FIGS. 5A and FIGS. 5E are cross-sectional views schematically illustrating one embodiment of light-emitting diodes of a display panel, respectively.

[0038] FIG. 6 is a cross-sectional view schematically showing one embodiment of a part of the first area of ​​a display panel.

[0039] FIGS. 7a to 7c are schematic plan views illustrating one embodiment of an insulating layer included in a display panel.

[0040] FIG. 8 is a cross-sectional view illustrating one embodiment of a part of the pixel circuit layer of a display panel.

[0041] FIG. 9 is a plan view illustrating one embodiment of the first insulating layer of a display panel.

[0042] FIG. 10 is a plan view showing one embodiment of a semiconductor layer of a display panel.

[0043] FIG. 11 is a plan view illustrating one embodiment of the second insulating layer of a display panel.

[0044] FIG. 12 is a plan view illustrating one embodiment of the first conductive layer of a display panel.

[0045] FIG. 13 is a plan view illustrating one embodiment of the third insulating layer of a display panel.

[0046] FIG. 14 is a plan view illustrating one embodiment of the second conductive layer of a display panel.

[0047] FIG. 15 is a plan view illustrating one embodiment of the fourth insulating layer of a display panel.

[0048] FIG. 16 is a plan view illustrating one embodiment of the third conductive layer of a display panel.

[0049] FIG. 17 is a schematic perspective view of an embodiment of an electronic device including a display panel.

[0050] FIG. 18 is a block diagram showing one embodiment of an electronic device including a display panel.

[0051] FIGS. 19a and FIGS. 19b are perspective views schematically illustrating an embodiment of an electronic device.

[0052] FIG. 20 is a schematic perspective view of one embodiment of an electronic device.

[0053] FIG. 21 is a schematic perspective view of one embodiment of an electronic device.

[0054] One embodiment of the present invention includes a substrate, a pixel circuit, and a plurality of insulating layers, and comprises a pixel circuit layer disposed on the substrate, and a light-emitting diode disposed on the pixel circuit layer and electrically connected to the pixel circuit. The pixel circuit of the pixel circuit layer comprises a driving transistor and a storage capacitor. The driving transistor comprises a semiconductor layer and a gate electrode, and the plurality of insulating layers of the pixel circuit layer comprise a first insulating layer between the semiconductor layer and the gate electrode, wherein the first insulating layer comprises a first inorganic portion overlapping with the gate electrode and a first organic portion surrounding the first inorganic portion. A display panel is disclosed.

[0055] One embodiment of the present invention discloses a display panel comprising a substrate, a pixel circuit, and a plurality of insulating layers, wherein the pixel circuit layer disposed on the substrate, and a light-emitting diode disposed on the pixel circuit layer and electrically connected to the pixel circuit. The pixel circuit of the pixel circuit layer comprises a driving transistor and a storage capacitor, wherein the driving transistor comprises a semiconductor layer and a gate electrode, and the plurality of insulating layers of the pixel circuit layer comprises a first insulating layer between the substrate and the semiconductor layer; a second insulating layer between the semiconductor layer and the gate electrode; and a third insulating layer on the second insulating layer; wherein at least one insulating layer among the first insulating layer to the third insulating layer comprises a plurality of mutually spaced inorganic portions and an organic portion surrounding each of the plurality of inorganic portions on a plane.

[0056] In one embodiment of the present invention, the electronic device may include a display panel according to the aforementioned embodiments. The electronic device may include a frame, a display panel assembled to the frame and corresponding to a display part and the aforementioned display panel, and a stroke assembled to the frame and disposed below the display panel.

[0057] Now, reference is made in detail to the exemplary embodiments illustrated in the accompanying drawings, where the same reference numerals refer to the same elements throughout the drawings. In this regard, the illustrated embodiments may take various forms and should not be interpreted as being limited to the description presented in the present invention. Accordingly, embodiments are described below with reference to the drawings to explain the features of the present invention. The term "and / or" as used in the present invention includes any combination of one or more of the related listed items. Throughout the present invention, the expressions "at least one of a, b, and c" or "at least one selected from a, b, and c" indicate only a, only b, only c, both a and b, both a and c, both b and c, all a, b, and c, or variations thereof.

[0058] Since the present invention allows for various modifications and numerous embodiments, specific embodiments are illustrated in the drawings and described in detail in the detailed description. The accompanying drawings illustrating embodiments of the present disclosure are referenced to fully understand the present disclosure, its advantages, and the objectives achieved through the implementation of the present disclosure. However, the present disclosure may be implemented in various forms and should not be interpreted as being limited to the embodiments presented in the present invention.

[0059] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In the drawings, identical elements represent identical elements, and repetitive descriptions thereof are omitted.

[0060] Terms such as "first," "second," etc., may be used in the present invention to describe various elements, but these elements should not be limited by these terms, and it should be understood that these elements are used merely to distinguish one element from another.

[0061] The singular forms "a," "an," and "the" used in the present invention are intended to include the plural forms unless the context clearly indicates otherwise.

[0062] It will be better understood that the terms "comprising" and / or "comprising" as used in the present invention specify the presence of a specified feature or element, and do not exclude the presence or addition of one or more other features or elements.

[0063] When it is stated that a layer, region, or element is "formed on" another layer, region, or element, it should be understood that this may be formed directly or indirectly on the other layer, region, or element. That is, for example, an interposed layer, region, or element may exist.

[0064] The size of elements in the drawings may be exaggerated for convenience of explanation. In other words, since the size and thickness of elements in the drawings are depicted arbitrarily for convenience of explanation, the following disclosure is not limited thereto.

[0065] Where exemplary embodiments can be implemented differently, a specific process sequence may be performed differently from the described order. For example, two processes described consecutively may be performed substantially simultaneously or in an order opposite to the described order.

[0066] If it is stated that a layer, region, or component is connected to another layer, region, or component, it should be understood that this connection may be direct or indirect. For example, if it is stated that a layer, region, or component is electrically connected to another layer, region, or component, this connection may be direct or indirect.

[0067] FIG. 1 is a schematic perspective view of one embodiment of a display panel (10). FIG. 2a and FIG. 2b are perspective views showing the display panel (10) of FIG. 1 extended in a first direction. FIG. 2c is a perspective view showing the display panel (10) of FIG. 1 extended in a second direction. FIG. 2d is a perspective view showing the display panel (10) of FIG. 1 extended in the first direction and the second direction. FIG. 2e is a perspective view showing the display panel (10) of FIG. 1 extended in a third direction.

[0068] Referring to FIG. 1, a display panel (10) may include a display area (DA) and a non-display area (NDA). The display area (DA) may include a plurality of pixels. The display panel (10) may provide a predetermined image using light emitted from a plurality of pixels. The non-display area (NDA) may be placed outside the display area (DA). The non-display area (NDA) may surround the entire display area (DA).

[0069] The display panel (10) can be extended or retracted in various directions. The display panel (10) can be extended in a first direction (e.g., x direction and / or -x direction) by an external force applied by an external object or a user. In one embodiment, as shown in FIGS. 2a and 2b, the display area (DA) and / or non-display area (NDA) of the display panel (10) can be extended in a first direction (e.g., x direction and / or -x direction). In one embodiment, for example, as shown in FIG. 2a, it can be extended along the x direction and -x direction, or as shown in FIG. 2b, it can be extended along the x direction while one side of the display panel (10) remains fixed.

[0070] The display panel (10) can be extended in a second direction (e.g., the y direction and / or the -y direction) by an external force applied by an external object or a user. In one embodiment, as shown in FIG. 2c, the display area (DA) and / or non-display area (NDA) of the display panel (10) can be extended in the y direction and the -y direction. In another embodiment, one side of the display panel (10) can be extended in the y direction or the -y direction while remaining fixed.

[0071] The display panel (10) can be extended in multiple directions, such as a first direction (e.g., x direction and / or -x direction) and a second direction (e.g., y direction and / or -y direction) by an external force applied by an external object or a part of a person's body. As shown in FIG. 2d, the display area (DA) and / or non-display area (NDA) of the display panel (10) can be extended in the ±x direction and ±y direction.

[0072] The display panel (10) can be extended in a third direction (e.g., the z direction or the -z direction) by an external force applied by an external object or a part of a person's body. In one embodiment, FIG. 2e illustrates a part of the display panel (10), such as a part of the display area (DA), protruding in the z direction. In another embodiment, a part of the display panel (10), such as a part of the display area (DA), may protrude along the z direction (or be sunken along the -z direction).

[0073] FIGS. 2a to 2e illustrate a display panel (10) extended in a first direction, a second direction, and / or a third direction, but the present invention is not limited thereto. In other embodiments, the display panel (10) may be deformed into various irregular shapes, such as having two or more axes, being bent or twisted.

[0074] FIGS. 3a to 3c are schematic plan views illustrating an embodiment of a display area (DA) of a display panel.

[0075] Referring to FIGS. 3a through 3c, the display area (DA) may include first areas (11) and a second area (12) connecting the first areas (11).

[0076] The display area (DA) may include a first area (11) and a second area (12) with different elongation rates. In one embodiment, for example, the display panel (10) may include a first area (11) with a relatively small elongation rate and a second area (12) with a relatively large elongation rate. In the present invention, the elongation rate is a numerical value representing the change in length (ΔL / L) by which the display panel (10) can be stretched without physical damage to the display panel (10) when an external force is applied to the display panel (10). Here, ΔL is the amount of change in length of the display panel (10), and L represents the initial length of the display panel (10). Accordingly, the elongation rates of the first area (11) and the second area (12) respectively may represent the change in length of the first area (11) and the second area (12) respectively when the same external force is applied to the first area (11) and the second area (12).

[0077] The fact that the elongation rate of the first region (11) is smaller than the elongation rate of the second region (12) indicates that the deformation of the first region (11) due to external force occurs relatively less. Therefore, the first region (11) can also be called a relatively low-deformation region, and the second region (12) can also be called a relatively high-deformation region.

[0078] The first regions (11) may be spaced apart from each other and arranged two-dimensionally in the display area (DA). The first regions (11) may be arranged repeatedly along a first direction (e.g., x-direction) and a second direction (e.g., y-direction). The first region (11) may be an area where pixels (PXr, PXg, and PXb) of the pixel unit (PU) are placed, and thus, the first region (11) may also be a pixel area or a light-emitting area. One or more pixels may be placed in each first region (11). Light-emitting diodes (LED1, LED2, LED3, FIG. 6) corresponding to the pixels (PXr, PXg, and PXb) may be placed in the first region (11). FIGS. 3a to 3c illustrate three light-emitting diodes (LED1, LED2, LED3) arranged in the first region (11), but the number of light-emitting diodes (LED1, LED2, LED3) arranged in the first region (11) can be varied. The light-emitting diodes (LED1, LED2, LED3) can emit light of different colors, such as red, green, and blue light.

[0079] A pixel circuit for operating light-emitting diodes (LED1, LED2, LED3) may be disposed in the first region (11). The pixel circuit may include a transistor and a capacitor.

[0080] A second region (12) may be located between adjacent first regions (11). In one embodiment, as shown in FIG. 3a, the second region (12) may have a shape that surrounds each of the first regions (11) in a plane. In one embodiment, as in FIG. 3a, the second region (12) may surround each of the first regions (11). In one embodiment, the second region (12) may be patterned as in FIG. 3b or FIG. 3c. In one embodiment, as in FIG. 3b and FIG. 3c, for example, the second region (12) may define cut regions (CS1). As in FIG. 3b, the second region (12) may include an arrangement of cut regions (CS1) having the shape of the alphabet H, wherein another cut region (CS1) rotated 90 degrees may be placed between two adjacent cut regions (CS1). As shown in FIG. 3c, the second region (12) may include an arrangement of cut regions (CS1) shaped like a four-bladed propeller.

[0081] The second region (12) may be a region through which lines (e.g., gate lines, data lines, first voltage lines, second voltage lines, etc.) electrically connected to each of the pixel circuits placed in each of the two adjacent first regions (11) pass.

[0082] FIGS. 4a to 4c are equivalent circuit diagrams of one embodiment of pixels of a display panel, respectively.

[0083] Referring to FIG. 4a, a light-emitting diode (LED) corresponding to a pixel is electrically connected to a pixel circuit (PC), and the pixel circuit (PC) may include a first transistor (T1), a second transistor (T2), and a storage capacitor (Cst). The pixel circuit (PC) may be electrically connected to a signal line and a voltage line. The signal line may include a scan signal line (GWL) and a data line (DL), and the voltage line may include a first voltage line (VDDL).

[0084] The second transistor (T2) is a data write transistor and can be electrically connected to a scan signal line (GWL) and a data line (DL). The scan signal line (GWL) can provide a scan signal (GW) to the gate electrode of the second transistor (T2). The second transistor (T2) can transmit a data signal (Dm) input from the data line (DL) to the first transistor (T1) according to the scan signal (GW) input from the scan signal line (GWL).

[0085] The storage capacitor (Cst) is electrically connected to the second transistor (T2) and the first voltage line (VDDL), and can store a voltage corresponding to the difference between the voltage received from the second transistor (T2) and the first power supply voltage (VDD) supplied by the first voltage line (VDDL).

[0086] The first transistor (T1) is a driving transistor and can control the driving current flowing through the light-emitting diode (LED). The first transistor (T1) can be connected to the first voltage line (VDDL) and the storage capacitor (Cst). The first transistor (T1) can control the driving current flowing from the first voltage line (VDDL) to the light-emitting diode (LED) in correspondence with the voltage value stored in the storage capacitor (Cst). The light-emitting diode (LED) can emit light having a predetermined brightness by the driving current. The first electrode of the light-emitting diode (LED) is electrically connected to the first transistor (T1), and the second electrode can be electrically connected to the second voltage line (VSSL) that supplies the second power supply voltage (VSS).

[0087] FIG. 4a illustrates a pixel circuit (PC) comprising one switching transistor (e.g., a second transistor (T2)) and one capacitor (e.g., a storage capacitor (Cst)), but in other embodiments, the pixel circuit (PC) may comprise two or more switching transistors and / or two or more capacitors.

[0088] Referring to FIG. 4b, the pixel circuit (PC) may include a first transistor (T1), a second transistor (T2), a third transistor (T3), a fourth transistor (T4), a fifth transistor (T5), a sixth transistor (T6), a seventh transistor (T7), and a storage capacitor (Cst). The first transistor (T1) is a driving transistor, and the second transistor (T2), the third transistor (T3), the fourth transistor (T4), the fifth transistor (T5), the sixth transistor (T6), and the seventh transistor (T7) are switching transistors.

[0089] The pixel circuit (PC) is electrically connected to signal lines and voltage lines. The signal lines may include gate lines such as a scan signal line (GWL), a bypass control line (GBL), an initialization control line (GIL), and an emission control line (EML), and data lines (DL). The voltage lines may include first and second initialization voltage lines (VIL1, VIL2) and a first voltage line (VDDL).

[0090] The first voltage line (VDDL) can transmit a first power supply voltage (VDD) to the first transistor (T1). The first initialization voltage line (VIL1) can transmit a first initialization voltage (Vint) that initializes the first transistor (T1) to the pixel circuit (PC). The second initialization voltage line (VIL2) can transmit a second initialization voltage (Vaint) that initializes the first electrode of the light-emitting diode (LED) to the pixel circuit (PC).

[0091] The first transistor (T1) can be electrically connected to the first voltage line (VDDL) via the fifth transistor (T5) and electrically connected to the light-emitting diode (LED) via the sixth transistor (T6). The first transistor (T1) acts as a driving transistor and receives a data signal (Dm) according to the switching operation of the second transistor (T2) and supplies a driving current to the light-emitting diode (LED).

[0092] The second transistor (T2) is a data write transistor and is electrically connected to the scan signal line (GWL) and the data line (DL). The second transistor (T2) is electrically connected to the first voltage line (VDDL) via the fifth transistor (T5). The second transistor (T2) is turned on according to the scan signal (GW) received through the scan signal line (GWL) and performs a switching operation to transmit the data signal (Dm) transmitted to the data line (DL) to the first node (N1).

[0093] The third transistor (T3) is electrically connected to the scan signal line (GWL) and is electrically connected to the light-emitting diode (LED) via the sixth transistor (T6). The third transistor (T3) is turned on according to the scan signal (GW) received through the scan signal line (GWL) and can diode-connect the first transistor (T1).

[0094] The fourth transistor (T4) is the first initialization transistor and is electrically connected to the initialization control line (GIL) and the first initialization voltage line (VIL1). The fourth transistor (T4) is turned on according to the initialization control signal (GI) received through the initialization control line (GIL) to transmit the first initialization voltage (Vint) from the first initialization voltage line (VIL1) to the gate electrode of the first transistor (T1), thereby initializing the voltage of the gate electrode of the first transistor (T1). The initialization control signal (GI) may correspond to a scan signal of another pixel circuit placed in the previous row of the corresponding pixel circuit (PC).

[0095] The fifth transistor (T5) may be an operation control transistor, and the sixth transistor (T6) may be a light emission control transistor. The fifth transistor (T5) and the sixth transistor (T6) are electrically connected to the light emission control line (EML) and are simultaneously turned on according to the light emission control signal (EM) received through the light emission control line (EML), thereby forming a current path so that a driving current can flow from the first voltage line (VDDL) toward the light-emitting diode (LED). The first electrode of the light-emitting diode (LED) may be electrically connected to the first transistor (T1) through the sixth transistor (T6), and the second electrode may be electrically connected to the second voltage line (VSSL) that supplies the second power supply voltage (VSS).

[0096] The seventh transistor (T7) is a second initialization transistor and can be electrically connected to the bypass control line (GBL), the second initialization voltage line (VIL2), and the sixth transistor (T6). The seventh transistor (T7) is turned on according to the bypass control signal (GB) received through the bypass control line (GBL) and can transmit the second initialization voltage (Vaint) from the second initialization voltage line (VIL2) to the first electrode of the light-emitting diode (LED), thereby initializing the first electrode of the light-emitting diode (LED).

[0097] The storage capacitor (Cst) may include a first electrode (CE1) and a second electrode (CE2). The first electrode (CE1) is electrically connected to the gate electrode of the first transistor (T1), and the second electrode (CE2) is electrically connected to the first voltage line (VDDL). The storage capacitor (Cst) can maintain the voltage applied to the gate electrode of the first transistor (T1) by storing and maintaining a voltage corresponding to the difference between the voltages of the first voltage line (VDDL) and the gate electrode of the first transistor (T1).

[0098] Referring to FIG. 4c, the pixel circuit (PC) may include a first transistor (T1), a second transistor (T2), a third transistor (T3), a fourth transistor (T4), a fifth transistor (T5), a sixth transistor (T6), a seventh transistor (T7), an eighth transistor (T8), a ninth transistor (T9), a storage capacitor (Cst), and an auxiliary capacitor (Ca). The first transistor (T1) is a driving transistor, and the second transistor (T2), the third transistor (T3), the fourth transistor (T4), the fifth transistor (T5), the sixth transistor (T6), the seventh transistor (T7), the eighth transistor (T8), and the ninth transistor (T9) are switching transistors.

[0099] The pixel circuit (PC) is electrically connected to signal lines and voltage lines. The signal lines may include gate lines such as a scan signal line (GWL), a bypass control line (GBL), an initialization control line (GIL), and an emission control line (EML), and data lines (DL). The voltage lines may include first and second initialization voltage lines (VIL1, VIL2), a hold voltage line (VSL), and a first voltage line (VDDL).

[0100] The first voltage line (VDDL) can transmit a first power supply voltage (VDD) to the first transistor (T1). The first initialization voltage line (VIL1) can transmit a first initialization voltage (Vint) that initializes the first transistor (T1) to the pixel circuit (PC). The second initialization voltage line (VIL2) can transmit a second initialization voltage (Vaint) that initializes the first electrode of the light-emitting diode (LED) to the pixel circuit (PC). The holding voltage line (VSL) can provide a holding voltage (VSUS) to the second electrode (CE2) of the second node (N2), for example, the storage capacitor (Cst), during the initialization period and the data writing period.

[0101] The first transistor (T1) can be electrically connected to the first voltage line (VDDL) via the fifth transistor (T5) and the eighth transistor (T8), and can be electrically connected to the light-emitting diode (LED) via the sixth transistor (T6). The first transistor (T1) acts as a driving transistor and can receive a data signal (Dm) according to the switching operation of the second transistor (T2) and supply a driving current to the light-emitting diode (LED).

[0102] The second transistor (T2) is electrically connected to the scan signal line (GWL) and the data line (DL), and is electrically connected to the first voltage line (VDDL) via the fifth transistor (T5) and the eighth transistor (T8). The second transistor (T2) is turned on according to the scan signal (GW) received through the scan signal line (GWL) and performs a switching operation to transmit the data signal (Dm) transmitted to the data line (DL) to the first node (N1).

[0103] The third transistor (T3) is electrically connected to the scan signal line (GWL) and is electrically connected to the light-emitting diode (LED) via the sixth transistor (T6). The third transistor (T3) is turned on according to the scan signal (GW) received through the scan signal line (GWL) and connects the first transistor (T1) to the diode, thereby compensating for the threshold voltage of the first transistor (T1).

[0104] The fourth transistor (T4) is electrically connected to the initialization control line (GIL) and the first initialization voltage line (VIL1), and is turned on according to the initialization control signal (GI) received through the initialization control line (GIL) to transmit the first initialization voltage (Vint) from the first initialization voltage line (VIL1) to the gate electrode of the first transistor (T1) to initialize the voltage of the gate electrode of the first transistor (T1). The initialization control signal (GI) may correspond to a scan signal of another pixel circuit placed in the previous row of the corresponding pixel circuit (PC).

[0105] The fifth transistor (T5), the sixth transistor (T6), and the eighth transistor (T8) are electrically connected to the light emission control line (EML) and are simultaneously turned on according to the light emission control signal (EM) received through the light emission control line (EML), thereby forming a current path so that a driving current can flow from the first voltage line (VDDL) toward the light-emitting diode (LED). The first electrode of the light-emitting diode (LED) is electrically connected to the first transistor (T1) through the sixth transistor (T6), and the second electrode can be electrically connected to the second voltage line (VSSL) that supplies the second power supply voltage (VSS).

[0106] The seventh transistor (T7) is a second initialization transistor and can be electrically connected to the bypass control line (GBL), the second initialization voltage line (VIL2), and the sixth transistor (T6). The seventh transistor (T7) is turned on according to the bypass control signal (GB) received through the bypass control line (GBL) and transmits the second initialization voltage (Vaint) from the second initialization voltage line (VIL2) to the first electrode of the light-emitting diode (LED) to initialize the first electrode of the light-emitting diode (LED).

[0107] The ninth transistor (T9) can be electrically connected to the bypass control line (GBL), the second electrode (CE2) of the storage capacitor (Cst), and the holding voltage line (VSL). The ninth transistor (T9) is turned on according to the bypass control signal (GB) received through the bypass control line (GBL), and can transmit a holding voltage (VSUS) to the second node (N2), such as the second electrode (CE2) of the storage capacitor (Cst), during the initialization period and the data writing period.

[0108] The eighth transistor (T8) and the ninth transistor (T9) may each be electrically connected to the second node (N2), for example, the second electrode (CE2) of the storage capacitor (Cst). In some embodiments, the eighth transistor (T8) may be turned off and the ninth transistor (T9) may be turned on during the initialization period and the data writing period, and the eighth transistor (T8) may be turned on and the ninth transistor (T9) may be turned off during the light emission period.

[0109] The storage capacitor (Cst) includes a first electrode (CE1) and a second electrode (CE2). The first electrode (CE1) is electrically connected to the gate electrode of the first transistor (T1), and the second electrode (CE2) is electrically connected to the eighth transistor (T8) and the ninth transistor (T9).

[0110] The auxiliary capacitor (Ca) can be electrically connected to the sixth transistor (T6), the holding voltage line (VSL), and the first electrode of the light-emitting diode (LED). By storing and maintaining a voltage corresponding to the voltage difference between the first electrode of the light-emitting diode (LED) and the holding voltage line (VSL) while the seventh transistor (T7) and the ninth transistor (T9) are turned on, the auxiliary capacitor (Ca) can prevent the problem of the black brightness rising when the sixth transistor (T6) is turned off.

[0111] FIGS. 5A and FIGS. 5E are cross-sectional views schematically illustrating one embodiment of light-emitting diodes of a display panel, respectively.

[0112] Referring to FIG. 5a, the light-emitting diode (LED) may include an inorganic light-emitting diode containing an inorganic material. The light-emitting diode (LED) may include a first semiconductor layer (231), a second semiconductor layer (232), an intermediate layer (233) between the first semiconductor layer (231) and the second semiconductor layer (232), a first electrode (235) electrically connected to the first semiconductor layer (231), and a second electrode (238) electrically connected to the second semiconductor layer (232). The first electrode (235) and the second electrode (238) of the light-emitting diode (LED) may each be electrically connected to a first electrode pad (241) and a second electrode pad (242) disposed on the same layer. The second electrode pad (242) may be a part of the second voltage line (VSSL, FIG. 4a) or a conductive layer electrically connected to the second voltage line (VSSL, FIG. 4a).

[0113] In some embodiments, the first semiconductor layer (231) may include a p-type semiconductor layer. The p-type semiconductor layer is In x AlyGa 1-x-y A semiconductor material having the compositional formula N (0≤x≤1, 0≤y≤1, 0≤x+y≤1), such as GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, etc., may be included or configured, and p-type dopants such as Mg, Zn, Ca, Sr, and Ba may be doped.

[0114] The second semiconductor layer (232) may include, for example, an n-type semiconductor layer. The n-type semiconductor layer is In x AlyGa 1-x-y A semiconductor material having the composition formula N (0≤x≤1, 0≤y≤1, 0≤x+y≤1), such as GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, etc., may be included or configured, and may be doped with n-type dopants such as Si, Ge, Sn, etc.

[0115] The intermediate layer (233) is a region where electrons and holes recombine, and as electrons and holes recombine, they transition to a lower energy level and can generate light having a corresponding wavelength. The intermediate layer (233) is, for example, In x Al y Ga 1-x-y It can be formed by including a semiconductor material having a composition formula of N (0≤x≤1, 0≤y≤1, 0≤x+y≤1), and can be formed as a single quantum well structure or a multi-quantum well (MQW) structure. In addition, it may include a quantum wire structure or a quantum dot structure.

[0116] FIG. 5a illustrates that the first semiconductor layer (231) includes a p-type semiconductor layer and the second semiconductor layer (232) includes an n-type semiconductor layer, but the present invention is not limited thereto. In another embodiment, the first semiconductor layer (231) may include an n-type semiconductor layer and the second semiconductor layer (232) may include a p-type semiconductor layer.

[0117] FIG. 5a illustrates that the first electrode pad (241) and the second electrode pad (242) are disposed on the same layer, but the present invention is not limited thereto. Referring to FIG. 5b, the first electrode pad (241) and the second electrode pad (242) may be disposed on different layers. For example, a bank layer (230) defining an opening that overlaps with at least a portion of the first electrode pad (241) may be disposed on the first electrode pad (241), and the second electrode pad (242) may be disposed on the upper surface of the bank layer (230). The structure of the light-emitting diode (LED) illustrated in FIG. 5b is the same as previously described with reference to FIG. 5a.

[0118] In another embodiment, as shown in FIG. 5c, the second electrode pad (242) may be positioned on both sides centered on the first electrode pad (241) in a cross-sectional view. The bank layer (230) defines an opening that overlaps at least a portion of the first electrode pad (241), and the second electrode pad (242) may be positioned around the opening of the bank layer (230). In some embodiments, the second electrode pad (242) may have a closed-loop shape that surrounds the opening of the bank layer (230) and / or the entirety of the first electrode pad (241) in a planar view. The structure of the light-emitting diode (LED) shown in FIG. 5c is the same as previously described with reference to FIG. 5a.

[0119] FIGS. 5a to 5c illustrate the first electrode (235) and the second electrode (238) of a light-emitting diode (LED) facing in the same direction (e.g., downward direction, -z direction), but the present invention is not limited thereto. As shown in FIG. 5d, the first electrode (235) and the second electrode (238) of the light-emitting diode (LED) may face in opposite directions.

[0120] The bank layer (230) defines an opening that exposes at least a portion of the first electrode pad (241), and the thickness of the bank layer (230) may be substantially the same as the thickness of the light-emitting diode (LED). The opening of the bank layer (230) may be filled with a filling material (FM), and the second electrode pad (242) may be disposed on the upper surface of the bank layer (230) so as to be electrically connected (e.g., in contact) with the second electrode (238) of the light-emitting diode (LED). The filling material (FM) may be an insulating organic material.

[0121] FIGS. 5a through 5d illustrate that the light-emitting diode (LED) comprises an inorganic light-emitting diode containing an inorganic material, but the present invention is not limited thereto. Referring to FIG. 5e, the light-emitting diode (LED) may comprise an organic light-emitting diode containing an organic material. In one embodiment, for example, the light-emitting diode (LED) may comprise a first electrode pad (or first electrode, 241), an organic light-emitting layer (243) that overlaps with the first electrode pad (241) through an opening of a bank layer (230) disposed on the first electrode pad (241), and a second electrode pad (or second electrode, 242) on the organic light-emitting layer (243). The second electrode pad (242) may be shared among a single light-emitting diode (LED). In other words, the second electrode pad (242) of one light-emitting diode (LED) can be integrally connected with the second electrode pad (242) of another light-emitting diode (LED).

[0122] FIG. 6 is a schematic cross-sectional view showing one embodiment of a part of the first region (11) of a display panel (10), and FIG. 7a to 7c are schematic plan views showing one embodiment of an insulating layer included in the display panel.

[0123] Referring to FIG. 6, the first region (11) of the display panel (10) may include a pixel circuit layer (200) disposed on a substrate (100), light-emitting diodes (LED1, LED2, LED3) on the pixel circuit layer (200), and a protective layer (300).

[0124] In one embodiment, the substrate (100) may comprise a polymer resin such as polyethersulfone, polyarylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate, cellulose triacetate, or cellulose acetate propionate. In one embodiment, the substrate (100) may comprise an elastomer. For example, the substrate (100) is thermoplastic polyurethane, silicone, thermoplastic rubbers, elastolefin, thermoplastic olefin, polyamide, polyether block amide, synthetic polyisoprene, polybutadiene, chloroprene rubber, butyl rubber, styrene-butadiene, epichlorohydrin rubber, polyacrylic rubber, silicone rubber, fluorosilicone rubber, fluoroelastomers, ethylene-vinyl acetate, PDMS (polydimethylsiloxane), and Ecoflex TM , Ecoflex TM It may include at least one of (which is a registered trademark of Smooth-On Inc.). The protective layer (300) may include an alternating laminated structure of an inorganic insulating layer and an inorganic insulating layer, or may include an elastomer.

[0125] The pixel circuit layer (200) may include a pixel circuit (PC) and an insulating layer (IL). The insulating layer (IL) may include a plurality of insulating layers, for example, first to sixth insulating layers (IL1, IL2, IL3, IL4, IL5, IL6). Each pixel circuit (PC) may be electrically connected to a corresponding light-emitting diode (LED1, LED2, LED3). The first to fifth insulating layers (IL1, IL2, IL3, IL4, IL5) may be interposed between conductive layers included in the pixel circuit (PC). In one embodiment, for example, the first insulating layer (IL1) may be interposed between the substrate (100) and the semiconductor layer (Act). The second insulating layer (IL2) may be interposed between the semiconductor layer (Act) and the gate electrode (GE). The third insulating layer (IL3) may be interposed between the first electrode (CE1) and the second electrode (CE2) of the storage capacitor. A fourth insulating layer (IL4) may be interposed between the second electrode (CE2) and the source or drain electrode (SDE). A fifth insulating layer (IL5) may be interposed between the source or drain electrode (SDE) and the light-emitting diodes (LED1, LED2, LED3). A sixth insulating layer (IL6) may be disposed between the fifth insulating layer (IL5) and the light-emitting diodes (LED1, LED2, LED3).

[0126] At least one insulating layer selected from the first to fifth insulating layers (IL1, IL2, IL3, IL4, IL5) may include an inorganic part comprising an inorganic insulating material and an organic part comprising an organic insulating material.

[0127] In one embodiment, with reference to FIGS. 7a to 7c, the insulating layer (IL) may include inorganic parts (ILa) and organic parts (ILb) spaced apart from each other. The insulating layer (IL) of FIGS. 7a to 7c may correspond to at least one of the first to fifth insulating layers (IL1, IL2, IL3, IL4, IL5) described with reference to FIG. 6a. In other words, at least one of the first to fifth insulating layers (IL1, IL2, IL3, IL4, IL5) may include inorganic parts (ILa) and organic parts (ILb) spaced apart from each other.

[0128] The width or area of ​​any one of the inorganic parts (ILa) may differ from the width or area of ​​another. The inorganic parts (ILa) may be spaced apart from one another, and each inorganic part (ILa) may be surrounded by an organic part (ILb) in a plane.

[0129] The inorganic parts (ILa) may be spaced apart from each other along a first direction (e.g., x-direction) and a second direction (e.g., y-direction) as shown in FIG. 7a and 7c. The inorganic parts (ILa) may be spaced apart from each other along a second direction (e.g., y-direction) or spaced apart from each other along a first direction (e.g., x-direction) as shown in FIG. 7b.

[0130] FIGS. 7a to 7c each illustrate an inorganic part (ILa) having a roughly rectangular shape, but the present invention is not limited thereto. The shape of each inorganic part (ILa) can be varied, such as having a polygonal, elliptical, circular, or irregular shape.

[0131] The inorganic part (ILa) may include inorganic insulating materials such as silicon oxide, silicon nitride, and silicon oxynitride. The organic part (ILb) may include organic insulating materials such as acrylic, BCB (Benzocyclobutene), polyimide, or HMDSO (Hexamethyldisiloxane).

[0132] FIG. 8 is a cross-sectional view illustrating an embodiment of a part of the pixel circuit layer (200) of a display panel, FIG. 9 is a plan view illustrating an embodiment of the first insulating layer (IL1) of a display panel, FIG. 10 is a plan view illustrating an embodiment of the semiconductor layer (Act) of a display panel, FIG. 11 is a plan view illustrating an embodiment of the second insulating layer (IL2) of a display panel, FIG. 12 is a plan view illustrating an embodiment of the first conductive layer (CL1) of a display panel, FIG. 13 is a plan view illustrating an embodiment of the third insulating layer (IL3) of a display panel, FIG. 14 is a plan view illustrating an embodiment of the second conductive layer (CL2) of a display panel, FIG. 15 is a plan view illustrating an embodiment of the fourth insulating layer (IL4) of a display panel, and FIG. 16 is a plan view illustrating an embodiment of the third conductive layer (CL3) of a display panel. FIGS. 9 to 16 show the planar structure of each layer placed in a pixel circuit region (PCA) corresponding to three pixel circuits that can be placed in a first region (11), and FIG. 8 shows a first transistor (T1), a storage capacitor (Cst), and a second transistor (T2) placed in any one pixel circuit region (PCA, FIG. 9 and other figures).

[0133] Referring to FIGS. 8 and 9, a first insulating layer (IL1) may be disposed on a substrate (100). The first insulating layer (IL1) may include a first inorganic part (IL1a) comprising an inorganic insulating material and a first organic part (IL1b) comprising an organic insulating material. The first organic part (IL1b) may surround the entirety of each first inorganic part (IL1a) in a planar manner.

[0134] The first inorganic part (IL1a) may include an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride. The first organic part (IL1b) may include an organic insulating material such as acrylic, BCB (Benzocyclobutene), polyimide, or HMDSO (Hexamethyldisiloxane).

[0135] The first inorganic parts (IL1a) may be spaced apart from each other. In one embodiment, FIG. 9 illustrates that the first inorganic parts (IL1a) are each placed in pixel circuit regions (PCA) but spaced apart from each other.

[0136] Referring to FIG. 9, in one embodiment, the shape of the first inorganic part (IL1a) may be the same as the shape of the semiconductor layer (Act) described later with reference to FIG. 10. The area (or width) of the first inorganic part (IL1a) may be the same as the area (or width) of the semiconductor layer (Act) described later with reference to FIG. 10.

[0137] In one embodiment, the shape of the first inorganic part (IL1a) may differ from the shape of the semiconductor layer (Act) described later with reference to FIG. 10. The area (or width) of the first inorganic part (IL1a) may be larger than the area (or width) of the semiconductor layer (Act) described later with reference to FIG. 10.

[0138] Referring to FIGS. 8, 9, and 10, a semiconductor layer (Act) may be disposed on a first insulating layer (IL1). The semiconductor layer (Act) disposed in each pixel circuit area (PCA) may have a wavy shape as shown in FIG. 10.

[0139] The semiconductor layer (Act) illustrated in FIG. 10 may be placed on the first insulating layer (IL1) described with reference to FIG. 9. In one embodiment, with reference to FIG. 8, FIG. 9 and FIG. 10, the semiconductor layer (Act) placed in each pixel circuit area (PCA) may cover the entire first inorganic portion (IL1a) between the semiconductor layer (Act) and the substrate (100, FIG. 8). In other words, the entire bottom surface of the semiconductor layer (Act) may overlap (e.g., in direct contact) with the top surface of the first inorganic portion (IL1a).

[0140] The semiconductor layer (Act) of each pixel circuit region (PCA) may include the semiconductor layer of the transistors corresponding to the pixel circuit. In other words, a part of the semiconductor layer (Act) may correspond to the semiconductor layer of each transistor. As an example, FIG. 10 illustrates that the semiconductor layer (Act) includes the first to ninth semiconductor layers (A1, A2, A3, A4, A5, A6, A7, A8, A9) of the first to ninth transistors (T1, T2, T3, T4, T5, T6, T7, T8, T9, FIG. 4c) described with reference to FIG. 4c. Each of the first to ninth semiconductor layers (A1, A2, A3, A4, A5, A6, A7, A8, A9) corresponds to the semiconductor layer of the first to ninth transistors (T1, T2, T3, T4, T5, T6, T7, T8, T9, FIG. 4c). FIG. 8 illustrates the first semiconductor layer (A1) and the second semiconductor layer (A2) of the semiconductor layer (Act).

[0141] Referring to FIG. 8, the first semiconductor layer (A1) may include a channel region (C1) and source regions and drain regions (B1, D1) disposed on both sides of the channel region (C1), and the second semiconductor layer (A2) may include a channel region (C2) and source regions and drain regions (B2, D2) disposed on both sides of the channel region (C2). The first semiconductor layer (A1) and the second semiconductor layer (A2) may be integrally connected. FIG. 8 illustrates the channel region, source region, and drain region of the first and second semiconductor layers (A1, A2), but the present invention is not limited thereto. Each of the third to ninth semiconductor layers (A3, A4, A5, A6, A7, A8, A9) includes a channel region, a source region, and a drain region.

[0142] The semiconductor layer (Act) may include polysilicon. In an alternative embodiment, the semiconductor layer (Act) may include amorphous silicon, an oxide semiconductor, an organic semiconductor, etc.

[0143] Referring to FIGS. 8, 10, and 11, a second insulating layer (IL2) may be disposed on a semiconductor layer (Act). The second insulating layer (IL2) may include a second inorganic part (IL2a) comprising an inorganic insulating material and a second organic part (IL2b) disposed around the second inorganic part (IL2a) and comprising an organic insulating material. The second organic part (IL2b) may surround the entirety of each second inorganic part (IL2a) in a planar manner.

[0144] The second inorganic part (IL2a) may include an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride. The second organic part (IL2b) may include an organic insulating material such as acrylic, BCB (Benzocyclobutene), polyimide, or HMDSO (Hexamethyldisiloxane). The second organic part (IL2b) may surround the entirety of each second inorganic part (IL2a) in a planar manner.

[0145] The upper surface of the second inorganic part (IL2a) and the upper surface of the second organic part (IL2b) may be located on substantially the same plane. In one embodiment, for example, the upper surface of the second inorganic part (IL2a) and the upper surface of the second organic part (IL2b) may be located on the upper surface (IL2u, FIG. 8) of the second insulating layer (IL2). In one embodiment, as shown in FIG. 8, the first vertical distance from the upper surface of the substrate (100) to the upper surface of the second inorganic part (IL2a) and the second vertical distance from the upper surface of the substrate (100) to the upper surface of the second organic part (IL2b) may be the same.

[0146] The second inorganic parts (IL2a) may be placed in pixel circuit regions (PCAs). The second inorganic parts (IL2a) may be placed spaced apart from each other in the same pixel circuit region (PCA).

[0147] The second insulating layer (IL2) illustrated in FIG. 11 may be placed on the semiconductor layer (Act) described with reference to FIG. 10. In one embodiment, with reference to FIG. 8, FIG. 10, and FIG. 11, the second inorganic portions (IL2a) may be placed in overlap with the semiconductor layer (Act, FIG. 10) placed in the corresponding pixel circuit area (PCA). A portion of the semiconductor layer (Act, FIG. 10) that overlaps with the second inorganic portion (IL2a) may correspond to the channel area of ​​the first to ninth semiconductor layers (A1, A2, A3, A4, A5, A6, A7, A8, A9, FIG. 10). In this regard, FIG. 8 illustrates that one of the second inorganic portions (IL2a) overlaps with the channel area (C1) of the first semiconductor layer (A1), and the other overlaps with the channel area (C2) of the second semiconductor layer (A2).

[0148] The width of one of the second inorganic parts (IL2a) placed in each pixel circuit area (PCA) may differ from the width of the other. In one embodiment, for example, the width (W1) of one of the second inorganic parts (IL2a) shown in FIG. 11 may be greater than the width (W2) of the other second inorganic part (IL2a). In one embodiment, among the second inorganic parts (IL2a) placed in each pixel circuit area (PCA), the second inorganic part (IL2a) that overlaps with the first semiconductor layer (A1, FIG. 10) may have the widest width (W1) among the remaining (other) second inorganic parts (IL2a) placed in the same pixel circuit area (PCA).

[0149] As illustrated in FIG. 8, the second organic part (IL2b) (which may be referred to as the first organic part when first mentioned) may include a second-1 organic part (IL2ba) (which may be referred to as the first-1 organic part) that overlaps the semiconductor layer (Act) and a second-2 organic part (IL2bb) (which may be referred to as the first-2 organic part) that does not overlap the semiconductor layer (Act). The thickness (t1) of the second inorganic part (IL2a) that overlaps the semiconductor layer (Act) may be smaller than the thickness (t2) of the second-2 organic part (IL2bb) that does not overlap the semiconductor layer (Act). The thickness of the second-1 organic part (IL2ba) may be smaller than the thickness (t2) of the second-2 organic part (IL2bb). The thickness of the 2-1 organic part (IL2ba) may be substantially the same as the thickness (t1) of the 2 inorganic part (IL2a).

[0150] Referring to FIGS. 8, 11, and 12, the first conductive layer (CL1) may be disposed on the second insulating layer (IL2). FIG. 12 illustrates the second inorganic portions (IL2a) disposed in each pixel circuit area (PCA) shown in FIG. 11 together with the first conductive layer (CL1) for better understanding.

[0151] The first conductive layer (CL1) may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed as a multilayer or single layer including the above materials.

[0152] The first conductive layer (CL1) may include first to ninth gate electrodes (GE1, GE2, GE3, GE4, GE5, GE6, GE7, GE8, GE9) corresponding to each pixel circuit region (PCA). The first to ninth gate electrodes (GE1, GE2, GE3, GE4, GE5, GE6, GE7, GE8, GE9) may each overlap with the second inorganic portion (IL2a) of the second insulating layer (IL2, FIG. 11) disposed therebelow. The first to ninth gate electrodes (GE1, GE2, GE3, GE4, GE5, GE6, GE7, GE8, GE9) may each come into direct contact with the upper surface of the second inorganic portion (IL2a) of the second insulating layer (IL2, FIG. 11).

[0153] The width (W3) of the first gate electrode (GE1) placed in each pixel circuit region (PCA) may be substantially the same as the width (W1, FIG. 11) of the second inorganic part (IL2a) superimposed on the first gate electrode (GE1). The width (W3) of the first gate electrode (GE1) placed in each pixel circuit region (PCA) may be smaller or larger than the width (W1, FIG. 11) of the second inorganic part (IL2a) superimposed on the first gate electrode (GE1).

[0154] The first gate electrode (GE1) can be integrally connected with the first electrode (CE1) of the storage capacitor (Cst, FIG. 8). In other words, the first gate electrode (GE1) can have the function of the first electrode (CE1) of the storage capacitor (Cst, FIG. 8), and the first electrode (CE1) can have the function of the first gate electrode (GE1).

[0155] When the first gate electrode (GE1) is the first electrode (CE1), the first electrode (CE1) of the storage capacitor (Cst) may overlap with the second inorganic portion (IL2a) of the second insulating layer (IL2) which overlaps with the channel region (C1) of the first semiconductor layer (A1). The first gate electrode (GE1) and / or the first electrode (CE1) may come into direct contact with the upper surface of the second inorganic portion (IL2a). In one embodiment, the width (W3, FIG. 11) of the first electrode (CE1) may be substantially the same as the width (W1, FIG. 11) of the second inorganic portion (IL2a) overlapped with the first electrode (CE1). In one embodiment, the width (W3) of the first electrode (CE1) may be smaller or larger than the width (W1, FIG. 11) of the second inorganic portion (IL2a) overlapped with the first electrode (CE1).

[0156] The scan signal line (GWL) may be extended along a first direction (e.g., x direction) to cross pixel circuit regions (PCAs) in the first region (11). The scan signal line (GWL) may include a second gate electrode (GE2) and a third gate electrode (GE3) of each pixel circuit region (PCA).

[0157] The initialization control line (GIL) may be extended along a first direction (e.g., x direction) to cross pixel circuit regions (PCAs) in the first region (11). The initialization control line (GIL) may include a fourth gate electrode (GE4) of each pixel circuit region (PCA).

[0158] The light emission control line (EML) may be extended along a first direction (e.g., x direction) to cross the pixel circuit regions (PCAs) in the first region (11). The light emission control line (EML) may be located on the opposite side of the scan signal line (GWL) with the first gate electrode (GE1) in between. The scan signal line (GWL) may include the fifth gate electrode (GE5), the sixth gate electrode (GE6), and the eighth gate electrode (GE8) of each pixel circuit region (PCA).

[0159] The bypass control line (GBL) may be extended along a first direction (e.g., x direction) to cross pixel circuit regions (PCAs) in the first region (11). The bypass control line (GBL) may include the seventh gate electrode (GE7) and the ninth gate electrode (GE9) of each pixel circuit region (PCA).

[0160] In one embodiment, the first conductive layer (CL1) may include an electrode of an auxiliary capacitor (Ca, FIG. 4c) (hereinafter referred to as a third electrode, CE3). The third electrode (CE3) may be placed in each pixel circuit area (PCA).

[0161] Referring to FIGS. 8, 12, and 13, a third insulating layer (IL3) may be disposed on a first conductive layer (CL1). The third insulating layer (IL3) may include a third inorganic part (IL3a) and a third organic part (IL3b) surrounding the third inorganic part (IL3a). The third organic part (IL3b) may surround the entirety of each third inorganic part (IL3a) in a planar manner.

[0162] The third inorganic part (IL3a) may include an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride. The third organic part (IL3b) may include an organic insulating material such as acrylic, BCB (Benzocyclobutene), polyimide, or HMDSO (Hexamethyldisiloxane).

[0163] The third insulating layer (IL3) of FIG. 13 may be placed on the third conductive layer (CL1) described with reference to FIG. 12. One of the third inorganic parts (IL3a) placed in each pixel circuit area (PCA) of FIG. 13 may overlap with the first gate electrode (GE1, FIG. 12) and / or the first electrode (CE1, FIG. 12), and the other may overlap with the third electrode (CE3, FIG. 12).

[0164] The upper surface of the third inorganic part (IL3a) and the upper surface of the third organic part (IL3b) may be located in substantially the same plane. In one embodiment, for example, the upper surface of the third inorganic part (IL3a) and the upper surface of the third organic part (IL3b) may be located on the upper surface (IL3u, FIG. 8) of the third insulating layer (IL3). In one embodiment, as shown in FIG. 8, the third vertical distance from the upper surface of the substrate (100) to the upper surface of the third inorganic part (IL3a) and the fourth vertical distance from the upper surface of the substrate (100) to the upper surface of the third organic part (IL3b) may be the same.

[0165] Third inorganic parts (IL3a) may be placed in each pixel circuit area (PCA). Second inorganic parts (IL2a) may be placed spaced apart from each other in the same pixel circuit area (PCA). In one embodiment, one of the second inorganic parts (IL2a) in the same pixel circuit area (PCA) may overlap with the first electrode (CE1, FIG. 12), and the other may overlap with the third electrode (CE3, FIG. 12).

[0166] In one embodiment, the width (W4, FIG. 13) of the third inorganic part (IL3a) overlapping with the first electrode (CE1) shown in FIG. 8 and FIG. 12 may be equal to or greater than the width (W3, FIG. 12) of the first electrode (CE1). In one embodiment, the width (W4, FIG. 13) of the third inorganic part (IL3a) overlapping with the first electrode (CE1) may be smaller than the width (W3, FIG. 12) of the first electrode (CE1). The third inorganic part (IL3a) may overlap with the second inorganic part (IL2a).

[0167] Referring to FIG. 8, the third organic part (IL3b) may include a third-1 organic part (IL3ba) that overlaps with the first conductive layer (CL1, FIG. 12) and a third-2 organic part (IL3bb) that does not overlap with the first conductive layer (CL1, FIG. 12). In one embodiment, the third-1 organic part (IL3ba) may overlap with the gate electrode of the switching transistors, such as the second gate electrode (GE2) of the second transistor (T2).

[0168] The thickness (t3) of the third inorganic part (IL3a) overlapping with the first conductive layer (CL1, FIG. 12), for example, the third inorganic part (IL3a) overlapping with the first electrode (CE1), may be smaller than the thickness (t4) of the third-2 organic part (IL3bb) not overlapping with the first conductive layer (CL1, FIG. 12). The thickness of the third-1 organic part (IL3ba) may be smaller than the thickness (t4) of the third-2 organic part (IL3bb). The thickness of the third-1 organic part (IL3ba) may be substantially the same as the thickness (t3) of the third inorganic part (IL3a). In one embodiment, for example, as shown in FIG. 8, the thickness of the third-1 organic part (IL3ba) overlapping with the second gate electrode (GE2) may be substantially the same as the thickness (t3) of the third inorganic part (IL3a).

[0169] Referring to FIGS. 8, 13, and 14, the second conductive layer (CL2) may be disposed on the third insulating layer (IL3). FIG. 14 illustrates the third inorganic parts (IL3a) disposed in each pixel circuit area (PCA) shown in FIG. 13 together with the second conductive layer (CL2) for better understanding.

[0170] The second conductive layer (CL2) may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed as a multilayer or single layer including the above materials.

[0171] The second conductive layer (CL2) may include a second electrode (CE2) and a fourth electrode (CE4) corresponding to each pixel circuit area (PCA). The second electrode (CE2) and the fourth electrode (CE4) may overlap with the third inorganic portion (IL3a) of the third insulating layer (IL3, FIG. 13) placed below them. The second electrode (CE2) and the fourth electrode (CE4) may come into direct contact with the upper surface of the third inorganic portion (IL3a) of the third insulating layer (IL3, FIG. 13) placed below them.

[0172] In one embodiment, the width (W5) of the second electrode (CE2) placed in each pixel circuit area (PCA) may be equal to or greater than the width (W4, FIG. 13) of the third inorganic part (IL3a) superimposed on the second electrode (CE2). In one embodiment, the width (W5) of the second electrode (CE2) may be smaller than the width (W4, FIG. 13) of the third inorganic part (IL3a) superimposed on the second electrode (CE2).

[0173] Referring to FIGS. 8, 14, and 15, a fourth insulating layer (IL4) may be disposed on a second conductive layer (CL2). The fourth insulating layer (IL4) may include a fourth inorganic part (IL4a) overlapping with the second conductive layer (CL2) and a fourth organic part (IL4b) surrounding the fourth inorganic part (IL4a). The fourth organic part (IL4b) may surround the entirety of each fourth inorganic part (IL4a) in a plane.

[0174] The fourth inorganic part (IL4a) may include an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride. The fourth organic part (IL34) may include an organic insulating material such as acrylic, BCB (Benzocyclobutene), polyimide, or HMDSO (Hexamethyldisiloxane).

[0175] The upper surface of the fourth inorganic part (IL4a) and the upper surface of the fourth organic part (IL4b) may be located substantially on the same plane. In one embodiment, for example, the upper surface of the fourth inorganic part (IL4a) and the upper surface of the fourth organic part (IL4b) may be located on the upper surface (IL4u, FIG. 8) of the fourth insulating layer (IL4). In one embodiment, as shown in FIG. 8, the fifth vertical distance from the upper surface of the substrate (100) to the upper surface of the fourth inorganic part (IL4a) and the fourth vertical distance from the upper surface of the substrate (100) to the upper surface of the fourth organic part (IL4b) may be the same.

[0176] The fourth inorganic parts (IL4a) may each be placed in pixel circuit regions (PCAs). The fourth inorganic parts (IL4a) may be placed spaced apart from each other in the same pixel circuit region (PCA).

[0177] The fourth organic part (IL4b) may include a fourth-1 organic part (IL4ba) that overlaps with the second conductive layer (CL2, FIG. 14) and a fourth-2 organic part (IL4bb) that does not overlap with the second conductive layer (CL2, FIG. 14).

[0178] The thickness (t5) of the fourth inorganic part (IL4a) overlapping with the second conductive layer (CL2, FIG. 14), for example, the fourth inorganic part (IL4a) overlapping with the second electrode (CE2), may be smaller than the thickness (t6) of the fourth-2 organic part (IL4bb) that does not overlap with the second conductive layer (CL2, FIG. 14). The thickness of the fourth-1 organic part (IL4ba) may be substantially the same as the thickness (t5) of the fourth inorganic part (IL4a).

[0179] Referring to FIGS. 8, 15, and 16, the third conductive layer (CL3) may be disposed on the fourth insulating layer (IL4). FIG. 16 illustrates the fourth inorganic parts (IL4a) disposed in each pixel circuit area (PCA) shown in FIG. 15 together with the third conductive layer (CL3) for better understanding.

[0180] The third conductive layer (CL3) may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed as a multilayer or single layer including the above materials.

[0181] The third conductive layers (CL3) may include connectors (DCL) that can be electrically connected to the semiconductor layer (Act, FIG. 10), the first gate electrode (GE1, FIG. 12), the first electrode (CE1, FIG. 12), and / or the second electrode (CE2, FIG. 14). In one embodiment, as shown in FIG. 16, the third conductive layer (CL3) may include first and second initialization voltage lines (VIL1, VIL2), a second voltage line (VSSL), and connectors (DCL). Each of the first and second initialization voltage lines (VIL1, VIL2), the second voltage line (VSSL), and connectors (DCL) may overlap with the fourth inorganic portion (IL4a) of the fourth insulating layer (IL4) disposed therebelow. The connection pieces (DCL) illustrated in FIG. 16 may include a first connection piece (DCLa) connected to a second semiconductor layer (A2, FIG. 10), a second connection piece (DCLb) superimposed on a second electrode (CE2, FIG. 14), a third connection piece (DCLc) electrically connecting a first gate electrode (GE1, FIG. 12) and a third semiconductor layer (A3, FIG. 10), and a fourth connection piece (DCLd) electrically connecting a second electrode (CE2, FIG. 14) and fifth and eighth semiconductor layers (A5, A8, FIG. 10). The first to fourth connection pieces (DCLa, DCLb, DCLc, DCLd) may each superimpose on a fourth inorganic part (IL4a).

[0182] The connecting pieces (DCL) may be electrically connected to a semiconductor layer, a first electrode (CE1, FIG. 12), and / or a second electrode (CE2, FIG. 14). FIG. 8 illustrates, as an embodiment, a first connecting piece (DCLa) electrically connected to a second semiconductor layer (A2) and a second connecting piece (DCLb) overlapping with the second electrode (CE2).

[0183] Referring to FIG. 8, the first connecting piece (DCLa) can electrically connect the data line (DL) placed on the fifth insulating layer (IL5) and the second semiconductor layer (A2). The first connecting piece (DCLa) can directly contact the upper surface of the second semiconductor layer (A2) through a first contact hole (CNT1) that penetrates the insulating layers (e.g., the second to fourth insulating layers (IL2, IL3, IL4)) between the second semiconductor layer (A2) and the first connecting piece (DCLa). At this time, the first contact hole (CNT1) can pass through each of the organic portions (IL2b, IL3b, IL4b) of the second to fourth insulating layers (IL2, IL3, IL4). In other words, the first contact hole (CNT1) may overlap with or not pass through the inorganic portions (IL2a, IL3a, IL4a) of the second to fourth insulating layers (IL2, IL3, IL4).

[0184] A sixth insulating layer (IL6) may be disposed on the data line (DL). The sixth insulating layer (IL6) may include an organic insulating material. FIG. 8 illustrates the data line (DL) and the first connecting piece (DCLa) being disposed on different layers, but the present invention is not limited thereto. In another embodiment, the first connecting piece (DCLa) may be disposed on the same layer as the data line (DL) and may be a part of the data line (DL).

[0185] According to the embodiments described with reference to FIGS. 8 to 16, at least one of the insulating layers disposed in the first region (11), such as the first to fifth insulating layers (IL1, IL2, IL3, IL4, IL5), comprises a patterned inorganic portion and an organic layer surrounding the inorganic portion, thereby ensuring the operating characteristics of the pixel circuit (e.g., the operating characteristics of the transistor and storage capacitor) while simultaneously preventing damage to the insulating layer and the layers surrounding the insulating layer due to stress applied to the display panel during stretching of the display panel. Thus, a display panel capable of realizing high-quality images and being stretchable can be provided.

[0186] FIG. 17 is a schematic perspective view of an embodiment of an electronic device (1) including a display panel, and FIG. 18 is a block diagram of an embodiment of an electronic device (1) including a display panel (10).

[0187] Referring to FIG. 17, the electronic device (1) can be freely deformed in three dimensions and can provide a three-dimensional image surface through the display area (DA). The statement that the electronic device (1) can be freely deformed in three dimensions is distinguished from the operation of an electronic device having a rollable display panel, such as when only a part of the rolled-up display area is visible to the user, and then another part of the rolled-up display area is unfolded so that the entire display area is visible to the user (or when the entire unfolded display area is visible to the user, and then the display area is rolled up so that only a part of the display area is visible to the user). The electronic device (1) according to the embodiments of the present invention may exhibit a deformation such as the area of ​​the entire display area (DA) increasing or decreasing again as the electronic device (1) is deformed in the x direction, y direction, and / or z direction.

[0188] Referring to FIG. 18, the electronic device (1) may include a processor (1100), memory (1200), input module (1300), display module (1400), power module (1500), built-in module (1600), and external module (1700). In one embodiment, at least one of the above-described components may be omitted from the electronic device (1), or one or more other components may be added. In one embodiment, some of the above-described components (e.g., built-in module (1600)) may be integrated into another component (e.g., display module (1400)).

[0189] The processor (1100) can execute software to control at least one other component (e.g., a hardware or software component) of the electronic device (1) connected to the processor (1100) and can perform various data processing or operations. In one embodiment, as at least part of the data processing or operations, the processor (1100) can store commands or data received from other components (e.g., an input module (1300), a sensor module (1610), or a communication module (1730)) in a volatile memory (1210), process the commands or data stored in the volatile memory (1210), and store the resulting data in a non-volatile memory (1220).

[0190] The processor (1100) may include a main processor (1110) and an auxiliary processor (1120). The main processor (1110) may include at least one of a central processing unit (1111, CPU) and an application processor (AP). The main processor (1110) may further include at least one of a graphic processing unit (1112, GPU), a communication processor (CP), and an image signal processor (ISP). The main processor (1110) may further include a neural processing unit (1113, NPU). The neural processing unit (1113) is a processor specialized for processing artificial intelligence models, and the artificial intelligence model may be generated through machine learning. The artificial intelligence model may include a plurality of artificial neural network layers. An artificial neural network may be a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to the hardware structure, the artificial intelligence model may include a software structure, either additionally or substantially. At least two of the processing unit and processor described above may be implemented as a single integrated configuration (e.g., a single chip), or each may be implemented as an independent configuration (e.g., multiple chips).

[0191] The auxiliary processor (1120) may include a controller (1121). The controller (1121) may include an interface conversion circuit and a timing control circuit. The controller (1121) receives a video signal from the main processor (1110), converts the data format of the video signal to match the interface specifications with the display module (1400), and outputs video data. The controller (1121) may output various control signals required for driving the display module (1400).

[0192] The auxiliary processor (1120) may further include data processing circuits such as a data conversion circuit (1122), a gamma correction circuit (1123), and a rendering circuit (1124). The data conversion circuit (1122) receives image data from the controller (1121) and can compensate the image data so that the image is displayed at a desired brightness according to the characteristics of the electronic device (1) or the user's settings, or can convert the image data to reduce power consumption or compensate for afterimages. The gamma correction circuit (1123) can convert image data or gamma reference voltage, etc. so that the image displayed on the electronic device (1) has desired gamma characteristics. The rendering circuit (1124) receives image data from the controller (1121) and can render the image data by considering the pixel arrangement of the display panel (10) applied to the electronic device (1). At least one of the data conversion circuit (1122), gamma correction circuit (1123), and rendering circuit (1124) may be integrated into another component (e.g., main processor (1110) or controller (1121)). In one embodiment, the auxiliary processor (1120) may be integrated into the data driver (1430).

[0193] The memory (1200) can store various data used by at least one component of the electronic device (1) (e.g., a processor (1100) or a sensor module (1610)) and input or output data for related commands. The memory (1200) may include at least one of a volatile memory (1210) and a non-volatile memory (1220).

[0194] The input module (1300) can receive commands or data to be used for components of the electronic device (1) (e.g., processor (1100), sensor module (1610) or sound output module (1630)) from outside the electronic device (1) (e.g., user or external electronic device (2000)).

[0195] The input module (1300) may include a first input module (1310) into which commands or data are input from a user and a second input module (1320) into which commands or data are input from an external electronic device (2000).

[0196] The first input module (1310) may include a microphone, a mouse, a keyboard, or a pen (e.g., a passive pen or an active pen). The first input module (1310) may include mechanical input means or touch input means, such as a button, a dome switch, a jog wheel, or a jog switch, located on the rear or side of the electronic device (1). The touch input means may include a touchscreen layer of the display panel (10).

[0197] The second input module (1320) can be connected to various types of external electronic devices (2000) connected to the electronic device (1) via wired or wireless connection. According to one embodiment, the second input module (1320) may include an HDMI (high definition multimedia interface), a USB (universal serial bus) interface, an SD card interface, or an audio interface. The second input module (1320) may include a connector capable of physically connecting the electronic device (1) to the external electronic device (2000), for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector). The electronic device (1) can perform appropriate control related to the connected external electronic device (2000) in response to the external electronic device (2000) being connected to the second input module (1320).

[0198] The display module (1400) provides information visually to the user. The display module (1400) may include a display panel (10), a scan driver (1420), and a data driver (1430).

[0199] The display panel (10) displays (outputs) information processed by the electronic device (1). The display panel (10) can display information on the execution screen of an application running on the electronic device (1), or UI (User Interface) and GUI (Graphic User Interface) information based on the execution screen information.

[0200] The scan driver (1420) may be placed (e.g., mounted) on the display panel (10) as a driving chip. In an alternative embodiment, the scan driver (1420) may be formed directly on the display panel (10). In one embodiment, for example, the scan driver (1420) may include an ASG (Amorphous Silicon TFT Gate driver circuit), an LTPS (Low Temperature Polycrystalline Silicon) TFT Gate driver circuit, or an OSG (Oxide Semiconductor TFT Gate driver circuit) embedded in the display panel (10). The scan driver (1420) receives a control signal from the controller (1121) and outputs scan signals to the display panel (10) in response to the control signal.

[0201] The display panel (10) may further include a light emission control driver. The light emission control driver outputs a light emission control signal to the display panel (10) in response to a control signal received from the controller (1121). The light emission control driver may be formed separately from the scan driver (1420) or may be integrated into the scan driver (1420).

[0202] The data driver (1430) receives a control signal from the controller (1121), converts the image data into an analog voltage data voltage in response to the control signal, and then outputs the data voltages to the display panel (10).

[0203] The data driver (1430) may be integrated with some components of the auxiliary processor (1120). In one embodiment, for example, the data driver (1430) may be provided as a timing controller embedded driver integrated circuit (Timing controller embedded driver IC) including a controller (1121).

[0204] The power module (1500) supplies power to the components of the electronic device (1). The power module (1500) may include a battery that charges the power voltage. In an alternative embodiment, the power module (1500) is provided with a connection port, which may be included in a second input module (1320) to which an external charger is connected to supply power for charging the battery. Alternatively, the power module (1500) may include a wireless power transceiver so as to be able to charge the battery wirelessly. The wireless power transceiver may include a plurality of coil-shaped antenna radiators. The power module (1500) may include a power management integrated circuit (PMIC). The PMIC supplies optimized power to each of the components of the electronic device (1).

[0205] The electronic device (1) may further include an internal module (1600) and an external module (1700). The internal module (1600) may include a sensor module (1610), an antenna module (1620), and an audio output module (1630). The external module (1700) may include a camera module (1710), a light module (1720), and / or a communication module (1730).

[0206] The sensor module (1610) may include touch electrodes of the touchscreen layer of the display panel (10) and a touch sensor driver. The sensor module (1610) may detect input by the user's body or input by a pen and generate an electrical signal or data value corresponding to the input. The sensor module (1610) may include at least one of a fingerprint sensor (1611), an input sensor (1612), and a digitizer (1613).

[0207] The fingerprint sensor (1611) can generate a data value corresponding to the user's fingerprint. The fingerprint sensor (1611) may include either an optical or capacitive fingerprint sensor.

[0208] The input sensor (1612) can generate a data value corresponding to coordinate information of input by the user's body or input by a pen. The input sensor (1612) generates a data value of the amount of change in capacitance due to the input. The input sensor (1612) can detect input by a passive pen or transmit and receive data with an active pen.

[0209] The input sensor (1612) may measure biosignals such as blood pressure, water, or body fat. In one embodiment, for example, when a user contacts a part of their body to the sensor layer or sensing panel and does not move for a certain period of time, the input sensor (1612) may detect biosignals based on changes in the electric field caused by the part of the body and output information desired by the user to the display module (1400).

[0210] The digitizer (1613) can generate a data value corresponding to the coordinate information of the input by the pen. The digitizer (1613) generates the amount of electromagnetic change caused by the input as a data value. The digitizer (1613) can detect input by a passive pen or transmit and receive data with an active pen.

[0211] In one embodiment, at least one of a fingerprint sensor (1611), an input sensor (1612), and a digitizer (1613) may be embedded in the display panel (10). In one embodiment, for example, at least one of the fingerprint sensor (1611), the input sensor (1612), and the digitizer (1613) may be formed through a process that is continuous with the process of forming the pixel circuits and light-emitting diodes of the display panel (10). As a result, the display panel (10) may function as one of the input modules (1300) that provide an input interface between the electronic device (1) and the user, and may also function as a display module (1400) that provides an output interface between the electronic device (1) and the user.

[0212] In one embodiment, at least two of the fingerprint sensor (1611), input sensor (1612), and digitizer (1613) may be formed to be integrated into a single sensing panel through the same process. The sensing panel may be positioned between the display panel (10) and a window positioned above the display panel (10), but the present invention is not limited thereto.

[0213] The antenna module (1620) may include one or more antennas for transmitting a signal or power to the outside or receiving it from the outside. According to one embodiment, the communication module (1730) may transmit a signal to an external electronic device or receive it from an external electronic device through an antenna suitable for a communication method. The antenna pattern of the antenna module (1620) may be integrated with one component of the display module (1400) (e.g., a display panel (10)) or an input sensor (1612), etc.

[0214] The sound output module (1630) is a device for outputting sound signals to the outside of the electronic device (1), and can output sound data received from the communication module (1730) or stored in the memory (1200) in call signal reception, call mode or recording mode, voice recognition mode, broadcast reception mode, etc. The sound output module (1630) can output sound signals related to functions performed in the electronic device (1) (e.g., call signal reception sound, message reception sound, etc.). The sound output module (1630) may include a receiver and a speaker. At least one of the receiver and the speaker may be a sound generating device attached to the lower part of the display panel (10) to vibrate the display panel (10) and output sound. The sound generating device may be a piezoelectric element or a piezoelectric actuator that contracts and expands according to an electric signal, or an exciter that generates magnetic force using a voice coil to vibrate the display panel (10).

[0215] The camera module (1710) can capture still images and video. In one embodiment, the camera module (1710) may include one or more lenses, image sensors, or image signal processors. The camera module (1710) may further include an infrared camera capable of measuring the presence or absence of a user, the location of a user, the user's gaze, or such.

[0216] The light module (1720) can output a signal to indicate the occurrence of an event using light from a light source, or provide light for image acquisition. Here, examples of event occurrence may include receiving a message, receiving a call signal, a missed call, an alarm, a schedule notification, receiving an email, or receiving battery charge capacity information notification. The light module (1720) may include a light-emitting diode or a xenon lamp. The light module (1720) may emit single-color or multiple-color light toward the front or rear of the electronic device (1). The light module (1720) may operate in conjunction with the camera module (1710) or operate independently.

[0217] The communication module (1730) can support the establishment of a wired or wireless communication channel between an electronic device (1) and an external electronic device (2000), and the performance of communication through the established communication channel. The communication module (1730) may include at least one or all of a wireless communication module such as a cellular communication module, a short-range wireless communication module, or a GNSS (global navigation satellite system) communication module, and a wired communication module such as a LAN (local area network) communication module or a power line communication module. The communication module (1730) can transmit and receive wireless signals over an internet network using at least one of WLAN (Wireless LAN), Wi-Fi (Wireless-Fidelity), Wi-Fi (Wireless Fidelity) Direct, or DLNA (Digital Living Network Alliance) technology. Additionally, the communication module (1730) can support short-range communication by using at least one of Bluetooth, RFID (Radio Frequency Identification), Infrared Data Association (IrDA), Ultra Wideband (UWB), ZigBee, NFC (Near Field Communication), Wi-Fi (Wireless-Fidelity), Wi-Fi Direct, and Wireless USB (Wireless Universal Serial Bus) technologies. The various types of communication modules (1730) described above may be implemented as a single chip or as separate chips.

[0218] In the embodiment described with reference to FIGS. 17 and 18, the display panel (10) is described as being included in an electronic device (1) that provides a three-dimensionally deformable image surface by being freely deformed in three dimensions, but the present invention is not limited thereto. As shown in FIGS. 20 and 21, the electronic device includes an image providing area having a fixed shape, and in the process of manufacturing the electronic device, the display panel is placed in the image providing area of ​​the electronic device described above, and the display panel can be fixed to the electronic device in a three-dimensionally deformed state.

[0219] FIGS. 19a, FIGS. 19b, FIGS. 20, and FIGS. 21 are each schematic perspective views of an electronic device. The electronic devices (1A, 1A', 1B, 1C) illustrated in FIGS. 19a through 21 may each include components of the electronic device (1) described with reference to FIG. 18.

[0220] FIGS. 19a and 19b illustrate a smart watch as an electronic device (1A, 1A') according to one embodiment. In one embodiment, the display section (2110) of the smart watch may include a display panel as described above with reference to FIGS. 1 to 16. In one embodiment, the display panel corresponding to the display section (2110) can be stretched three-dimensionally, so it can provide various haptic information to the user. In one embodiment, for example, haptic information or visual information can be provided to the user by the movement of a stroke (2120) placed below the display section (2110). In one embodiment, as the stroke (2120) moves along a third direction (e.g., the z-direction or the -z-direction), the display panel is stretched three-dimensionally, and thus the image displayed on the display section (2110) can be implemented to have a three-dimensional height. In an alternative embodiment, the stroke (2120) may move along a third direction (e.g., z-direction or -z-direction) to provide haptic information (e.g., Braille information for the visually impaired, etc.) to the user through a display unit (2110, or display panel). The display panel corresponding to the display unit (2110) and the stroke (2120) may be housed or assembled in a frame (or housing, 2130).

[0221] FIG. 19a illustrates that the display unit (2110) has a flat shape in a state where it is not stretched three-dimensionally (e.g., the off state of the electronic device (1A), but the present invention is not limited thereto. As shown in FIG. 19b, in a state where it is not stretched three-dimensionally (e.g., the off state of the electronic device (1A), the display unit (2110) may have a dome shape.

[0222] FIGS. 19a and 19b illustrate a smart watch that is three-dimensionally stretchable, but the present invention is not limited thereto. In another embodiment, since the display panel of the smart watch is three-dimensionally stretchable, it can be fixedly assembled to a body frame having a predetermined shape (e.g., a hemispherical shape) while being stretched three-dimensionally along the body frame during the manufacturing process of the smart watch to form a display part (2110), and such a display part (2110) of the smart watch may not be three-dimensionally deformed.

[0223] FIG. 20 illustrates an embodiment of a robot as another electronic device (1B). The robot can move or perceive objects using a camera module (1710) and can display a predetermined image to a user through a display unit (3420, 3430). In some embodiments, since the display panels according to an embodiment of the present invention can be extended in various directions as described above, they can be assembled to the frame of the electronic device (1B) while being extended three-dimensionally along a body frame having a hemispherical shape to form a display unit (3420, 3430).

[0224] FIG. 21 illustrates an embodiment of a vehicle display device as another electronic device (1C). The vehicle display device may include a cluster (4510), a Center Information Display (CID) (4520), and / or a passenger display (4530). In one embodiment, since the display panel can be extended in various directions, it can be used for the cluster (4510), the Center Information Display (CID) (4520), and / or the passenger display (4530) regardless of the shape of the vehicle's internal frame.

[0225] FIG. 21 illustrates the cluster (4510), the Center Information Display (CID) (4520), and / or the passenger seat indicator (4530) being separated, but the invention is not limited thereto. In another embodiment, two or more selected from the cluster (4510), the Center Information Display (CID) (4520), and the passenger seat indicator (4530) may be connected as a single unit.

[0226] In some embodiments, the vehicle display device may include a button (4540) capable of displaying a predetermined image. The hemispherical button (4540) may sense touch input from a user (e.g., driver) in the z-direction or -z-direction. In some embodiments, the button (4540) of FIG. 21 may also include a stroke as previously described with reference to FIG. 19a and FIG. 19b.

[0227] FIGS. 19a, FIGS. 19b, FIGS. 20, and FIGS. 21 illustrate that the electronic device (1A, 1A', 1B, 1C) is a wearable electronic device that can be worn on the body, or is an electronic device for a robot or a vehicle, but the present invention is not limited thereto. The electronic device of the present invention may include electronic devices for various uses, such as commercial electronic devices, office electronic devices, educational electronic devices, wearable electronic devices, medical electronic devices, etc. In other words, a display panel according to one embodiment may be provided in various electronic devices as long as it includes an area capable of providing an image.

[0228] Although the present invention has been described with reference to the embodiments illustrated in the drawings, this is merely illustrative, and those skilled in the art will understand that various modifications and equivalent alternative embodiments are possible therefrom. Accordingly, the true scope of technical protection of the present invention should be determined by the technical spirit of the appended claims.

[0229] The embodiments described in this invention are to be considered merely for illustrative purposes and not for limiting purposes. The description of features and benefits within each embodiment should generally be considered applicable to other similar features or benefits of other embodiments. Although described with reference to the drawings, those skilled in the art will understand that various changes in form and detail are possible without departing from the spirit and scope defined by the following claims.

Claims

1. Substrate; A pixel circuit layer comprising a pixel circuit and a plurality of insulating layers, disposed on the substrate; A light-emitting diode disposed on the pixel circuit layer and electrically connected to the pixel circuit; comprising The pixel circuit of the pixel circuit layer comprises a driving transistor including a semiconductor layer and a gate electrode and a storage capacitor, and The plurality of insulating layers of the pixel circuit layer are, It includes a first insulating layer disposed between the semiconductor layer and the gate electrode, A display panel comprising a first insulating layer that overlaps with the gate electrode and a first organic portion surrounding the first inorganic portion.

2. In Paragraph 1, A display panel in which the upper surface of the first inorganic part and the upper surface of the first organic part are arranged in the same plane.

3. In Paragraph 1, A display panel in which the first organic part surrounds the entire first inorganic part on a flat plane.

4. In Paragraph 1, The above first organic part is, A first-1 organic part overlapping with the semiconductor layer above; and It includes a first and second organic part that does not overlap with the semiconductor layer above, and A display panel in which the thickness of the first inorganic part is smaller than the thickness of the first-second organic part.

5. In Paragraph 4, A display panel in which the thickness of the above-mentioned 1-1 organic part is substantially the same as the thickness of the above-mentioned 1 inorganic part.

6. In Paragraph 1, The above plurality of insulating layers are, It further includes a second insulating layer disposed between the first electrode and the second electrode of the storage capacitor, and A display panel comprising a second insulating layer, the second inorganic portion overlapping the first electrode and the second electrode, and a second organic portion surrounding the second inorganic portion.

7. In Paragraph 6, A display panel in which the upper surface of the second inorganic part and the upper surface of the second organic part are arranged in the same plane.

8. In Paragraph 6, A display panel in which the second inorganic part overlaps with the first inorganic part.

9. In Paragraph 1, The pixel circuit layer above A switching transistor electrically connected to the above driving transistor; and Further including a connecting piece connected to the semiconductor layer of the switching transistor; A display panel, wherein the above-mentioned connection piece is in direct contact with the semiconductor layer through a contact hole penetrating the insulating layers between the semiconductor layer of the switching transistor and the connection piece among the plurality of insulating layers, and the contact hole passes through each of the organic portions of the insulating layers between the semiconductor layer and the connection piece.

10. An electronic device including a display unit, Frame; A display panel assembled to the above frame and corresponding to the above display unit; and It includes a stroke assembled to the above frame and positioned below the above display panel, The above display panel is, Substrate; A pixel circuit layer comprising a pixel circuit and a plurality of insulating layers, disposed on the substrate; A light-emitting diode disposed on the pixel circuit layer and electrically connected to the pixel circuit; comprising The pixel circuit of the pixel circuit layer comprises a driving transistor including a semiconductor layer and a gate electrode and a storage capacitor, and The plurality of insulating layers of the pixel circuit layer are, A first insulating layer between the substrate and the semiconductor layer; A second insulating layer between the semiconductor layer and the gate electrode; and A third insulating layer on the second insulating layer; comprising At least one insulating layer among the first insulating layer to the third insulating layer is, An electronic device comprising a plurality of mutually spaced inorganic parts and an organic part surrounding each of the plurality of inorganic parts on a plane.

11. In Paragraph 10, The above electronic device is an electronic device including a wearable electronic device.

12. In Paragraph 10, The above display panel is an electronic device capable of being stretched three-dimensionally by the stroke.

13. In Paragraph 12, An electronic device in which the display portion has a dome shape when the above-mentioned display panel is not stretched three-dimensionally.

14. In Paragraph 10, An electronic device in which the upper surface of each of a plurality of inorganic parts and the upper surface of said organic part are arranged in the same plane.

15. In Paragraph 10, The above first insulating layer is, An electronic device comprising a first inorganic part overlapping with the semiconductor layer and a first organic part surrounding the first inorganic part.

16. In Paragraph 10, The above second insulating layer is, It includes a second inorganic part overlapping with the gate electrode and a second organic part surrounding the second inorganic part, The above second organic part is, A second-1 organic part overlapping with the semiconductor layer above; and A second organic part that does not overlap with the semiconductor layer; comprising An electronic device in which the thickness of the above 2-2 organic part is greater than the thickness of the above 2-1 organic part.

17. In Paragraph 16, The thickness of the second inorganic part is smaller than the thickness of the second-2 organic part, and An electronic device in which the thickness of the second inorganic part is substantially the same as the thickness of the second-1 organic part.

18. In Paragraph 16, The above storage capacitor includes a first electrode and a second electrode, wherein the first electrode and the gate electrode of the storage capacitor are integrally connected, and The above third insulating layer is, An electronic device comprising a third inorganic part overlapping the first electrode and the second electrode of the storage capacitor, and a third organic part surrounding the third inorganic part.

19. In Paragraph 18, An electronic device in which the upper surface of the second inorganic part and the upper surface of the second organic part are arranged in the same plane, and the third inorganic part overlaps with the second inorganic part.

20. In Paragraph 10, The pixel circuit layer above is, A switching transistor electrically connected to the above driving transistor; and Further including a connecting piece connected to the semiconductor layer of the switching transistor; The above-mentioned connection piece is in direct contact with the semiconductor layer through a contact hole penetrating the insulating layers between the semiconductor layer of the switching transistor and the connection piece among the plurality of insulating layers, wherein the contact hole passes through each of the organic portions of the insulating layers between the semiconductor layer and the connection piece, an electronic device.

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