Low noise amplifier in wireless communication system and electronic device using low noise amplifier

Abstract

This low noise amplifier (LNA) (200) in a wireless communication system comprises: a first amplifier (210) which includes a first transistor and is configured to generate a first output signal by amplifying a first input signal on the basis of a first gain; a second amplifier (230) which includes a plurality of second transistors and is configured to generate a second output signal by amplifying a second input signal on the basis of a second gain; and a balun (220) which is connected between the first amplifier and the second amplifier and configured to input the first output signal and output the second input signal. The balun includes a first inductor (241), a second inductor (243), and a third inductor (245), and the third inductor is connected to sources of the plurality of second transistors.

Description

Low-noise amplifiers and electronic devices using low-noise amplifiers in wireless communication systems

[0001] The present disclosure generally relates to wireless communication systems, and in particular to a low noise amplifier (LNA) and an electronic device using the LNA in a wireless communication system.

[0002] Wireless communication technologies may have been developed to provide services such as, but not limited to, voice, multimedia, and / or data communications. For example, with the use of commercially available 5G (5th-generation) communication systems, the deployment of connected devices is expected to increase explosively, and the number of devices connected to communication networks is also expected to increase explosively. Examples of network-connected devices may include, but are not limited to, vehicles, robots, drones, home appliances, displays, smart sensors installed in various infrastructures, construction machinery, and factory equipment. Mobile devices may evolve into various form factors, such as, but not limited to, augmented reality (AR) glasses, virtual reality (VR) headsets, and holographic devices. As part of the development of next-generation communication systems (e.g., 6G (6th-generation)), efforts may be underway to develop improved 6G communication systems capable of connecting a much larger number of devices (e.g., hundreds of billions of devices) to provide various services. Therefore, 6G communication systems can be referred to as systems beyond 5G communication.

[0003] In a 6G communication system that may be realized in the near future, maximum transmission rates can be achieved at 1 terabit per second (bps) (e.g., 1,000 gigabits per second: gbps) and / or wireless latencies of about 100 microseconds (μsec). That is, the transmission rates of a 6G communication system can be about 50 times faster than the transmission rates of a 5G communication system, and the wireless latency of the 6G communication system can be reduced to about one-tenth (e.g., 1 / 10) of the wireless latency of the 5G communication system.

[0004] To potentially achieve these relatively high data rates and / or relatively low latency, 6G communication systems are being considered for implementation in terahertz bands (e.g., bands from 95 gigahertz (GHz) to 3 terahertz (THX). However, in terahertz bands, path loss and / or atmospheric absorption issues may be more severe compared to the millimeter wave (mmWave) bands introduced in 5G communication systems, which increases the importance of technologies and / or techniques that can guarantee and / or improve signal reach (e.g., coverage). Possible technologies for ensuring and / or improving coverage may lead to radio frequency (RF) devices, antennas, new waveforms that offer better coverage than orthogonal frequency division multiplexing (OFDM), beamforming, and multi-antenna transmission technologies such as, but not limited to, massive multiple-input and multiple-output (massive MIMO), full-dimensional MIMO (FD-MIMO), array antennas, and / or large-scale antennas. In addition, new technologies such as, but not limited to, metamaterial-based lenses and antennas, high-dimensional spatial multiplexing technologies using orbital angular momentum (OAM), and reconfigurable intelligent surfaces (RIS) may be under discussion to potentially improve coverage of terahertz band signals.

[0005] 6G communication systems can also potentially improve frequency efficiency and / or system networks by including full duplex technologies. In other words, recent developments include full-duplex technology enabling uplink and downlink to simultaneously utilize the same frequency resources; network technology capable of integrally utilizing satellites and / or HAPS (high-altitude platform stations); network architecture innovation technology capable of supporting mobile base stations and enabling the optimization and / or automation of network operations; dynamic spectrum sharing technology through collision avoidance based on spectrum usage prediction; AI-based communication technology that potentially optimizes systems by utilizing artificial intelligence from the design stage and incorporating end-to-end AI support capabilities; and next-generation distributed computing technology capable of realizing services of complexity that exceed the limits of terminal computing power by utilizing ultra-high-performance communication and computing resources (mobile edge computing (MEC)) and / or clouds. Furthermore, developments are underway regarding the design of new protocols applicable to 6G communication systems, the implementation of hardware-based security environments, the development of mechanisms for the safe utilization of data, and / or privacy preservation. Through the development of technologies regarding protection methods, attempts can be made to further strengthen connectivity between devices, further optimize networks, promote the softwareization of network entities, and / or increase the openness of wireless communication.

[0006] Due to the research and development of these 6G communication systems, it is expected that a new dimension of hyper-connected experience will become possible through the hyper-connectivity of 6G communication systems, which encompasses not only connections between objects but also connections between people and objects. Specifically, it is projected that 6G communication systems will enable the provision of services such as, but not limited to, truly immersive extended reality (truly immersive XR), high-fidelity mobile holograms, and digital replicas. Furthermore, services such as, but not limited to, remote surgery, industrial automation, and emergency response—through enhanced security and reliability—will be provided via 6G communication systems, enabling their use in various applications including industry, healthcare, automotive, and home appliances, as well as diverse other sectors.

[0007] A millimeter-wave wireless communication system may be a system capable of significantly increasing data transmission speed and / or capacity by using the millimeter-wave band, which is a frequency band that can be higher than the relevant radio frequency (RF) band. Millimeter-wave signals may have relatively large path loss in free space compared to signals in lower frequency bands (e.g., frequency bands below the threshold frequency) (e.g., path loss may exceed the threshold path loss). Therefore, a millimeter-wave wireless communication system may require relatively high effective isotropic radiated power (EIRP), reception sensitivity, and / or wideband characteristics.

[0008] In wireless communication systems, a receiver can amplify RF signals received through an antenna using a low noise amplifier (LNA). The LNA is connected directly and / or indirectly to the antenna to reduce (e.g., minimize) additional noise in the RF signal received through the antenna and to amplify the relatively low power level of the received signal based on a set gain. Therefore, in millimeter-wave wireless communication systems where relatively high reception sensitivity may be required, continuous development of technologies to improve the noise figure (NF) and / or bandwidth characteristics of the LNA may be underway. NF can represent an indicator of how much noise may be added as the input signal passes through the device and / or circuit.

[0009] Generally, an LNA may include two amplifiers, the first of the two amplifiers may be a single-ended (SE) amplifier and / or may include the same, and the second of the two amplifiers may be implemented to simultaneously obtain NF and broadband characteristics using a relatively low input impedance. As such, the performance of the LNA can be significantly influenced by the NF and broadband characteristics of the second amplifier as well as the first amplifier. To reduce the magnitude of the input impedance of the second amplifier, the second amplifier may be implemented as a differential amplifier using a relatively high-loss balun, and / or the second amplifier may be implemented as an SE amplifier similar to the first amplifier using a resonance circuit using an inductor and a capacitor.

[0010] For example, a differential amplifier that can be used with a balun can not only improve isolation characteristics by using cross-coupled capacitors, but also have a relatively higher gain than the SE amplifier. However, a balun with a relatively low coupling factor k is used to match the output impedance of the SE amplifier, which has a relatively low value, with the input impedance of the differential amplifier, which has a relatively high value. This can potentially lead to degradation in gain and NF due to losses occurring during the matching process, despite the high gain characteristics of the second (differential) amplifier. Additionally, the available bandwidth may be limited due to high losses in impedance matching that may occur between the first amplifier and the second amplifier.

[0011] Alternatively, an SE amplifier used with a resonant circuit may have relatively low losses in impedance matching between the first and second amplifiers, and thus there may be almost no limitations on the available bandwidth. However, since the gain of the second amplifier may also be relatively low, it may lead to degradation in NF.

[0012] According to one aspect of the present disclosure, a low noise amplifier (LNA) in a communication system comprises: a first amplifier configured to amplify a first input signal based on a first gain and generate a first output signal, a second amplifier configured to amplify a second input signal based on a second gain and generate a second output signal, and a balun connected between the first amplifier and the second amplifier and configured to input the first output signal and output the second input signal. The balun comprises a first inductor, a second inductor, and a third inductor, and the third inductor is connected to the sources of the plurality of second transistors.

[0013] In one embodiment, the balun may further include a metal stack comprising a plurality of metal layers on a substrate.

[0014] In one embodiment, the first inductor, the second inductor, and the third inductor may be disposed in the first metal layer among the plurality of metal layers. Among the first inductor, the second inductor, and the third inductor, the first inductor may be disposed at the outermost edge of the first metal layer. Among the first inductor, the second inductor, and the third inductor, the third inductor may be disposed at the innermost edge of the first metal layer. The second inductor may exist between the first inductor and the third inductor.

[0015] In one embodiment, the first inductor, the second inductor, and the third inductor may be disposed in the first metal layer among the plurality of metal layers. The second inductor may be connected in an intersecting manner with the gates of the plurality of second transistors.

[0016] In one embodiment, the first inductor, the second inductor, and the third inductor may be disposed in the first metal layer among the plurality of metal layers. The third inductor may be connected in an alternating manner to the sources of the plurality of second transistors.

[0017] In one embodiment, the second inductor and the third inductor may be crossed and connected to the second amplifier.

[0018] In one embodiment, the third inductor may be connected to ground (GND).

[0019] In one embodiment, the third inductor may be connected to the first inductor.

[0020] In one embodiment, the balun may further include a power source and a capacitor connected to the power source.

[0021] In one embodiment, the first amplifier may include a single-ended amplifier, and the second amplifier may include a differential amplifier.

[0022] The above and other aspects, features, and advantages of specific embodiments of the present disclosure may become more apparent from the following description together with the accompanying drawings:

[0023] FIG. 1a is a block diagram schematically illustrating an electronic device in a network environment according to one embodiment;

[0024] FIG. 1b is a block diagram schematically illustrating an electronic device according to one embodiment;

[0025] FIG. 2 is a schematic diagram illustrating a low noise amplifier (LNA) in a wireless communication system according to one embodiment;

[0026] FIG. 3 is a schematic diagram illustrating an LNA in a wireless communication system according to one embodiment;

[0027] FIG. 4 shows g included in the LNA in a wireless communication system according to one embodiment. m - This is a schematic drawing illustrating the layout of the combined balloon;

[0028] FIG. 5 is a schematic diagram illustrating an LNA in a wireless communication system according to one embodiment;

[0029] FIG. 6a shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the first inductor included in the coupling balun;

[0030] FIG. 6b shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the first inductor included in the coupling balun;

[0031] FIG. 6c shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the first inductor included in the coupling balun;

[0032] FIG. 7a shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the second inductor included in the coupling balun;

[0033] FIG. 7b shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the second inductor included in the coupling balun;

[0034] FIG. 7c shows g included in the LNA according to one embodiment. m- This is a schematic diagram illustrating the layout of the second inductor included in the coupling balun;

[0035] FIG. 8a shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the third inductor included in the coupling balun;

[0036] FIG. 8b shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the third inductor included in the coupling balun;

[0037] FIG. 8c shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the third inductor included in the coupling balun;

[0038] FIG. 9 is a schematic diagram illustrating an LNA in a wireless communication system according to one embodiment;

[0039] FIG. 10 shows g included in an LNA in a wireless communication system according to one embodiment. m - This is a schematic drawing illustrating the layout of the combined balloon;

[0040] FIG. 11 is a schematic diagram illustrating an LNA in a wireless communication system according to one embodiment;

[0041] FIG. 12a shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the first inductor included in the coupling balun;

[0042] FIG. 12b shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the first inductor included in the coupling balun;

[0043] FIG. 12c shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the first inductor included in the coupling balun;

[0044] FIG. 13a shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the second inductor included in the coupling balun;

[0045] FIG. 13b shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the second inductor included in the coupling balun;

[0046] FIG. 13c shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the second inductor included in the coupling balun;

[0047] FIG. 14a shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the third inductor included in the coupling balun;

[0048] FIG. 14b shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the third inductor included in the coupling balun;

[0049] FIG. 14c shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the third inductor included in the coupling balun;

[0050] FIG. 15 is a diagram illustrating the operation of an LNA in a wireless communication system according to one embodiment;

[0051] FIG. 16 is a diagram illustrating the operation of an LNA in a wireless communication system according to one embodiment;

[0052] FIG. 17 is a diagram illustrating the gain of an LNA in a wireless communication system according to one embodiment; and

[0053] FIG. 18 is a drawing illustrating the NF of an LNA in a wireless communication system according to one embodiment.

[0054] Various embodiments of the present disclosure are described below with reference to the accompanying drawings. In the following description, specific descriptions of related known functions or configurations may be omitted if such detailed descriptions could unnecessarily obscure the essence of an embodiment of the present disclosure. Furthermore, terms used below may be defined in consideration of the functions in an embodiment of the present disclosure, and these may vary depending on the intentions or practices of the user or operator. Therefore, such definitions should be based on the content throughout the present disclosure.

[0055] It should be noted that technical terms used in this specification are used merely to describe specific embodiments and are not intended to limit the embodiments of this disclosure. Alternatively, unless specifically defined otherwise in this specification, technical terms used in this specification shall be interpreted in the sense generally understood by those skilled in the art to which this disclosure pertains, and shall not be interpreted in an overly broad or overly narrow sense. Furthermore, if a technical term used in this specification is an incorrect technical term that fails to accurately express the spirit of this disclosure, it shall be understood as being replaced by a technical term that can be correctly understood by those skilled in the art. Alternatively, general terms used in an embodiment of this disclosure shall be interpreted according to their prior definitions or according to the context, and shall not be interpreted in an overly narrow sense.

[0056] Alternatively, singular expressions used in this specification include plural expressions unless the context clearly indicates otherwise. In this application, terms such as "composed of" or "comprising" should not be interpreted as necessarily including all of the various components or operations described in the specification, and should be interpreted as meaning that some of the components or operations may not be included, or that additional components or operations may be included.

[0057] Alternatively, terms including ordinal numbers, such as first, second, etc., as used herein may be used to describe various components, but said components shall not be limited by said terms. Such terms are used solely for the purpose of distinguishing one component from another. For example, without departing from the scope of the present disclosure, the first component may be named the second component, and similarly, the second component may be named the first component.

[0058] When it is stated that one component is "connected" or "combined" to another component, it may be directly connected or combined to that other component, or there may be other components in between. On the other hand, when it is stated that one component is "directly connected" or "directly combined" to another component, it should be understood that there are no other components in between.

[0059] Hereinafter, various embodiments according to the present disclosure are described with reference to the attached drawings. Identical or similar components are given the same reference numeral regardless of the drawing symbols, and redundant descriptions thereof may be omitted for the sake of brevity. Alternatively, in describing an embodiment of the present disclosure, if a description of related prior art could obscure the essence of the present disclosure, such detailed description may be omitted. Furthermore, it should be noted that the attached drawings are intended only to facilitate understanding of the spirit of the present disclosure and should not be interpreted as limiting the spirit of the present disclosure. The spirit of the present disclosure may be interpreted to extend to all modifications, equivalents, and substitutions in addition to the attached drawings.

[0060] Hereinafter, in one embodiment of the present disclosure, an electronic device is described as an example. As used herein, the electronic device may be referred to as a terminal, mobile station, mobile equipment (ME), user equipment (UE), user terminal (UT), subscriber station (SS), wireless device, handheld device, or access terminal (AT). Alternatively, or additionally, in one embodiment of the present disclosure, the electronic device may be a device having communication capabilities, such as, for example, a mobile phone, a personal digital assistant (PDA), a smartphone, a wireless modem, or a laptop, and / or may include such a device.

[0061] FIG. 1a is a block diagram schematically illustrating an electronic device (101) in a network environment (100) according to one embodiment.

[0062] Referring to FIG. 1a, in a network environment (100), an electronic device (101) may communicate with an electronic device (102) through a first network (198) (e.g., a short-range wireless communication network) or with an electronic device (104) or a server (108) through a second network (199) (e.g., a long-range wireless communication network). According to one embodiment, the electronic device (101) may communicate with the electronic device (104) through a server (108). According to one embodiment, the electronic device (101) may include a processor (120), memory (130), input module (150), sound output module (155), display module (160), audio module (170), sensor module (176), interface (177), connection terminal (178), haptic module (179), camera module (180), power management module (188), battery (189), communication module (190), subscriber identification module (196), or antenna module (197). In some embodiments, at least one of these components (e.g., connection terminal (178)) may be omitted from the electronic device (101), or one or more other components may be added. In some embodiments, some of these components (e.g., sensor module (176), camera module (180), or antenna module (197)) may be integrated into a single component (e.g., display module (160)).

[0063] The processor (120) can control at least one other component (e.g., a hardware or software component) of the electronic device (101) connected to the processor (120) by executing software (e.g., a program (140)), and can perform various data processing or operations. According to one embodiment, as at least part of the data processing or operations, the processor (120) can store commands or data received from other components (e.g., a sensor module (176) or a communication module (190)) in volatile memory (132), process the commands or data stored in volatile memory (132), and store the resulting data in non-volatile memory (134). According to one embodiment, the processor (120) may include a main processor (121) (e.g., a central processing unit or an application processor) or an auxiliary processor (123) that can operate independently or together with it (e.g., a graphics processing unit, a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor). For example, if the electronic device (101) includes a main processor (121) and an auxiliary processor (123), the auxiliary processor (123) may be configured to use less power than the main processor (121) or to be specialized for a designated function. The auxiliary processor (123) may be implemented separately from the main processor (121) or as part thereof.

[0064] The auxiliary processor (123) may control at least some of the functions or states associated with at least one component of the electronic device (101) (e.g., display module (160), sensor module (176), or communication module (190)) on behalf of the main processor (121) while the main processor (121) is in an inactive (e.g., sleep) state, or together with the main processor (121) while the main processor (121) is in an active (e.g., application execution) state. According to one embodiment, the auxiliary processor (123) (e.g., image signal processor or communication processor) may be implemented as part of another functionally related component (e.g., camera module (180) or communication module (190)). According to one embodiment, the auxiliary processor (123) (e.g., neural network processing unit) may include a hardware structure specialized for processing an artificial intelligence model. The artificial intelligence model may be generated through machine learning. Such learning may be performed, for example, on the electronic device (101) itself where the artificial intelligence is performed, or through a separate server (e.g., server (108)). The learning algorithm may include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but is not limited to the examples described above. The artificial intelligence model may include a plurality of artificial neural network layers.An artificial neural network may be a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to the hardware structure, the artificial intelligence model may include a software structure, either additionally or substantially.

[0065] The memory (130) can store various data used by at least one component of the electronic device (101) (e.g., processor (120) or sensor module (176)). The data may include, for example, input data or output data for software (e.g., program (140)) and related commands. The memory (130) may include volatile memory (132) or non-volatile memory (134).

[0066] The program (140) may be stored as software in memory (130) and may include, for example, an operating system (142), middleware (144), or an application (146).

[0067] The input module (150) can receive commands or data to be used for a component of the electronic device (101) (e.g., processor (120)) from outside the electronic device (101) (e.g., user). The input module (150) may include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).

[0068] The sound output module (155) can output a sound signal to the outside of the electronic device (101). The sound output module (155) may include, for example, a speaker or a receiver. The speaker may be used for general purposes, such as multimedia playback or recording playback. The receiver may be used to receive incoming calls. According to one embodiment, the receiver may be implemented separately from the speaker or as part thereof.

[0069] The display module (160) can visually provide information to an external (e.g., user) of the electronic device (101). The display module (160) may include, for example, a display, a holographic device, or a projector and a control circuit for controlling said device. According to one embodiment, the display module (160) may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of the force generated by said touch.

[0070] The audio module (170) can convert sound into an electrical signal or, conversely, convert an electrical signal into sound. According to one embodiment, the audio module (170) can acquire sound through the input module (150) or output sound through the sound output module (155) or an external electronic device (e.g., electronic device (102)) (e.g., speaker or headphones) connected directly or wirelessly to the electronic device (101).

[0071] The sensor module (176) can detect the operating state of the electronic device (101) (e.g., power or temperature) or the external environmental state (e.g., user state) and generate an electrical signal or data value corresponding to the detected state. According to one embodiment, the sensor module (176) may include, for example, a gesture sensor, a gyroscope sensor, a barometric pressure sensor, a magnetic sensor, an accelerometer sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biosensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0072] The interface (177) may support one or more specified protocols that can be used for the electronic device (101) to be connected directly or wirelessly to an external electronic device (e.g., electronic device (102)). According to one embodiment, the interface (177) may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

[0073] The connection terminal (178) may include a connector through which the electronic device (101) can be physically connected to an external electronic device (e.g., electronic device (102)). According to one embodiment, the connection terminal (178) may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0074] The haptic module (179) can convert an electrical signal into a mechanical stimulus (e.g., vibration or movement) or an electrical stimulus that the user can perceive through tactile or kinesthetic senses. According to one embodiment, the haptic module (179) may include, for example, a motor, a piezoelectric element, or an electric stimulation device.

[0075] The camera module (180) can capture still images and video. According to one embodiment, the camera module (180) may include one or more lenses, image sensors, image signal processors, or flashes.

[0076] The power management module (188) can manage power supplied to the electronic device (101). According to one embodiment, the power management module (188) can be implemented, for example, as at least part of a power management integrated circuit (PMIC).

[0077] The battery (189) can supply power to at least one component of the electronic device (101). According to one embodiment, the battery (189) may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0078] The communication module (190) can support the establishment of a direct (e.g., wired) communication channel or a wireless communication channel between an electronic device (101) and an external electronic device (e.g., electronic device (102), electronic device (104), or server (108)), and the performance of communication through the established communication channel. The communication module (190) may include one or more communication processors that operate independently of the processor (120) (e.g., application processor) and support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module (190) may include a wireless communication module (192) (e.g., cellular communication module, short-range wireless communication module, or GNSS (global navigation satellite system) communication module) or a wired communication module (194) (e.g., LAN (local area network) communication module, or power line communication module). The corresponding communication module among these communication modules can communicate with an external electronic device (104) via a first network (198) (e.g., a short-range communication network such as Bluetooth, Wi-Fi Direct, or IrDA) or a second network (199) (e.g., a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a LAN or WAN)). These various types of communication modules may be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (192) can identify or authenticate the electronic device (101) within a communication network such as the first network (198) or the second network (199) using subscriber information (e.g., International Mobile Subscriber Identifier (IMSI)) stored in the subscriber identification module (196).

[0079] The wireless communication module (192) can support 5G networks and next-generation communication technologies following 4G networks, for example, new radio access technology. NR access technology can support high-speed transmission of high-capacity data (enhanced mobile broadband (eMBB)), minimization of terminal power and connection of multiple terminals (massive machine type communications (mMTC)), or high reliability and low latency (ultra-reliable and low-latency communications (URLLC)). The wireless communication module (192) can support a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate, for example. The wireless communication module (192) can support various technologies for securing performance in the high-frequency band, such as beamforming, massive MIMO (multiple-input and multiple-output), full-dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large-scale antenna. The wireless communication module (192) can support various requirements specified in the electronic device (101), external electronic device (e.g., electronic device (104)), or network system (e.g., second network (199)). According to one embodiment, the wireless communication module (192) may support a Peak data rate (e.g., 20 Gbps or more) for eMBB realization, loss coverage (e.g., 164 dB or less) for mMTC realization, or U-plane latency (e.g., downlink (DL) and uplink (UL) each 0.5 ms or less, or round trip 1 ms or less) for URLLC realization.

[0080] An antenna module (197) can transmit a signal or power to or from an external source (e.g., an external electronic device). According to one embodiment, the antenna module (197) may include an antenna comprising a radiator made of a conductor or a conductive pattern formed on a substrate (e.g., a PCB). According to one embodiment, the antenna module (197) may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network, such as a first network (198) or a second network (199), may be selected from the plurality of antennas, for example, by a communication module (190). A signal or power may be transmitted or received between the communication module (190) and an external electronic device through the selected at least one antenna. According to some embodiments, in addition to the radiator, other components (e.g., a radio frequency integrated circuit (RFIC)) may be additionally formed as part of the antenna module (197).

[0081] According to one embodiment, the antenna module (197) may form a mmWave antenna module. According to one embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on or adjacent to a first surface (e.g., bottom surface) of the printed circuit board and capable of supporting a specified high frequency band (e.g., mmWave band), and a plurality of antennas (e.g., array antennas) disposed on or adjacent to a second surface (e.g., top surface or side surface) of the printed circuit board and capable of transmitting or receiving a signal of the specified high frequency band.

[0082] At least some of the above components can be connected to each other via a communication method between peripheral devices (e.g., bus, GPIO (general purpose input and output), SPI (serial peripheral interface), or MIPI (mobile industry processor interface)) and exchange signals (e.g., commands or data) with each other.

[0083] According to one embodiment, commands or data may be transmitted or received between the electronic device (101) and an external electronic device (104) through a server (108) connected to a second network (199). Each of the external electronic devices (102, or 104) may be the same or a different type of device as the electronic device (101). According to one embodiment, all or part of the operations performed on the electronic device (101) may be performed on one or more of the external electronic devices (102, 104, or 108). For example, if the electronic device (101) needs to perform a function or service automatically or in response to a request from a user or another device, the electronic device (101) may request one or more external electronic devices to perform at least part of the function or service instead of performing the function or service itself or additionally. One or more external electronic devices that receive the above request may execute at least part of the requested function or service, or additional function or service related to the request, and transmit the result of the execution to the electronic device (101). The electronic device (101) may provide the result as is or additionally processed as at least part of the response to the request. For this purpose, for example, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used. The electronic device (101) may provide ultra-low latency services using, for example, distributed computing or mobile edge computing. In another embodiment, the external electronic device (104) may include an Internet of Things (IoT) device. The server (108) may be an intelligent server using machine learning and / or neural networks. According to one embodiment, the external electronic device (104) or the server (108) may be included within a second network (199).The electronic device (101) can be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology and IoT-related technology.

[0084] FIG. 1b is a block diagram schematically illustrating an electronic device according to one embodiment.

[0085] Referring to FIG. 1b, an electronic device (101) (e.g., the electronic device (101) of FIG. 1a) (e.g., a smartphone) may include a processor (120) (e.g., the processor (120) of FIG. 1a), a radio frequency integrated circuit (RFIC) (300), a radio frequency front end (RFFE) circuit (310), a first antenna (341), a second antenna (342), a third antenna (343), and / or a fourth antenna (344). In FIG. 1b, an example is illustrated in which the electronic device (101) includes four antennas, including the first antenna (341), the second antenna (342), the third antenna (343), and / or the fourth antenna (344), but embodiments of the present disclosure are not limited thereto. For example, there may be no limit to the number of antennas included in the electronic device (101).

[0086] In one embodiment, the processor (120) may include an application processor and / or a communication processor. According to one embodiment, the electronic device (101) may further include at least one of the components described in FIG. 1a. According to one embodiment, the RFIC (300) and / or RFFE circuit (310) may form at least a part of the wireless communication module (192) of FIG. 1a. The processor (120) may support the establishment of a communication channel in a band to be used for wireless communication with a cellular network (e.g., the second network (199) of FIG. 1a), and network communication through the established communication channel. According to one embodiment, the cellular network is a second generation (2 nd generation: 2G) network, 3rd generation (3 rd generation: 3G) network, 4th generation (4 th generation: 4G) network, Long Term Evolution (LTE) network, 5th generation (5 th generation: 5G) network, etc. may be included.

[0087] In one embodiment, the processor (120) can control the RFIC (300) through a control interface. In one embodiment, the processor (120) can control the RFIC (300) and the RFFE circuit (310) so that a sounding reference signal (SRS) can be transmitted through each of the first antenna (341), the second antenna (342), the third antenna (343), and / or the fourth antenna (344). In one embodiment, the processor (120) can control the RFIC (300) and the RFFE circuit (310) so that the SRS can be transmitted through each of the first antenna (341), the second antenna (342), the third antenna (343), and / or the fourth antenna (344) based on the slot structure of the wireless communication system.

[0088] In one embodiment, the RFIC (300) can convert a baseband signal generated by the processor (120) into a radio frequency (RF) signal in a band used in a cellular network when transmitting. In one embodiment, the RFIC (300) can convert an RF signal received from a cellular network through at least one of the first antenna (341), the second antenna (342), the third antenna (343), and / or the fourth antenna (344) and then preprocessed through the RFFE circuit (310) into a baseband signal so that it can be processed by the processor (120) when receiving.

[0089] In one embodiment, the RFFE circuit (310) may include a controller (321), a first power amplifier (PA) (322), a second PA (323), a first switch (324), a second switch (325), a duplexer (326), a first filter (327), a first antenna switching circuit (328), a third switch (329), a first low noise amplifier (LNA) (330), a second LNA (331), a second filter (332), and / or a second antenna switching circuit (333). In one embodiment, the first switch (324) and the second switch (325) may each be used as a transmit switch. In one embodiment, the third switch (329) may be used as a receive switch. As an example, the RFFE circuit (310) may be implemented as an LPAMID (power amplifier with integrated low noise amplifier and duplexers) circuit. For example, the first antenna switching circuit (328) and the second antenna switching circuit (333) can be implemented as an antenna switching module (ASM) or a switch.

[0090] In one embodiment, the first switch (324) can connect the first PA (322) to the duplexer (326) under the control of the processor (120) and / or RFIC (300) (or under the control of the controller (321).

[0091] In one embodiment, the second switch (325) can connect the second PA (323) to the first filter (327) or the second filter (332) under the control of the processor (120) and / or RFIC (300) (or under the control of the controller (321).

[0092] In one embodiment, the second antenna switching circuit (333) may connect the second filter (332) to one of the second antenna (342), the third antenna (343), and / or the fourth antenna (344) under the control of the processor (120) and / or RFIC (300) (or under the control of the controller (321).

[0093] In one embodiment, the controller (321) can control the components included in the RFFE circuit (310) through an interface with the processor (120) and / or RFIC (300) (e.g., MIPI (mobile industry processor interface)).

[0094] In one embodiment, a signal received through the first antenna (341) can be transmitted to the first antenna switching circuit (328), and the first antenna switching circuit (328) can perform a duplex operation on the signal transmitted through the first antenna (341) and transmit the resulting signal to the third switch (329). The third switch (329) can connect the duplexer (326) to the first LNA (330) or the second LNA (331) under the control of the controller (321) (or under the control of the processor (120) and / or RFIC (300).

[0095] In one embodiment, when the duplexer (326) is connected to the first LNA (330), the first LNA (330) can amplify the signal transmitted from the duplexer (326) based on a set gain and then transmit it to the RFIC (300). When the duplexer (326) is connected to the second LNA (331), the second LNA (331) can amplify the signal transmitted from the duplexer (326) based on a set gain and then transmit the amplified signal to the RFIC (300).

[0096] Although FIG. 1b illustrates a case where the second filter (332) and the second antenna switching circuit (333) are included in the RFFE circuit (310), embodiments of the present disclosure are not limited thereto. For example, at least one of the second filter (332) or the second antenna switching circuit (333) may not be included in the RFFE circuit (310) and may exist separately, and / or may be included in an RFFE circuit different from the RFFE circuit (310).

[0097] In this disclosure, cases may be considered in which an LNA may be included in an electronic device as well as in a network of a wireless communication system (e.g., a base station), and the structure and operation of the LNA described below may be similarly implemented when the LNA is included in an electronic device and when the LNA is included in a network.

[0098] According to one embodiment, the LNA (200) in a wireless communication system may include a first amplifier (210) configured to amplify a first input signal based on a first gain value and generate a first output signal, and may include a first transistor.

[0099] According to one embodiment, the LNA may include a second amplifier (230) configured to include a plurality of second transistors and to amplify a second input signal based on a second gain value to generate a second output signal.

[0100] According to one embodiment, the LNA may include a balun (220) connected between the first amplifier and the second amplifier, configured to input the first output signal as a third input signal and output the second input signal as an output signal.

[0101] According to one embodiment, the balun includes a first inductor (241), a second inductor (243), and a third inductor (245), and the third inductor may be connected to the sources of the plurality of second transistors.

[0102] According to one embodiment, the balun may include a metal stack comprising a plurality of metal layers on a substrate.

[0103] According to one embodiment, the first inductor, the second inductor, and the third inductor are disposed in the first metal layer among the plurality of metal layers, the first inductor is disposed at the outermost position among the first inductor, the second inductor, and the third inductor in the first metal layer, the third inductor is disposed at the innermost position among the first inductor, the second inductor, and the third inductor in the first metal layer, and the second inductor may be disposed between the first inductor and the third inductor.

[0104] According to one embodiment, the first inductor, the second inductor, and the third inductor are disposed in the first metal layer among the plurality of metal layers, and the second inductor may be connected in an intersecting manner to the gates of the plurality of second transistors.

[0105] According to one embodiment, the first inductor, the second inductor, and the third inductor are disposed in the first metal layer among the plurality of metal layers, and the third inductor may be connected in an alternating manner to the sources of the plurality of second transistors.

[0106] According to one embodiment, the second inductor and the third inductor may be crossed and connected to the second amplifier.

[0107] According to one embodiment, the third inductor connected to the sources of the plurality of second transistors can be connected to ground (GND).

[0108] According to one embodiment, the third inductor connected to the sources of the plurality of second transistors can be connected to the first inductor.

[0109] According to one embodiment, the balun may further include a capacitor (C1) connected to the power supply of the balun.

[0110] According to one embodiment, the first amplifier may include a single-ended amplifier, and the second amplifier may include a differential amplifier.

[0111] According to one embodiment, the electronic device (101) in the wireless communication system may include an LNA (200).

[0112] According to one embodiment, the LNA may include a first amplifier (210) configured to amplify a first input signal based on a first gain value and generate a first output signal, and may include a first transistor.

[0113] According to one embodiment, the LNA may include a second amplifier (230) configured to include a plurality of second transistors and to amplify a second input signal based on a second gain value to generate a second output signal.

[0114] According to one embodiment, the LNA may include a balun (220) connected between the first amplifier and the second amplifier, configured to input the first output signal as a third input signal and output the second input signal as an output signal.

[0115] According to one embodiment, the balun includes a first inductor (241), a second inductor (243), and a third inductor (245), and the third inductor may be connected to the sources of the plurality of second transistors.

[0116] According to one embodiment, the balun may include a metal stack comprising a plurality of metal layers on a substrate.

[0117] According to one embodiment, the first inductor, the second inductor, and the third inductor are disposed in the first metal layer among the plurality of metal layers, the first inductor is disposed at the outermost position among the first inductor, the second inductor, and the third inductor in the first metal layer, the third inductor is disposed at the innermost position among the first inductor, the second inductor, and the third inductor in the first metal layer, and the second inductor may be disposed between the first inductor and the third inductor.

[0118] According to one embodiment, the first inductor, the second inductor, and the third inductor are disposed in the first metal layer among the plurality of metal layers, and the second inductor may be connected in an intersecting manner to the gates of the plurality of second transistors.

[0119] According to one embodiment, the first inductor, the second inductor, and the third inductor are disposed in the first metal layer among the plurality of metal layers, and the third inductor may be connected in an alternating manner to the sources of the plurality of second transistors.

[0120] According to one embodiment, the second inductor and the third inductor may be crossed and connected to the second amplifier.

[0121] According to one embodiment, the third inductor connected to the sources of the plurality of second transistors can be connected to ground (GND).

[0122] According to one embodiment, the third inductor connected to the sources of the plurality of second transistors can be connected to the first inductor.

[0123] According to one embodiment, the balun may further include a capacitor connected to the power supply of the balun.

[0124] According to one embodiment, the first amplifier may include a single-ended type amplifier, and the second amplifier may include a differential type amplifier.

[0125] FIG. 2 is a schematic diagram illustrating an LNA in a wireless communication system according to one embodiment.

[0126] Referring to FIG. 2, the LNA (200) is a first amplifier (210), g m -combination (g mIt may include a balun (220) coupled thereto, and a second amplifier (230). The LNA (200) of FIG. 2 may include the first LNA (330) or the second LNA (331) described above with reference to FIG. 1b, and / or may be similar thereto in many aspects and may include additional features not mentioned above. Accordingly, repetitive descriptions of the LNA (200) described above with reference to FIG. 1b may be omitted for brevity.

[0127] In one embodiment, the first amplifier (210) may be a single-ended (SE) amplifier and / or may include the same, and the second amplifier (230) may be a differential amplifier. In one embodiment, the first amplifier (210) may amplify an input signal corresponding to a first gain value and then output the amplified signal. In one embodiment, the second amplifier (230) may amplify an input signal corresponding to a second gain value and then output the amplified signal.

[0128] In one embodiment, g m - The coupling balun (220) can be connected between an unbalanced circuit (e.g., the first amplifier (210)) and a balanced circuit (e.g., the second amplifier (230)). In one embodiment, g m It can represent transconductance.

[0129] In one embodiment, g m - The coupling balun (220) may include a first inductor (241), a second inductor (243), and a third inductor (245). In one embodiment, g m- The coupled balun (220) can be implemented in a structure in which the first inductor (241), the second inductor (243), and the third inductor (245) are coupled to each other.

[0130] In one embodiment, the second amplifier (230) may be implemented to obtain a noise figure (NF) and broadband characteristics simultaneously (e.g., substantially similarly, and / or simultaneously) using a relatively low input impedance. The NF may indicate how much noise is added as the input signal passes through the device or circuit. The performance of the LNA (200) may be greatly influenced by the NF and broadband characteristics of the second amplifier (230) as well as the first amplifier (210).

[0131] Therefore, in order to potentially increase (or maximize) the performance of the LNA (200), it may be required to reduce (or minimize or prevent) the loss occurring during the impedance matching process between the first amplifier (210) and the second amplifier (230). Accordingly, aspects of the present disclosure, g m- By using a coupling balun (220), the input impedance of the second amplifier (230) can be lowered, thereby reducing (or minimizing or preventing) the loss that occurs during the impedance matching process between the first amplifier (210) and the second amplifier (230). For example, by lowering the input impedance of the second amplifier (230) and reducing the loss that may occur during the impedance matching process between the first amplifier (210) and the second amplifier (230), the NF and gain characteristics of the second amplifier (230) can be improved, and broadband characteristics can also be obtained. As a result, as the NF and gain characteristics of the second amplifier (230) are improved and broadband characteristics are obtained, there may also be no limitation on the bandwidth used in the LNA (200).

[0132] FIG. 3 is a schematic diagram illustrating an LNA in a wireless communication system according to one embodiment.

[0133] Referring to FIG. 3, the LNA (200A) is a first amplifier (210), g m - It may include a combined balun (220A) and a second amplifier (230).

[0134] The LNA (200A) of FIG. 3 may include the first LNA (330), the second LNA (331), and the LNA (200) described above with reference to FIG. 1b and FIG. 2, and / or may be similar thereto in many respects and may include additional features not mentioned above. Also, the first amplifier (210), g m - The coupling balun (220A) and the second amplifier (230) are the first amplifier (210) described above with reference to FIG. 2, g m- It may include a coupling balun (220) and a second amplifier (230), which may be similar to each of these in many aspects and may include additional features not mentioned above. Accordingly, repetitive descriptions of the LNA (200A) described above with reference to FIG. 1b and FIG. 2 may be omitted for simplification.

[0135] In one embodiment, the first amplifier (210) may be an SE amplifier, and the second amplifier (230) may be a differential amplifier. In one embodiment, g m - The coupling balun (220A) can be connected between an unbalanced circuit (e.g., a first amplifier (210)) and a balanced circuit (e.g., a second amplifier (230)). In one embodiment, g m - The coupled balun (220A) may include a first inductor (241) (e.g., the first inductor (241) of FIG. 2), a second inductor (243) (e.g., the second inductor (243) of FIG. 2), and a third inductor (245) (e.g., the third inductor (245) of FIG. 2). In one embodiment, g m - The coupled balun (220A) may be implemented in a structure in which the first inductor (241), the second inductor (243), and the third inductor (245) are coupled together. Aspects of the present disclosure are, g m - By using a coupling balun (220) to lower the input impedance of the second amplifier (230), the loss that occurs during the impedance matching process between the first amplifier (210) and the second amplifier (230) can be reduced (or minimized or prevented).

[0136] In one embodiment, the first amplifier (210) may be an SE amplifier for noise matching along with input matching. The first transistor M1 may represent a transistor included in the first amplifier (210).

[0137] In one embodiment, the second amplifier (230) may be a differential amplifier having higher gain characteristics than the SE amplifier. The second transistor M2 may represent a transistor included in the second amplifier (230). The gate bias voltage of the second amplifier (230) may be provided from a bias circuit, and the bias circuit may have a bias resistor R b It can be connected.

[0138] g m - The coupling balun (220A) may include three inductors (e.g., a first inductor (241), a second inductor (243), and a third inductor (245)). As shown in FIG. 3, L p represents the first inductor (241), and L s1 represents the second inductor (243), and L s2 can represent a third inductor (245). The first inductor (241) is g m - It may be the primary inductor of the coupling balun (220A). The first inductor (241) can supply a DC (direct current) voltage to the drain of the first transistor M1 included in the first amplifier (210), and a capacitor C1 with a reactance value less than or equal to a set reactance value (e.g., 1 ohm) can be added to the part connected to the power supply so that the power supply can be stabilized at the operating frequency. The second inductor (243) and the third inductor (245) each g m- It may be a secondary inductor of the coupling balun (220A). In one embodiment, the second inductor (243) may be connected to the gate of the second transistor M2 of the second amplifier (230), and the third inductor (245) may be connected to the source of the second transistor M2 of the second amplifier (230). In one embodiment, the third inductor (245) connected to the source of the second transistor M2 of the second amplifier (230) may be cross-coupled with the second inductor (243) to reduce the input impedance of the second amplifier (230), taking into account constructive interference and destructive interference in the electromagnetic field.

[0139] In one embodiment, g m - Capacitor C included in the combined balun (220A) p1 and capacitor C p2 It can be used for impedance matching between the first transistor M1 and the second transistor M2. In one embodiment, capacitor C p1 and capacitor C p2 can be matching capedances. In one embodiment, g m - The combined balun (220A) is capacitor C as needed. p1 and capacitor C p2 It may not include g m - The combined balun (220A) is capacitor C p1 and capacitor C p2 If not included, capacitor C p1 and capacitor C p2 Capacitance C, which is generally the parasitic capacitor of the first transistor M1 and the second transistor M2. ds1 , capacitance C ds2 , and capacitance C gsIt can be replaced with. For example, capacitor C p1 and capacitor C p2 is the parasitic capacitor C of the first amplifier (210). ds1 and parasitic capacitors C of the second amplifier (230) ds2 , and C gs It can be replaced with.

[0140] FIG. 4 shows g included in the LNA in a wireless communication system according to one embodiment. m - This is a schematic drawing illustrating the layout of the combined balloon.

[0141] Referring to Fig. 4, g m - The layout of the combined balun (220B) can represent a layout on the metal structure.

[0142] g m - The combined balun (220B) is the g described above with reference to FIGS. 2 and FIGS. 3. m - It may include combined baluns (220 and 220A), and / or may be similar thereto in many respects and may include additional features not mentioned above. Accordingly, g described above with reference to FIGS. 2 and 3 m - Repetitive descriptions of the combined balun (220B) may be omitted for brevity.

[0143] g included in the LNA (e.g., the first LNA (330) or the second LNA (331) of FIG. 1b or the LNA (200A) of FIG. 2 or FIG. 3). m - In the coupling balun (220B), capacitors C between the first amplifier (e.g., the first amplifier (210) of FIG. 2 or 3) and the second amplifier (e.g., the second amplifier (230) of FIG. 2 or 3) p1 , C p2 Eun is the parasitic capacitor C of the first amplifier ds1 and parasitic capacitors C of the second amplifier ds2 , and C gsIt can be replaced with. In one embodiment, capacitors C p1 , C p2 These can be matching capacitors.

[0144] In one embodiment, the DC capacitor C1 may be placed on the path of the metal layer 7 leading to the VDD power supply. In one embodiment, g m - In the coupling balun (220B), a first inductor (e.g., the first inductor (241) of FIG. 2 or FIG. 3) may be placed on the outermost side, a second inductor (e.g., the second inductor (243) of FIG. 2 or FIG. 3) may be placed inside the first inductor, and a third inductor (e.g., the third inductor (245) of FIG. 2 or FIG. 3) may be placed on the innermost side. In one embodiment, the first inductor, the second inductor, and the third inductor may each be implemented in the form of a metal pattern. As shown in FIG. 4, L p represents the first inductor, and L s1 represents the second inductor, and L s2 can represent a third inductor.

[0145] As illustrated in FIG. 4, TR(M1) drain represents the drain of the first transistor M1 included in the first amplifier (210), TR(M2) source represents the source of the second transistor M2 included in the second amplifier (230), and TR(M2) gate represents the gate of the second transistor M2 included in the second amplifier (230).

[0146] As shown in FIG. 4, g m- The combined balun (220B) may be implemented in the form of a metal stack comprising a plurality of metal layers on a substrate. In FIG. 4, g is implemented in the form of a metal stack comprising, for example, metal layer 6, metal layer 7, metal layer 8, and metal layer 9. m - The layout of the combined balloon (220B) is shown.

[0147] FIG. 5 is a schematic diagram illustrating an LNA in a wireless communication system according to one embodiment.

[0148] Referring to FIG. 5, the LNA (200B) may include the first LNA (330), the second LNA (331), the LNA (200), or the LNA (200A) described above with reference to FIG. 1b, FIG. 2, and FIG. 3, and / or may be similar thereto in various aspects and may include additional features not mentioned above. For example, the LNA (200B) of FIG. 5 is g m - The coupling balun (220) may differ from the LNA (200A) of FIG. 3 only in the manner in which it is illustrated. That is, in FIG. 3, g m - The coupling balun (220A) is shown in a circuit form, and in FIG. 5, it is shown in a layout form as described in FIG. 4. FIG. 6a shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the first inductor included in the coupling balun.

[0149] Referring to Fig. 6a, g m - The coupled balun (220C) can be implemented in the form of a metal stack as described in FIG. 4, and a plan view of the first inductor (e.g., the first inductor (241) of FIG. 2 or FIG. 3) is shown in FIG. 6a. In FIG. 6a, L p can represent the first inductor (241) and can be implemented in the form of a metal pattern on metal layer 8.

[0150] g m - The combined balun (220C) is g described above with reference to FIGS. 2-5. m - It may include combined baluns (220, 220A, and 22OB), and / or may be similar thereto in many respects, and may include additional features not mentioned above. Accordingly, g described above with reference to FIGS. 2-5 m - Repetitive descriptions of the combined balun (220C) may be omitted for brevity.

[0151] FIG. 6b shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the first inductor included in the coupling balun.

[0152] Referring to Fig. 6b, g m - The coupled balun (220C) can be implemented in the form of a metal stack as described in FIG. 4, and a front view of the first inductor (e.g., the first inductor (241) of FIG. 2 or FIG. 3) is shown in FIG. 6b. As shown in FIG. 6b, the first inductor (241) may be placed in metal layer 8. In FIG. 6b, L p can represent the first inductor (241) and can be implemented in the form of a metal pattern on metal layer 8.

[0153] As illustrated in FIG. 6b, the first inductor (241) may be arranged in a circular shape at a first position on the substrate in metal layer 8 and may be arranged in the form of a metal pattern connected to the DC capacitor C1 and VDD power supply present in metal layer 7. In one embodiment, the first inductor (241) may be arranged at the outermost of the inductors arranged on the substrate, for example, the first inductor (241), the second inductor (for example, the second inductor (243) of FIG. 2 or FIG. 3), and the third inductor (for example, the third inductor (245) of FIG. 2 or FIG. 3).

[0154] FIG. 6c shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the first inductor included in the coupling balun.

[0155] Referring to Fig. 6c, g m - The coupled balun (220C) can be implemented in the form of a metal stack as described in FIG. 4, and a side view of the first inductor (e.g., the first inductor (241) of FIG. 2 or FIG. 3) is shown in FIG. 6c. In FIG. 6c, L p can represent the first inductor (241). In FIG. 6c, L p can represent the first inductor (241) and can be implemented in the form of a metal pattern on metal layer 8.

[0156] FIG. 7a shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the second inductor included in the coupling balun.

[0157] Referring to Fig. 7a, g m - The coupled balun (220D) can be implemented in the form of a metal stack as described in FIG. 4, and a plan view of the second inductor (e.g., the second inductor (243) of FIG. 2 or FIG. 3) is shown in FIG. 7a. In FIG. 7a, L s1 can represent a second inductor (243) and can be implemented in the form of a metal pattern on metal layer 8. In one embodiment, the metal pattern corresponding to the second inductor on metal layer 8 can overlap with metal layer 7.

[0158] g m - The combined balun (220D) is the g described above with reference to FIGS. 2-5, FIGS. 6A, FIGS. 6B, and FIGS. 6C. m- It may include combined baluns (220, 220A, 22OB, and 220C) and / or may be similar thereto in many respects and may include additional features not mentioned above. Accordingly, g described above with reference to FIGS. 2-5, FIGS. 6A, FIGS. 6B, and FIGS. 6C m - Repetitive descriptions of the combined balun (220D) may be omitted for simplification.

[0159] FIG. 7b shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the second inductor included in the coupling balun.

[0160] Referring to Fig. 7b, g m - The coupled balun (220D) can be implemented in the form of a metal stack as described in FIG. 4, and a front view of the second inductor (e.g., the second inductor (243) of FIG. 2 or FIG. 3) is shown in FIG. 7b. As shown in FIG. 7b, the second inductor (243) may be placed in metal layer 8. In FIG. 7b, L s1 The second inductor (243) may be represented and may be implemented in the form of a metal pattern on metal layer 8. In one embodiment, the metal pattern corresponding to the second inductor on metal layer 8 may overlap with metal layer 7.

[0161] As illustrated in FIG. 7b, the second inductor (243) may be arranged in a circular manner at a second position on the substrate in the metal layer 8 and may be arranged in the form of a metal pattern that is intersected with the gates of two second transistors M2 included in the second amplifier (e.g., the second amplifier (230) of FIG. 2 or 3). In one embodiment, the second inductor (243) may be arranged between the first inductor, which may be arranged at the outermost edge, and the third inductor, which may be arranged at the innermost edge, among the inductors arranged on the substrate, e.g., the first inductor (241) (e.g., the first inductor (241) of FIG. 2 or 3), the second inductor (243), and the third inductor (245) (e.g., the third inductor (245) of FIG. 2 or 3).

[0162] FIG. 7c shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the second inductor included in the coupling balun.

[0163] Referring to Fig. 7c, g m - Connecting balun (220D) (e.g., g of FIG. 2 or FIG. 3) m - The coupled balun (220)) can be implemented in the form of a metal stack as described in FIG. 4, and a side view of the second inductor (e.g., the second inductor (243) of FIG. 2 or FIG. 3) is shown in FIG. 7c. In FIG. 7c, L s1 The second inductor (243) may be represented and may be implemented in the form of a metal pattern on metal layer 8. In one embodiment, the metal pattern corresponding to the second inductor (243) on metal layer 8 may overlap with metal layer 7.

[0164] FIG. 8a shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the third inductor included in the coupling balun.

[0165] Referring to Fig. 8a, gm - The coupled balun (220E) can be implemented in the form of a metal stack as described in FIG. 4, and a plan view of the third inductor (e.g., the third inductor (245) of FIG. 2 or FIG. 3) is shown in FIG. 8a. In FIG. 8a, L s2 It can represent a third inductor (245) and can be implemented in the form of a metal pattern on metal layer 8.

[0166] g m - The combined balun (220E) is the g described above with reference to FIGS. 2-5, FIGS. 6A, FIGS. 6B, FIGS. 6C, FIGS. 7A, FIGS. 7B, and FIGS. 7C. m - It may include combined baluns (220, 220A, 22OB, 220C, and 200D), and / or may be similar thereto in many respects and may include additional features not mentioned above. Accordingly, g described above with reference to FIGS. 2-5, FIGS. 6A, FIGS. 6B, FIGS. 6C, FIGS. 7A, FIGS. 7B, and FIGS. 7C m - Repetitive descriptions of the combined balun (220E) may be omitted for brevity.

[0167] FIG. 8b shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the third inductor included in the coupling balun.

[0168] Referring to Fig. 8b, g m - The coupled balun (220E) can be implemented in the form of a metal stack as described in FIG. 4, and a front view of a third inductor (e.g., the third inductor (245) of FIG. 2 or FIG. 3) is shown in FIG. 8b. As shown in FIG. 8b, the third inductor (245) may be placed in metal layer 8. In FIG. 8b, L s2 It can represent a third inductor (245) and can be implemented in the form of a metal pattern on metal layer 8.

[0169] As illustrated in FIG. 8b, the third inductor (245) may be arranged in a circular shape at a third position on the substrate in metal layer 8 and in the form of a metal pattern connected to ground (GND) present in metal layer 9. In one embodiment, the third inductor (245) may be placed at the innermost of the inductors placed on the substrate, for example, the first inductor (e.g., the first inductor (241) of FIG. 2 or FIG. 3), the second inductor (e.g., the second inductor (243) of FIG. 2 or FIG. 3), and the third inductor (245).

[0170] FIG. 8c shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the third inductor included in the coupling balun.

[0171] Referring to Fig. 8c, g m - The coupled balun (220E) can be implemented in the form of a metal stack as described in FIG. 4, and a side view of the third inductor (e.g., the third inductor (245) of FIG. 2 or FIG. 3) is shown in FIG. 8c. In FIG. 8c, L s2 It can represent a third inductor (245) and can be implemented in the form of a metal pattern on metal layer 8.

[0172] FIG. 9 is a schematic diagram illustrating an LNA in a wireless communication system according to one embodiment.

[0173] Referring to FIG. 9, the LNA (200C) is a first amplifier (210) (e.g., the first amplifier (210) of FIG. 2 or FIG. 3), g m- It may include a coupling balun (220F), a second amplifier (230) (e.g., the second amplifier (230) of FIG. 2 or FIG. 3), and an operational amplifier (OP-AMP) (900). The LNA (200C) of FIG. 9 may include the first LNA (330), the second LNA (331), the LNA (200), the LNA (200A), and the LNA (200B) described above with reference to FIG. 1b, 2, 3 and 5, and / or may be similar thereto in many aspects and may include additional features not mentioned above. In one embodiment, the LNA (200) may be an LNA in which current-reuse technology is additionally applied to the LNA structure as described in FIG. 3.

[0174] g m - The coupling balun (220F) described above with reference to FIGS. 2-5, FIGS. 6A, FIGS. 6B, FIGS. 6C, FIGS. 7A, FIGS. 7B, FIGS. 7C, FIGS. 8A, FIGS. 8B, and FIGS. 8C is g m - It may include combined baluns (220, 220A, 22OB, 220C, 200D, and 200E), and / or may be similar thereto in many respects and may include additional features not mentioned above. Accordingly, g described above with reference to FIGS. 2-5, FIGS. 6A, FIGS. 6B, FIGS. 6C, FIGS. 7A, FIGS. 7B, FIGS. 7C, FIGS. 8A, FIGS. 8B, and FIGS. 8C. m - Repetitive descriptions of the combined balun (220F) may be omitted for brevity.

[0175] In one embodiment, the first amplifier (210) may be an SE amplifier, and the second amplifier (230) may be a differential amplifier. In one embodiment, g m - The coupling balun (220F) can be connected between an unbalanced circuit (e.g., a first amplifier (210)) and a balanced circuit (e.g., a second amplifier (230)). In one embodiment, gm - The coupled balun (220F) may include a first inductor (241) (e.g., the first inductor (241) of FIG. 2 or FIG. 3), a second inductor (243) (e.g., the second inductor (243) of FIG. 2 or FIG. 3), and a third inductor (245) (e.g., the third inductor (245) of FIG. 2 or FIG. 3). In one embodiment, g m - The combined balun (220F) can be implemented in a structure in which the first inductor (241), the second inductor (243), and the third inductor (245) are combined with each other.

[0176] In one embodiment, g m - The coupling balun (220F) may include three inductors (e.g., a first inductor (241), a second inductor (243), and a third inductor (245)). In FIG. 9, L p represents the first inductor (241), and L s1 represents the second inductor (243), and L s2 can represent a third inductor (245). The first inductor (241) is g m - It may be a primary inductor of a coupling balun (220F). The first inductor (241) can supply a DC voltage to the drain of the first transistor M1 included in the first amplifier (210), and a first capacitor C1 with a reactance less than or equal to a set reactance value (e.g., 1Ω) can be added to the part connected to the power supply so that the power supply can be stabilized at the operating frequency. The second inductor (243) and the third inductor (245) each g m- It may be a secondary inductor of the coupling balun (220F). In one embodiment, the second inductor (243) may be connected to the gate of the second transistor M2 of the second amplifier (230), and the third inductor (245) may be connected to the source of the second transistor M2 of the second amplifier (230). In one embodiment, the third inductor (245) connected to the source of the second transistor M2 of the second amplifier (230) may be cross-coupled with the second inductor (243) to account for constructive and destructive interference in the electromagnetic field, thereby reducing the input impedance of the second amplifier (230).

[0177] In one embodiment, g m - Capacitor C included in the combined balun (220F) p1 and capacitor C p2 It can be used for impedance matching between the first transistor M1 and the second transistor M2. In one embodiment, capacitor C p1 and capacitor C p2 can be matching capedances. In one embodiment, g m - The combined balun (220F) is capacitor C as needed. p1 and capacitor C p2 It may not include g m - The combined balun (220F) is capacitor C p1 and capacitor C p2 If not included, capacitor C p1 and capacitor C p2 is generally the parasitic capacitance C that can represent the parasitic capacitors of a transistor. ds1 , parasitic capacitance C ds2 , and parasitic capacitance C gs It can be replaced with. For example, capacitor C p1 and capacitor C p2 is the parasitic capacitor C of the first amplifier (210). ds1 and parasitic capacitors C of the second amplifier (230) ds2, and C gs It can be replaced with.

[0178] In one embodiment, a third inductor L is connected to the source of a second transistor M2 included in the second amplifier (230). s2 (245) is a first inductor L connected to the drain of the first transistor M1 included in the first amplifier (210). p A loop can be formed that is connected to (241) to become the power supply voltage of the first amplifier (210) and to adjust the gate bias voltage of the second amplifier (230). In such a case, the size of the first transistor M1 must be a set multiple (e.g., twice or twice) of the size of the second transistor M2 so that a DC current relationship can be established. Unlike described in FIG. 3, the gate bias voltage of the second transistor M2 included in the second amplifier (230) can be determined by an OP-AMP (900). In one embodiment, the OP-AMP (900) can determine the gate voltage of the second transistor M2 included in the second amplifier (230) through a negative feedback operation that adjusts the gate bias voltage of the second transistor M2 included in the second amplifier (230) so that the power supply voltage of the first amplifier (210) becomes 1 / 2 of the VDD power supply voltage (e.g., VDD / 2). In one embodiment, the gate voltage of the transistor M2 included in the second amplifier (230) can converge to the value obtained by adding VDD / 2 to the gate bias voltage of the first transistor M1 included in the first amplifier (210).

[0179] In the structure of the LNA (200C) as described in FIG. 9, when the bias voltage of the first amplifier (210) is adjusted, the bias voltage of the second amplifier (230) can be adjusted, and thus the power consumption of the LNA (200C) can be reduced.

[0180] FIG. 10 shows g included in an LNA in a wireless communication system according to one embodiment. m - This is a diagram schematically illustrating the layout of the combined balloon.

[0181] Referring to FIG. 10, g shown in FIG. 10 m - The layout of the coupling balun (220G) may represent a layout on a metal structure. g included in the LNA (e.g., the first LNA (330), second LNA (331), LNA (200), LNA (200A), LNA (200B), and LNA (200C) of FIG. 1B, FIG. 2, FIG. 3, FIG. 5, and FIG. 9). m - Connecting balun (220G) (e.g., g of FIG. 2, FIG. 3, or FIG. 9) m - In the coupling balun (220)), capacitors C between the first amplifier (e.g., the first amplifier (210) of FIG. 2, FIG. 3, or FIG. 9) and the second amplifier (e.g., the second amplifier (230) of FIG. 2, FIG. 3, or FIG. 9). p1 , C p2 Eun is the parasitic capacitor C of the first amplifier ds1 and parasitic capacitors C of the second amplifier ds2 , and C gs It can be replaced with. In one embodiment, capacitors C p1 , C p2 These can be matching capacitors.

[0182] In one embodiment, the DC capacitor C1 may be placed on the path of metal layer 7 leading to the VDD power supply. In one embodiment, g m- In the coupled balun (220G), a first inductor (e.g., the first inductor (241) of FIG. 2, FIG. 3, or FIG. 9) may be placed on the outermost side, a second inductor (e.g., the second inductor (243) of FIG. 2, FIG. 3, or FIG. 9) may be placed inside the first inductor, and a third inductor (e.g., the third inductor (245) of FIG. 2, FIG. 3, or FIG. 9) may be placed on the innermost side. In one embodiment, the first inductor (241), the second inductor (243), and the third inductor (245) may each be implemented in the form of a metal pattern. As shown in FIG. 10, L p represents the first inductor (241), and L s1 represents the second inductor (243), and L s2 It can represent a third inductor (245).

[0183] Referring further to FIG. 10, TR(M1) drain represents the drain of the first transistor M1 included in the first amplifier, TR(M2) source represents the source of the second transistor M2 included in the second amplifier, and TR(M2) gate represents the gate of the second transistor M2 included in the second amplifier.

[0184] As shown in FIG. 10, g m - The combined balun (220G) may be implemented in the form of a metal stack comprising a plurality of metal layers on a substrate. In FIG. 10, g is implemented in the form of a metal stack comprising, for example, metal layer 6, metal layer 7, metal layer 8, and metal layer 9. m - The layout of the coupling balun (220G) is shown. g shown in FIG. 10 m - The layout of the combined balun (220G) is g as shown in FIG. 4 m - Compared to the layout of the coupling balun (220B), the third inductor (245) L connected to the source of the second transistor M2 included in the second amplifier (230)s2 The center-tap of may be configured to receive power of VDD / 2 through an OP-AMP (e.g., OP-AMP (900) of FIG. 9), as described in FIG. 9. In one embodiment, to apply power reuse technology, a path may be required for current to flow from a second amplifier (e.g., second amplifier (230) of FIG. 2 or 3) to a first amplifier (e.g., first amplifier (210) of FIG. 2 or 3), and a third inductor (245) L using metal layer 9 s2 and the first inductor (241) L p It can be implemented by connecting.

[0185] FIG. 11 is a schematic diagram illustrating an LNA in a wireless communication system according to one embodiment.

[0186] Referring to FIG. 11, the LNA (200D) illustrated in FIG. 11 comprises the LNA (200C) described in FIG. 9 and / or may be implemented similarly in many aspects, provided that in FIG. 9, g m - The coupling balun (220G) may differ only in that it is shown in the form of a circuit diagram and in the form of a layout as described in FIGS. 10 and FIGS. 11.

[0187] FIG. 12a shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the first inductor included in the coupling balun.

[0188] Referring to Fig. 12a, g m - The coupled balun (220H) can be implemented in the form of a metal stack as described in FIG. 10, and a plan view of the first inductor (e.g., the first inductor (241) of FIG. 2, FIG. 3, or FIG. 9) is shown in FIG. 12a. In FIG. 12a, L pcan represent the first inductor (241) and can be implemented in the form of a metal pattern on metal layer 8.

[0189] g m - The combined balun (220H) described above g with reference to FIGS. 2–5, FIGS. 6A, FIGS. 6B, FIGS. 6C, FIGS. 7A, FIGS. 7B, FIGS. 7C, FIGS. 8A, FIGS. 8B, FIGS. 8C, and FIGS. 9–11 m - It may include combined baluns (220, 220A, 22OB, 220C, 200D, 220E, 220F, and 220G), and / or may be similar thereto in many respects and may include additional features not mentioned above. Accordingly, g described above with reference to FIGS. 2–5, FIGS. 6A, FIGS. 6B, FIGS. 6C, FIGS. 7A, FIGS. 7B, FIGS. 7C, FIGS. 8A, FIGS. 8B, FIGS. 8C, and FIGS. 9–11 m - Repetitive descriptions of the combined balun (220H) may be omitted for brevity.

[0190] FIG. 12b shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the first inductor included in the coupling balun.

[0191] Referring to Fig. 12b, g m - The coupled balun (220H) can be implemented in the form of a metal stack as described in FIG. 10, and a front view of the first inductor (e.g., the first inductor (241) of FIG. 2, FIG. 3, or FIG. 9) is shown in FIG. 12b. As shown in FIG. 12b, the first inductor may be placed in metal layer 8. In FIG. 12b, L p can represent the first inductor (241) and can be implemented in the form of a metal pattern on metal layer 8.

[0192] As illustrated in FIG. 12b, the first inductor (241) may be arranged in a circular shape at a first position on the substrate in metal layer 8 and may be arranged in the form of a metal pattern connected to the DC capacitor C1 and VDD power supply present in metal layer 7. In one embodiment, the first inductor (241) may be arranged at the outermost of the inductors that may be arranged on the substrate, for example, the first inductor (241), the second inductor (243) (e.g., the second inductor (243) of FIG. 2, FIG. 3, or FIG. 9), and the third inductor (e.g., the third inductor (245) of FIG. 2, FIG. 3, or FIG. 9).

[0193] FIG. 12c shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the first inductor included in the coupling balun.

[0194] Referring to Fig. 12c, g m - The coupled balun (220H) can be implemented in the form of a metal stack as described in FIG. 10, and a side view of the first inductor (e.g., the first inductor (241) of FIG. 2, FIG. 3, or FIG. 9) is shown in FIG. 12c. In FIG. 12c, L p can represent the first inductor (241). In FIG. 12c, L p can represent the first inductor (241) and can be implemented in the form of a metal pattern on metal layer 8.

[0195] FIG. 13a shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the second inductor included in the coupling balun.

[0196] Referring to Fig. 13a, g m- The coupled balun (220I) can be implemented in the form of a metal stack as described in FIG. 10, and a plan view of the second inductor (e.g., the second inductor (243) of FIG. 2, FIG. 3, or FIG. 9) is shown in FIG. 12a. In FIG. 12a, L s1 can represent a second inductor (243) and can be implemented in the form of a metal pattern on metal layer 8. In one embodiment, the metal pattern corresponding to the second inductor on metal layer 8 may overlap with metal layer 7.

[0197] FIG. 13b shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the second inductor included in the coupling balun.

[0198] g m - The coupling balun (220I) described above with reference to FIGS. 2-5, FIGS. 6A, FIGS. 6B, FIGS. 6C, FIGS. 7A, FIGS. 7B, FIGS. 7C, FIGS. 8A, FIGS. 8B, FIGS. 8C, FIGS. 9-11, FIGS. 12A, FIGS. 12B, and FIGS. 12C is g m - It may include combined baluns (220, 220A, 22OB, 220C, 200D, 220E, 220F, 220G, and 220H), and / or may be similar thereto in many respects and may include additional features not mentioned above. Accordingly, g described above with reference to FIGS. 2–5, FIGS. 6A, FIGS. 6B, FIGS. 6C, FIGS. 7A, FIGS. 7B, FIGS. 7C, FIGS. 8A, FIGS. 8B, FIGS. 8C, FIGS. 9–11, FIGS. 12A, FIGS. 12B, and FIGS. 12C m - Repetitive descriptions of the combined balun (220I) may be omitted for brevity.

[0199] Referring to Fig. 13b, g m- The coupled balun (220I) can be implemented in the form of a metal stack as described in FIG. 10, and a front view of the second inductor (e.g., the second inductor (243) of FIG. 2, FIG. 3, or FIG. 9) is shown in FIG. 13b. As shown in FIG. 13b, the second inductor (243) may be placed in metal layer 8. In FIG. 13b, L s1 The second inductor (243) may be represented and may be implemented in the form of a metal pattern on metal layer 8. In one embodiment, the metal pattern corresponding to the second inductor on metal layer 8 may overlap with metal layer 7.

[0200] As illustrated in FIG. 13b, the second inductor may be arranged in a circular manner at a second position on the substrate in metal layer 8 and may be arranged in the form of a metal pattern that is intersected with the gates of two second transistors M2 included in the second amplifier (e.g., the second amplifier (230) of FIG. 2, FIG. 3, or FIG. 9). In one embodiment, the second inductor (243) may be arranged between the first inductor (241) placed at the outermost edge and the third inductor (245) placed at the innermost edge among the inductors placed on the substrate, e.g., the first inductor (241) (e.g., the first inductor (241) of FIG. 2, FIG. 3, or FIG. 9), the second inductor (243), and the third inductor (e.g., the third inductor (245) of FIG. 2, FIG. 3, or FIG. 9).

[0201] FIG. 13c shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the second inductor included in the coupling balun.

[0202] Referring to Fig. 13c, g m- The coupled balun (220I) can be implemented in the form of a metal stack as described in FIG. 10, and a side view of the second inductor (243) (e.g., the second inductor (243) of FIG. 2, FIG. 3, or FIG. 9) is shown in FIG. 13c. In FIG. 13c, L s1 The second inductor (243) may be represented and may be implemented in the form of a metal pattern on metal layer 8. In one embodiment, the metal pattern corresponding to the second inductor (243) on metal layer 8 may overlap with metal layer 7.

[0203] FIG. 14a shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the third inductor included in the coupling balun.

[0204] Referring to Fig. 14a, g m - The coupled balun (220J) can be implemented in the form of a metal stack as described in FIG. 10, and a plan view of the third inductor (e.g., the third inductor (245) of FIG. 2, FIG. 3, or FIG. 9) is shown in FIG. 14a. In FIG. 14a, L s2 It can represent a third inductor and can be implemented in the form of a metal pattern on metal layer 8.

[0205] g m - The coupling balun (220J) described above with reference to FIGS. 2–5, FIGS. 6A, FIGS. 6B, FIGS. 6C, FIGS. 7A, FIGS. 7B, FIGS. 7C, FIGS. 8A, FIGS. 8B, FIGS. 8C, FIGS. 9–11, FIGS. 12A, FIGS. 12B, FIGS. 12C, FIGS. 13A, FIGS. 13B, and FIGS. 13C. m- It may include combined baluns (220, 220A, 22OB, 220C, 200D, 220E, 220F, 220G, 220H, and 220I), and / or may be similar thereto in many respects and may include additional features not mentioned above. Accordingly, g described above with reference to FIGS. 2–5, FIGS. 6A, FIGS. 6B, FIGS. 6C, FIGS. 7A, FIGS. 7B, FIGS. 7C, FIGS. 8A, FIGS. 8B, FIGS. 8C, FIGS. 9–11, FIGS. 12A, FIGS. 12B, FIGS. 12C, FIGS. 13A, FIGS. 13B, and FIGS. 13C m - Repetitive descriptions of the combined balun (220J) may be omitted for simplification.

[0206] FIG. 14b shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the third inductor included in the coupling balun.

[0207] Referring to Fig. 14b, g m - The coupled balun (220J) can be implemented in the form of a metal stack as described in FIG. 10, and a front view of a third inductor (e.g., the third inductor (245) of FIG. 2, FIG. 3, or FIG. 9) is shown in FIG. 14b. As shown in FIG. 14b, the third inductor (245) may be placed in metal layer 8. In FIG. 14b, L s2 It can represent a third inductor (245) and can be implemented in the form of a metal pattern on metal layer 8.

[0208] As illustrated in FIG. 14b, the third inductor (245) may be arranged in a circular shape at a third position on the substrate in metal layer 8 and connected to the first inductor (241) which is connected to the drain of the first transistor M1 included in the first amplifier (210) through metal layer 9 to form a current path in the form of a metal pattern. In one embodiment, the third inductor (245) may be arranged at the innermost of the inductors arranged on the substrate, for example, the first inductor (241) (e.g., the first inductor (241) of FIG. 2, FIG. 3, or FIG. 9), the second inductor (e.g., the second inductor (243) of FIG. 2, FIG. 3, or FIG. 9), and the third inductor (245).

[0209] FIG. 14c shows g included in the LNA according to one embodiment. m - This is a schematic diagram illustrating the layout of the third inductor included in the coupling balun.

[0210] Referring to Fig. 14c, g m - The coupled balun (220J) can be implemented in the form of a metal stack as described in FIG. 10, and a side view of the third inductor (e.g., the third inductor (245) of FIG. 2, FIG. 3, or FIG. 9) is shown in FIG. 14c. In FIG. 14c, L s2 It can represent a third inductor (245) and can be implemented in the form of a metal pattern on metal layer 8.

[0211] FIG. 15 is a diagram illustrating the operation of an LNA in a wireless communication system according to one embodiment.

[0212] Referring to FIG. 15, the LNA (200E) is a first amplifier, e.g., the first amplifier (210) of FIG. 2, FIG. 3, or FIG. 9, g m - It may include a coupled balun (220K), and a second amplifier, e.g., the second amplifier (230) of FIG. 2, FIG. 3, or FIG. 9. In one embodiment, g m- The coupled balun (220K) may include a first inductor, e.g., the first inductor (241) of FIG. 2, FIG. 3, or FIG. 9), a second inductor, e.g., the second inductor (243) of FIG. 2, FIG. 3, or FIG. 9), and a third inductor, e.g., the third inductor (245) of FIG. 2, FIG. 3, or FIG. 9. In one embodiment, g m - The combined balun (220K) can be implemented in a structure in which the first inductor (241), the second inductor (243), and the third inductor (245) are combined with each other.

[0213] The structure of the LNA (200E) illustrated in FIG. 15 may include the first LNA (330), second LNA (331), LNA (200), LNA (200A), LNA (200B), LNA (200C), and LNA (200D) described above with reference to FIG. 1b, FIG. 2, FIG. 3, FIG. 5, FIG. 9, and FIG. 11, and / or may be implemented to be similar in many respects and may include additional features not mentioned above. Accordingly, a repetitive description of the LNA (200E) described above with reference to FIG. 1b and FIG. 2 may be omitted for the sake of simplification.

[0214] An LNA (200E) according to one embodiment may have low input impedance characteristics and high isolation characteristics, and an operation in which low input impedance characteristics are achieved when the LNA (200E) according to one embodiment is used is explained with reference to FIG. 15.

[0215] In one embodiment, the input voltage V G When this is applied consistently, current i2 flows from the drain to the source of the second transistor M2 included in the second amplifier (230), so that amplifier operation can be performed. In this state, when a signal passes from the input terminal to the output terminal of the LNA (200), the first inductor L p In this case, current i inIt can flow. First inductor L p The current induced from is the second inductor L s1 Current i1 flows in the opposite direction of the second inductor L s1 The current induced from is the third inductor L s2 It can flow as current in the opposite direction. In such a case, the third inductor L s2 The current flowing through is the second inductor L s1 The current induced from can be added to the current i2 that can flow through the transistor, and consequently, the third inductor L s2 The amount of current flowing through it can be increased.

[0216] As shown in Equation 1 below, when the current increases while the input voltage is constant, the input impedance decreases; therefore, the impedance viewed from the source side of the transistor is 1 / g m It can have a value proportional to. Therefore, the phase of the signal input to the LNA (200E) is related to the inductors L included in the LNA (200E). p , L s1 , L s2 By repeatedly inverting through transistors M1 and M2, the LNA (200E) can finally output an amplified signal.

[0217] [Mathematical Formula 1]

[0218] In mathematical equation 1, Z IN represents the input impedance, and L is L s1 or L s2 Represents, and L s1 = L s2 It can be. In mathematical formula 1, C gs represents the capacitor between the gate and source of transistor M2, and g m It can represent transconductance.

[0219] FIG. 16 is a drawing illustrating the operation of an LNA in a wireless communication system according to one embodiment.

[0220] Referring to FIG. 16, the LNA (200E) is a first amplifier, e.g., the first amplifier (210) of FIG. 2, FIG. 3, or FIG. 9, g m - It may include a coupled balun (220K), and a second amplifier, e.g., the second amplifier (230) of FIG. 2, FIG. 3, or FIG. 9. In one embodiment, g m - The coupled balun (220K) may include a first inductor (e.g., the first inductor (241) of FIG. 2, FIG. 3, or FIG. 9), a second inductor (e.g., the second inductor (243) of FIG. 2, FIG. 3, or FIG. 9), and a third inductor (e.g., the third inductor (245) of FIG. 2, FIG. 3, or FIG. 9). In one embodiment, g m - The combined balun (220K) can be implemented in a structure in which the first inductor (241), the second inductor (243), and the third inductor (245) are combined with each other.

[0221] An LNA (200E) according to one embodiment may have low input impedance characteristics and high isolation characteristics, and an operation in which high isolation characteristics are achieved when an LNA (200) according to one embodiment is used is described with reference to FIG. 16.

[0222] In one embodiment, the input voltage V G When this is applied consistently, current i2 flows from the drain to the source of transistor M2 included in the second amplifier (230), so that amplifier operation can be performed. In this state, when a signal passes from the output terminal to the input terminal of the LNA (200E), the inductors L s1 , L s2 The currents i1 and i2 flowing through are the first inductor L p It can be induced in. In this case, the first inductor L pThe currents induced in can flow in opposite directions and cancel each other out. For example, the second inductor L s1 Current i1 flowing through and third inductor L s2 The current i2 flowing through each of the first inductors L p Induced in, and the second inductor L s1 The first inductor L from the current i1 flowing through p The current induced in and the third inductor L s2 The first inductor L from the current i2 flowing through p The currents induced in can flow in opposite directions and cancel each other out. Therefore, the first inductor L p No current may flow through it. Therefore, since no signal is introduced from the output terminal to the input terminal of the LNA (200E), the LNA (200E) can operate stably, and thus the signal input to the LNA (200E) can be amplified normally.

[0223] FIG. 17 is a diagram illustrating the gain of an LNA in a wireless communication system according to one embodiment.

[0224] Referring to FIG. 17, g according to one embodiment m - Combined balun (e.g., g of FIG. 2–5, FIG. 6A, FIG. 6B, FIG. 6C, FIG. 7A, FIG. 7B, FIG. 7C, FIG. 8A, FIG. 8B, FIG. 8C, FIG. 9–11, FIG. 12A, FIG. 12B, FIG. 12C, FIG. 13A, FIG. 13B, FIG. 13C, FIG. 14A, FIG. 14B, FIG. 14C, FIG. 15, and FIG. 16 m- The broadband gain characteristics (shown by solid lines) of an LNA (e.g., LNAs of FIG. 2, FIG. 3, FIG. 5, FIG. 9, FIG. 11, and FIG. 15) including combined baluns (220, 220A, 220B, 220C, 220D, and 220E) can be improved when compared to the gain characteristics of an LNA including the associated balun (shown by dotted lines).

[0225] FIG. 18 is a drawing illustrating the NF of an LNA in a wireless communication system according to one embodiment.

[0226] Referring to FIG. 18, g according to one embodiment m - Combined balun (e.g., g of FIG. 2-5, FIG. 6A, FIG. 6B, FIG. 6C, FIG. 7A, FIG. 7B, FIG. 7C, FIG. 8A, FIG. 8B, FIG. 8C, FIG. 9-11, FIG. 12A, FIG. 12B, FIG. 12C, FIG. 13A, FIG. 13B, FIG. 13C, FIG. 14A, FIG. 14B, FIG. 14C, FIG. 15, and FIG. 16 m - The NF characteristics (indicated by solid lines) of an LNA (e.g., LNAs of FIG. 2, FIG. 3, FIG. 5, FIG. 9, FIG. 11, and FIG. 15 (200, 200A, 200B, 200C, 200D, and 200E)) including combined baluns (220, 220A, 220B, 220I, 220J, 220K)) can be improved compared to the NF characteristics (indicated by dotted lines) of an LNA including the associated baluns. Additionally, if current reuse technology is applied, the effect of reducing the power consumption of the LNA can also be obtained.

[0227] The electronic device according to one embodiment disclosed in this document may be of various forms. The electronic device may include, for example, a portable communication device (e.g., a smartphone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, or a home appliance. The electronic device according to the embodiment of this document is not limited to the aforementioned devices.

[0228] One embodiment of this document and the terms used therein are not intended to limit the technical features described in this document to specific embodiments, and should be understood to include various modifications, equivalents, or substitutions of said embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of said items unless the relevant context clearly indicates otherwise. In this document, phrases such as "A or B," "at least one of A and B," "at least one of A or B," "A, B or C," "at least one of A, B and C," and "at least one of A, B, or C" may each include any one of the items listed together in the corresponding phrase, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used simply to distinguish said components from other said components and do not limit said components in any other aspect (e.g., importance or order). Where any (e.g., 1st) component is referred to as “coupled” or “connected” to another (e.g., 2nd) component, with or without the terms “functionally” or “communicationly,” it means that said any component may be connected to said other component directly (e.g., via a wire), wirelessly, or through a third component.

[0229] The term "module" as used in an embodiment of this document may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit, for example. A module may be a component formed integrally, or a minimum unit of said component or a part thereof that performs one or more functions. For example, according to an embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0230] One embodiment of the present document may be implemented as software (e.g., program (140)) comprising one or more instructions stored in a storage medium (e.g., internal memory (136) or external memory (138)) readable by a machine (e.g., electronic device (101)). For example, a processor (e.g., processor (120)) of the machine (e.g., electronic device (101)) may call at least one of the one or more instructions stored in the storage medium and execute it. This enables the machine to be operated to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code that can be executed by an interpreter. The storage medium readable by the machine may be provided in the form of a non-transitory storage medium. Here, 'non-temporary' simply means that the storage medium is a tangible device and does not contain a signal (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently and cases where it is stored temporarily.

[0231] According to one embodiment, the method according to one embodiment disclosed herein may be provided by being included in a computer program product. The computer program product may be traded between a seller and a buyer as a product. The computer program product may be distributed in the form of a device-readable storage medium (e.g., compact disc read-only memory (CD-ROM)) or an application store (e.g., Play Store). TM It can be distributed online (e.g., downloaded or uploaded) through ) or directly between two user devices (e.g., smartphones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily created on a device-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or a relay server.

[0232] According to one embodiment, each component (e.g., module or program) of the components described above may include a singular or multiple entities, and some of the multiple entities may be separated and placed in other components. According to one embodiment, one or more of the components or operations among the aforementioned components may be omitted, or one or more other components or operations may be added. Generally or additionally, multiple components (e.g., module or program) may be integrated into a single component. In this case, the integrated component may perform one or more functions of each of the multiple components in the same or similar manner as those performed by the corresponding component among the multiple components prior to integration. According to one embodiment, operations performed by the module, program, or other components may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

[0233] Although the present disclosure has been described with reference to exemplary embodiments, this description should not be interpreted in a limiting sense. Various modifications and combinations of other embodiments of the present disclosure, as well as the exemplary embodiments, may be apparent to those skilled in the art by referring to this description. Accordingly, the appended claims are intended to include any such modifications or embodiments.

Claims

1. In a low noise amplifier (LNA) (200) in a wireless communication system, A first amplifier (210) including a first transistor and configured to amplify a first input signal based on a first gain to generate a first output signal; A second amplifier (230) comprising a plurality of second transistors and configured to amplify a second input signal based on a second gain to generate a second output signal; and It includes a balun (220) connected between the first amplifier and the second amplifier, configured to input the first output signal and output the second input signal, and The above balun includes a first inductor (241), a second inductor (243), and a third inductor (245), and The above third inductor is connected to the sources of the plurality of second transistors, the LNA.

2. In Paragraph 1, The above balun further comprises a metal stack including a plurality of metal layers on a substrate, the LNA.

3. In Paragraph 2, The first inductor, the second inductor, and the third inductor are disposed in the first metal layer among the plurality of metal layers, and Among the first inductor, second inductor, and third inductor, the first inductor is positioned at the outermost edge of the first metal layer, and Among the first inductor, the second inductor, and the third inductor, the third inductor is positioned at the innermost edge of the first metal layer, and The second inductor is the LNA existing between the first inductor and the third inductor.

4. In Paragraph 2, The first inductor, the second inductor, and the third inductor are disposed in the first metal layer among the plurality of metal layers, and The second inductor is connected to the gates of the plurality of second transistors in an LNA.

5. In Paragraph 2, The first inductor, the second inductor, and the third inductor are disposed in the first metal layer among the plurality of metal layers, and The above third inductor is the LNA that is connected by crossing with the sources of the plurality of second transistors.

6. In Paragraph 1, The LNA, in which the second inductor and the third inductor are crossed and connected to the second amplifier.

7. In Paragraph 2, The above third inductor is the LNA connected to ground (GND).

8. In Paragraph 2, The above third inductor is the LNA connected to the above first inductor.

9. In any one of paragraphs 1 through 8, The above balloon is: Power; and The LNA further comprising a capacitor connected to the above power supply.

10. In any one of paragraphs 1 through 9, The first amplifier above includes a single-ended amplifier, and The above second amplifier is the LNA including a differential amplifier.

11. In an electronic device (101) in a wireless communication system, Multiple antennas; A processor (120) configured to process received signals; and A radio frequency front end (RFFE) circuit comprising at least one low noise amplifier (LNA), wherein the RFFE circuit comprises: Transmitting a sounding reference signal (SRS) through each of the plurality of antennas; Converting at least one radio frequency (RF) signal received through one or more of the plurality of antennas into a baseband signal; Amplifying the baseband signal using at least one LNA; and It is configured to transmit the amplified baseband signal to the processor to perform additional processing of the amplified baseband signal, and Each LNA (200) of the above at least one LNA is: A first amplifier (210) including a first transistor and configured to amplify a first input signal based on a first gain to generate a first output signal; A second amplifier (230) comprising a plurality of second transistors and configured to amplify a second input signal based on a second gain to generate a second output signal; and It includes a balun (220) connected between the first amplifier and the second amplifier, configured to input the first output signal and output the second input signal, and The above balun includes a first inductor (241), a second inductor (243), and a third inductor (245), and The electronic device in which the third inductor is connected to the sources of the plurality of second transistors.

12. In Paragraph 11, The electronic device further comprises a metal stack including a plurality of metal layers on a substrate, wherein the above balun.

13. In Paragraph 12, The first inductor, the second inductor, and the third inductor are disposed in the first metal layer among the plurality of metal layers, and Among the first inductor, second inductor, and third inductor, the first inductor is positioned at the outermost edge of the first metal layer, and Among the first inductor, the second inductor, and the third inductor, the third inductor is positioned at the innermost edge of the first metal layer, and The second inductor is an electronic device existing between the first inductor and the third inductor.

14. In Paragraph 12, The first inductor, the second inductor, and the third inductor are disposed in the first metal layer among the plurality of metal layers, and The electronic device wherein the second inductor is connected in an intersecting manner with the gates of the plurality of second transistors.

15. In Paragraph 12, The first inductor, the second inductor, and the third inductor are disposed in the first metal layer among the plurality of metal layers, and The electronic device in which the third inductor is connected in an alternating manner with the sources of the plurality of second transistors.

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