N-polar quantum dot spectral tuning

Abstract

A method of fabricating a device includes forming a III-nitride buffer layer on a substrate, growing epitaxially a set of nanocrystals on the III-nitride buffer layer at a first growth temperature, each quantum dot structure of the set of quantum dot structures including a III-nitride semiconductor material, growing epitaxially a III-nitride barrier layer on the set of nanocrystals at a second growth temperature, and after growing the III-nitride barrier layer, growing epitaxially a III-nitride capping layer at a third growth temperature. The third growth temperature is at a level at which evaporation of the III-nitride semiconductor material would occur if not covered by the III-nitride barrier layer. The second growth temperature is closer to the first growth temperature than the third temperature.

Description

Atty. Docket No. 10110-24020AN-POLAR QUANTUM DOT SPECTRAL TUNINGCROSS-REFERENCE TO RELATED APPLICATION

[0001] This application claims the benefit of U.S. provisional application entitled “N-Polar Quantum Dot Spectral Tuning,” filed November 6, 2024, and assigned Serial No. 63 / 717,190, the entire disclosure of which is hereby expressly incorporated by reference.STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT

[0002] This invention was made with government support under Contract No. W911 NF-23- 1-0142 awarded by U.S. Army Research Office. The government has certain rights in the invention.BACKGROUND OF THE DISCLOSUREField of the Disclosure

[0003] The disclosure relates generally to semiconductor quantum dots and other nanocrystals.Brief Description of Related Technology

[0004] Wurtzite Ill-nitrides have a non-centrosymmetric crystal structure, which results in two non-equivalent surfaces: the (0001) surfaces (or the metal-face) and (0001) surfaces (or the nitrogen-face), respectively. The growth kinetics, electrical and optical properties, and surface morphologies of the epitaxial film are highly dependent on the polarities. Benefits of the N-polar orientation include reduced electron overflow and increased electrical efficiency over their metal-polar counterparts for applications in optoelectronic devices in the ultraviolet (UV)-A, B and C bands. SiC is a useful substrate for investigating both polarities because the orientation of the substrate determines the polarity of the epitaxially grown Ill-nitride layers. GaN / AIN heterostructures grown on the Si- and C-faces of SiC generally exhibit metal and N-polarity, respectively.Atty. Docket No. 10110-24020A

[0005] Ill-nitride-based LIV light-emitting diodes (LEDs) suffer from efficiency droop, which is particularly severe with AIGaN quantum wells (QWs) of higher Al composition due to poor p-type doping, high dislocation density, and electron overflow. In addition, for AIGaN with Al content higher than approximately 68%, the crystal-field split-off subband dominates the valence band, resulting in transverse-magnetic (TM)-polarized emission with extremely low light extraction efficiency.

[0006] Research endeavors have been focused on enhancing the efficiency of UV emitters. Effective charge carrier confinement and localization within the active region are used to achieve high-efficiency emission, as demonstrated in visible LEDs. For example, external quantum efficiency (EQE) values in white LEDs can reach up to 84%. In AIGaN-based UV emitters, the material quality is compromised by a notable increase in dislocation density compared to GaN, often ranging from 109to 1011cm2. Studies have shown that selforganized quantum dots (QDs) can effectively reduce or terminate the propagation of dislocations. Consequently, GaN / AI(Ga)N quantum dots, with their extreme three- dimensional quantum-confinement, offer a promising path to break the efficiency bottleneck of mid and deep-UV optoelectronics.

[0007] Previous studies have been largely focused on metal-polar (M-polar) GaN quantum dots, with few reports for N-polar quantum dots. Researchers have made significant progress in showcasing UV and deep UV light emission using M-polar GaN quantum dotbased devices. On the other hand, studies on N-polar GaN quantum dots have only shown quantum dot formation and emission in the visible spectrum, with no reports of UV or deep UV light emission.SUMMARY OF THE DISCLOSURE

[0008] In accordance with one aspect of the disclosure, a method of fabricating a device includes forming a Ill-nitride buffer layer on a substrate, growing epitaxially a set of nanocrystals on the Ill-nitride buffer layer at a first growth temperature, each quantum dot structure of the set of quantum dot structures including a Ill-nitride semiconductor material, growing epitaxially a Ill-nitride barrier layer on the set of nanocrystals at a second growth temperature, and after growing the Ill-nitride barrier layer, growing epitaxially a Ill-nitride capping layer at a third growth temperature. The third growth temperature is at a level at which evaporation of the Ill-nitride semiconductor material would occur if not covered by the Ill-nitride barrier layer. The second growth temperature is closer to the first growth temperature than the third temperature.Atty. Docket No. 10110-24020A

[0009] In accordance with another aspect of the disclosure, a device includes a substrate and a heterostructure supported by the substrate. The heterostructure includes a Ill-nitride buffer layer, a set of nanocrystals supported by the Ill-nitride buffer layer, each nanocrystal structure of the set of nanocrystals including a Ill-nitride semiconductor material, a Ill-nitride barrier layer disposed across the set of nanocrystals, and a Ill-nitride capping layer that covers the set of nanocrystals and the Ill-nitride barrier layer.

[0010] In connection with any one of the aforementioned aspects, the devices and / or methods described herein may alternatively or additionally include or involve any combination of one or more of the following aspects or features. The method further includes annealing the Ill-nitride barrier layer at an anneal temperature higher than the second growth temperature before growing the Ill-nitride capping layer. The anneal temperature is sufficiently high to cause evaporation of the semiconductor material if not covered by the Ill-nitride barrier layer. The anneal temperature is effectively equal to the third growth temperature. Growing the Ill-nitride barrier layer is implemented for a duration such that the Ill-nitride barrier layer is thin enough to allow desorption of a portion of the semiconductor material through the Ill-nitride barrier layer while the Ill-nitride barrier layer is annealed. The second growth temperature is effectively equal to the first growth temperature. Each nanocrystal of the set of nanocrystals is configured as a quantum dot. The first growth temperature falls in a range from about 800 °C to about 1000 °C. Growing the set of nanocrystals is implemented for a duration such that each nanocrystal of the set of nanocrystals is sized for LIV emission. The Ill-nitride barrier layer and the Ill-nitride capping layer have a common composition. The Ill-nitride buffer layer includes AIN. The semiconductor material is GaN. The Ill-nitride barrier layer includes AIN. The Ill-nitride capping layer includes AIN. The substrate includes SiC and the Ill-nitride buffer layer is grown on a C-face of the substrate. Growing epitaxially the set of nanocrystals is implemented under nitrogen rich conditions. Forming the Ill-nitride layer includes growing epitaxially a Ill-nitride nucleation layer on the substrate, and growing the Ill-nitride buffer layer on the Ill-nitride nucleation layer. Each nanocrystal of the set of nanocrystals is nitrogen-polar. The set of nanocrystals are sized and configured for LIV emissions. Each nanocrystal of the set of nanocrystals is configured as a quantum dot. The Ill-nitride barrier layer and the Ill-nitride capping layer have a common composition. The Ill-nitride barrier layer and the Ill-nitride capping layer have different compositions. A Ill-nitride material of the Ill-nitride barrier layer has a larger bandgap than the Ill-nitride semiconductor material of the set of nanocrystals. A Ill-nitride material of the Ill-nitride barrier layer and the Ill-nitride semiconductor material have a staggered band alignment.Atty. Docket No. 10110-24020ABRIEF DESCRIPTION OF THE DRAWING FIGURES

[0011] For a more complete understanding of the disclosure, reference should be made to the following detailed description and accompanying drawing figures, in which like reference numerals identify like elements in the figures.

[0012] Figure 1 depicts (a) a schematic illustration of a device having an epitaxially grown N-polar GaN quantum dot heterostructure in accordance with one example, and (b) recorded reflection high-energy electron diffraction (RHEED) patterns showing a prominent change from streaky to chevron spotty, signifying a shift from a two-dimensional (2D) smooth AIN buffer layer to a three-dimensional (3D) island formation in Stranski-Krastanov (SK) growth mode for the GaN quantum dots, as well as atomic force microscopy (AFM) images of uncapped GaN quantum dot samples grown at (c) 600 °C, (d) 650 °C, and (e) 700 °C, respectively.

[0013] Figure 2 depicts (a) a graphical plot of variations of quantum dot height distribution vs. quantum dot diameter for different growth durations, in which solid lines represent the linearly fitted curves corresponding to the aspect ratio of the quantum dots, (b) an atomic- resolution HAADF-STEM image showing an individual quantum dot cross-section grown by using a 30 s GaN growth duration, the GaN quantum dot being outlined by a white dashed line as a visual guide for clarity, (c) a high-magnification HAADF-STEM image confirming the N-polarity of AIN and a GaN quantum dot, and (d) a schematic view of a model structure of an AIN / GaN quantum dot heterostructure and corresponding orientation information.

[0014] Figure 3 depicts graphical plots of (a) room temperature photoluminescence (PL) spectra showing a wide spectral tuning range by varying sizes of GaN quantum dots, and (b) changes in emission peak energy and the corresponding full-width-at-half-maximum (FWHM) of the emission spectrum vs. sample number.

[0015] Figure 4 depicts graphical plots of temperature-dependent photoluminescence (PL) measurements, including (a) normalized photoluminescence spectra of GaN quantum dots measured at different temperatures, (b) temperature dependence of the peak wavelength (blue) and FWHM (red) of the photoluminescence spectra in part (a), showing the peak shift and broadening with increasing temperature, and (c) variations of integrated photoluminescence intensity vs. temperature for the GaN quantum dot examples listed in Table I.

[0016] Figure 5 depicts (a) a schematic illustration of a testing setup for measuring the polarization of light emission of example devices having N-polar GaN quantum dotAtty. Docket No. 10110-24020A heterostructures, and (b) a graphical plot of polarization-dependent photoluminescence spectra from the example showing dominant TE polarized emission at room-temperature.

[0017] Figure 6 is a flow diagram of a method of fabricating a device having a heterostructure with N-polar GaN quantum dots in accordance with one example.

[0018] The embodiments of the disclosed devices and methods may assume various forms. Specific embodiments are illustrated in the drawing and hereafter described with the understanding that the disclosure is intended to be illustrative. The disclosure is not intended to limit the invention to the specific embodiments described and illustrated herein.DETAILED DESCRIPTION OF THE DISCLOSURE

[0019] Methods of fabricating devices having a set of Ill-nitride quantum dots or other nanocrystals are described. The growth and formation of the Ill-nitride nanocrystals are controlled via the growth of a barrier layer at a growth temperature closer to (e.g., effectively equal to) the temperature at which the nanocrystals are grown. As described herein, the barrier layer may be sufficiently thin to allow desorption of a portion of the nanocrystals. The barrier layer may thus be used as a process parameter to control the size of the nanocrystals and, thus, to tune the spectral emissions thereof. In some cases, the barrier layer is annealed before the growth of a capping layer. These and other aspects of the disclosed methods may be used to realize N-polar GaN quantum dots for various UV band and other light-emitting applications. Examples of the resulting LED and other emission devices are also described.

[0020] Described herein are examples of the epitaxial growth and characterization of N- polar GaN quantum dots grown on C-face 4H-SiC substrates. The epitaxial growth and structural, and optical characteristics of N-polar GaN quantum dots embedded in an AIN matrix were analyzed. To achieve short wavelength emissions, GaN quantum dots with heights in the range of 0.5 nm to 2 nm were grown. The emission wavelengths of the GaN quantum dots were controllably varied in the wavelength range of 331 nm to 243 nm, covering a large part of the UV-A, B and C bands. For N-polar quantum dots emitting at 243 nm, an IQE of 86.4% at room-temperature was attained, with predominantly TE polarized emission. Such N-polar GaN quantum dots are useful for achieving high efficiency mid- and deep-ultraviolet optoelectronics, including light-emitting diodes and lasers.

[0021] Although described in connection with light emitting and / or optoelectronic devices, the disclosed methods and devices may be applied to a wide variety of electronic and otherAtty. Docket No. 10110-24020A devices. For instance, the disclosed devices may be configured for quantum computing and other electronic functions and applications.

[0022] Although described in connection with examples having GaN quantum dot structures, the disclosed devices and methods may include or involve quantum dot and other nanocrystalline structures of varying composition. The disclosed methods and devices may include or involve other Ill-nitride materials. For instance, in some cases, the quantum dot structures are composed of, or otherwise include, InN and AIN, as well as their alloys.

[0023] The compositions of other layers, elements or components of the disclosed devices may also vary. For instance, the disclosed devices are not limited to a particular material for the buffer, barrier and capping layers of the heterostructures. A variety of Ill-nitride materials may be used. For instance, the barrier layer and / or the capping layer may be composed of, or otherwise include, AIGaN.

[0024] While the disclosed devices and methods are described in connection with SiC substrates, other substrate materials may be used. For instance, the substrate may be composed of, or otherwise include, AIN, GaN, graphene, silicon, sapphire, nickel, or copper, while the layered material may be composed of, or otherwise include, hexagonal BN (hBN), graphene, M0S2, WS2, or WSe2.

[0025] The configuration, construction, fabrication, and other characteristics of the heterostructures of the disclosed devices may also vary from the examples described. For instance, the heterostructures may include any number of epitaxially grown layers.

[0026] Although described in connection with MBE growth procedures, additional or alternative non-sputtered epitaxial growth procedures may be used. For instance, metalorganic chemical vapor deposition (MOCVD) and hydride vapor phase epitaxy (HVPE) growth procedures may be used. Still other procedures may be used, including, for instance, pulsed laser deposition procedures.

[0027] In the example devices described below, GaN quantum dot heterostructures were grown using a Veeco GENXplor plasma-assisted molecular beam epitaxy (MBE) system. Figure 1 , part (a), schematically illustrates an example device 100. The example device 100 includes a heterostructure 102 supported by a substrate 104. The heterostructure 102 includes a buffer layer 106, a set of quantum dot structures or other nanocrystals 108 supported by the buffer layer 106, a barrier layer 110 disposed across the set of nanocrystals 108, and a capping layer 112 that covers the set of nanocrystals 108 and the barrier layer 110.Atty. Docket No. 10110-24020A

[0028] In these examples, C-face 4H-SIC substrates (350 pm, 4Qoff-cut) were utilized to maintain N-polarity during growth. Prior to loading into the MBE system, the substrates were cleaned using acetone and methanol. Subsequently, the substrates underwent outgassing at 200QC and 600QC in the load lock and preparation chambers of the MBE system, respectively. To ensure a pristine growth interface and prevent polarity inversion resulting from surface impurity, the substrates were subjected to outgassing at 1000QC for 20 minutes inside of the growth chamber before starting the growth.

[0029] In these examples, the epitaxial growth began with a 30 nm AIN nucleation layer at a substrate temperature (Tc) of 850 -C, followed by a 120 nm AIN buffer layer at 1050 -C. Further details regarding the growth of the nucleation and / or buffer layers are provided in Pandey, A., et al., "Electron overflow of AIGaN deep ultraviolet light emitting diodes," Appl. Phys. Lett. 1 18 (24), 241109 (2021 ), WO 2022 / 261541 ("Electron Overflow of AIGaN Deep Ultraviolet Light Emitting Diodes"), Wang, P., et al., "Interfacial Modulated Lattice- Polarity- Controlled Epitaxy of Ill-Nitride Heterostructures on Si(1 11 )," ACS Applied Materials & Interfaces, 14(13), 15747-15755 (2022), WO 2023 / 154510 ("Lattice Polarity Control in Ill- Nitride Semiconductor Heterostructures"), and Wang, D., et al., "Controlled ferroelectric switching in ultrawide bandgap AIN / ScAIN multilayers," Appl. Phys. Lett. 123(10), 103506 (2023), International Application No. PCT / US2024 / 045029 ("Multilayer Ferroelectric Switching"), the entire disclosures of which are hereby incorporated by reference.

[0030] Growth optimization was performed to identify the optimal growth conditions for the N-polar GaN quantum dots. In these examples, the quantum dot growth procedures were performed under nitrogen rich conditions, with a nitrogen flow rate of 1 standard cubic centimeter per minute (seem) and plasma power of 350 W and a constant Ga flux of 3 x 10-8Torr. The epitaxial growth procedures were monitored with RHEED. The observations reveal smooth surface morphology for the AIN buffer layer, evidenced by streaky RHEED patterns, illustrated in Figure 1 , part (b).

[0031] Morphology control, in terms of quantum dot density and size, of the N-polar GaN quantum dots was implemented by varying the growth temperature and growth duration. The surface morphology of the AIN buffer layer for quantum dot epitaxy had an atomically smooth surface with a root mean square (RMS) roughness of 0.7 nm. GaN quantum dots were grown at three example substrate temperatures (600 °C, 650 °C, and 700 °C) while maintaining a constant growth duration of 90 s. As shown in Figure 1 , parts (c-e), at 600 °C, the GaN quantum dots exhibited an average diameter of 15 nm, height of 0.5 nm, and density of 2.5 x 1011cm-2. Upon raising the growth temperature to 650 °C, while the diameter and the height of the GaN quantum dots increased slightly to 17 nm and 0.90 nm,Atty. Docket No. 10110-24020A respectively, the measured dot density decreased to 1 x 1011cm2. The growth temperature in the third example was raised to 700 °C, resulting in quantum dots with a lower density of 7 x 1010cm'2but larger size distribution with a diameter and a height of 27 nm and 2 nm, respectively. The density of the quantum dots thus decreased by around three times with an increase in growth temperature from 600 °C to 700 °C. The strong correlation between the GaN growth mode and changes in surface free energy is responsible for the observed phenomenon, i.e., the reduction in quantum dot density and an increase in size with increasing growth temperature. The AFM images in Figure 1 , parts (c-e), also show the significance of growth temperature in controlling the size distribution of the N-polar GaN quantum dots.

[0032] Figure 2 shows a statistical analysis of the size distribution of GaN quantum dots grown with different durations at a growth temperature of 700 °C. As the growth duration increases, a noticeable shift in quantum dot size distribution occurs, with larger quantum dots becoming more prevalent. This trend is driven by longer growth durations, which provide adatoms more time to migrate across the surface, resulting in larger nucleation sites and increased material accumulation in each quantum dot. This leads to an increase in both the height and diameter of the quantum dots over time. It highlights two distinct populations of GaN quantum dots at 700 °C growth temperature, characterized by the aspect ratio, defined by the ratio of quantum dot height to quantum dot diameter. The smaller quantum dots (30 s growth duration) exhibit an aspect ratio of 0.04, while the larger quantum dots (90 s growth duration) possess an aspect ratio of 0.09.

[0033] In addition to changes in size, the density of the GaN quantum dots also exhibits significant variation with growth duration. As the growth time increases from 30 s to 90 s, the density of the quantum dots increases proportionately. Specifically, at 30 s, the quantum dot density is approximately 2 x 1010cm2, increasing to 4 x 1010cm'2at 60 s, and reaching 7 x 1010cm'2at 90 s. This increase in density indicates that longer growth durations allow more time for additional nucleation sites to form, thereby leading to a higher overall density of quantum dots.

[0034] High-angle annular dark-field scanning transmission electron microscopy (HAADF- STEM) was performed on cross-sections of the example GaN / AIN quantum dot heterostructures to provide insight into the morphology of the quantum dots grown with a 30 s GaN growth duration. Figure 2, parts (b) and (c), reveal the structural characteristics of the quantum dots within the AIN matrix. The HAADF-STEM images show a flatter morphology with reduced height, consistent with the aspect ratio seen in Figure 2, part (a). The high- magnification HAADF-STEM image in Figure 2, part (c), further highlights the sharpAtty. Docket No. 10110-24020A interfaces between the GaN quantum dots and the AIN barrier layer, illustrating the epitaxial growth of the quantum dots. Additionally, Figure 2, part (c), confirms the N-polarity of the structure, as demonstrated by the atomic arrangement and polarity markers, which agrees with the growth mechanism of the N-polar GaN quantum dots.

[0035] The epitaxial growth and characterization of the GaN / AIN quantum dot heterostructures were further analyzed, with a focus on achieving high efficiency emission in the mid- and deep-UV wavelength ranges. Example devices with GaN quantum dots grown at 700 °C were covered with a 30 nm AIN capping layer grown at 1050 °C. To prevent GaN evaporation during the growth of the AIN capping layer at high temperature, a thin AIN barrier layer was immediately deposited onto the quantum dot layer at the same growth temperature, e.g., 700 °C, followed by annealing by raising the growth temperature to 1050 °C.

[0036] Due to the thinness of the barrier layer, Ga atoms may desorb through the barrier layer and consequently reduce the dimensions of the quantum dots. This aspect of the disclosed methods provides another degree of controlling quantum dot dimensions in addition to varying the GaN growth duration. Furthermore, post-growth (or post-deposition) annealing may be used to mitigate defects within the barrier layer, resulting in increased photoluminescence (PL) intensity.Table I: List of GaN QD growth conditions and PL peak position.Example GaN QD Growth AIN Barrier layer PL Emission PeakNo. Duration (s) Growth Duration (s) (nm)

[0037] Figure 3, part (a), displays the room temperature photoluminescence spectra obtained from the five example N-polar GaN QD / AIN heterostructures listed in Table I. The data presented in Table I elucidates the impact of AIN barrier layer thickness and GaN quantum dot growth duration on the photoluminescence emission peak of the examples. Notably, the emission peak for Example I, which has a 90 s growth duration for both the GaN quantum dots and the AIN barrier layer, is 331 nm. This is lower than the band edgeAtty. Docket No. 10110-24020A emission peak of bulk GaN, which is 360 nm. As the AIN barrier layer growth duration decreases, as seen in Examples II and III with growth durations of 45 s and 15 s, respectively, the emission peak shifts further to 305 nm and 285 nm, respectively. This trend indicates that a thinner AIN barrier layer results in a pronounced blue shift in the photoluminescence emission peak. The room temperature emission spectra of Examples II and III exhibit a broader peak, with a secondary peak at 260 nm as shown in Figure 3, part (a). These secondary peaks indicate bimodal size distributions in the quantum dots, which can arise from variations in substrate temperature, or strain distribution during growth. The higher energy peak corresponds to smaller quantum dots, in which the stronger quantum confinement leads to a blueshift. The lower energy peak is associated with larger quantum dots, in which the redshift can also be attributed, in part, to the strong quantum-confined Stark effect.

[0038] The photoluminescence spectra of quantum dot samples with and without the 30 nm AIN capping layer were examined to assess its impact. The quantum dots capped with an AIN capping layer exhibited increased photoluminescence intensity and a redshift in emission relative to uncapped quantum dots. The improvement in luminescence intensity is attributed to the enhanced confinement and reduced nonradiative recombination centers provided by the high-temperature AIN capping layer.

[0039] The effect of GaN quantum dot growth duration on the photoluminescence emission peak is also evident. For instance, Example IV, with a GaN quantum dot growth duration of 60 s and a 15 s AIN barrier layer, exhibited an emission peak at 256 nm. This is significantly lower than the emission peak energy of Example III, which had a longer GaN quantum dot growth duration. Subsequently, in an effort to achieve quantum dot emission within the deep LIV range, the GaN growth duration was reduced to 30 s while maintaining 15 s growth duration of the AIN barrier layer. Consequently, a pronounced shift in the emission peak to 243 nm was observed, indicating extreme quantum confinement within the GaN quantum dots. Previous research has reported a similar emission trend in photoluminescence spectra, i.e., the emission wavelength is tunable by controlling the growth duration of M-polar GaN quantum dots.

[0040] To gain a deeper understanding of the recombination dynamics and evaluate the IQE of the N-polar GaN quantum dots of the disclosed devices, temperature-dependent photoluminescence measurements were conducted from 20 K to 300 K, as depicted in Figure 4, part (a). In this example, the device included three layers of GaN quantum dots emitting at about 240 nm. The growth process began with a 120 nm AIN buffer layer at 1050QC under nitrogen plasma at 350 W. GaN quantum dots were grown in three cycles, eachAtty. Docket No. 10110-24020A involving a 30 s deposition of GaN at 700 -C, followed by 15 s AIN barrier layer deposition. Between each cycle, the sample underwent an annealing step to enhance crystallinity and interface quality. The topmost GaN quantum dot layer was covered with a 30 nm AIN capping layer.

[0041] Figure 4(a) presents the temperature-dependent photoluminescence spectra, which reveal a significant blueshift as the temperature decreases from 300 K to 20 K. The photoluminescence peak emission increased from approximately 5.12 eV (242 nm) at room temperature to 5.32 eV (233 nm) at 20 K. The asymmetric shape of the photoluminescence spectra likely arises from the inhomogeneous distribution of quantum dot sizes and the potential influence of the carrier localizations at the interfaces. A Fabry-Perot interference pattern is visible with the quantum dot structures and is correlated with the total nitride layer thickness.

[0042] Temperature-dependent photoluminescence measurements for the QD samples emitting at different wavelengths were also conducted. The integrated photoluminescence intensity vs. temperature is plotted in Figure 4, part (c). The IQE is calculated as the ratio of the photoluminescence intensity measured at room temperature (300 K) to the PL intensity at low temperature (20 K), based on the assumption that radiative recombination dominates at 20 K. The highest IQE of 86.4% at room temperature is derived for the sample with emission at about 240 nm, demonstrating the utility of the N-polar GaN quantum dot-based devices.

[0043] The relatively high luminescence efficiency is attributed to the strong charge carrier confinement offered by the GaN / AIN quantum dot heterostructures, as well as the growth conditions, including quantum dot growth temperature, growth duration, and AIN barrier layer thickness and growth temperature, which help reduce nonradiative recombination centers in the quantum dots as well as the heterointerface and ensure that radiative recombination dominates across a broad temperature range. Furthermore, as described herein, the annealing steps during the growth process improved crystal quality and reduced defects, further boosting IQE.

[0044] The polarization properties of the emissions from the example devices emitting at about 240 nm were examined. The measurements were conducted using a Glan-Taylor calcite polarizer with a high-precision rotation mount system to resolve the emission spectrum as shown in Figure 5, part (a). Figure 5, part (b), shows the photoluminescence spectra obtained at room-temperature, illustrating both the TE and TM components of the emission with a ratio of TE / TM = 4.8. The degree of polarization (p), defined by p = (TE -Atty. Docket No. 10110-24020ATM) / (TE + TM), is approximately 0.7 for the emission depicted in Figure 5, part (b). The positive polarization value is attributed to the dominant TE-polarized light emission from the example device, showcasing a significant improvement over polarization values previously reported for GaN or AIGaN quantum wells employed in deep LIV LEDs and lasers. Moreover, the positive polarization value aligns well with theoretical predictions and marks the experimental validation of such high TE polarized emission in N-polar GaN quantum dots. The high internal quantum efficiency, along with the dominant TE polarized emission measured from the N-polar GaN quantum dots, are useful for achieving high-efficiency and high-power UV emitters, which is challenging for conventional AIGaN quantum well-based devices.

[0045] The above-described examples of the disclosed methods and devices demonstrate the epitaxial growth and characterization of N-polar GaN / AIN quantum dots with tunable emission from about 240 nm to about 330 nm, covering a large part of the UV-A, B, and C bands. The quantum dot heterostructures of the disclosed devices provide high efficiency emission in the deep UV (about 240 nm), with predominantly TE-polarized emission. The disclosed methods and devices thus provide a useful approach to realizing high-efficiency mid and deep UV optoelectronic and other devices.

[0046] Figure 6 depicts a method 600 of fabricating a quantum dot-based device having a heterostructure in accordance with one example. The heterostructure may form or provide a light-emitting device or other optoelectronic device. In other cases, the quantum dot-based device is a quantum computing or other electronic device. The method 600 may be used to fabricate any one of the example devices described herein, as well as other devices and heterostructures.

[0047] The method 600 may begin with an act 602 in which a substrate is prepared and / or otherwise provided. In some cases, the act 602 includes providing a C-face 4H-SiC substrate in an act 604. Alternative or additional materials may be used, including, for instance, AIN and GaN. Still other materials may be used, including, for instance, sapphire and graphene.

[0048] The composition and / or other characteristics of the substrate may be selected to establish the polarity of the heterostructure layers. In some cases, the layers and other structures of the heterostructure are nitrogen-polar. In other cases, the layers and other structures of the heterostructure are metal-polar.

[0049] The substrate may be cleaned in an act 606. For instance, the substrate may be cleaned via dips in acetone, methanol, and / or liquids. Organic and / or other impurities mayAtty. Docket No. 10110-24020A thus be removed. In some cases, a native or other oxide layer may be removed from a substrate surface. In some cases, the substrate is subjected to outgassing (or degassing) in an act 608. One or more outgassing procedures may be implemented in the load lock and preparation chambers of the MBE system chamber(s), as described herein. The temperatures of the outgassing procedures may vary, e.g., in accordance with the substrate material.

[0050] Additional or alternative substrate processing may be implemented in other cases, including, for instance, doping or deposition procedures. The substrate thus may or may not have a uniform composition. The substrate may be a uniform or composite structure.

[0051] In an act 610, a buffer layer is formed on the substrate. The buffer layer may be composed of, or otherwise include, a Ill-nitride material, such as AIN. Additional or alternative Ill-nitride materials may be used, including, for instance, AIGaN, InGaN, and BN. In some cases, the act 610 includes growing or otherwise forming a nucleation layer or template layer on the substrate. The nucleation layer may be composed of, or otherwise include, the Ill-nitride layer of the buffer layer and / or another Ill-nitride material. The buffer layer may be formed via implementation of a plasma-assisted MBE procedure in an act 614. Additional or alternative epitaxial growth procedures may be implemented, such as a MOCVD procedure in an act 616.

[0052] The method 600 includes an act 618 in which a set of quantum dot structures or nanocrystals of the heterostructure are epitaxially grown. The nanocrystals may be configured as quantum dots or quantum dot structures, as described herein. The nanocrystals may be composed of, or otherwise include, a Ill-nitride semiconductor material, such as GaN. Additional or alternative Ill-nitride materials may be used, including, for instance, AIGaN, InN, AIN, BN, ScAIN, and alloys thereof. Still other Ill-nitride materials may be used.

[0053] The act 618 may include an act 620 in which the quantum dot structures or nanocrystals are grown via implementation of an MBE procedure. Alternatively, a MOCVD procedure is implemented in an act 622. In either case, the growth may be continued in the same chamber used in the act 610 is used to grow the buffer layer.

[0054] The process parameters of the growth procedure of the act 618 may vary as described herein. For instance, the duration of the growth procedure may be selected such that the nanocrystals are sized for LIV emission.

[0055] In some cases, the act 618 includes an act 624 in which the epitaxial growth is implemented in a nitrogen-rich environment, e.g., under nitrogen-rich conditions.Atty. Docket No. 10110-24020A

[0056] A variety of growth temperatures may be used. For instance, growing the set of quantum dot structures may be implemented at a temperature falling in a range from about 500 °C to about 800 °C degrees Celsius, but other growth temperatures may be used (e.g., in connection with the growth of other semiconductor materials). The other growth parameters (e.g., growth duration) may vary accordingly.

[0057] In an act 626, a barrier layer of the heterostructure is grown on the set of nanocrystals. As described herein, the barrier layer may be grown at the same temperature (i.e. , about or effectively the same) used to grow the nanocrystals. The growth temperature for the barrier layer may thus fall in the above-identified range of temperatures for the quantum dot growth. In other cases, the growth temperature for the barrier layer may deviate from the quantum dot growth temperature to an extent appropriate for the Ill-nitride material and / or other factors.

[0058] The barrier layer may be composed of, or otherwise include, a Ill-nitride material, such as AIN. Additional or alternative Ill-nitride materials may be used, including, for instance, AIGaN, AIBN, and AIScN. The composition of the barrier layer may be selected for carrier confinement. For instance, the Ill-nitride material of the barrier layer may have a larger bandgap than the Ill-nitride semiconductor material of the nanocrystals to help confine the carriers in the nanocrystals. Alternatively or additionally, the barrier layer has a staggered band alignment relative to the nanocrystals (e.g., a Type II or Type III band alignment). The barrier layer may or may not have the same composition as a subsequently grown capping layer.

[0059] The duration of the barrier layer growth procedure may be selected to achieve a desired thickness for the barrier layer. As described herein, the duration may be selected such that the Ill-nitride barrier layer is thin enough to allow desorption of a portion of the semiconductor material of the nanocrystals through the barrier layer during a subsequent anneal of the barrier layer. For instance, the barrier layer may have a thickness falling in a range from about 1 nm to about 10 nm. In some cases, the thickness of the barrier layer may be an order of magnitude lower than the thickness of a subsequently formed capping later. Alternatively or additionally, the thickness of the barrier layer may be on the same order of magnitude as the height of the nanocrystals.

[0060] The method 600 may include an act 628 in which the barrier layer is annealed. As described herein, the anneal procedure may be configured to remove defects in the barrier layer and / or to tune the size (and consequently emission wavelength) of the quantum dots or other nanocrystals. The anneal temperature is higher than the temperature at which theAtty. Docket No. 10110-24020A barrier layer is grown. In some cases, the anneal temperature falls in a range from about 600 °C to about 800 °C, or in a range from about 1000 °C to about 1500 °C. The anneal temperature may vary, e.g., in accordance with the use of other Ill-nitride materials. The anneal temperature may be at a level sufficiently high to cause the evaporation of the semiconductor material of the nanocrystals if the nanocrystals were not covered by the barrier layer. The anneal may be implemented before the growth of any further layers of the heterostructure, such as a capping layer.

[0061] After the growth of the barrier layer, a capping layer of the heterostructure is grown in an act 630. As described herein, the capping layer covers the nanocrystals and barrier layer of the heterostructure. The capping layer may be composed of, or otherwise include, a Ill-nitride material, such as AIN. Additional or alternative Ill-nitride materials may be used, including, for instance, AIGaN, AIBN, and AIScN. The capping layer may have the same composition as the barrier layer, or a different composition.

[0062] The temperature at which the capping layer is grown may be at a level at which evaporation of the Ill-nitride semiconductor material of the nanocrystals would occur if the nanocrystals were not covered by the barrier layer. For instance, the capping layer may be grown at a temperature falling in a range from about 600 °C to about 900 °C, but other growth temperatures may be used (e.g., in connection with the growth of other semiconductor materials). In some cases, the capping layer growth temperature and the anneal temperature are equal (or effectively or about equal).

[0063] The respective growth temperatures for the layers of the heterostructure may vary from the examples and ranges provided above. However, the barrier layer growth temperature may remain closer to the nanocrystal growth temperature than the capping layer growth temperature in the interest of achieving high efficiency emissions in the LIV-A, B, and C bands, as described herein.

[0064] Any number of quantum dot or nanocrystal layers may be grown. Consequently, additional barrier layers may also be grown and processed as described herein. The method 600 may accordingly include multiple cycles of the acts 618, 626, and 628.

[0065] The method 600 may include fewer, alternative, or additional acts. For example, the method 600 may include the implementation of one or more doping procedures for one or more of the semiconductor layers, structures, or other elements described herein. Such doping may be useful in connection with charge carrier confinement and / or other purposes. The method 600 may also include any number of additional acts directed to forming additional layers of the heterostructure and / or other structures of the device. For instance,Atty. Docket No. 10110-24020A one or more metal layers may be deposited and patterned to form one or more contacts or electrodes.

[0066] Described above are examples involving the epitaxial growth of nitrogen-polar (bipolar) GaN quantum dots (QDs) grown on SiC substrates. By varying the growth conditions, the emission wavelengths of the GaN quantum dots can be controllably tuned across a large part of the ultraviolet-A, B and C bands. For N-polar quantum dots emitting at 243 nm, an internal quantum efficiency (IQE) of 86.4% at room-temperature was measured, with predominantly transverse-electric (TE) polarized emission. Such N-polar GaN quantum dotbased devices are useful in a variety of high efficiency mid- and deep-ultraviolet optoelectronic applications, including, for instance, light-emitting diodes and lasers.

[0067] As used herein, the terms "atomically smooth" or "atomically smooth surface" may be used herein in connection with a layer of a heterostructure to indicate that the layer has a surface roughness (e.g., a root mean square, or RMS, roughness) less than or on the order of 1 nm. In some cases, the RMS roughness of such atomically smooth layers is less than 1% of the thickness of the layer. The surface roughness may vary in accordance with the growth conditions, parameters, and other aspects of the fabrication processes described and / or referenced herein and / or other processes.

[0068] The term "about" is used herein in a manner to include deviations from a specified value that would be understood by one of ordinary skill in the art to effectively be the same as the specified value due to, for instance, the absence of appreciable, detectable, or otherwise effective difference in operation, outcome, characteristic, or other aspect of the disclosed methods and devices.

[0069] The present disclosure has been described with reference to specific examples that are intended to be illustrative only and not to be limiting of the disclosure. Changes, additions and / or deletions may be made to the examples without departing from the spirit and scope of the disclosure.

[0070] The foregoing description is given for clearness of understanding only, and no unnecessary limitations should be understood therefrom.

Claims

Atty. Docket No. 10110-24020AWhat is Claimed is:

1. A method of fabricating a device, the method comprising: forming a Ill-nitride buffer layer on a substrate; growing epitaxially a set of nanocrystals on the Ill-nitride buffer layer at a first growth temperature, each quantum dot structure of the set of quantum dot structures comprising a Ill-nitride semiconductor material; growing epitaxially a Ill-nitride barrier layer on the set of nanocrystals at a second growth temperature; and after growing the Ill-nitride barrier layer, growing epitaxially a Ill-nitride capping layer at a third growth temperature; wherein: the third growth temperature is at a level at which evaporation of the Ill-nitride semiconductor material would occur if not covered by the Ill-nitride barrier layer; the second growth temperature is closer to the first growth temperature than the third temperature.

2. The method of claim 1 , further comprising annealing the Ill-nitride barrier layer at an anneal temperature higher than the second growth temperature before growing the Ill-nitride capping layer.

3. The method of claim 2, wherein the anneal temperature is sufficiently high to cause evaporation of the semiconductor material if not covered by the Ill-nitride barrier layer.

4. The method of claim 2, wherein the anneal temperature is effectively equal to the third growth temperature.

5. The method of claim 2, wherein growing the Ill-nitride barrier layer is implemented for a duration such that the Ill-nitride barrier layer is thin enough to allow desorption of a portion of the semiconductor material through the Ill-nitride barrier layer while the Ill-nitride barrier layer is annealed.

6. The method of claim 1 , wherein the second growth temperature is effectively equal to the first growth temperature.

7. The method of claim 1 , wherein each nanocrystal of the set of nanocrystals is configured as a quantum dot.Atty. Docket No. 10110-24020A8. The method of claim 1 , wherein the first growth temperature falls in a range from about 800 °C to about 1000 °C.

9. The method of claim 1 , wherein growing the set of nanocrystals is implemented for a duration such that each nanocrystal of the set of nanocrystals is sized for LIV emission.

10. The method of claim 1 , wherein the Ill-nitride barrier layer and the Ill-nitride capping layer have a common composition.

11. The method of claim 1 , wherein : the Ill-nitride buffer layer comprises AIN; the semiconductor material is GaN; the Ill-nitride barrier layer comprises AIN; the Ill-nitride capping layer comprises AIN.

12. The method of claim 1 , wherein the substrate comprises SiC and the Ill-nitride buffer layer is grown on a C-face of the substrate.

13. The method of claim 1 , wherein growing epitaxially the set of nanocrystals is implemented under nitrogen rich conditions.

14. The method of claim 1 , wherein forming the Ill-nitride layer comprises: growing epitaxially a Ill-nitride nucleation layer on the substrate; and growing the Ill-nitride buffer layer on the Ill-nitride nucleation layer.

15. A device comprising: a substrate; and a heterostructure supported by the substrate, the heterostructure comprising: a Ill-nitride buffer layer; a set of nanocrystals supported by the Ill-nitride buffer layer, each nanocrystal structure of the set of nanocrystals comprising a Ill-nitride semiconductor material; a Ill-nitride barrier layer disposed across the set of nanocrystals; and a Ill-nitride capping layer that covers the set of nanocrystals and the Ill-nitride barrier layer.

16. The device of claim 15, wherein each nanocrystal of the set of nanocrystals is nitrogen-polar.Atty. Docket No. 10110-24020A17. The device of claim 15, wherein the set of nanocrystals are sized and configured for LIV emissions.

18. The device of claim 15, wherein each nanocrystal of the set of nanocrystals is configured as a quantum dot.

19. The device of claim 15, wherein the Ill-nitride barrier layer and the Ill-nitride capping layer have a common composition.

20. The device of claim 15, wherein the Ill-nitride barrier layer and the Ill-nitride capping layer have different compositions.

21. The device of claim 15, wherein a Ill-nitride material of the Ill-nitride barrier layer has a larger bandgap than the Ill-nitride semiconductor material of the set of nanocrystals.

22. The device of claim 15, wherein a Ill-nitride material of the Ill-nitride barrier layer and the Ill-nitride semiconductor material have a staggered band alignment.

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