Light detection device

Abstract

A light detection device according to an embodiment of the present disclosure is provided with a semiconductor substrate having a first surface and a second surface opposing each other, a photoelectric conversion unit provided on the semiconductor substrate and configured to generate, through photoelectric conversion, a first charge corresponding to a received light amount, a plurality of first transistors provided on the first surface of the semiconductor substrate and constituting a read circuit for reading the first charge, a first separation groove provided on the first surface of the semiconductor substrate for separating a first active region including the photoelectric conversion unit from a second active region in which the plurality of first transistors are formed, and a charge discharge unit provided on the first surface of the semiconductor substrate and connected to the first active region.

Description

Optical detection device

[0001] The present disclosure relates to, for example, an optical detection device.

[0002] For example, in Patent Document 1, an N-type region that performs photoelectric conversion formed for each pixel, and an inter-pixel light shielding wall formed between N-type regions that penetrate the semiconductor substrate in the depth direction and perform photoelectric conversion of adjacent pixels respectively, and a P-type region is provided between this N-type region and the interface on the light incident side of the semiconductor substrate, thereby suppressing the generation of dark current, and a solid-state imaging device is disclosed.

[0003] Japanese Patent Application Laid-Open No. 2018-148116

[0004] By the way, for example, in an optical detection device used as an imaging device, improvement of image quality is required.

[0005] It is desirable to provide an optical detection device capable of improving image quality.

[0006] An optical detection device as an embodiment of the present disclosure includes a semiconductor substrate having opposing first and second surfaces, a photoelectric conversion unit provided on the semiconductor substrate and configured to generate a first charge corresponding to the received light amount by photoelectric conversion, a plurality of first transistors provided on the first surface of the semiconductor substrate and constituting a readout circuit for reading out the first charge, a first separation groove provided on the first surface of the semiconductor substrate and separating a first active region including the photoelectric conversion unit and a second active region in which the plurality of first transistors are formed, and a charge discharge unit provided on the first surface of the semiconductor substrate and connected to the first active region.

[0007] In the optical detection device according to an embodiment of the present disclosure, a first separation groove that separates a first active region provided with the photoelectric conversion unit and a second active region in which a plurality of first transistors are formed, and a charge discharge unit connected to the first active region are provided. Thereby, the inflow of the second charge generated at the interface between the first separation groove and the first active region into the photoelectric conversion unit is reduced.

[0008] Figure 1 is a schematic diagram showing an example of a cross-sectional configuration of a photodetector according to an embodiment of the present disclosure. Figure 2 is a block diagram showing the overall configuration of the photodetector shown in Figure 1. Figure 3 is an equivalent circuit diagram of a unit pixel shown in Figure 1. Figure 4 is a schematic diagram showing an example of a planar configuration of the photodetector shown in Figure 1. Figure 5 is a schematic diagram showing another example of a planar configuration of the photodetector shown in Figure 1. Figure 6 is a schematic diagram showing another example of a planar configuration of the photodetector shown in Figure 1. Figure 7 is a schematic diagram showing another example of a planar configuration of the photodetector shown in Figure 1. Figure 8 is a schematic diagram showing an enlarged cross-sectional configuration near the interface between the element isolation unit and the photoelectric conversion unit shown in Figure 4. Figure 9 is a schematic diagram showing an enlarged cross-sectional configuration near the interface between the charge discharge unit and the photoelectric conversion unit shown in Figure 4. Figure 10 is a diagram showing the potential near the interface between the element isolation unit and the photoelectric conversion unit shown in Figure 4. Figure 11 is a diagram showing the potential near the interface between the element isolation unit and the photoelectric conversion unit when an impurity diffusion region is not provided between the element isolation unit and the photoelectric conversion unit. Figure 12 is an example of an equivalent circuit diagram of a unit pixel of a photodetector according to Modification 1 of the present disclosure. Figure 13 is another example of an equivalent circuit diagram of a unit pixel of a photodetector according to Modification 1 of the present disclosure. Figure 14 is another example of an equivalent circuit diagram of a unit pixel of a photodetector according to Modification 1 of the present disclosure. Figure 15 is a schematic diagram showing an example of a planar configuration of a photodetector according to Modification 1 of the present disclosure. Figure 16 is a schematic diagram showing another example of a planar configuration of a photodetector according to Modification 1 of the present disclosure. Figure 17 is a schematic diagram showing another example of a planar configuration of a photodetector according to Modification 1 of the present disclosure. Figure 18 is a schematic diagram showing an enlarged cross-sectional configuration of the pixel transistor and charge discharge section shown in Figure 15. Figure 18 is an example of an equivalent circuit diagram of a unit pixel of a photodetector according to Modification 2 of the present disclosure. Figure 20 is a schematic diagram showing an example of a planar configuration of a photodetector according to Modification 2 of the present disclosure. Figure 21 is a schematic diagram showing an example of a planar configuration of a photodetector according to Modification 3 of the present disclosure. Figure 22 is a diagram showing the potential between the transfer gate and the charge discharge section of the photodetector shown in Figure 21. Figure 23 is a schematic diagram showing an example of a planar configuration of the photodetector according to Modification 4 of the present disclosure. Figure 24 is a schematic diagram showing another example of a planar configuration of the photodetector according to Modification 4 of the present disclosure.Figure 25 is a schematic diagram showing an example of a planar configuration of a photodetector according to Modification 5 of the present disclosure. Figure 26 is a schematic diagram showing another example of a planar configuration of a photodetector according to Modification 5 of the present disclosure. Figure 27 is a schematic diagram showing an example of a cross-sectional configuration of a photodetector according to Modification 6 of the present disclosure. Figure 28 is a schematic diagram showing an example of a planar configuration of the photodetector shown in Figure 27. Figure 29 is a schematic diagram showing an enlarged view of the cross-sectional configuration near the interface between the element isolation unit and the photoelectric conversion unit shown in Figure 28. Figure 30 is a block diagram showing an example of the configuration of an electronic device having a photodetector shown in Figure 1, etc. Figure 31A is a schematic diagram showing an example of the overall configuration of a photodetector system using the photodetector shown in Figure 1, etc. Figure 31B is a diagram showing an example of the circuit configuration of the photodetector system shown in Figure 31A. Figure 32 is a block diagram showing an example of a schematic configuration of a vehicle control system. Figure 33 is an explanatory diagram showing an example of the installation position of the external information detection unit and the imaging unit. Figure 34 is a diagram showing an example of a schematic configuration of an endoscopic surgery system. Figure 35 is a block diagram showing an example of the functional configuration of the camera head and CCU.

[0009] Hereinafter, one embodiment of the present disclosure will be described in detail with reference to the drawings. The following description is a specific example of the present disclosure, and the present disclosure is not limited to the following embodiment. Furthermore, the present disclosure is not limited to the arrangement, dimensions, dimensional ratios, etc., of each component shown in each figure. The order of description is as follows: 1. Embodiment (Example of a photodetector equipped with an active region where a photoelectric conversion unit is provided and a charge discharge unit connected thereto) 2. Modifications 2-1. Modification 1 (Another example of the configuration of a photodetector) 2-2. Modification 2 (Another example of the configuration of a photodetector) 2-3. Modification 3 (Another example of the configuration of a photodetector) 2-4. Modification 4 (Another example of the configuration of a photodetector) 2-5. Modification 5 (Another example of the configuration of a photodetector) 2-6. Modification 6 (Another example of the configuration of a photodetector) 3. Application Examples 4. Application Examples

[0010] <1. Embodiment> Figure 1 schematically shows an example of a cross-sectional configuration of a photodetector (photodetector 1) according to one embodiment of the present disclosure. The photodetector 1 is, for example, a CMOS (Complementary Metal Oxide Semiconductor) image sensor used in electronic devices such as digital still cameras and video cameras, and has a pixel section (pixel array section 100A) in which a plurality of pixels (unit pixels P) are arranged in a matrix in two dimensions as an imaging area. The photodetector 1 is, for example, a so-called back-illuminated type photodetector in this CMOS image sensor.

[0011] The photodetector 1 has a semiconductor substrate 10 having opposing front surface 10S1 and back surface 10S2. The semiconductor substrate 10 is provided with a photoelectric conversion unit 11 configured to generate a charge from a photoelectric conversion unit according to the amount of light received, a plurality of transistors (a plurality of pixel transistors 220) that constitute a readout circuit for reading the charge generated in the photoelectric conversion unit 11, and an element isolation unit 13 that separates a first active region X1 where the photoelectric conversion unit 11 is provided and a second active region X2 where the plurality of pixel transistors 220 are provided. The semiconductor substrate 10 is further provided with a charge discharge unit 14 connected to the first active region X1.

[0012] Here, the semiconductor substrate 10 corresponds to a specific example of a "semiconductor substrate" as one embodiment of the present disclosure. The photoelectric conversion unit 11 corresponds to a specific example of a "photoelectric conversion unit" as one embodiment of the present disclosure. The plurality of pixel transistors 220 correspond to a specific example of a "plural of first transistors" as one embodiment of the present disclosure. The element isolation unit 13 corresponds to a specific example of a "first isolation groove" as one embodiment of the present disclosure. The charge discharge unit 14 corresponds to a specific example of a "charge discharge unit" as one embodiment of the present disclosure.

[0013] [Outline Configuration of the Light Detection Device] Figure 2 shows an example of the overall configuration of the light detection device 1. As described above, the light detection device 1 is, for example, a CMOS image sensor used in electronic devices such as digital still cameras and video cameras, and has a pixel array section 100A as an imaging area in which a plurality of unit pixels P are arranged in a matrix in two dimensions.

[0014] The light detection device 1 captures incident light (image light) from a subject through an optical lens system (not shown), converts the amount of light of the incident light formed on the imaging surface into an electrical signal on a pixel-by-pixel basis, and outputs it as a pixel signal. The light detection device 1 has a pixel array section 100A as an imaging area on a semiconductor substrate 10, and in the peripheral region of this pixel array section 100A, for example, a vertical drive circuit 101, a column signal processing circuit 102, a horizontal drive circuit 103, an output circuit 104, a control circuit 105, and input / output terminals 106.

[0015] Each unit pixel P is wired with, for example, a pixel drive line Lread (specifically, a row selection line and a reset control line) for each pixel row, and a vertical signal line Lsig for each pixel column. The pixel drive line Lread transmits drive signals for reading signals from the pixels. One end of the pixel drive line Lread is connected to the output terminal corresponding to each row of the vertical drive circuit 101.

[0016] The vertical drive circuit 101 is a pixel drive unit composed of a shift register, an address decoder, etc., which drives each unit pixel P of the pixel array section 100A, for example, in row units. The signals output from each unit pixel P of the pixel row selected and scanned by the vertical drive circuit 101 are supplied to the column signal processing circuit 102 through each of the vertical signal lines Lsig. The column signal processing circuit 102 is composed of amplifiers, horizontal selection switches, etc., provided for each vertical signal line Lsig.

[0017] The horizontal drive circuit 103 is composed of a shift register, an address decoder, etc., and sequentially drives each horizontal selection switch of the column signal processing circuit 102 while scanning it. Through this selection scanning by the horizontal drive circuit 103, the signals of each pixel transmitted through each of the vertical signal lines Lsig are sequentially output to the horizontal signal line 107 and transmitted to the outside of the semiconductor substrate 10 through the horizontal signal line 107.

[0018] The output circuit 104 processes the signals sequentially supplied from each of the column signal processing circuits 102 via the horizontal signal line 107 and outputs them. The output circuit 104 may, for example, only perform buffering, or it may perform black level adjustment, column variation correction, and various digital signal processing.

[0019] The circuit portion consisting of the vertical drive circuit 101, column signal processing circuit 102, horizontal drive circuit 103, horizontal signal line 107, and output circuit 104 may be formed directly on the semiconductor substrate 10, or it may be disposed on an external control IC. Alternatively, these circuit portions may be formed on other substrates connected by cables or the like.

[0020] The control circuit 105 receives a clock signal and data commanding the operating mode from outside the semiconductor substrate 10, and outputs data such as internal information of the photodetector 1. The control circuit 105 also has a timing generator that generates various timing signals, and controls the drive of peripheral circuits such as the vertical drive circuit 101, the column signal processing circuit 102, and the horizontal drive circuit 103 based on the various timing signals generated by the timing generator.

[0021] The input / output terminal 106 is used for exchanging signals with the outside world.

[0022] [Circuit configuration of a unit pixel]

[0023] Figure 3 shows an example of a unit pixel P and a readout circuit 200. Below, we will describe the case where four unit pixels P share one floating diffusion FD and one readout circuit 200. Here, "sharing" means that the charges of the four unit pixels P are temporarily held in the common floating diffusion FD.

[0024] Each unit pixel P has components that are common to all of them. In the following, to distinguish the components of the four unit pixels P that share a single floating diffusion FD, an identification number (1, 2, 3, 4) is added to the end of the code of each unit pixel P's component. Note that when it is necessary to distinguish the components of each unit pixel P from one another, an identification number is added to the end of the code of each unit pixel P's component; however, when it is not necessary to distinguish the components of each unit pixel P from one another, the identification number at the end of the code of each unit pixel P's component is omitted.

[0025] Each unit pixel P includes, for example, a photodiode PD (photoelectric conversion unit 11), a transfer transistor TR electrically connected to the photoelectric conversion unit 11, and a floating diffusion FD that temporarily holds the charge output from the photoelectric conversion unit 11 via the transfer transistor TR. The photoelectric conversion unit 11 performs photoelectric conversion to generate a charge corresponding to the amount of light received. The cathode of the photoelectric conversion unit 11 is electrically connected to the source of the transfer transistor TR, and the anode of the photoelectric conversion unit 11 is electrically connected to a reference potential line (e.g., ground GND). The drain of the transfer transistor TR is electrically connected to the floating diffusion FD, and the gate of the transfer transistor TR is electrically connected to the pixel drive line Lread. The transfer transistor TR is, for example, a CMOS (Complementary Metal Oxide Semiconductor) transistor.

[0026] The floating diffusion FDs of each unit pixel P that share a single readout circuit 200 are electrically connected to each other and are also electrically connected to the input terminal of the common readout circuit 200. The readout circuit 200 is composed of a plurality of pixel transistors 220, for example, a reset transistor RST, a selection transistor SEL, and an amplification transistor AMP. The selection transistor SEL may be omitted if necessary. The source of the reset transistor RST (the input terminal of the readout circuit 200) is electrically connected to the floating diffusion FD, and the drain of the reset transistor RST is electrically connected to the power line VDD and the drain of the amplification transistor AMP. The gate of the reset transistor RST is electrically connected to the pixel drive line Lread. The source of the amplification transistor AMP is electrically connected to the drain of the selection transistor SEL, and the gate of the amplification transistor AMP is electrically connected to the source of the reset transistor RST. The source of the selection transistor SEL (the output terminal of the readout circuit 200) is electrically connected to the vertical signal line Lsig, and the gate of the selection transistor SEL is electrically connected to the pixel drive line Lread.

[0027] The transfer transistor TR corresponds to a specific example of the "second transistor" as one embodiment of the present disclosure. When the transfer transistor TR is turned ON, it transfers the charge from the photoelectric conversion unit 11 to the floating diffusion FD. The gate (gate electrode 231) of the transfer transistor TR extends, for example, from the surface 10S1 side of the semiconductor substrate 10 through the p-well layer 111 to a depth reaching the n-type semiconductor region 112, as shown in Figure 1. The reset transistor RST resets the potential of the floating diffusion FD to a predetermined potential. When the reset transistor RST is turned ON, it resets the potential of the floating diffusion FD to the potential of the power line VDD. The selection transistor SEL controls the output timing of the pixel signal from the readout circuit 200. The amplification transistor AMP generates a voltage signal as the pixel signal, corresponding to the level of charge held in the floating diffusion FD. The amplification transistor AMP constitutes a source follower type amplifier and outputs a pixel signal with a voltage corresponding to the level of charge generated in the photoelectric conversion unit 11. When the selection transistor SEL is turned ON, the amplification transistor AMP amplifies the potential of the floating diffusion FD and outputs a voltage corresponding to that potential to the column signal processing circuit 102 via the vertical signal line Lsig. The reset transistor RST, the amplification transistor AMP, and the selection transistor SEL are, for example, CMOS transistors.

[0028] The selection transistor SEL may be provided between the power line VDD and the amplification transistor AMP. In this case, the drain of the reset transistor RST is electrically connected to the power line VDD and the drain of the selection transistor SEL. The source of the selection transistor SEL is electrically connected to the drain of the amplification transistor AMP, and the gate of the selection transistor SEL is electrically connected to the pixel drive line Lread. The source of the amplification transistor AMP (the output terminal of the readout circuit 200) is electrically connected to the vertical signal line Lsig, and the gate of the amplification transistor AMP is electrically connected to the source of the reset transistor RST.

[0029] In this embodiment, four unit pixels P1, P2, P3, and P4 that share a single floating diffusion FD are connected to the readout circuit 200, as shown in Figure 3, for example.

[0030] [Cross-sectional configuration of unit pixels] As described above, the light detection device 1 is, for example, a back-illuminated light detection device, and has a pixel array section 100A as an imaging area in which a plurality of unit pixels P are arranged in a matrix in two dimensions. The unit pixel P has a configuration in which a semiconductor substrate 10 having opposing surfaces 10S1 and back surface 10S2, a multilayer wiring layer 20 provided on the surface 10S1 side of the semiconductor substrate 10, and an optical member 30 provided on the back surface 10S2 side of the semiconductor substrate 10 which is the light incident side S1 are laminated together.

[0031] In Figure 1, "p" and "n" indicate the presence of p-type or n-type impurities. The "+" (plus) sign next to "p" and "n" indicates a high concentration of p-type or n-type impurities, while the "-" (minus) sign indicates a low concentration of p-type or n-type impurities.

[0032] The semiconductor substrate 10 is made of, for example, a silicon substrate. The surface 10S1 of the semiconductor substrate 10 is a so-called element formation surface on which the transfer transistor TR and a plurality of pixel transistors 220 constituting the readout circuit 200 described above are formed. The back surface 10S2 of the semiconductor substrate is a so-called light incident surface. The semiconductor substrate 10 has, for example, a p-well layer 111 in a part of the surface 10S1 and its vicinity, and an n-type semiconductor region 112 in the remaining region (for example, a region deeper than the p-well layer 111). In the semiconductor substrate 10, for example, a pn-junction type photodiode PD composed of this p-well layer 111 and n-type semiconductor region 112 is embedded as a photoelectric conversion unit 11 for each unit pixel P.

[0033] The surface 10S1 of the semiconductor substrate 10 is provided with a floating diffusion (FD) 12, a transfer transistor TR, and a plurality of pixel transistors 220. The FD 12 is composed of, for example, an n-type semiconductor region.

[0034] The transfer transistor TR is a so-called vertical transistor, and as shown in Figure 1, for example, it has a gate electrode 231 that includes a vertical portion 231A extending in the Z-axis direction and a horizontal portion 231B perpendicular to the vertical portion 231A. The vertical portion 231A is embedded in the semiconductor substrate 10. By using such a vertical transistor, the transfer transistor TR is less prone to pixel signal transfer failures and the readout efficiency of the pixel signal can be improved. The pixel transistor 220 is a so-called planar transistor, and has a gate electrode 221 provided on the surface 10S1 of the semiconductor substrate 10. Although not shown, a gate insulating film is provided on the surface 10S1 of the semiconductor substrate 10. A side wall 222 is provided on the side surface of the gate electrode 221. The side wall 222 is made of, for example, silicon nitride (SiN).

[0035] The transfer transistor TR may also be a so-called planar transistor, similar to the pixel transistor 220.

[0036] The surface 10S1 of the semiconductor substrate 10 is further provided with an element isolation section 13 and a charge discharge section 14.

[0037] The semiconductor substrate 10 has a first active region X1 including a photoelectric conversion unit 11 and a second active region X2 on which a plurality of pixel transistors 220 are formed. The element isolation unit 13 electrically isolates the first active region X1 and the second active region X2 and has, for example, an STI (Shallow Trench Isolation) structure. The element isolation unit 13 is formed including an insulating film such as silicon oxide (SiO).

[0038] The charge discharge section 14 discharges charge generated at the interface between the semiconductor substrate 10 and the element isolation section 13, which may become a dark current, and is composed of, for example, an n-type semiconductor region. The charge discharge section 14 is connected to the first active region X1, for example, electrically and physically, although this will be described in detail later. The charge discharge section 14 is formed, for example, away from ground (GND) and fixed at a potential higher than GND (for example, the power supply potential). The charge discharge section 14 may also serve as the source or drain of any of the multiple pixel transistors 220 that constitute the readout circuit 200.

[0039] The semiconductor substrate 10 is provided with a pixel separation section 15 that separates a plurality of unit pixels P arranged in a matrix in a two-dimensional manner from one another. The pixel separation section 15 is formed extending in the thickness direction (Z-axis direction) of the semiconductor substrate 10. The pixel separation section 15 is provided so as to partition adjacent unit pixels P from each other and has, for example, a grid-like planar shape. The pixel separation section 15 electrically and optically separates adjacent unit pixels P from each other. The pixel separation section 15 includes, for example, a light-shielding film and an insulating film. For example, a metallic material such as tungsten (W) is used for the light-shielding film. For example, a predetermined potential may be applied to the light-shielding film. The insulating film is provided between the light-shielding film and the p-well layer 111 and the n-type semiconductor region 112. For example, silicon oxide (SiO) is used for the insulating film. The pixel separation section 15 has, for example, a DTI (Deep Trench Isolation) structure provided from the back surface 10S2 side of the semiconductor substrate 10. The pixel separation section 15 may also be an FTI (Full Trench Isolation) structure that penetrates the semiconductor substrate 10.

[0040] The semiconductor substrate 10 is provided with, for example, a first pinning region 113 and a second pinning region 114. The first pinning region 113 is provided near the back surface 10S2 of the semiconductor substrate 10 and is located between the n-type semiconductor region 112 and the fixed charge film 16, which will be described later. The second pinning region 114 is provided on the side surface of the pixel separation portion 15, specifically between the pixel separation portion 15 and the p-well layer 111 or the n-type semiconductor region 112. The first pinning region 113 and the second pinning region 114 are composed of, for example, p-type semiconductor regions.

[0041] The semiconductor substrate 10 is further provided with an impurity diffusion region 115 and a third pinning region 116.

[0042] The third pinning region 116 is intended to suppress the inflow of dark current from the interface between the semiconductor substrate 10 and the element isolation region 13 into the photoelectric conversion region 11. As will be described in detail later, it is provided between the photoelectric conversion region 11 and the element isolation region 13 (see, for example, Figure 8). The third pinning region 116 extends, for example, from between the photoelectric conversion region 11 and the element isolation region 13 to the surface 10S1 of the semiconductor substrate 10. The third pinning region 116 is composed of, for example, a p-type semiconductor region.

[0043] The impurity diffusion region 115 is provided between the element isolation region 13 and the third pinning region 116, and serves as a transfer path for discharging charge generated at the interface between the semiconductor substrate 10 and the element isolation region 13 to the charge discharge region 14. The impurity diffusion region 115 is composed of a p-type or n-type semiconductor region containing, for example, bromine (B), arsenic (P), phosphorus (P), etc., as impurities. When the impurity diffusion region 115 is composed of p-type impurities, it has a relatively lower impurity concentration compared to the third pinning region 116. The impurity diffusion region 115 can be formed, for example, using the dose loss phenomenon caused by heat treatment after the formation of the third pinning region 116.

[0044] Between the semiconductor substrate 10 and the pixel isolation portion 15 and on the back surface 10S2 of the semiconductor substrate 10, a fixed charge film 16 having, for example, positive or negative fixed charges is provided. At the interface between the semiconductor substrate 10 and the pixel isolation portion 15 and at the interface of the back surface 10S2 of the semiconductor substrate 10, first pinning regions 113 and second pinning regions 114 of the hole accumulation layer are formed by the electric field induced by the fixed charge film 16. Thereby, the generation of dark current due to the interface levels between the semiconductor substrate 10 and the pixel isolation portion 15 and on the back surface 10S2 of the semiconductor substrate 10 is suppressed. The fixed charge film 16 is formed of, for example, an insulating film having negative fixed charges. Examples of the material of the insulating film having negative fixed charges include hafnium oxide (HfO), zirconium oxide (ZrO), aluminum oxide (AlO), titanium oxide (TiO), tantalum oxide (TaO), or the like.

[0045] The multilayer wiring layer 20 has a configuration in which, for example, gate wiring layers 22, 23 and wiring layers 24, 25 are laminated with an interlayer insulating layer 21 therebetween. In the multilayer wiring layer 20, in addition to the above-described readout circuit 200, for example, a vertical drive circuit 101, a column signal processing circuit 102, a horizontal drive circuit 103, an output circuit 104, a control circuit 105, input / output terminals 106, and the like are formed.

[0046] The interlayer insulating layer 21 is formed of, for example, a single-layer film made of one of silicon oxide (SiO), tetraethoxysilane (TEOS), silicon nitride (SiN), silicon oxynitride (SiON), or the like, or a laminated film made of two or more of these.

[0047] The gate wiring layers 22, 23 and the wiring layers 24, 25 are formed using, for example, aluminum (Al), copper (Cu), tungsten (W), or the like. In addition, the gate wiring layers 22, 23 may be formed using polysilicon (Poly-Si) or amorphous silicon doped with impurities.

[0048] On the back surface 10S2 side of the semiconductor substrate 10, an optical member 30 including, for example, a protective layer 31, a color filter layer 32, a light receiving lens 33, and the like is provided.

[0049] The protective layer 31 protects the light incident side S1 (back surface 10S2) of the semiconductor substrate 10 and also flattens its surface. The protective layer 31 is formed using, for example, silicon oxide (SiO) or silicon nitride (SiN).

[0050] Within the protective layer 31, although not shown in the diagram, a light-shielding film may be provided to prevent light incident at an oblique angle on the color filter layer 32 from leaking into adjacent unit pixels P that detect light of different wavelengths. The light-shielding film is provided, for example, above the pixel separation section 15 and, like the pixel separation section 15, is provided in a grid pattern in a plan view. For example, a metallic material such as tungsten (W) can be used for the light-shielding film. In addition, a metallic compound such as TiN can be used for the light-shielding film. The light-shielding film may be formed, for example, as a single layer or a multilayer film.

[0051] The color filter layer 32 selectively transmits light of a predetermined wavelength. For example, the color filter layer 32 includes a red filter 32R that selectively transmits red light (R), a green filter 32G that selectively transmits green light (G), and a blue filter 32B that selectively transmits blue light (B). In addition, the color filter layer 32 may include filters that selectively transmit cyan, magenta, and yellow, respectively.

[0052] Each color filter 32R, 32G, and 32B is provided, for example, for each unit pixel P. Specifically, in a 2x2 arrangement of four unit pixels P, for example, two green filters 32G are placed diagonally, and one red filter 32R and one blue filter 32B are placed diagonally opposite each other. In the unit pixels (red pixels Pr, green pixels Pg, and blue pixels Pb) provided with each color filter, the corresponding color light is detected. That is, in the pixel array 100A, the unit pixels (red pixels Pr, green pixels Pg, and blue pixels Pb) that detect red light (R), green light (G), and blue light (B), respectively, are arranged in a Bayer pattern.

[0053] The color filter layer 32 can be formed, for example, using pigments or dyes. The thickness of the color filter layer 32 may be different for each color, taking into consideration the color reproducibility and sensor sensitivity based on its spectral distribution. In monochrome pixels, a layer made of a transparent material can be considered as the color filter layer 32. In infrared pixels, a layer made of a material that selectively transmits infrared light can be considered as the color filter layer 32.

[0054] The light-receiving lens 33 is provided, for example, to cover the entire surface of the pixel array 100A, and has a plurality of microlenses on its surface. The microlenses are for focusing light incident from above toward the back surface 10S2 of the semiconductor substrate 10, which is the light-receiving surface, and are provided for each unit pixel P, for example, as shown in Figure 1. The light-receiving lens 33 is formed using, for example, a high refractive index material, specifically, an inorganic material such as silicon nitride (SiN). In addition, the light-receiving lens 33 may be formed using an organic material with a high refractive index such as an episulfide resin, a titanium compound or its resin. The shape of the on-chip lens 25L is not particularly limited, and various lens shapes such as hemispherical or semi-cylindrical shapes can be adopted.

[0055] [Planar configuration of unit pixels] As described above, multiple unit pixels P are arranged in a matrix in the pixel array section 100A. More specifically, a pixel sharing unit U containing multiple pixels (in this case, four unit pixels P arranged in 2 rows x 2 columns) serves as a repeating unit, and this unit is repeatedly arranged in an array consisting of rows and columns.

[0056] Figures 4 to 7 schematically represent an example of the planar configuration of the photodetector 1. Specifically, Figures 4 to 7 schematically represent an example of the planar layout of a plurality of transfer transistors TR provided on the surface 10S1 of the semiconductor substrate 10, a plurality of pixel transistors 220 (reset transistor RST, selection transistor SEL, and amplification transistor AMP) constituting the readout circuit 200, and the charge discharge unit 14. Figure 8 schematically represents an enlarged cross-sectional configuration near the interface between the element isolation unit 13 and the photoelectric conversion unit 11. Figure 9 schematically represents an enlarged cross-sectional configuration near the interface between the charge discharge unit 14 and the photoelectric conversion unit 11 shown in Figure 4. Note that Figure 1 schematically represents a cross-section of the photodetector 1 corresponding to the I-I' line shown in Figure 4. Figure 8 schematically represents a cross-section corresponding to the II-II' line shown in Figure 4, and Figure 9 schematically represents a cross-section corresponding to the III-III' line shown in Figure 4.

[0057] In the light detection device 1, one FD12 is located in the center of the pixel sharing unit U. Specifically, one FD12 is provided near the intersection of four unit pixels P1, P2, P3, and P4 arranged in a 2x2 grid that constitute the pixel unit. The FD12 is electrically connected to each of these unit pixels P1, P2, P3, and P4. A transfer transistor Tr is provided for each of the unit pixels P1, P2, P3, and P4 that constitute the pixel sharing unit U. Pixel transistors 220 is a collective term for multiple transistors that constitute the readout circuit 200, and corresponds to, for example, a reset transistor RST, a selection transistor SEL, and an amplification transistor AMP. The multiple pixel transistors 220 (reset transistor RST, selection transistor SEL, and amplification transistor AMP) that constitute the readout circuit 200 are arranged side by side in the column direction (Y-axis direction) between adjacent pixel sharing units U in the row direction (X-axis direction), as shown in Figure 4, for example.

[0058] In this embodiment, the charge discharge section 14 also serves as the source or drain of the reset transistor RST. Figure 4 shows the drain of the reset transistor RST used as the charge discharge section 14, where the charge discharge section 14 is located in the second active region X2 between the reset transistor RST and the amplification transistor AMP. Figure 5 shows the source of the reset transistor RST used as the charge discharge section 14, where the charge discharge section 14 is located in the second active region X2 on the opposite side of the adjacent amplification transistor AMP from the reset transistor RST. The charge discharge section 14 extends to the first active region X1. In other words, the first active region X1 and the second active region X2 are not completely separated by the element isolation section 13, but are connected by the charge discharge section 14. The charge discharge section 14 is connected to an impurity diffusion region 115 formed along the element isolation section 13, as shown in Figure 4, for example.

[0059] Figure 10 shows the potential near the interface between the element isolation unit 13 and the photoelectric conversion unit 11, corresponding to the line A-A' shown in Figure 4. Figure 11 shows the potential near the interface between the element isolation unit 13 and the photoelectric conversion unit 11 when no impurity diffusion region 115 is provided between the element isolation unit 13 and the photoelectric conversion unit 11. The impurity diffusion region 115 provided between the element isolation unit 13 and the third pinning region 116 becomes a transfer path for charge generated at the interface between the semiconductor substrate 10 and the element isolation unit 13 due to the impurity concentration gradient with respect to the third pinning region 116. Furthermore, as shown in Figure 10, the impurity diffusion region 115 forms a potential barrier between the element isolation unit 13 and the photoelectric conversion unit 11. Therefore, charge generated at the interface between the semiconductor substrate 10 and the element isolation unit 13 is discharged from the charge discharge unit 14 without flowing into the photoelectric conversion unit 11.

[0060] The reset transistor RST, the selection transistor SEL, and the amplification transistor AMP, which are arranged in parallel along the Y-axis, can take on an arrangement such as that shown in Figures 4 to 7.

[0061] Specifically, as shown in Figures 4 and 5, for example, the reset transistor RST, the selection transistor SEL, and the amplification transistor AMP arranged between adjacent pixel sharing units U in the X-axis direction may be arranged symmetrically on the left and right sides of the paper and repeated for each pixel sharing unit U. In Figure 5, the source of the reset transistor RST, which also serves as the charge discharge unit 14, is located between adjacent pixel sharing units U in the Y-axis direction. By arranging the charge discharge unit 14 between adjacent pixel sharing units U in the Y-axis direction in this way, the charge discharge unit 14 becomes shared between adjacent pixel sharing units U in the Y-axis direction. Compared to the layout in Figure 4, this allows for more efficient discharge of charge generated at the interface between the semiconductor substrate 10 and the element isolation unit 13 to the charge discharge unit.

[0062] The reset transistor RST, selection transistor SEL, and amplification transistor AMP, which are arranged side-by-side in the Y-axis direction between adjacent pixel sharing units U in the X-axis direction, may be arranged symmetrically left to right on the plane of the paper, as shown in Figure 6, and may also be arranged symmetrically up to down on the plane of the paper for each pixel sharing unit U. Alternatively, the reset transistor RST, selection transistor SEL, and amplification transistor AMP, which are arranged side-by-side in the Y-axis direction between adjacent pixel sharing units U in the X-axis direction, may be arranged asymmetrically left to right on the plane of the paper, as shown in Figure 7, and symmetrically up to down on the plane of the paper for each pixel sharing unit U.

[0063] Figures 4 to 7 show an example in which multiple pixel transistors 220 are arranged in the Y-axis direction between adjacent pixel sharing units U in the X-axis direction, but the arrangement is not limited to this. The multiple pixel transistors 220 may be arranged in the X-axis direction between adjacent pixel sharing units U in the Y-axis direction, or they may be arranged diagonally.

[0064] [Function and Effects] In the photodetector 1 of this embodiment, a charge discharge unit 14 is provided on the surface 10S1 of the semiconductor substrate 10 to discharge charge generated at the interface between the semiconductor substrate 10 and the element isolation unit 13, which can become a dark current. The charge discharge unit 14 is connected to the first active region X1, which includes the photoelectric conversion unit 11 separated by the element isolation unit 13, and the second active region X2, where a plurality of pixel transistors 220 are formed. This reduces the inflow of charge generated at the interface between the semiconductor substrate 10 and the element isolation unit 13 into the photoelectric conversion unit 11. This will be explained below.

[0065] In solid-state imaging devices, an element isolation region with an STI structure is formed, electrically separating the photodiode and pixel transistor, etc., provided in each pixel. This element isolation region (hereinafter referred to as STI) is a source of dark current and white spots.

[0066] One method for suppressing the generation of dark current is to provide a solid-state imaging device in which, as mentioned above, a P-type region is provided between the N-type region that performs photoelectric conversion formed for each pixel and the inter-pixel light-shielding wall formed between the N-type regions that perform photoelectric conversion for each adjacent pixel, penetrating the semiconductor substrate in the depth direction, and between this N-type region and the interface on the light-incident side of the semiconductor substrate.

[0067] However, in the above-mentioned solid-state imaging device, if excited electrons are generated due to insufficient pinning or the fringe field of the transistor, these excited electrons flow into the photodiode. The excited electrons that flow into the photodiode become a dark current, causing image quality degradation. Furthermore, in order to suppress the generation of dark current, it is necessary to form a p-type region containing a high concentration of p-type impurities. However, a high-concentration p-type region diffuses p-type impurities into the surrounding area, compressing the photodiode formation area and causing a decrease in the saturation signal amount. These problems become more pronounced as the width of the STI separating elements narrows due to pixel miniaturization.

[0068] In contrast, in this embodiment, as described above, a charge discharge section 14 is provided on the surface 10S1 of the semiconductor substrate 10 to discharge charge generated at the interface between the semiconductor substrate 10 and the element isolation section 13, which may become a dark current. The charge discharge section 14 is connected to the first active region X1, which includes the photoelectric conversion section 11 separated by the element isolation section 13, and the second active region X2, where a plurality of pixel transistors 220 are formed. As a result, charge generated at the interface between the semiconductor substrate 10 and the element isolation section 13, which may become a dark current, is discharged to the charge discharge section 14, and the inflow into the photoelectric conversion section 11 is reduced.

[0069] As a result, the light detection device 1 of this embodiment makes it possible to improve image quality.

[0070] Furthermore, in the photodetector 1 of this embodiment, an impurity diffusion region 115 with an effective impurity concentration lower than that of the third pinning region 116 is provided between the element isolation region 13 and the third pinning region 116, which has a high concentration of p-type impurities. As described above, the impurity diffusion region 115 becomes a transfer path for charge generated at the interface between the semiconductor substrate 10 and the element isolation region 13 due to the impurity concentration gradient with respect to the third pinning region 116. Moreover, as shown in Figure 10, a potential barrier is formed between the element isolation region 13 and the photoelectric conversion region 11, so that charge generated at the interface between the semiconductor substrate 10 and the element isolation region 13 is discharged from the charge discharge region 14 without flowing into the photoelectric conversion region 11. Therefore, it is possible to further improve image quality.

[0071] Furthermore, in the photodetector 1 of this embodiment, an impurity diffusion region 115 with a relatively lower impurity concentration than the third pinning region 116 is provided between the element separation region 13 and the third pinning region 116 with a high p-type impurity concentration. As a result, the impurity concentration in the third pinning region 116 can be reduced. Therefore, the extent of the third pinning region 116 is reduced, and the formation area of ​​the photoelectric conversion unit 11 can be expanded.

[0072] Next, modifications 1 to 6 of the present disclosure, as well as examples of application and application, will be described. In the following, components similar to those in the above embodiments will be denoted by the same reference numerals, and their descriptions will be omitted as appropriate.

[0073] <2. Modifications> (2-1. Modification 1) Figures 12 to 14 show an example of an equivalent circuit diagram of a unit pixel P of a light detection device (light detection device 1A) according to Modification 1 of this disclosure.

[0074] The above embodiment shows an example in which four unit pixels P1, P2, P3, and P4 arranged in a 2x2 configuration share one FD12, but it is not limited to this. For example, this technology can also be applied to an optical detection device in which eight unit pixels P1 to P8 arranged in a 2x4 configuration share one floating diffusion FD and one readout circuit 200.

[0075] Figures 12 to 14 are equivalent circuit diagrams in which eight unit pixels P1 to P8 arranged in a 2x4 grid are connected to a single readout circuit 200. The readout circuit 200 shown in Figure 12 includes a reset transistor RST, a selection transistor SEL, and an amplification transistor AMP, similar to the embodiment described above. The readout circuit 200 may also include, for example, an FD conversion gain switching transistor FDG. The FD conversion gain switching transistor FDG may be provided in series with the source of the reset transistor RST, for example, as shown in Figure 13. The FD conversion gain switching transistor FDG may also be provided in parallel with the source of the reset transistor RST, for example, as shown in Figure 14.

[0076] The FD conversion gain switching transistor FDG is used to switch the conversion efficiency. Generally, when shooting in dark places, the pixel signal is small. When performing charge-voltage conversion based on Q=CV, if the capacitance of the floating diffusion FD (FD capacitance Cfd) is large, the V obtained when converted to voltage by the amplification transistor AMP will be small. On the other hand, in bright places, the pixel signal is large, so if the FD capacitance Cfd is not large, the floating diffusion FD will not be able to accept the charge of the photoelectric conversion unit 11. Furthermore, the FD capacitance Cfd needs to be large so that the V obtained when converted to voltage by the amplification transistor AMP does not become too large (in other words, to keep it small). Considering these factors, when the FD conversion gain switching transistor FDG is turned on, the gate capacitance of the FD conversion gain switching transistor FDG increases, so the overall FD capacitance Cfd becomes large. On the other hand, when the FD conversion gain switching transistor FDG is turned off, the overall FD capacitance Cfd becomes small. In this way, by switching the FD conversion gain switching transistor FDG on and off, the FD capacitance Cfd can be varied, and the conversion efficiency can be switched.

[0077] Figures 15 to 17 schematically represent an example of the planar configuration of the photodetector 1A. Specifically, Figure 15 corresponds to the equivalent circuit shown in Figure 12, where a reset transistor RST, a selection transistor SEL, and an amplification transistor AMP are arranged in parallel in the Y-axis direction between adjacent pixel sharing units U in the X-axis direction. Figure 16 corresponds to the equivalent circuit shown in Figure 13, where a reset transistor RST, a selection transistor SEL, an amplification transistor AMP, and an FD conversion gain switching transistor FDG are arranged in parallel in the Y-axis direction between adjacent pixel sharing units U in the X-axis direction. Figure 17 corresponds to the equivalent circuit shown in Figure 14, and similarly to Figure 16, a reset transistor RST, a selection transistor SEL, an amplification transistor AMP, and an FD conversion gain switching transistor FDG are arranged in parallel in the Y-axis direction between adjacent pixel sharing units U in the X-axis direction. Figure 18 schematically shows an enlarged cross-sectional configuration of the pixel transistor 220 and charge discharge unit 14 corresponding to the IV-IV' line shown in Figure 15.

[0078] The photodetector 1A has, for example, as shown in Figures 15 and 16, an independently provided charge discharge unit 14A and a charge discharge unit 14B that uses the source of the reset transistor RST as the charge discharge unit. The photodetector 1A has, for example, as shown in Figure 17, an independently provided charge discharge unit 14A and a charge discharge unit 14B provided in the second active region X2 between the reset transistor RST and the amplification transistor AMP.

[0079] Even with this configuration, the modified photodetector 1A can achieve the same effects as the photodetector 1 of the above embodiment.

[0080] Furthermore, in this modified optical detection device 1A, the eight unit pixels P1 to P8 share a single readout circuit 200, thus improving the flexibility of the layout of the multiple pixel transistors 220 constituting the readout circuit 200 compared to the above embodiment. For example, in this modified optical detection device 1A, the gate length of the amplification transistor AMP can be increased, thereby reducing noise. As a result, it becomes possible to further improve image quality.

[0081] (2-2. Modification 2) Figure 19 shows an example of an equivalent circuit diagram of a unit pixel P of a photodetector (photodetector 1B) according to Modification 2 of the present disclosure. Figure 20 schematically shows an example of a planar configuration of the photodetector 1B.

[0082] In the above embodiment, an example was shown in which four unit pixels P1, P2, P3, and P4 arranged in a 2x2 grid share one FD12, but the invention is not limited to this. For example, this technology can also be applied to an optical detection device in which one unit pixel P has one FD and one readout circuit is connected, and there is no sharing.

[0083] Even with this configuration, the modified photodetector 1B can obtain the same effects as the photodetector 1 of the above embodiment.

[0084] Furthermore, in the modified optical detection device 1B, one unit pixel P has one FD and one readout circuit is connected to it. Therefore, compared to the case where the FD 12 and the readout circuit 200 are shared by multiple unit pixels P as in the above embodiment, the wiring capacitance can be reduced. Thus, the modified optical detection device 1B can improve the conversion efficiency compared to the above embodiment.

[0085] (2-3. Modification 3) Figure 21 schematically shows an example of the planar configuration of the photodetector (photodetector 1C) according to Modification 3 of the present disclosure.

[0086] In the above embodiment, an example was shown in which the horizontal portion 231B of the transfer gate TG of the transfer transistor TR is triangular, but the invention is not limited to this. In this modified example, the photodetector 1C has a rectangular shape for the horizontal portion 231B of the transfer gate TG of the transfer transistor TR. Except for this point, the photodetector 1C in this modified example has substantially the same configuration as the photodetector 1 of the above embodiment.

[0087] Thus, in this modified example, the horizontal portion 231B of the transfer gate TG of the transfer transistor TR is rectangular in shape. As a result, as shown in Figure 22, for example, the potential at the interface of the element isolation section 13 can be raised by the negative bias when the transfer transistor TR is turned off. This improves the drift speed when transferring the charge generated at the interface between the semiconductor substrate 10 and the element isolation section 13, which can become a dark current, to the charge discharge section 14 in the photodetector 1C of this modified example, thereby reducing residual charge discharge.

[0088] (2-4. Modification 4) Figures 23 and 24 schematically show an example of the planar configuration of the photodetector (photodetector 1D) according to Modification 4 of the present disclosure.

[0089] In the embodiments described above, an example was shown in which one unit pixel P has one transfer gate TG, but the invention is not limited to this. In this modified example, the photodetector 1D is provided with multiple (in this case, two) transfer gates TG for one unit pixel P. Except for this point, the photodetector 1D in this modified example has substantially the same configuration as the photodetector 1 of the embodiments described above.

[0090] Figure 23 shows a configuration in which two independent transfer gates TG are provided for a single unit pixel P. Figure 24 shows a configuration in which the horizontal portions 231B of the two transfer gates TG provided for a single unit pixel P as shown in Figure 23 are connected to each other.

[0091] Even with this configuration, the modified photodetector 1C can obtain the same effects as the photodetector 1 of the above embodiment and the photodetector 1C of the modified embodiment 3.

[0092] (2-5. Modification 5) Figures 25 and 26 schematically show an example of the planar configuration of the photodetector (photodetector 1E) according to Modification 5 of the present disclosure.

[0093] In the above embodiment, an example was shown in which four unit pixels P1, P2, P3, and P4 arranged in a 2x2 configuration share one readout circuit 200, but the invention is not limited to this. In this modified example, the photodetector 1E is configured such that two unit pixels P1 and P2 arranged in a 2x1 configuration share one FD12. In this photodetector 1E in which two unit pixels P1 and P2 share one FD12, the FD12 can be used as a charge discharge unit. The FD12 may be arranged to be electrically floating, for example, as shown in Figure 25, or it may be arranged to be in contact with the impurity diffusion region 115, for example, as shown in Figure 26.

[0094] Even with this configuration, the modified photodetector 1E can obtain the same effects as the photodetector 1 of the above embodiment.

[0095] Furthermore, in this modified photodetector 1E, there is no need to provide a separate charge discharge unit, thus improving the freedom of layout compared to the above embodiment. For example, in this modified photodetector 1E, the gate length of the amplification transistor AMP can be increased, thus reducing noise. Therefore, it is possible to further improve image quality. Also, in this modified photodetector 1E, for example, the photoelectric conversion unit 11 can be enlarged, so it is possible to increase the saturation signal amount.

[0096] (2-6. Modification 6) Figure 27 schematically shows an example of a cross-sectional configuration of a photodetector (photodetector 1F) according to one embodiment of the present disclosure. The photodetector 1F is similar to the photodetector 1 in the above embodiment, for example, a CMOS image sensor used in electronic devices such as digital still cameras and video cameras, and has a pixel section (pixel array section 100A) in which a plurality of pixels (unit pixels P) are arranged in a matrix in two dimensions as an imaging area. The photodetector 1F is, for example, a so-called back-illuminated photodetector in this CMOS image sensor.

[0097] In this modified example, the optical detection device 1F has an element separation section 13 located below the pixel separation section 15, and has an FTI structure that penetrates the semiconductor substrate 10.

[0098] Figure 28 schematically shows an example of the planar configuration of a unit pixel P of the photodetector 1F shown in Figure 27. Figure 29 schematically shows a cross-section corresponding to the V-V' line shown in Figure 27. When the pixel separation section 15 has an FTI structure, it is preferable to extend and form an impurity diffusion region 115 on its side surface, as shown in Figure 29. This makes it possible to discharge the charge generated at the interface between the semiconductor substrate 10 and the pixel separation section 15 to the charge discharge section 14.

[0099] <3. Application Examples> (Application Example 1) The above-mentioned light detection device 1 can be applied to any type of electronic device equipped with an imaging function, such as camera systems like digital still cameras and video cameras, and mobile phones with imaging capabilities. Figure 30 shows a schematic configuration of the electronic device 1000.

[0100] The electronic device 1000 includes, for example, a lens group 1001, a light detection device 1, a DSP (Digital Signal Processor) circuit 1002, a frame memory 1003, a display unit 1004, a storage unit 1005, an operation unit 1006, and a power supply unit 1007, all of which are interconnected via a bus line 1008.

[0101] The lens group 1001 captures incident light (image light) from the subject and forms an image on the imaging surface of the light detection device 1. The light detection device 1 converts the amount of incident light formed on the imaging surface by the lens group 1001 into an electrical signal on a pixel-by-pixel basis and supplies it as a pixel signal to the DSP circuit 1002.

[0102] The DSP circuit 1002 is a signal processing circuit that processes signals supplied from the light detection device 1. The DSP circuit 1002 outputs image data obtained by processing the signals from the light detection device 1. The frame memory 1003 temporarily holds the image data processed by the DSP circuit 1002 in frame units.

[0103] The display unit 1004 consists of a panel-type display device such as a liquid crystal panel or an organic EL (Electro Luminescence) panel, and the storage unit 1005 records the video or still image data captured by the light detection device 1 onto a recording medium such as a semiconductor memory or a hard disk.

[0104] The operation unit 1006 outputs operation signals for various functions possessed by the electronic device 1000 in accordance with user operations. The power supply unit 1007 appropriately supplies various power sources to the DSP circuit 1002, frame memory 1003, display unit 1004, storage unit 1005, and operation unit 1006, which serve as the operating power sources for these devices.

[0105] (Application Example 2) Figure 31A schematically shows an example of the overall configuration of a photodetection system 2000 equipped with a photodetector (for example, photodetector 1). Figure 31B shows an example of the circuit configuration of the photodetection system 2000. The photodetection system 2000 includes a light-emitting device 2001 as a light source that emits infrared light (light L2), and a photodetector 2002 as a light-receiving unit. As the photodetector 2002, for example, the photodetector 1 described above can be used. The photodetection system 2000 may further include a system control unit 2003, a light source drive unit 2004, a sensor control unit 2005, a light source side optical system 2006, and a camera side optical system 2007.

[0106] The photodetector 2002 can detect light L1 and light L2. Light L1 is light reflected from ambient light from the outside by the subject (object to be measured) 2100 (Figure 31A). Light L2 is light that has been emitted by the light-emitting device 2001 and then reflected by the subject 2100. Light L1 is, for example, visible light, and light L2 is, for example, infrared light. Light L1 is detectable in the photoelectric conversion unit of the photodetector 2002, and light L2 is detectable in the photoelectric conversion region of the photodetector 2002. Image information of the subject 2100 can be obtained from light L1, and distance information between the subject 2100 and the photodetector system 2000 can be obtained from light L2. The photodetector system 2000 can be mounted on, for example, electronic devices such as smartphones or mobile devices such as cars. The light-emitting device 2001 can be, for example, a semiconductor laser, a surface-emitting semiconductor laser, or a vertical-cavity surface-emitting laser (VCSEL). As a detection method for the light L2 emitted from the light-emitting device 2001 by the photodetector 2002, for example, the iTOF method can be used, but is not limited to this. In the iTOF method, the photoelectric conversion unit can measure the distance to the subject 2100 by, for example, the time-of-flight (TOF). As a detection method for the light L2 emitted from the light-emitting device 2001 by the photodetector 2002, for example, the structured light method or the stereo vision method can also be used. For example, in the structured light method, the distance between the photodetector 2000 and the subject 2100 can be measured by projecting a predetermined pattern of light onto the subject 2100 and analyzing the degree of distortion of the pattern. In the stereo vision method, for example, the distance between the photodetector 2000 and the subject can be measured by using two or more cameras to acquire two or more images of the subject 2100 from two or more different viewpoints. Furthermore, the light-emitting device 2001 and the light-detecting device 2002 can be synchronously controlled by the system control unit 2003.

[0107] <4. Application Examples> (Application Examples to Mobile Devices) The technology relating to this disclosure (this technology) can be applied to various products. For example, the technology relating to this disclosure may be implemented as a device mounted on any type of mobile device such as automobiles, electric vehicles, hybrid electric vehicles, motorcycles, bicycles, personal mobility devices, airplanes, drones, ships, and robots.

[0108] Figure 32 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technology described herein may be applied.

[0109] The vehicle control system 12000 comprises a plurality of electronic control units connected via a communication network 12001. In the example shown in Figure 32, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. The functional configuration of the integrated control unit 12050 is shown in the figure, which includes a microcomputer 12051, an audio / image output unit 12052, and an in-vehicle network interface 12053.

[0110] The drivetrain control unit 12010 controls the operation of devices related to the vehicle's drivetrain according to various programs. For example, the drivetrain control unit 12010 functions as a control device for a drivetrain generating device that generates driving force for the vehicle, such as an internal combustion engine or a drive motor; a drivetrain transmission mechanism that transmits driving force to the wheels; a steering mechanism that adjusts the steering angle of the vehicle; and a braking device that generates braking force for the vehicle.

[0111] The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window system, or various lamps such as headlights, reverse lights, brake lights, turn signals, or fog lights. In this case, the body system control unit 12020 may receive radio waves transmitted from a portable device that replaces a key or signals from various switches. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock system, power window system, lamps, etc.

[0112] The external information detection unit 12030 detects information from outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the external information detection unit 12030. The external information detection unit 12030 causes the imaging unit 12031 to capture images of the outside of the vehicle and receives the captured images. Based on the received images, the external information detection unit 12030 may perform object detection processing such as detecting people, cars, obstacles, signs, or characters on the road surface, or distance detection processing.

[0113] The imaging unit 12031 is a light sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0114] The in-vehicle information detection unit 12040 detects information inside the vehicle. The in-vehicle information detection unit 12040 is connected to, for example, a driver status detection unit 12041 that detects the driver's state. The driver status detection unit 12041 includes, for example, a camera that captures images of the driver, and the in-vehicle information detection unit 12040 may calculate the driver's level of fatigue or concentration, or determine whether the driver is drowsy, based on the detection information input from the driver status detection unit 12041.

[0115] The microcomputer 12051 can calculate control target values ​​for the drive force generator, steering mechanism, or braking device based on information inside and outside the vehicle acquired by the external information detection unit 12030 or the internal information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing ADAS (Advanced Driver Assistance System) functions, including vehicle collision avoidance or impact mitigation, following driving based on distance between vehicles, maintaining vehicle speed, vehicle collision warning, or vehicle lane departure warning.

[0116] Furthermore, the microcomputer 12051 can perform cooperative control for purposes such as autonomous driving, where the vehicle drives autonomously without driver intervention, by controlling the drive force generating device, steering mechanism, or braking device, etc., based on information about the vehicle's surroundings acquired by the external information detection unit 12030 or the internal information detection unit 12040.

[0117] Furthermore, the microcomputer 12051 can output control commands to the body system control unit 12020 based on external information acquired by the external information detection unit 12030. For example, the microcomputer 12051 can control the headlights according to the position of a preceding or oncoming vehicle detected by the external information detection unit 12030, and perform coordinated control aimed at reducing glare, such as switching from high beams to low beams.

[0118] The audio-image output unit 12052 transmits at least one of audio and image output signals to an output device capable of visually or audibly notifying information to the vehicle's occupants or to those outside the vehicle. In the example shown in Figure 32, the output devices include an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an onboard display and a head-up display.

[0119] Figure 33 shows an example of the installation position of the imaging unit 12031.

[0120] In Figure 33, the vehicle 12100 has imaging units 12101, 12102, 12103, 12104, and 12105 as the imaging unit 12031.

[0121] The imaging units 12101, 12102, 12103, 12104, and 12105 are installed, for example, on the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield inside the vehicle 12100. The imaging unit 12101 installed on the front nose and the imaging unit 12105 installed on the upper part of the windshield inside the vehicle mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 installed on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 installed on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The forward images acquired by imaging units 12101 and 12105 are mainly used for detecting preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, or lanes.

[0122] Figure 33 shows an example of the imaging ranges of imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of imaging unit 12101 located on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of imaging units 12102 and 12103 located on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of imaging unit 12104 located on the rear bumper or back door. For example, by superimposing the image data captured by imaging units 12101 to 12104, an overhead view image of the vehicle 12100 can be obtained.

[0123] At least one of the imaging units 12101 to 12104 may have a function for acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera consisting of multiple image sensors, or an image sensor having pixels for phase difference detection.

[0124] For example, the microcomputer 12051, based on distance information obtained from the imaging units 12101 to 12104, can determine the distance to each object within the imaging range 12111 to 12114 and the temporal change of this distance (relative speed to the vehicle 12100). In particular, it can extract the closest object on the vehicle 12100's path that is traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or more) as the preceding vehicle. Furthermore, the microcomputer 12051 can set a predetermined distance to be maintained before the preceding vehicle and perform automatic braking control (including follow-and-stop control) and automatic acceleration control (including follow-and-start control), etc. In this way, cooperative control aimed at autonomous driving, etc., that drives autonomously without driver operation, can be performed.

[0125] For example, the microcomputer 12051 can use distance information obtained from imaging units 12101 to 12104 to classify and extract three-dimensional object data related to three-dimensional objects, such as motorcycles, passenger cars, large vehicles, pedestrians, utility poles, and other three-dimensional objects, and use this data for automatic obstacle avoidance. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines the collision risk, which indicates the degree of risk of collision with each obstacle. If the collision risk is above a set value and there is a possibility of collision, the microcomputer 12051 can provide driving assistance to avoid collisions by outputting a warning to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or evasive steering via the drive system control unit 12010.

[0126] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared light. For example, the microcomputer 12051 can recognize pedestrians by determining whether or not pedestrians are present in the images captured by the imaging units 12101 to 12104. Such pedestrian recognition is performed, for example, by a procedure to extract feature points from the images captured by the imaging units 12101 to 12104 as infrared cameras, and a procedure to perform pattern matching on a series of feature points that indicate the contour of an object to determine whether or not it is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the imaging units 12101 to 12104 and recognizes a pedestrian, the audio-image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio-image output unit 12052 may also control the display unit 12062 to display an icon indicating a pedestrian at a desired position.

[0127] The above describes an example of a mobile object control system to which the technology described herein can be applied. The technology described herein can be applied to the imaging unit 12031 of the configuration described above. Specifically, the light detection device 1 can be applied to the imaging unit 12031. By applying the technology described herein to the imaging unit 12031, high-resolution images with low noise can be obtained, so that high-precision control using the captured images can be performed in the mobile object control system.

[0128] (Examples of application to endoscopic surgical systems) The technology described herein (the technology) can be applied to various products. For example, the technology described herein may be applied to endoscopic surgical systems.

[0129] Figure 34 is a diagram showing an example of a schematic configuration of an endoscopic surgical system to which the technology described herein (the technology) may be applied.

[0130] Figure 34 illustrates a surgeon (physician) 11131 performing surgery on a patient 11132 on a patient bed 11153 using an endoscopic surgical system 11000. As shown in the figure, the endoscopic surgical system 11000 consists of an endoscope 11100, other surgical instruments 11110 such as an insufflation tube 11111 and an energy treatment device 11112, a support arm device 11120 for supporting the endoscope 11100, and a cart 11200 equipped with various devices for endoscopic surgery.

[0131] The endoscope 11100 consists of a barrel 11101, the tip of which is inserted into the body cavity of the patient 11132 for a predetermined length, and a camera head 11102 connected to the base end of the barrel 11101. In the illustrated example, the endoscope 11100 is shown as a so-called rigid endoscope having a rigid barrel 11101, but the endoscope 11100 may also be configured as a so-called flexible endoscope having a flexible barrel.

[0132] An opening into which an objective lens is fitted is provided at the tip of the microscope tube 11101. A light source device 11203 is connected to the endoscope 11100, and the light generated by the light source device 11203 is guided to the tip of the microscope tube by a light guide extending inside the microscope tube 11101, and is irradiated through the objective lens towards the object to be observed inside the body cavity of the patient 11132. The endoscope 11100 may be a straight-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0133] The camera head 11102 contains an optical system and an image sensor. Reflected light from the object being observed (observation light) is focused onto the image sensor by the optical system. The image sensor converts the observation light into electrical signals, generating an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. This image signal is transmitted as RAW data to the camera control unit (CCU) 11201.

[0134] The CCU 11201 is composed of a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), and other components, and comprehensively controls the operation of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102 and performs various image processing operations on that image signal, such as development processing (demosaic processing), to display the image based on that image signal.

[0135] The display device 11202 displays an image based on an image signal that has been processed by the CCU 11201, under control from the CCU 11201.

[0136] The light source device 11203 consists of a light source such as an LED (Light Emitting Diode) and supplies illumination light to the endoscope 11100 when photographing the surgical area, etc.

[0137] The input device 11204 is an input interface for the endoscopic surgical system 11000. The user can input various types of information and instructions to the endoscopic surgical system 11000 via the input device 11204. For example, the user can input instructions to change the imaging conditions (type of light, magnification, focal length, etc.) of the endoscope 11100.

[0138] The treatment instrument control device 11205 controls the drive of the energy treatment instrument 11112 for purposes such as tissue cauterization, incision, or blood vessel sealing. The insufflation device 11206 injects gas into the body cavity of the patient 11132 via the insufflation tube 11111 to inflate the body cavity for the purpose of securing a field of view by the endoscope 11100 and securing the operator's workspace. The recorder 11207 is a device capable of recording various information related to the surgery. The printer 11208 is a device capable of printing various information related to the surgery in various formats such as text, images, or graphs.

[0139] The light source device 11203 that supplies illumination light to the endoscope 11100 when photographing the surgical area can be configured as a white light source consisting of, for example, an LED, a laser light source, or a combination thereof. When the white light source is configured as a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, so the white balance of the captured image can be adjusted in the light source device 11203. In this case, it is also possible to capture images corresponding to each of the RGB colors in time-division by irradiating the observation target with laser light from each of the RGB laser light sources in time-division and controlling the drive of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, a color image can be obtained without providing a color filter on the image sensor.

[0140] Furthermore, the light source device 11203 may be controlled to change the intensity of the light it outputs at predetermined time intervals. By controlling the drive of the image sensor of the camera head 11102 in synchronization with the timing of the change in light intensity, images can be acquired in time-division order, and these images can be combined to generate high dynamic range images without so-called black crushing and white clipping.

[0141] Furthermore, the light source device 11203 may be configured to supply light in a predetermined wavelength band corresponding to special light observation. In special light observation, for example, by utilizing the wavelength dependence of light absorption in body tissue and irradiating with narrow-band light compared to the irradiation light used in normal observation (i.e., white light), so-called narrow-band imaging is performed to image predetermined tissues such as blood vessels on the surface of mucosa with high contrast. Alternatively, in special light observation, fluorescence observation may be performed to obtain an image from fluorescence generated by irradiation with excitation light. In fluorescence observation, excitation light is irradiated onto body tissue and fluorescence from the body tissue is observed (autofluorescence observation), or a reagent such as indocyanine green (ICG) is injected into body tissue and excitation light corresponding to the fluorescence wavelength of the reagent is irradiated onto the body tissue to obtain a fluorescence image. The light source device 11203 may be configured to supply narrow-band light and / or excitation light corresponding to such special light observation.

[0142] Figure 35 is a block diagram showing an example of the functional configuration of the camera head 11102 and CCU 11201 shown in Figure 34.

[0143] The camera head 11102 includes a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other via a transmission cable 11400 so that they can communicate with each other.

[0144] The lens unit 11401 is an optical system provided at the connection point with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and then incident on the lens unit 11401. The lens unit 11401 is composed of a combination of multiple lenses, including a zoom lens and a focus lens.

[0145] The imaging unit 11402 is composed of image sensors. The imaging unit 11402 may consist of one image sensor (a so-called single-chip type) or multiple image sensors (a so-called multi-chip type). If the imaging unit 11402 is composed of multiple chips, for example, each image sensor may generate image signals corresponding to RGB, and these may be combined to obtain a color image. Alternatively, the imaging unit 11402 may be configured to have a pair of image sensors for acquiring image signals for the right eye and left eye, respectively, corresponding to 3D (Dimensional) display. By performing 3D display, the surgeon 11131 can more accurately grasp the depth of the biological tissue in the surgical area. In addition, if the imaging unit 11402 is composed of multiple chips, multiple lens units 11401 may also be provided corresponding to each image sensor.

[0146] Furthermore, the imaging unit 11402 does not necessarily have to be located on the camera head 11102. For example, the imaging unit 11402 may be located inside the lens barrel 11101, directly behind the objective lens.

[0147] The drive unit 11403 is composed of actuators and, under control from the camera head control unit 11405, moves the zoom lens and focus lens of the lens unit 11401 along the optical axis by a predetermined distance. This allows the magnification and focus of the image captured by the imaging unit 11402 to be adjusted as appropriate.

[0148] The communication unit 11404 is composed of communication devices for sending and receiving various types of information with the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 as RAW data to the CCU 11201 via the transmission cable 11400.

[0149] Furthermore, the communication unit 11404 receives a control signal from the CCU 11201 to control the drive of the camera head 11102 and supplies it to the camera head control unit 11405. The control signal includes information about imaging conditions, such as information to specify the frame rate of the captured image, information to specify the exposure value at the time of imaging, and / or information to specify the magnification and focus of the captured image.

[0150] The imaging conditions such as frame rate, exposure value, magnification, and focus may be specified by the user as appropriate, or they may be automatically set by the control unit 11413 of the CCU 11201 based on the acquired image signal. In the latter case, the endoscope 11100 will be equipped with so-called AE (Auto Exposure), AF (Auto Focus), and AWB (Auto White Balance) functions.

[0151] The camera head control unit 11405 controls the drive of the camera head 11102 based on the control signal received from the CCU 11201 via the communication unit 11404.

[0152] The communication unit 11411 is comprised of a communication device for sending and receiving various types of information with the camera head 11102. The communication unit 11411 receives image signals transmitted from the camera head 11102 via the transmission cable 11400.

[0153] Furthermore, the communication unit 11411 transmits control signals to the camera head 11102 to control the driving of the camera head 11102. Image signals and control signals can be transmitted by telecommunications, optical communications, etc.

[0154] The image processing unit 11412 performs various image processing operations on the image signal, which is RAW data transmitted from the camera head 11102.

[0155] The control unit 11413 performs various controls related to imaging the surgical area, etc., by the endoscope 11100, and the display of the images obtained from imaging the surgical area, etc. For example, the control unit 11413 generates a control signal to control the driving of the camera head 11102.

[0156] Furthermore, the control unit 11413 displays the captured image showing the surgical area, etc., on the display device 11202 based on the image signal processed by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize surgical instruments such as forceps, specific biological sites, bleeding, mist when using the energy treatment device 11112, etc., by detecting the shape and color of the edges of objects included in the captured image. When the control unit 11413 displays the captured image on the display device 11202, it may use the recognition results to superimpose various surgical support information onto the image of the surgical area. By superimposing the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced, and the surgeon 11131 can proceed with the surgery reliably.

[0157] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable compatible with electrical signal communication, an optical fiber compatible with optical communication, or a composite cable thereof.

[0158] In the illustrated example, communication was performed via a wired connection using a transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may be performed wirelessly.

[0159] The above describes an example of an endoscopic surgical system to which the technology of this disclosure may be applied. The technology of this disclosure can be suitably applied to the imaging unit 11402 provided on the camera head 11102 of the endoscope 11100, among the configurations described above. By applying the technology of this disclosure to the imaging unit 11402, the imaging unit 11402 can be miniaturized or made higher resolution, thereby providing a small or high-resolution endoscope 11100.

[0160] The present disclosure has been described above with reference to embodiments, modifications 1 to 6, and application examples. However, the present technology is not limited to the above embodiments, and various modifications are possible. For example, each component constituting the light detection device (light detection device 1) in the above embodiments may be omitted as appropriate, or other components may be provided.

[0161] Furthermore, the effects described herein are merely examples and are not limited to those described; other effects may also occur.

[0162] Furthermore, this disclosure may also take the following configuration. According to the technology with the following configuration, it is possible to efficiently discharge the second charge generated between the first separation groove and the first active region, thereby improving image quality. (1) A photodetector comprising: a semiconductor substrate having opposing first and second surfaces; a photoelectric conversion unit provided on the semiconductor substrate and configured to generate a first charge by photoelectric conversion according to the amount of light received; a plurality of first transistors provided on the first surface of the semiconductor substrate and constituting a readout circuit for reading the first charge; a first separation groove provided on the first surface of the semiconductor substrate and separating a first active region including the photoelectric conversion unit from a second active region where the plurality of first transistors are formed; and a charge discharge unit provided on the first surface of the semiconductor substrate and connected to the first active region. (2) The photodetector according to (1), wherein the charge discharge unit is the source or drain of any of the plurality of first transistors. (3) The photodetector according to (2), wherein the readout circuit includes an amplification transistor, a selection transistor, and a reset transistor as the plurality of first transistors, and the charge discharge unit also serves as the source or drain of the reset transistor. (4) The photodetector according to (2), wherein the readout circuit includes an amplification transistor, a selection transistor, and a reset transistor as the plurality of first transistors, and the charge discharge unit is disposed between the amplification transistor and the reset transistor. (5) The photodetector according to (2), wherein the readout circuit includes an amplification transistor, a selection transistor, a reset transistor, and an FD conversion gain switching transistor as the plurality of first transistors, and the charge discharge unit also serves as the drain of the FD conversion gain switching transistor. (6) The photodetector according to (2), wherein the readout circuit includes an amplification transistor, a selection transistor, a reset transistor, and an FD conversion gain switching transistor as the plurality of first transistors, and the charge discharge unit is disposed between the reset transistor and the FD conversion gain switching transistor.(7) The photodetector according to any one of (2) to (6), wherein the charge discharge unit is fixed at a potential higher than ground. (8) The photodetector according to any one of (2) to (6), wherein the charge discharge unit is fixed at the power supply potential. (9) The photodetector according to any one of (1) to (8), wherein the charge discharge unit is formed by a first impurity diffusion region away from ground. (10) The photodetector according to (9), further comprising a floating diffusion layer provided in the first active region of the semiconductor substrate for temporarily holding the first charge, wherein the charge discharge unit is also the floating diffusion layer. (11) The photodetector according to (10), further comprising a second transistor provided in the first active region of the semiconductor substrate for transferring the first charge generated in the photoelectric conversion unit to the floating diffusion layer, wherein the charge discharge unit is in contact with the gate of the second transistor. (12) The photodetector according to (11), wherein the gate of the second transistor has one or more vertical portions embedded in the semiconductor substrate from the first surface toward the second surface, and a horizontal portion provided on the first surface of the semiconductor substrate and perpendicular to the one or more vertical portions. (13) The photodetector according to any one of (9) to (12), wherein the charge discharge unit is in contact with the gate of any of the plurality of first transistors. (14) The photodetector according to any one of (1) to (13), further comprising an n-type or p-type second impurity diffusion region formed between the semiconductor substrate and the first separation groove, wherein the second impurity diffusion region is connected to the charge discharge unit. (15) The photodetector according to (14), further comprising a third impurity diffusion region having a higher impurity concentration than the second impurity diffusion region between the second impurity diffusion region and the photoelectric conversion unit.(16) The photodetector according to (14) or (15), wherein the semiconductor substrate further comprises a pixel array portion in which a plurality of pixels, each having the photoelectric conversion portion, are arranged in a two-dimensional array, and a second separation groove provided between adjacent plurality of pixels and penetrating between the first surface and the second surface of the semiconductor substrate, and the second impurity diffusion region is further formed between the first active region and the second separation groove. (17) The photodetector according to any one of (1) to (16), wherein the semiconductor substrate further comprises a pixel array portion in which a plurality of pixels, each having the photoelectric conversion portion, are arranged in a two-dimensional array, and the charge discharge portion is provided for one or more of the pixels. (18) The photodetector according to any one of (10) to (17), wherein the semiconductor substrate further comprises a pixel array portion in which a plurality of pixels, each having the photoelectric conversion portion, are arranged in a two-dimensional array, and the floating diffusion layer is provided for each of the pixels. (19) The photodetector according to any one of (10) to (18), wherein the semiconductor substrate further comprises a pixel array portion in which a plurality of pixels, each having the photoelectric conversion portion, are arranged in a two-dimensional array, and the floating diffusion layer is shared by the plurality of pixels. (20) The photodetector according to any one of (1) to (19), wherein the charge discharge portion discharges a second charge generated at the interface between the semiconductor substrate and the first separation groove.

[0163] This application claims priority based on Japanese Patent Application No. 2024-208333, filed with the Japan Patent Office on 29 November 2024, and all contents of that application are incorporated herein by reference.

[0164] Those skilled in the art will understand that various modifications, combinations, subcombinations, and changes can be conceived depending on design requirements and other factors, and that these fall within the scope of the attached claims and their equivalents.

Claims

1. A photodetector comprising: a semiconductor substrate having opposing first and second surfaces; a photoelectric conversion unit provided on the semiconductor substrate and configured to generate a first charge by photoelectric conversion according to the amount of light received; a plurality of first transistors provided on the first surface of the semiconductor substrate and constituting a readout circuit for reading the first charge; a first separation groove provided on the first surface of the semiconductor substrate and separating a first active region including the photoelectric conversion unit from a second active region where the plurality of first transistors are formed; and a charge discharge unit provided on the first surface of the semiconductor substrate and connected to the first active region.

2. The photodetector according to claim 1, wherein the charge discharge unit is the source or drain of any of the plurality of first transistors.

3. The photodetector according to claim 2, wherein the readout circuit includes an amplification transistor, a selection transistor, and a reset transistor as the plurality of first transistors, and the charge discharge unit also serves as the source or drain of the reset transistor.

4. The photodetector according to claim 2, wherein the readout circuit includes an amplifying transistor, a selection transistor, and a reset transistor as the plurality of first transistors, and the charge discharge unit is disposed between the amplifying transistor and the reset transistor.

5. The photodetector according to claim 2, wherein the readout circuit includes an amplification transistor, a selection transistor, a reset transistor, and an FD conversion gain switching transistor as the plurality of first transistors, and the charge discharge unit also serves as the drain of the FD conversion gain switching transistor.

6. The photodetector according to claim 2, wherein the readout circuit includes an amplification transistor, a selection transistor, a reset transistor, and an FD conversion gain switching transistor as the plurality of first transistors, and the charge discharge unit is disposed between the reset transistor and the FD conversion gain switching transistor.

7. The photodetector according to claim 2, wherein the charge discharge unit is fixed at a potential higher than that of ground.

8. The photodetector according to claim 2, wherein the charge discharge unit is fixed to the power supply potential.

9. The photodetector according to claim 1, wherein the charge discharge section is formed by a first impurity diffusion region, separated from the ground.

10. The photodetector according to claim 9, further comprising a floating diffusion layer provided in the first active region of the semiconductor substrate for temporarily holding the first charge, wherein the charge discharge section is also provided in the floating diffusion layer.

11. The photodetector according to claim 10, further comprising a second transistor provided in the first active region of the semiconductor substrate for transferring the first charge generated in the photoelectric conversion unit to the floating diffusion layer, wherein the charge discharge unit is in contact with the gate of the second transistor.

12. The photodetector according to claim 11, wherein the gate of the second transistor has one or more vertical portions embedded in the semiconductor substrate from the first surface toward the second surface, and a horizontal portion provided on the first surface of the semiconductor substrate and perpendicular to the one or more vertical portions.

13. The photodetector according to claim 9, wherein the charge discharge unit is in contact with the gate of any of the plurality of first transistors.

14. The photodetector according to claim 1, further comprising an n-type or p-type second impurity diffusion region formed between the semiconductor substrate and the first separation groove, wherein the second impurity diffusion region is connected to the charge discharge unit.

15. The photodetector according to claim 14, further comprising a third impurity diffusion region having a higher impurity concentration than the second impurity diffusion region, between the second impurity diffusion region and the photoelectric conversion unit.

16. The photodetector according to claim 14, wherein the semiconductor substrate further comprises a pixel array portion in which a plurality of pixels, each having the photoelectric conversion portion, are arranged in a two-dimensional array, and a second separation groove provided between adjacent pixels and penetrating between the first surface and the second surface of the semiconductor substrate, and the second impurity diffusion region is further formed between the first active region and the second separation groove.

17. The photodetector according to claim 1, wherein the semiconductor substrate further comprises a pixel array portion in which a plurality of pixels, each having the photoelectric conversion portion, are arranged in a two-dimensional array, and the charge discharge portion is provided for one or more of the pixels.

18. The photodetector according to claim 10, wherein the semiconductor substrate further comprises a pixel array portion in which a plurality of pixels, each having the photoelectric conversion portion, are arranged in a two-dimensional array, and the floating diffusion layer is provided for each of the pixels.

19. The photodetector according to claim 10, wherein the semiconductor substrate further comprises a pixel array portion in which a plurality of pixels, each having the photoelectric conversion portion, are arranged in a two-dimensional array, and the floating diffusion layer is shared by the plurality of pixels.

20. The photodetector according to claim 1, wherein the charge discharge unit discharges a second charge generated at the interface between the semiconductor substrate and the first separation groove.

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