Apparatus and method for manufacturing power semiconductor PCB module comprising snubber circuit having embedded passive elements manufactured by printing method

Abstract

The present invention provides an apparatus and a method for manufacturing a power semiconductor PCB module comprising a snubber circuit having passive elements embedded therein, in which a resistor and a capacitor, which are passive elements of the snubber circuit constituting an SMPS, are printed and implemented on a PCB substrate through a printing method, so that a layout for minimizing wiring inductance of a circuit configuration is possible to shorten an electrical connection between a switching element and the snubber circuit to a minimum, thereby minimizing parasitic inductance, and a power density of the SMPS is increased through high efficiency of the snubber circuit, thereby enabling miniaturization of the power semiconductor PCB module.

Description

Equipment and method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive component fabricated by a printing method

[0001] The present invention relates to an apparatus and method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive component manufactured by a printing method. More specifically, the invention relates to an apparatus and method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive component manufactured by a printing method, wherein a passive component including a snubber circuit is mounted on a PCB through a printing method, thereby reducing the volume and area occupied by the passive component, increasing power density, and achieving stable reliability.

[0002] Recently, power devices based on wide-bandgap compound semiconductors, such as GaN or SiC MOSFETs, are capable of high-speed switching compared to conventional Si or IGBT power semiconductors, and their application fields are expanding from various power applications and mobile high-speed chargers using switching devices in power lines to high-power electric vehicle chargers. However, since rapid changes in voltage or current occur during high-speed switching at high voltages, the influence of the package inductance of the device itself and the wiring inductance of surrounding circuits cannot be ignored, resulting in a large surge between the drain and source.

[0003] Since these surges must not exceed the maximum rated voltage of the GaN or SiC MOSFETs used, various suppression methods are employed, with the addition of a snubber circuit being one of the representative methods. Surges occurring between the drain and source are caused by the resonance of each inductance component and the MOSFET's parasitic capacitance; as layouts that minimize wiring inductance are often practically impossible, placing the snubber circuit as close as possible to the switching device to reduce wiring inductance has become a critical technical issue.

[0004] Snubber circuits consist of circuits combining passive components such as resistors, coils, and capacitors, as well as active circuits using semiconductor devices; for the snubber circuit to be fully effective, it must be mounted as close as possible to the switching device. However, since various types of snubber circuits designed for high-voltage, high-power power modules each have their own advantages and disadvantages, selecting the optimal snubber circuit based on the power circuit configuration or conversion capacity is not easy.

[0005] Various types of snubbers designed for low-frequency operation in existing silicon-based power device modules have a problem in that they cannot deliver sufficient effectiveness in high-frequency GaN / SiC-based modules. This is because the number of passive components, including the snubber circuit, increases, requiring mounting them on the top and bottom of the PCB, which occupies a large volume and makes miniaturization difficult. Additionally, since it is difficult to mount the snubber circuit close to the switching device, they fail to provide sufficient effectiveness.

[0006] The purpose of the present invention is to provide a power semiconductor PCB module manufacturing apparatus and method including a snubber circuit containing passive components, which enables miniaturization of the power semiconductor PCB module by minimizing the length of the electrical connection between the switching element and the snubber circuit and minimizing parasitic inductance by printing resistors and capacitors, which are passive components of the snubber circuit constituting the SMPS, onto a PCB substrate using a printing method.

[0007] The present invention provides a power semiconductor PCB module manufacturing apparatus comprising a snubber circuit containing a passive element manufactured by a printing method, the apparatus comprising: a first electrical pattern generating unit for generating an electrical pattern of a snubber circuit for an SMPS (Switching Mode Power Supply) on a first copper foil layer formed on a PCB (Printed Circuit Board); a printing passive element and electrode generating unit for generating a passive element and an electrode of said passive element on the first electrical pattern through a printing method; a second electrical pattern generating unit for generating a second electrical pattern for a component mounted on the snubber circuit; a via hole generating unit for generating a via hole for electrical connection on the PCB and performing an electrical connection between the first electrical pattern and the second electrical pattern through the generated via hole; and an electronic component mounting unit for mounting an electronic component for the snubber circuit on the second electrical pattern.

[0008] Here, the printing passive element and electrode generating unit may be characterized by including: a printing resistor generating module that generates a resistor by applying a material having electrical resistance properties through a printing method; a printing capacitor generating module that generates a capacitor by applying a dielectric material through a printing method; and a printing electrode generating module that generates an electrode of the capacitor by applying an electrode material through a printing method.

[0009] Herein, the invention may further include a multilayer structure generating unit that forms an insulating layer on the upper and lower portions of the PCB and laminates a second copper foil layer on the upper and lower portions of the insulating layer to generate a multilayer structure PCB (Printed Circuit Board).

[0010] Here, the printing method may be characterized by using one or more methods among screen printing, inkjet printing, nanoimprint lithography, aerosol jet printing, laser direct patterning, spray coating, spin coating, and flexography.

[0011] Here, the multilayer structure generating unit may be characterized by including: an insulating layer generating module that forms the insulating layer on the upper and lower portions of the PCB using prepreg or laminate; and a copper foil layer generating module that generates a multilayer structure PCB by laminating the second copper foil layer on the upper and lower portions of the insulating layer.

[0012] Here, the dielectric material may be characterized by comprising at least one of barium titanate (BaTiO3), strontium titanate (SrTiO3), calcium titanate (CaTiO3), niobium oxide (NbO5), tantalum oxide (Ta2O5), aluminum oxide (Al2O3), zirconium oxide (ZrO2), and magnesium oxide (MgO).

[0013] Here, the electrode material may be characterized by including at least one of silver (Ag), copper (Cu), aluminum (Al), gold (Au), nickel (Ni), palladium (Pd), graphene, and carbon nanotubes (CNT).

[0014] Here, the PCB may be characterized by being composed of at least one of an FR-4 substrate, a glass substrate, a ceramic substrate, a metal core substrate, a polyimide substrate, a Teflon substrate, an alumina substrate, and an aluminum nitride substrate.

[0015] Here, the core of the PCB is composed of an insulating material, and the insulating material may be characterized by including at least one of epoxy resin, polyimide, ceramic, polytetrafluoroethylene (PTFE), polyethylene naphthalate (PEN), polysulfone (PSU), polyetherimide (PEI), and polyetheretherketone (PEEK).

[0016] Here, the multilayer structure may be characterized by being composed of two layers or four or more layers.

[0017] In addition, a) a step of generating a first electrical pattern for a snubber circuit for an SMPS (Switching Mode Power Supply) on a first copper foil layer formed on a PCB (Printed Circuit Board); b) a step of generating a passive element and an electrode of said passive element on the first electrical pattern through a printing method; c) a step of generating a multilayer structured PCB (Printed Circuit Board) by forming an insulating layer on the upper and lower parts of the PCB, respectively, and laminating a second copper foil layer on the outer surface of said insulating layer; d) a step of generating a second electrical pattern for a component mounted on the snubber circuit on the second copper foil layer; and e) a step of generating a via hole for electrical connection in the multilayer structured PCB and performing an electrical connection between the first electrical pattern and the second electrical pattern through the generated via hole; and f) a step of mounting electronic components for a snubber circuit on the second electrical pattern; the present invention provides a method for manufacturing a power semiconductor PCB module including a snubber circuit containing passive components manufactured by a printing method.

[0018] Here, the above step b) may be characterized by comprising: b-1) a step of generating resistance by applying a material having electrical resistance properties to the first electrical pattern through a printing method; b-2) a step of applying a dielectric material to the first electrical pattern through a printing method; and b-3) a step of generating an electrode of a capacitor by applying an electrode material through a printing method.

[0019] Here, the printing method may be characterized by using one or more methods among screen printing, inkjet printing, nanoimprint lithography, aerosol jet printing, laser direct patterning, spray coating, spin coating, and flexography.

[0020] Here, the dielectric material may be characterized by comprising at least one of barium titanate (BaTiO₃), strontium titanate (SrTiO₃), calcium titanate (CaTiO₃), niobium oxide (NbO₅), tantalum oxide (Ta₂O₅), aluminum oxide (Al₂O₅), zirconium oxide (ZrO₂), and magnesium oxide (MgO).

[0021] Here, the electrode material may be characterized by including at least one of silver (Ag), copper (Cu), aluminum (Al), gold (Au), nickel (Ni), palladium (Pd), graphene, and carbon nanotubes (CNT).

[0022] Here, the PCB may be characterized by being composed of at least one of an FR-4 substrate, a glass substrate, a ceramic substrate, a metal core substrate, a polyimide substrate, a Teflon substrate, an alumina substrate, and an aluminum nitride substrate.

[0023] Here, the core of the PCB is composed of an insulating material, and the insulating material may be characterized by including at least one of epoxy resin, polyimide, ceramic, polytetrafluoroethylene (PTFE), polyethylene naphthalate (PEN), polysulfone (PSU), polyetherimide (PEI), and polyetheretherketone (PEEK).

[0024] Here, the insulating layer is formed through a prepreg or laminate structure, and the multilayer structure may be characterized by being composed of two layers or four or more layers.

[0025] In addition, the present invention provides a method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive element fabricated by a printing method, comprising: a) a step of creating an electrical pattern for a snubber circuit of an SMPS (Switching Mode Power Supply) on copper foil layers formed on the upper and lower parts of a PCB (Printed Circuit Board), respectively; b) a step of creating a passive element and an electrode of said passive element on the lower copper foil layer through a printing method; c) a step of creating a via hole for electrical connection in the core and performing an electrical connection between the electrical pattern of the upper copper foil layer and the electrode of said passive element created on the lower copper foil layer through the created via hole; and d) a step of mounting an electronic component for the snubber circuit on the upper copper foil layer.

[0026] Here, the above step b) may be characterized by comprising: b-1) a step of creating resistance by applying a material having electrical resistance properties between electrical patterns created on the lower copper foil layer through a printing method; b-2) a step of applying a dielectric material between electrical patterns created on the lower copper foil layer through a printing method; and b-3) a step of creating electrodes of a capacitor by applying an electrode material through a printing method.

[0027] Here, the printing method may be characterized by using one or more methods among screen printing, inkjet printing, nanoimprint lithography, aerosol jet printing, laser direct patterning, spray coating, spin coating, and flexography.

[0028] Here, the dielectric material may be characterized by comprising at least one of barium titanate (BaTiO₃), strontium titanate (SrTiO₃), calcium titanate (CaTiO₃), niobium oxide (NbO₅), tantalum oxide (Ta₂O₅), aluminum oxide (Al₂O₅), zirconium oxide (ZrO₂), and magnesium oxide (MgO).

[0029] Here, the electrode material may be characterized by including at least one of silver (Ag), copper (Cu), aluminum (Al), gold (Au), nickel (Ni), palladium (Pd), graphene, and carbon nanotubes (CNT).

[0030] Here, the PCB may be characterized by being composed of at least one of an FR-4 substrate, a glass substrate, a ceramic substrate, a metal core substrate, a polyimide substrate, a Teflon substrate, an alumina substrate, and an aluminum nitride substrate.

[0031] Here, the core of the PCB is composed of an insulating material, and the insulating material may be characterized by including at least one of epoxy resin, polyimide, ceramic, polytetrafluoroethylene (PTFE), polyethylene naphthalate (PEN), polysulfone (PSU), polyetherimide (PEI), and polyetheretherketone (PEEK).

[0032] The present invention has the effect of enabling the production of a power semiconductor PCB module for a high-efficiency SMPS capable of reducing surge voltage by implementing a snubber circuit containing passive components manufactured by a printing method.

[0033] The present invention enables the creation of snubber resistors and snubber capacitors in an SMPS using a printing method, thereby reducing the number of components and contributing to the miniaturization and low-power operation of power semiconductor PCB modules for SMPS, and has the effect of significantly reducing manufacturing processes and manufacturing costs.

[0034] Since the present invention dissipates a very small amount of surge voltage as heat, it has the effect of minimizing heat generation in power semiconductor PCB modules.

[0035] The present invention has the effect of enabling the production of a power semiconductor PCB module that is resistant to external shock or damage, in which some of the major RCD components are located within the PCB.

[0036] FIG. 1 is a diagram briefly illustrating a power semiconductor PCB module manufacturing apparatus and method including a snubber circuit containing a passive component manufactured by a printing method as an embodiment of the present invention.

[0037] FIG. 2 is a configuration diagram of a power semiconductor PCB module manufacturing apparatus including a snubber circuit containing a passive component manufactured by a printing method as an embodiment of the present invention.

[0038] Non-debiction type RCD snubber circuit illustrated in Fig. 3

[0039] FIG. 4 is a configuration diagram of a printing passive element and an electrode generating unit as an embodiment of the present invention.

[0040] FIG. 5 is a diagram showing the configuration of a multilayer structure generating unit as an embodiment of the present invention.

[0041] FIG. 6 is a drawing for explaining a method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive component fabricated by a printing method as an embodiment of the present invention.

[0042] FIG. 7 is a drawing for explaining in more detail a method of creating a passive element and an electrode of a passive element by a printing method as an embodiment of the present invention.

[0043] FIG. 8 illustrates that, as an embodiment of the present invention, a first electrical pattern is formed on a first copper foil layer of an inner layer PCB (400).

[0044] FIG. 9 illustrates additionally etching a portion of the first electrical pattern region where the resistor is located as an embodiment of the present invention.

[0045] FIG. 10 illustrates the creation of a resistor (R), a passive element, by applying a resistive material through a printing method as an embodiment of the present invention.

[0046] FIG. 11 illustrates the application of a dielectric material through a printing method as an embodiment of the present invention.

[0047] FIG. 12 illustrates the creation of an upper electrode of a capacitor by applying a conductive material onto a dielectric through a printing method as an embodiment of the present invention.

[0048] FIG. 13 is a drawing illustrating a method for creating a multilayer PCB as an embodiment of the present invention.

[0049] FIG. 14 illustrates, as an embodiment of the present invention, the formation of an insulating layer and a second copper foil layer on the upper and lower parts of a PCB on which a first electrical pattern and a passive element are formed.

[0050] FIG. 15 is a drawing illustrating a power semiconductor PCB module using 4 layers in a 4-layer structure PCB as a first embodiment of the power semiconductor PCB module manufacturing of the present invention.

[0051] FIG. 16 is a drawing illustrating a power semiconductor PCB module using two layers in a 4-layer PCB as a second embodiment of the power semiconductor PCB module manufacturing of the present invention.

[0052] FIGS. 17 to 19 are drawings for explaining a method of manufacturing a power semiconductor PCB module using a two-layer PCB structure as a third embodiment of the manufacturing of a power semiconductor PCB module according to the present invention.

[0053] FIG. 20 illustrates, as an embodiment of the present invention, additionally etching a portion of the electrical pattern area of ​​the lower copper foil layer where the resistor is located.

[0054] FIG. 21 illustrates the creation of snubber resistors (R1, R2) by applying a resistive material to an electrical pattern of a lower copper foil layer through a printing method in the third embodiment of the present invention.

[0055] FIG. 22 illustrates the application of a dielectric material to an electrical pattern of a lower copper foil layer through a printing method in a third embodiment of the present invention.

[0056] FIG. 23 illustrates, in the third embodiment of the present invention, the upper electrodes (602a, 602b) of a capacitor being formed by applying a conductive material onto a dielectric through a printing method.

[0057] FIG. 24 illustrates that in the third embodiment of the present invention, via holes for electrical connection are created in a PCB, and an electrical connection is made between the electrical pattern of the upper copper layer and the electrode of a passive component of the lower copper layer through the created via holes, and an electronic component for a snubber circuit is mounted on the upper copper layer.

[0058] FIG. 25 is a plan view of a power semiconductor PCB module including a non-discharge type RCD snubber circuit as an embodiment of the present invention.

[0059] FIG. 26 is a top view of a power semiconductor PCB module as an embodiment of the present invention, illustrating the location and wiring of an upper FET, a lower FET, and a snubber diode arranged in the TOP layer.

[0060] FIG. 27 is a bottom view of a power semiconductor PCB module as an embodiment of the present invention, and is a diagram to explain the arrangement of GND and HVdc constituting the BOTTOM layer and the connection of the snubber capacitor and snubber resistor included in the inner layer.

[0061] Hereinafter, preferred embodiments of the present invention will be described with reference to the attached drawings.

[0062] FIG. 1 is a diagram briefly illustrating a power semiconductor PCB module manufacturing apparatus and method including a snubber circuit containing a passive component manufactured by a printing method as an embodiment of the present invention.

[0063] The present invention relates to a power semiconductor PCB module manufacturing apparatus (100) including a snubber circuit containing a passive component manufactured by a printing method and a method thereof. The power semiconductor PCB module manufacturing apparatus (100) including a snubber circuit containing a passive component manufactured by a printing method (hereinafter referred to as the power semiconductor PCB module manufacturing apparatus) creates an electrical pattern of a snubber circuit of an SMPS (Switching Mode Power Supply) on a copper foil layer formed on a core and on the upper and lower parts of the core.

[0064] Subsequently, the power semiconductor PCB module manufacturing device (100) creates passive components and electrodes of passive components on the electrical pattern of the formed snubber circuit through a printing method. Among the passive components, resistors are created by applying a material having electrical resistance properties through a printing method, and capacitors are created by applying a dielectric material through a printing method.

[0065] Subsequently, the power semiconductor PCB module manufacturing device (100) forms an insulating layer of prepreg or laminate structure on the upper and lower parts of the PCB on which the electrical pattern of the snubber circuit and the passive component and the electrode of the passive component are formed, and laminates a copper foil layer on the outside of the formed insulating layer to produce a multilayer structure PCB including an inner layer.

[0066] Subsequently, the power semiconductor PCB module manufacturing device (100) manufactures a power semiconductor PCB module by creating an electrical pattern for a component to be mounted in a snubber circuit on a copper foil layer (e.g., Top layer) formed on the outside of an insulating layer, mounting the corresponding electronic component, and creating via holes in the PCB, thereby making an electrical connection between the electrical pattern of the snubber circuit, the electrode of the passive component, and the component mounted in the snubber circuit through the created via holes.

[0067] Here, the power semiconductor PCB module manufactured through the present invention is a power semiconductor PCB module that includes a snubber circuit containing a passive component manufactured by a printing method, and has the characteristics of being very small in size and having significantly superior power consumption efficiency compared to a power semiconductor device manufactured using existing passive component parts.

[0068] The PCB described in the present invention may be composed of at least one of an FR-4 substrate, a glass substrate, a ceramic substrate, a metal core substrate, a polyimide substrate, a Teflon substrate, an alumina substrate, and an aluminum nitride substrate.

[0069] FIG. 2 is a configuration diagram of a power semiconductor PCB module manufacturing apparatus including a snubber circuit containing a passive component manufactured by a printing method as an embodiment of the present invention.

[0070] The power semiconductor PCB module manufacturing device (100) of the present invention includes a first electrical pattern generating unit (110), a printing passive component and electrode generating unit (120), a multilayer structure generating unit (130), a second electrical pattern generating unit (140), a via hole generating unit (150), and an electronic component mounting unit (160).

[0071] The first electrical pattern generating unit (110) performs the function of generating an electrical pattern of a snubber circuit for an SMPS (Switching Mode Power Supply) on a copper foil layer formed on a PCB (Printed Circuit Board).

[0072] The first electrical pattern generating unit (110) can generate an electrical pattern of the snubber circuit using conventional etching technology.

[0073] Here, a snubber circuit is a circuit used to suppress sudden voltage or current spikes occurring in electronic devices or power electronics and to protect electric power equipment. It primarily serves to block high-frequency noise that may occur in electronic components such as switching devices, relays, and transistors, or to reduce voltage spikes. In particular, snubber circuits are used in SMPS to suppress surge voltages to protect FETs and diodes, and to reduce power loss occurring during switching.

[0074] Types of snubber circuits include C snubber circuits, RC snubber circuits, discharge-type RCD snubber circuits, and non-discharge-type RCD snubber circuits, depending on the circuit configuration and characteristics. Although various snubber circuits can be used in the present invention, a non-discharge-type RCD snubber circuit, which has the characteristic of low power consumption as shown in FIG. 3, is mainly used.

[0075] The non-discharge type RCD snubber circuit illustrated in FIG. 3 consists of two FETs (102a, 102b), two snubber diodes (104a, 104b), two snubber capacitors (C1, C2), and two snubber resistors (R1, R2).

[0076] The non-discharge type RCD snubber circuit used in the present invention has a structure in which an upper FET (102a) is connected to an upper snubber diode (104a), an upper snubber capacitor (C1), and an upper snubber resistor (R1), and a lower FET (102b) is connected to a lower snubber diode (104b), a lower snubber capacitor (C2), and a lower snubber resistor (R2), and the drain and source of each FET are connected to each other, and the upper snubber resistor (R1) is connected to the lower FET (102b) through PGND, and the lower snubber resistor (R2) is connected to the upper FET (102a) through HVdc.

[0077] The printing passive element and electrode generating unit (120) performs the function of generating a passive element and an electrode of the passive element on a first electrical pattern generated through a printing method. A more detailed description of the printing passive element and electrode generating unit (120) will be explained in FIG. 4.

[0078] The multilayer structure generating unit (130) performs the function of creating an inner layer by forming an insulating layer on the upper and lower parts of a PCB on which a first electrical pattern is generated, and creating a multilayer structure PCB (Printed Circuit Board) by laminating a second copper foil layer on the upper and lower parts of the formed insulating layer.

[0079] Here, the Inner Layer refers to the PCB on which the first electrical pattern is generated and is located inside the insulating layer.

[0080] The PCB with the first electrical pattern is a PCB with a two-layer structure, and when an insulating layer is formed on the upper and lower parts of the PCB with the first electrical pattern and a copper foil layer is additionally laminated, a PCB with a four-layer structure is formed.

[0081] The multilayer structure generating unit (130) can form an additional insulating layer on the upper and lower parts of the generated 4-layer structure PCB and additionally laminate a copper foil layer to form a 6-layer structure PCB, and can also generate a multilayer structure PCB with more than that.

[0082] Here, the core of the PCB is composed of an insulating material, and the insulating material may be composed of at least one of epoxy resin, polyimide, ceramic, polytetrafluoroethylene (PTFE), polyethylene naphthalate (PEN), polysulfone (PSU), polyetherimide (PEI), and polyetheretherketone (PEEK).

[0083] Here, the insulating layer can be formed through a prepreg or laminate structure.

[0084] The second electrical pattern generating unit (140) performs the function of generating a second electrical pattern for a component mounted on a snubber circuit.

[0085] The second electrical pattern generating unit (140) generates a second electrical pattern for components (FETs and diodes) mounted on a snubber circuit on a copper foil layer laminated on the outside of an insulating layer (prepreg or laminate structure).

[0086] The via hole generating unit (150) generates a via hole for electrical connection in the PCB and performs an electrical connection between the first electrical pattern, the electrode of the passive component, and the second electrical pattern through the generated via hole.

[0087] The via hole generating unit (150) performs the function of connecting electrical patterns formed on each copper foil layer when the PCB is composed of electrical patterns of a multilayer structure of 2 layers and 4 layers or more.

[0088] The electronic component mounting section (160) performs the function of mounting electronic components for a snubber circuit on the second electrical pattern. Here, the electronic components for a snubber circuit mounted on the second electrical pattern mainly refer to FETs and diodes. Other electronic components may also be mounted if additionally required.

[0089] FIG. 4 is a configuration diagram of a printing passive element and an electrode generating unit as an embodiment of the present invention.

[0090] The printing passive element and electrode generation unit (120) of the present invention includes a printing resistance generation module (121), a printing capacitor generation module (122), a printing electrode generation module (123), and a resistance region additional etching module (124).

[0091] The printing resistance generating module (121) performs the function of generating resistance by applying a material having electrical resistance properties through a printing method.

[0092] The printing capacitor generation module (122) performs the function of applying a dielectric material to a first electrical pattern through a printing method and generating a capacitor through this.

[0093] Here, the dielectric material may be composed of a material including at least one of barium titanate (BaTiO3), strontium titanate (SrTiO3), calcium titanate (CaTiO3), niobium oxide (NbO5), tantalum oxide (Ta2O5), aluminum oxide (Al2O3), zirconium oxide (ZrO2), and magnesium oxide (MgO).

[0094] The printing electrode generation module (123) performs the function of generating electrodes of the capacitor by applying an electrode material to the dielectric through a printing method.

[0095] As described above, when a dielectric is applied to the first electrical pattern and an electrode material is applied to the dielectric, a capacitor is generated through their configuration.

[0096] Here, the electrode material may be composed of a material including at least one of silver (Ag), copper (Cu), aluminum (Al), gold (Au), nickel (Ni), palladium (Pd), graphene, and carbon nanotubes (CNT).

[0097] The resistance area additional etching module (124) performs the function of further etching a portion of the area between the first electrical patterns where the resistance is applied.

[0098] For example, the resistance region additional etching module (124) can form a T-shaped space by further etching the upper part of the region between the first electrical patterns where the resistance is applied, as shown in FIG. 9.

[0099] Here, the printing resistance generation module (121) can generate resistance by a first printing resistance generation method in which a material having electrical resistance properties is applied between first electrical patterns to generate resistance, and can also generate resistance by a second printing resistance generation method in which a material having electrical resistance properties is applied to the upper part of the area between first electrical patterns where resistance is applied is further etched through a resistance area additional etching module (124) to form a T-shaped space and a material having electrical resistance properties is applied to the T-space to generate resistance.

[0100] Here, since the characteristics (resistance value) of the resistance generated through the printing method are determined by the characteristics of the resistance material and spatial characteristics such as the length and volume between the patterns in which the printing resistance is generated, the second printing resistance generation method, which can additionally change the area between the patterns in which the resistance is generated compared to the first printing resistance generation method in which the area between the patterns in which the resistance is generated is fixed, has the advantage of being able to change the resistance value to a desired characteristic and make the characteristics of the resistance more accurate.

[0101] The printing method used in the printing passive element and electrode generating unit (120) of the present invention may use one or more of screen printing, inkjet printing, nanoimprint lithography, aerosol jet printing, laser direct patterning, spray coating, spin coating, and flexography, and the material constituting the passive element may be manufactured to suit the printing method used.

[0102] FIG. 5 is a diagram showing the configuration of a multilayer structure generating unit as an embodiment of the present invention.

[0103] The multilayer structure generating unit (130) of the present invention includes an insulating layer generating module (131) and a copper foil layer generating module (132).

[0104] The insulating layer generating module (131) performs the function of forming an insulating layer on the upper and lower parts of the PCB on which the first electrical pattern is generated using prepreg or laminate.

[0105] The copper foil layer generation module (132) performs the function of creating a multilayer structure PCB by laminating a second copper foil layer on the upper and lower parts of the insulating layer.

[0106] When an insulating layer is formed on the upper and lower parts of a PCB on which a first electrical pattern is generated through an insulating layer generating module (131) and a copper foil layer generating module (132), and a second copper foil layer is laminated on the outer surface of the insulating layer to form a multilayer structure PCB, the PCB on which the first electrical pattern is generated becomes the inner layer of the multilayer structure PCB.

[0107] FIG. 6 is a drawing for explaining a method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive component fabricated by a printing method as an embodiment of the present invention.

[0108] Step S100 is a step of forming a first electrical pattern for a snubber circuit for an SMPS (Switching Mode Power Supply) on a first copper foil layer formed on a PCB (Printed Circuit Board).

[0109] Here, the PCB is a PCB having copper foil layers formed on the upper and lower surfaces, and when a multilayer structure is formed by the multilayer structure generating unit (130), it corresponds to an Inner Layer.

[0110] Here, the first electrical pattern can be formed by an etching process by the first electrical pattern generating unit (110), or it can be formed by applying a conductive material such as copper to the PCB core through a printing method.

[0111] Step S200 is a step of creating a passive component and an electrode of the passive component through a printing method.

[0112] After forming a first electrical pattern for a snubber circuit, the printing passive component and electrode generating unit (120) creates a resistor (R1, R2) by applying a material having electrical resistance properties through a printing method to an area where a resistor is to be located, and applies a dielectric material (dm1, dm2) through a printing method to an area where a capacitor is to be located, and additionally applies a conductive material on the applied dielectric material to create a capacitor (C1, C2), and the conductive material applied on the dielectric material becomes the upper electrode (410a, 410b) of the capacitor.

[0113] Step S300 is the step of creating a multilayer printed circuit board (PCB).

[0114] The multilayer structure generating unit (130) forms insulating layers (414a, 414b) on the upper and lower parts of the PCB on which the first electrical pattern is formed, respectively, using prepreg or laminate, and laminates a second copper foil layer (402) on the outer surface of the insulating layer to create a PCB (Printed Circuit Board) having a four-layer structure. When the PCB having a four-layer structure is created in this way, the PCB (400) on which the first electrical pattern is formed is composed of a core (401) and a first copper foil layer, and becomes the inner layer of the PCB having a four-layer structure.

[0115] The multilayer structure generating unit (130) can generate a PCB having a 6-layer structure by additionally forming an insulating layer using prepreg or laminate on the upper and lower parts of a PCB having a 4-layer structure and laminating a third copper foil layer, and can generate a PCB having an 8-layer or higher multilayer structure by repeating the above steps.

[0116] Step S400 is a step of forming a second electrical pattern for a component mounted on a snubber circuit on the second copper foil layer.

[0117] As described above, when a PCB having a four-layer structure is formed by forming a passive component of the snubber circuit and an electrode of the passive component on the inner layer and laminating a second copper foil layer on the outer surface of the insulating layer, a second electrical pattern for components other than the passive component mounted in the snubber circuit is formed on the second copper foil layer.

[0118] Here, the second electrical pattern can be formed by an etching process by the second electrical pattern generating unit (140), or it can be formed by applying a conductive material such as copper onto an insulating layer using a printing method.

[0119] Step S500 is a step of creating via holes for electrical connection in a multilayer PCB and performing electrical connection through the created via holes.

[0120] In a power semiconductor PCB module having a multilayer structure manufactured through the present invention, an electrical connection must be made between a first electrical pattern configured in an inner layer and a second electrical pattern on which passive components and electronic components are mounted. To this end, a via hole generating unit (150) forms via holes in the multilayer PCB through laser drilling or mechanical drilling, and performs an electrical connection between the first electrical pattern and the second electrical pattern on which passive components and electronic components are mounted through the formed via holes.

[0121] Step S600 is the step of completing the power semiconductor PCB module by mounting electronic components for the snubber circuit on the second copper foil layer.

[0122] The electronic component mounting section (160) mounts FETs (102a, 102b), diodes (104a, 104b), and other electronic components required for the burner circuit on the second electrical pattern.

[0123] FIG. 7 is a drawing for explaining in more detail a method of creating a passive element and an electrode of a passive element by a printing method as an embodiment of the present invention.

[0124] Step S210 is a step of generating resistance by applying a material having electrical resistance properties to a first electrical pattern through a printing method.

[0125] FIG. 8 illustrates that, as an embodiment of the present invention, a first electrical pattern is formed on a first copper foil layer of an inner layer PCB (400).

[0126] HVdc, PGND, and capacitor lower electrodes (412a, 412b) are formed on the upper copper foil layer of the inner layer PCB (400).

[0127] FIG. 9 illustrates additionally etching a portion of the first electrical pattern region where the resistor is located as an embodiment of the present invention.

[0128] Since the resistance characteristics (resistance value) generated through the printing method of the present invention are determined by the characteristics of the resistance material and spatial characteristics such as the length and volume between the pattern in which the printed resistance is generated, the area between the pattern in which the resistance is generated can be further etched by a specific length (d) to create a T-shaped area where the resistance is applied.

[0129] By further etching the area where the resistance is applied, the resistance value can be changed to a desired value, thereby modifying the resistance value to the desired characteristics and making the resistance characteristics more accurate.

[0130] FIG. 10 illustrates the creation of a resistor, which is a passive element, by applying a resistive material through a printing method as an embodiment of the present invention.

[0131] In the present invention, resistance material is applied to a T-shaped space where the resistance is located through the printing method described above to create resistance (R1, R2) of a snubber circuit.

[0132] Step S220 is a step of applying a dielectric material (dm1, dm2) to the lower electrodes (412a, 412b) of the capacitor of the first electrical pattern through a printing method.

[0133] FIG. 11 illustrates a dielectric material applied to the lower electrodes (412a, 412b) of a capacitor through a printing method as an embodiment of the present invention.

[0134] Step S230 is a step of creating upper electrodes (410a, 410b) of a capacitor by additionally applying electrode material to dielectrics (dm1, dm2) through a printing method.

[0135] In the present invention, a dielectric material (dm1, dm2) is applied to the capacitor lower electrode (412a, 412b), which is the region where the capacitor is located, through the printing method described above, and a capacitor upper electrode (410a, 410b) is created over the dielectric material (dm1, dm2) to create the capacitor (C1, C2) of the snubber circuit.

[0136] FIG. 12 illustrates the creation of an upper electrode of a capacitor by applying a conductive material onto a dielectric through a printing method as an embodiment of the present invention.

[0137] In the present invention, a conductive material is applied to the upper surface of a dielectric (dm1, dm2) through the printing method described above to create upper electrodes (410a, 410b) of a capacitor.

[0138] When the dielectric (dm1, dm2) and the capacitor upper electrode (410a, 410b) are applied to the capacitor lower electrode (412a, 412b) in this way, the capacitor lower electrode (412a, 412b), the dielectric (dm1, dm2), and the capacitor upper electrode (410a, 410b) are combined to function as capacitors (C1, C2) of the snubber circuit.

[0139] FIG. 13 is a drawing illustrating a method for creating a multilayer PCB as an embodiment of the present invention.

[0140] Step S310 is the step of forming insulating layers on the upper and lower parts of the PCB where the first electrical pattern and passive components are generated.

[0141] FIG. 14 illustrates, as an embodiment of the present invention, the formation of an insulating layer and a second copper foil layer on the upper and lower parts of a PCB on which a first electrical pattern and a passive element are formed.

[0142] The insulation layer generating module (131) forms a prepreg or laminate structure on the upper and lower portions of the PCB on which the first electrical pattern is formed, respectively, to form an upper insulation layer (414a) and a lower insulation layer (414b) on the PCB on which the first electrical pattern is formed.

[0143] The PCB (400), composed of a first electrical pattern and a core (401) surrounded by an upper insulating layer (414a) and a lower insulating layer (414b), becomes an inner layer in a multilayer structure PCB.

[0144] Step S320 is the step of laminating a second copper foil layer on the outer surface of the insulating layer.

[0145] The copper foil layer generation module (132) creates a 4-layer structure PCB by laminating a second copper foil layer (402) on the outer surface of the upper insulating layer (414a) and the lower insulating layer (414b) respectively after the upper insulating layer (414a) and the lower insulating layer (414b) are formed on the PCB (400) on which the first electrical pattern and passive components are generated.

[0146] FIG. 15 is a drawing illustrating a power semiconductor PCB module using 4 layers in a 4-layer structure PCB as a first embodiment of the power semiconductor PCB module manufacturing of the present invention.

[0147] As a first embodiment of the manufacturing of a power semiconductor PCB module according to the present invention, a method for manufacturing a power semiconductor PCB module using 4 layers in a 4-layer structure PCB is described as follows.

[0148] A second electrical pattern for electronic components (102a, 102b, 104a, 104b) mounted on a snubber circuit is created on a second copper foil layer laminated on the upper insulating layer (414a) and the lower insulating layer (414b), respectively.

[0149] Here, a second copper foil layer laminated on the upper insulating layer (414a) creates a second electrical pattern for electronic components (102a, 102b, 104a, 104b) mainly mounted on a snubber circuit and a power pattern (HVdc, Vout, PGND) connected to said components, and a second copper foil layer laminated on the lower insulating layer (414b) creates only the power pattern (HVdc, PGND).

[0150] After creating a second electrical pattern, a via hole (700) for electrical connection is created in the multilayer PCB, and an electrical connection is made between the first electrical pattern and the second electrical pattern of the inner layer through the created via hole (700).

[0151] Subsequently, a power semiconductor PCB module using a 4-layer structure is manufactured by mounting electronic components corresponding to the second electrical pattern for the electronic components (102a, 102b, 104a, 104b) mounted on the snubber circuit formed on the upper insulating layer (414a).

[0152] The circuit structure of a power semiconductor PCB module manufactured through the first embodiment of the power semiconductor PCB module manufacturing of the present invention is described in detail as follows.

[0153] In the TOP Layer, the upper switching element (102a) is connected to HVdc and Vout, and the lower switching element (102b) is connected to PGND and Vout. Vout is connected to each snubber diode (104a, 104b).

[0154] The wiring passing through Vout and the upper snubber diode (104a) is connected to the lower electrode (412a) of the snubber capacitor of the Inner Layer, and the lower electrode (412a) of the snubber capacitor is connected to the PGND of the Bottom Layer through the snubber resistor (R1).

[0155] The upper electrode (410a) of the upper snubber capacitor (C1) is connected to the HVdc of the TOP Layer via Via.

[0156] The wiring passing through the lower diode (104b) is connected to the lower electrode (412b) of the snubber capacitor of the Inner Layer, and the lower electrode (412b) of the snubber capacitor is connected to the HVdc of the Bottom Layer through the snubber resistor (R2).

[0157] The upper electrode (410b) of the lower snubber capacitor is connected to the PGND of the TOP Layer.

[0158] The configuration of the non-dissipative RCD snubber circuit according to the first embodiment of the present invention described above utilizes a resistor and a capacitor created by a printing method in the lower inner layer where the switching element is located very close to the switching element, thereby optimizing the flow of current, maximizing the snubber effect, and reducing parasitic inductance.

[0159] FIG. 16 is a drawing illustrating a power semiconductor PCB module using two layers in a 4-layer PCB as a second embodiment of the power semiconductor PCB module manufacturing of the present invention.

[0160] In the present invention, a power semiconductor PCB module can be manufactured by using all four layers of a 4-layer PCB structure, and a power semiconductor PCB module can also be manufactured by using two layers.

[0161] As a second embodiment of the power semiconductor PCB module manufacturing of the present invention, a method for manufacturing a power semiconductor PCB module using two layers in a 4-layer PCB structure is described as follows.

[0162] When manufacturing a power semiconductor PCB module using 2 layers in a 4-layer PCB structure, a second electrical pattern and a power pattern (HVdc, Vout, PGND) for electronic components (102a, 102b, 104a, 104b) mounted on a snubber circuit are all created on the second copper foil layer of the upper insulating layer (414a).

[0163] After creating a second electrical pattern on the second copper foil layer of the upper insulating layer (414a), a via hole (700) for electrical connection is created only in the upper insulating layer (414a) of the multilayer PCB, and an electrical connection is made between the first electrical pattern and the second electrical pattern of the inner layer through the created via hole (700).

[0164] Subsequently, a power semiconductor PCB module using a 2-layer structure of a 4-layer structure is manufactured by mounting electronic components corresponding to the second electrical pattern for the electronic components (102a, 102b, 104a, 104b) mounted on the snubber circuit formed on the upper insulating layer (414a).

[0165] In the second embodiment as shown in FIG. 16, the wiring passing through the snubber resistor is configured to be connected to the TOP Layer. The connection between the upper switching element (102a) and the lower switching element (102b) is the same as in the first embodiment of FIG. 15, but the snubber resistor passes through a via hole and is connected to the PGND or HVdc of the TOP Layer.

[0166] As such, the present invention provides various circuit configurations even when using a 4-layer PCB, and can be flexibly applied according to design requirements.

[0167] FIGS. 17 to 24 are drawings for explaining a method of manufacturing a power semiconductor PCB module using a two-layer PCB structure as a third embodiment of the manufacturing of a power semiconductor PCB module of the present invention.

[0168] In addition to the first and second embodiments using the above-described 4-layer structure PCB, as a third embodiment of manufacturing a power semiconductor PCB module, a power semiconductor PCB module can be manufactured using a 2-layer structure PCB.

[0169] The method of the third embodiment for manufacturing a power semiconductor PCB module using a two-layer structure PCB is as follows.

[0170] Step S1000 is a step of forming an electrical pattern for a snubber circuit of an SMPS (Switching Mode Power Supply) on copper foil layers formed on the upper and lower parts, respectively, of the core (601) of the PCB (600).

[0171] As shown in FIG. 19, electrical patterns (HVdc, Vout, PGND, 604a, 604b) for the snubber circuit of the SMPS are created on the upper copper layer and the lower copper layer of the PCB (600).

[0172] Step S2000 is a step of creating passive components (snubber resistors, snubber capacitors) and electrodes of passive components (upper electrodes of snubber capacitors) on a lower copper foil layer through a printing method.

[0173] Here, the S2000 step is explained in more detail as follows.

[0174] Step S2100 is a step of creating resistance by applying a material having electrical resistance properties between electrical patterns created on the lower copper foil layer through a printing method.

[0175] Here, as described above, by further etching the area where the resistor is applied, the resistance value can be changed to a desired value, thereby changing the resistance value to a desired characteristic and making the resistance characteristics more accurate.

[0176] FIG. 20 illustrates, as an embodiment of the present invention, additionally etching a portion of the electrical pattern area of ​​the lower copper foil layer where the resistor is located.

[0177] Since the resistance characteristics (resistance value) generated through the printing method of the present invention are determined by the characteristics of the resistance material and spatial characteristics such as the length and volume between the pattern in which the printed resistance is generated, the area between the pattern in which the resistance is generated can be further etched by a specific length (d) to create a T-shaped area where the resistance is applied.

[0178] By further etching the area where the resistance is applied, the resistance value can be changed to a desired value, thereby modifying the resistance value to the desired characteristics and making the resistance characteristics more accurate.

[0179] FIG. 21 illustrates the creation of snubber resistors (R1, R2) by applying a resistive material to an electrical pattern of a lower copper foil layer through a printing method in the third embodiment of the present invention.

[0180] In the present invention, a resistance material is applied to a T-shaped space where the resistance is located among the electrical patterns of the lower copper foil layer through the printing method described above to create the resistance (R) of the snubber circuit.

[0181] Step S2200 is a step of applying a dielectric (dm1, dm2) between electrical patterns created on the lower copper foil layer through a printing method.

[0182] FIG. 22 illustrates that, in the third embodiment of the present invention, dielectric materials (dm1, dm2) are applied to the electrical pattern of the lower copper foil layer through a printing method.

[0183] Step S2300 is a step of creating upper electrodes (602a, 602b) of a snubber capacitor by applying an electrode material onto dielectrics (dm1, dm2) through a printing method.

[0184] In the third embodiment of the present invention, a dielectric material (dm1, dm2) is applied to the capacitor lower electrode (604a, 604b), which is the region where the capacitor is located, through the printing method described above, and a capacitor upper electrode (602a, 602b) is created over the dielectric material (dm1, dm2) to create the capacitor (C1, C2) of the snubber circuit.

[0185] FIG. 23 illustrates, in the third embodiment of the present invention, the upper electrodes (602a, 602b) of a capacitor being formed by applying a conductive material onto a dielectric through a printing method.

[0186] In the present invention, a conductive material is applied to the upper surface of a dielectric (dm1, dm2) through the printing method described above to create upper electrodes (602a, 602b) of a capacitor.

[0187] When the dielectric (dm1, dm2) and the capacitor upper electrode (602a, 602b) are applied to the capacitor lower electrode (604a, 604b) in this way, the capacitor lower electrode (604a, 604b), the dielectric (dm1, dm2), and the capacitor upper electrode (602a, 602b) are combined to function as capacitors (C1, C2) of the snubber circuit.

[0188] Step S3000 is a step of creating via holes (700) for electrical connection in the PCB (600) and performing an electrical connection between the electrical pattern of the upper copper layer and the electrode of the passive component of the lower copper layer through the created via holes (700).

[0189] Step S4000 is the step of mounting electronic components for the snubber circuit on the upper copper foil layer.

[0190] FIG. 24 illustrates that in the third embodiment of the present invention, a via hole (700) for electrical connection is created in a PCB (600), and an electrical connection is made between the electrical pattern of the upper copper foil layer and the electrode of a passive component of the lower copper foil layer through the created via hole (700), and electronic components (612a, 612b, 614a, 614b) for a snubber circuit are mounted on the upper copper foil layer.

[0191] In the third embodiment of the present invention, snubber capacitors (C1, C2) and snubber resistors (R1, R2) are placed in the Bottom Layer. The lower electrodes (604a, 604b) of the snubber capacitors in the Bottom Layer are connected through the via holes (700) via snubber diodes (614a, 614b), and the lower electrodes (604a, 604b) of the snubber capacitors are connected to the PGND of the TOP Layer via the snubber resistor (R) created by a printing method.

[0192] The upper electrode (602a) of the upper snubber capacitor (C1) is connected to HVdc.

[0193] The lower snubber capacitor (C2) is configured similarly and is connected from Vout through the snubber diode (614b) to the lower electrode (604b) of the snubber capacitor of the Bottom Layer through a via hole, and this lower electrode is connected to the HVdc of the TOP Layer through a printed resistor. The upper electrode of the lower snubber capacitor (C2) is connected to PGND.

[0194] Through the steps S2000 to S4000 described above, the present invention can manufacture a power semiconductor PCB module including a snubber circuit containing a passive component fabricated by printing using a two-layer structure PCB.

[0195] FIG. 25 is a plan view of a power semiconductor PCB module including a non-discharge type RCD snubber circuit as an embodiment of the present invention.

[0196] FIG. 25 is a drawing showing the TOP layer and the area of ​​the internal passive components of a 4-layer power semiconductor PCB module (10) that implements snubber resistors (R1, R2) and snubber capacitors (C1, C2) created by a printing method as an embodiment of the present invention, so that they can be seen at a glance.

[0197] In Fig. 25, the TOP layer is indicated by a solid line, and the area of ​​the internal passive components is indicated by a dotted line.

[0198] In the TOP layer of the power semiconductor PCB module (10), upper FET (102a), lower FET (102b), and snubber diodes (104a, 104b) which are switching elements are arranged, and in the first copper foil layer, snubber capacitors (C1, C2) and snubber resistors (R1, R2) created by a printing method are arranged.

[0199] FIG. 26 is a top view of a power semiconductor PCB module according to an embodiment of the present invention, illustrating the location and wiring of an upper FET (102a), a lower FET (102b), and snubber diodes (104a, 104b) arranged in the TOP layer.

[0200] One end of the upper FET (102a) is connected to HVdc and the other end is connected to the lower FET (102b) through Vout, and the upper snubber diode (104a) and the lower snubber diode (104b) are connected to each other through Vout, and one end of the lower FET (102b) is connected to PGND and the other end is connected to the upper FET (102a) through Vout.

[0201] A cross-sectional view taken between A and A' of the power semiconductor PCB module (10) illustrated in FIG. 26 is illustrated in FIG. 15.

[0202] FIG. 27 is a bottom view of a power semiconductor PCB module according to an embodiment of the present invention, and is a diagram for explaining the arrangement of GND and HVdc constituting the BOTTOM layer and the connection with a snubber capacitor and a snubber resistor included in the area of ​​passive components inside the power semiconductor PCB module.

[0203] Here, the snubber capacitor and snubber resistor are included in the passive component area of ​​the inner layer of the power semiconductor PCB module and are electrically connected to the GND and HVdc of the BOTTOM layer through the via hole (700).

[0204] The power semiconductor PCB module (10) manufactured through the present invention utilizes the structure of a non-discharge type RCD snubber circuit, so only the surge energy absorbed by the snubber capacitors (C1, C2) is consumed by the RSNB, and the entire energy accumulated in the snubber capacitors (C1, C2) is not discharged every time switching occurs. Therefore, even if the switching frequency is increased to high speed, the power consumption of the snubber resistors (R1, R2) does not increase significantly, and since the snubber capacitors (C1, C2) can be made larger, it has the advantage of realizing a circuit with a very high surge suppression effect.

[0205] In addition, the power semiconductor PCB module (10) manufactured through the present invention can be configured by placing the switching elements, such as FETs, diodes, capacitors, and resistors, close together, so the number of layers of the PCB can be reduced, and accordingly, the line internance can be greatly reduced.

[0206] In addition, the power semiconductor PCB module (10) manufactured through the present invention can implement the capacitor and resistor of the snubber circuit by printing them on the PCB using a printing method, so it has the advantage of reducing the area of ​​the PCB by at least 10% compared to the conventional method of implementing the snubber circuit, and it has the advantage of reducing manufacturing costs by simplifying the manufacturing process.

Claims

1. A first electrical pattern generating unit that generates an electrical pattern of a snubber circuit for an SMPS (Switching Mode Power Supply) on a first copper foil layer formed on a PCB (Printed Circuit Board); A printing passive element and electrode generating unit that generates a passive element and an electrode of the passive element on the first electrical pattern through a printing method; A second electrical pattern generating unit for generating a second electrical pattern for a component mounted on the above snubber circuit; A via hole generating unit that generates a via hole for electrical connection in the PCB and performs an electrical connection between the first electrical pattern and the second electrical pattern through the generated via hole; and An electronic component mounting section for mounting electronic components for a snubber circuit on the second electrical pattern above; A power semiconductor PCB module manufacturing apparatus including a snubber circuit containing a passive component manufactured by a printing method including 2. In Paragraph 1, The above-mentioned printing passive component and electrode generating part A printing resistance generating module that generates resistance by applying a material having electrical resistance properties through a printing method; A printing capacitor generation module that applies a dielectric material through a printing method and generates a capacitor therefrom; and A printing electrode generating module that generates an electrode of the capacitor by applying an electrode material through a printing method; A power semiconductor PCB module manufacturing apparatus comprising a snubber circuit containing a passive component manufactured by a printing method, characterized by including 3. In Paragraph 1, A multilayer structure generating unit that forms an insulating layer on the upper and lower portions of the above PCB and laminates a second copper foil layer on the upper and lower portions of the insulating layer to generate a multilayer structure PCB (Printed Circuit Board); A power semiconductor PCB module manufacturing apparatus comprising a snubber circuit containing a passive component manufactured by a printing method, characterized by further including 4. In any one of paragraphs 1 through 3, A power semiconductor PCB module manufacturing apparatus comprising a snubber circuit containing a passive component fabricated by a printing method characterized by using one or more of the following printing methods: screen printing, inkjet printing, nanoimprint lithography, aerosol jet printing, laser direct patterning, spray coating, spin coating, and flexography.

5. In Paragraph 3, The above multilayer structure generating part An insulating layer generating module that forms the insulating layer on the upper and lower parts of the PCB using prepreg or laminate; and A copper foil layer generating module that creates a multilayer PCB by laminating the second copper foil layer on the upper and lower portions of the insulating layer; A power semiconductor PCB module manufacturing apparatus comprising a snubber circuit containing a passive component manufactured by a printing method, characterized by including 6. In Paragraph 2, A power semiconductor PCB module manufacturing apparatus comprising a snubber circuit containing a passive component fabricated by a printing method, characterized in that the dielectric material comprises at least one of barium titanate (BaTiO3), strontium titanate (SrTiO3), calcium titanate (CaTiO3), niobium oxide (NbO5), tantalum oxide (Ta2O5), aluminum oxide (Al2O3), zirconium oxide (ZrO2), and magnesium oxide (MgO).

7. In Paragraph 2, A power semiconductor PCB module manufacturing apparatus comprising a snubber circuit containing a passive component fabricated by a printing method, characterized in that the electrode material comprises at least one of silver (Ag), copper (Cu), aluminum (Al), gold (Au), nickel (Ni), palladium (Pd), graphene, and carbon nanotubes (CNT).

8. In Paragraph 1, A power semiconductor PCB module manufacturing apparatus comprising a snubber circuit containing a passive component manufactured by a printing method, characterized in that the above PCB is composed of at least one of an FR-4 substrate, a glass substrate, a ceramic substrate, a metal core substrate, a polyimide substrate, a Teflon substrate, an alumina substrate, and an aluminum nitride substrate.

9. In Paragraph 1, A power semiconductor PCB module manufacturing apparatus comprising a snubber circuit containing a passive component manufactured by a printing method, wherein the core of the PCB is composed of an insulating material, and the insulating material comprises at least one of epoxy resin, polyimide, ceramic, polytetrafluoroethylene (PTFE), polyethylene naphthalate (PEN), polysulfone (PSU), polyetherimide (PEI), and polyetheretherketone (PEEK).

10. In Paragraph 3, A power semiconductor PCB module manufacturing apparatus comprising a snubber circuit containing a passive component manufactured by a printing method, characterized in that the above multilayer structure is composed of a structure of 2 layers or 4 layers or more. 11.a) A step of forming a first electrical pattern for a snubber circuit for an SMPS (Switching Mode Power Supply) on a first copper foil layer formed on a PCB (Printed Circuit Board); b) a step of creating a passive element and an electrode of the passive element on the first electrical pattern through a printing method; c) a step of forming an insulating layer on the upper and lower portions of the PCB, respectively, and laminating a second copper foil layer on the outer surface of the insulating layer to create a multilayer structured PCB (Printed Circuit Board); d) a step of generating a second electrical pattern on the second copper foil layer for a component mounted on the snubber circuit; e) a step of creating a via hole for electrical connection in the PCB of the multilayer structure above and performing an electrical connection between the first electrical pattern and the second electrical pattern through the created via hole; and f) A step of mounting electronic components for a snubber circuit on the second electrical pattern above; A method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive component fabricated by a printing method including 12. In Paragraph 11, The above step b) is, b-1) A step of generating resistance by applying a material having electrical resistance properties to the first electrical pattern through a printing method; b-2) A step of applying a dielectric material to the first electrical pattern through a printing method; and b-3) A step of forming electrodes of a capacitor by applying an electrode material through a printing method; A method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive component fabricated by a printing method, characterized by including 13. In any one of paragraphs 11 to 12, A method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive component fabricated by a printing method characterized by using one or more of the following printing methods: screen printing, inkjet printing, nanoimprint lithography, aerosol jet printing, laser direct patterning, spray coating, spin coating, and flexography.

14. In Paragraph 11, A method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive component fabricated by a printing method, characterized in that the dielectric material comprises at least one of barium titanate (BaTiO₃), strontium titanate (SrTiO₃), calcium titanate (CaTiO₃), niobium oxide (NbO₅), tantalum oxide (Ta₂O₅), aluminum oxide (Al₂O₅), zirconium oxide (ZrO₂), and magnesium oxide (MgO).

15. In Paragraph 11, A method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive component fabricated by a printing method, characterized in that the electrode material comprises at least one of silver (Ag), copper (Cu), aluminum (Al), gold (Au), nickel (Ni), palladium (Pd), graphene, and carbon nanotubes (CNT).

16. In Paragraph 11, A method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive component fabricated by a printing method, characterized in that the PCB is composed of at least one of an FR-4 substrate, a glass substrate, a ceramic substrate, a metal core substrate, a polyimide substrate, a Teflon substrate, an alumina substrate, and an aluminum nitride substrate.

17. In Paragraph 11, A method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive component fabricated by a printing method, characterized in that the core of the PCB is composed of an insulating material, and the insulating material comprises at least one of epoxy resin, polyimide, ceramic, polytetrafluoroethylene (PTFE), polyethylene naphthalate (PEN), polysulfone (PSU), polyetherimide (PEI), and polyetheretherketone (PEEK).

18. In Paragraph 11, A method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive component fabricated by a printing method, characterized in that the insulating layer is formed through a prepreg or laminate structure, and the multilayer structure is composed of a structure of two layers or four or more layers. 19.a) A step of creating an electrical pattern for a snubber circuit of an SMPS (Switching Mode Power Supply) on copper foil layers formed respectively on the upper and lower parts of a PCB (Printed Circuit Board); b) a step of forming a passive element and an electrode of said passive element on a lower copper foil layer through a printing method; c) a step of creating a via hole for electrical connection in the core and performing an electrical connection between the electrical pattern of the upper copper foil layer and the electrode of the passive element created in the lower copper foil layer through the created via hole; and d) A step of mounting electronic components for a snubber circuit on the upper copper foil layer; A method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive component fabricated by a printing method including 20. In Paragraph 19, The above step b) is, b-1) A step of generating resistance by applying a material having electrical resistance properties between electrical patterns generated on the lower copper foil layer through a printing method; b-2) A step of applying a dielectric material between electrical patterns formed on the lower copper foil layer through a printing method; and b-3) A step of forming electrodes of a capacitor by applying an electrode material through a printing method; A method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive component fabricated by a printing method, characterized by including 21. In any one of paragraphs 19 to 20, A method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive component fabricated by a printing method characterized by using one or more of the following printing methods: screen printing, inkjet printing, nanoimprint lithography, aerosol jet printing, laser direct patterning, spray coating, spin coating, and flexography.

22. In Paragraph 20 A method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive component fabricated by a printing method, characterized in that the dielectric material comprises at least one of barium titanate (BaTiO₃), strontium titanate (SrTiO₃), calcium titanate (CaTiO₃), niobium oxide (NbO₅), tantalum oxide (Ta₂O₅), aluminum oxide (Al₂O₅), zirconium oxide (ZrO₂), and magnesium oxide (MgO).

23. In Paragraph 20 A method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive component fabricated by a printing method, characterized in that the electrode material comprises at least one of silver (Ag), copper (Cu), aluminum (Al), gold (Au), nickel (Ni), palladium (Pd), graphene, and carbon nanotubes (CNT).

24. In Paragraph 19, A method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive component fabricated by a printing method, characterized in that the PCB is composed of at least one of an FR-4 substrate, a glass substrate, a ceramic substrate, a metal core substrate, a polyimide substrate, a Teflon substrate, an alumina substrate, and an aluminum nitride substrate.

25. In Paragraph 19, A method for manufacturing a power semiconductor PCB module including a snubber circuit containing a passive component fabricated by a printing method, characterized in that the core of the PCB is composed of an insulating material, and the insulating material comprises at least one of epoxy resin, polyimide, ceramic, polytetrafluoroethylene (PTFE), polyethylene naphthalate (PEN), polysulfone (PSU), polyetherimide (PEI), and polyetheretherketone (PEEK).

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