Circuit substrate and semiconductor package

Abstract

This circuit board comprises a ceramic substrate having silicon nitride as a main component, a conductive part that is formed of a conductive material and is connected to a semiconductor element, and a bonding part that contains titanium and bonds the ceramic substrate and the conductive part, wherein the bonding part contains titanium silicide particles, and the absolute maximum length of the titanium silicide particles is equal to or less than 5 μm.

Description

Circuit board and semiconductor package

[0001] The present invention relates to a circuit board and a semiconductor package.

[0002] Conventionally, a circuit board including a conductive portion to which a semiconductor element is connected and a ceramic substrate has been known (for example, Patent Document 1).

[0003] Japanese Patent Application Laid-Open No. 2014-118310

[0004] However, even with the prior art such as Patent Document 1, there is still room for improvement in the technology for improving the bonding strength between the conductive portion and the ceramic substrate in the circuit board.

[0005] An object of the present invention is to provide a technology for improving the bonding strength between a conductive portion to which a semiconductor element is connected and a ceramic substrate in a circuit board.

[0006] The present invention has been made to solve at least a part of the above-described problems and can be realized in the following forms.

[0007] (1) According to one embodiment of the present invention, a circuit board is provided. This circuit board includes a ceramic substrate mainly composed of silicon nitride, a conductive portion formed of a conductive material and connected to a semiconductor element, and a bonding portion that contains titanium and bonds the ceramic substrate and the conductive portion. The bonding portion contains titanium silicide particles, and the absolute maximum length of the titanium silicide particles is 5 μm or less.

[0008] In this configuration, the bonding area between the ceramic substrate and the conductive part contains titanium silicide particles. The absolute maximum length of the titanium silicide particles contained in the bonding area is 5 μm or less, which is relatively small. Here, "absolute maximum length of titanium silicide particles" refers to the distance obtained by performing a binarization image processing on the cross-section of the bonding area containing titanium silicide particles, and drawing a straight line connecting the furthest pixels in the region corresponding to a single titanium silicide particle in the image processing result. As a result, titanium silicide particles, which have relatively low mechanical strength, can be dispersed as fine particles within the bonding area, thereby improving the bonding strength between the conductive part and the ceramic substrate compared to cases where the bonding area contains relatively large titanium silicide particles.

[0009] (2) In the circuit board of the above form, the absolute maximum length of the titanium silicide particles may be 0.1 μm or more and 1 μm or less. With this configuration, the absolute maximum length of the titanium silicide particles is 0.1 μm or more and 1 μm or less, and furthermore, the particle size is small. This makes it possible to further improve the bonding strength between the conductive part and the ceramic substrate.

[0010] (3) In the circuit board of the above form, the joint portion does not have to contain either aluminum or silver. With this configuration, the joint portion does not contain either aluminum, which has relatively low thermal conductivity, or silver, which is expensive. This makes it possible to suppress the decrease in thermal conductivity of the joint portion and to reduce the manufacturing cost of the circuit board.

[0011] (4) In the circuit board of the above form, the joint may have a titanium nitride layer on the ceramic substrate side and titanium silicide particles on the conductive part side. With this configuration, the titanium silicide particles, which have relatively low mechanical strength, are located on the conductive part side and dispersed away from the titanium nitride layer. As a result, stress concentration can be suppressed more effectively than when the titanium silicide particles are clustered together in contact with the titanium nitride layer, thereby further improving the bonding strength between the conductive part and the ceramic substrate.

[0012] (5) In the circuit board of the above form, the ceramic substrate has a pair of main surfaces, the conductive portion has a first conductive portion disposed on one of the pair of main surfaces of the ceramic substrate and a second conductive portion disposed on the other of the pair of main surfaces of the ceramic substrate, the joint portion has a first joint portion that joins the ceramic substrate and the first conductive portion and a second joint portion that joins the ceramic substrate and the second conductive portion, and the thermal conductivity between the first conductive portion and the second conductive portion may be 170 W / (m·K) or more. With this configuration, a circuit board having two conductive portions sandwiched between a ceramic substrate can efficiently transfer heat from, for example, a semiconductor element or electronic component connected to the first conductive portion to the second conductive portion.

[0013] (6) According to another embodiment of the present invention, a semiconductor package is provided. This semiconductor package comprises the circuit board described above and a power semiconductor element connected to the conductive part. With this configuration, the semiconductor package can efficiently dissipate the heat generated by the power semiconductor element, which generates a relatively large amount of heat, through the circuit board.

[0014] Furthermore, the present invention can be realized in various forms, for example, in the form of a method for manufacturing a circuit board and a semiconductor package, an apparatus and system comprising a circuit board and a semiconductor package, a method for controlling such apparatus and system, a computer program that causes such apparatus and system to supply power to electronic equipment and to perform mutual conversion between AC and DC, a server apparatus for distributing the computer program, and a non-temporary storage medium that stores the computer program.

[0015] This is a cross-sectional view of the circuit board of the first embodiment. This is a schematic diagram of the semiconductor package of the first embodiment. This is an enlarged view of part A in Figure 1. This is a diagram illustrating the results of the evaluation test of the circuit board. This is a first cross-sectional SEM image of the sample used in the evaluation test of the circuit board. This is a second cross-sectional SEM image of the sample used in the evaluation test of the circuit board.

[0016] <First Embodiment> Figure 1 is a cross-sectional view of the circuit board 1 of this embodiment. Figure 2 is a cross-sectional view of the semiconductor package P1 of this embodiment. The circuit board 1 of this embodiment is a substrate on which a power semiconductor element 5 can be mounted, and as shown in Figure 1, comprises a ceramic substrate 10, conductive parts 21, 22, and bonding parts 31, 32. The semiconductor package P1 shown in Figure 2 comprises the circuit board 1 and a power semiconductor element 5 connected to the conductive part 21. The semiconductor package P1 performs various power conversions by switching operation, specifically supplying power to electronic devices and performing mutual conversion between AC and DC. In Figures 1 and 2, the direction along the stacking direction of the ceramic substrate 10, conductive parts 21, 22, and bonding parts 31, 32 is defined as the z-axis direction, the direction perpendicular to the z-axis is defined as the x-axis direction, and the direction perpendicular to the z-axis and x-axis is defined as the y-axis direction. Note that the thickness relationships between the ceramic substrate 10, the conductive parts 21 and 22, and the bonding parts 31 and 32 in Figure 1, and the thickness relationship between the circuit board 1 and the power semiconductor element 5 in Figure 2, are illustrated in a way that differs from the actual thickness relationships for the sake of explanation.

[0017] The ceramic substrate 10 is a flat plate-shaped component mainly composed of silicon nitride (Si3N4). Here, "mainly composed of silicon nitride" means that it contains 86 wt% or more of silicon nitride. The ceramic substrate 10 may also contain SiAlON. The ceramic substrate 10 has a pair of main surfaces 10a and 10b. The thickness of the ceramic substrate 10 is, for example, 220 μm or more and 690 μm or less. However, the thickness of the ceramic substrate 10 is not limited to these ranges.

[0018] Each of the conductive parts 21 and 22 is formed of a conductive material, and conductive part 21 is connected to the power semiconductor element 5. Conductive part 21 becomes part of the electrical circuit in the semiconductor package P1. Each of the conductive parts 21 and 22 is formed of a metal mainly composed of copper, for example, oxygen-free copper. Here, "metal mainly composed of copper" refers to a metal containing 99 wt% or more of copper. The thickness of each of the conductive parts 21 and 22 is, for example, 200 μm or more and 1500 μm or less. Conductive part 21 is arranged on one of the pair of main surfaces 10a and 10b of the ceramic substrate 10. Conductive part 22 is arranged on the other of the pair of main surfaces 10a and 10b of the ceramic substrate 10. Conductive part 21 corresponds to the "first conductive part" in the claims, and conductive part 22 corresponds to the "second conductive part" in the claims.

[0019] The joints 31 and 32 contain titanium. Neither of the joints 31 and 32 in this embodiment contains aluminum or silver. Here, "neither aluminum nor silver" means that they are not detected in the analysis of the target element by an energy-dispersive X-ray spectrometer (EDS), and specifically, that the content concentration of the target element is less than 1 at%. Joint 31 joins the ceramic substrate 10 and the conductive part 21, and joint 32 joins the ceramic substrate 10 and the conductive part 22. Joint 31 corresponds to the "first joint" in the claims, and joint 32 corresponds to the "second joint" in the claims.

[0020] The thickness of each of the joints 31 and 32 is, for example, 0.3 μm or more and 3 μm or less. The thickness of the joints 31 and 32 can be determined using a scanning electron microscope. For example, to determine the thickness of the joint 31, five locations are randomly selected on the polished surface of a cross section perpendicular to one of the main surfaces 10a of the ceramic substrate 10, and an image of a 120 μm × 90 μm area is taken at a magnification of 2000x. Next, the lengths of 10 line segments drawn perpendicular to a 100 μm line segment drawn at the interface between the ceramic substrate 10 and the joint 31, and at equal intervals, are determined. In this embodiment, the average of these determined values ​​is taken as the thickness of the joint 31. The same procedure is followed for the joint 32. Note that the thickness of the joints 31 and 32 tends to be thicker than the thickness of the metal film produced in the manufacturing method of the circuit board 1 described later. This is because, during the bonding of the ceramic substrate 10 and the conductive parts 21 and 22 via the bonding portions 31 and 32, nitrogen atoms and silicon atoms are supplied from the ceramic substrate 10, and copper atoms are supplied from the conductive parts 21 and 22.

[0021] Figure 3 is an enlarged view of part A in Figure 1. Figure 3 is an enlarged schematic diagram of the portion included in part A shown in Figure 1. Note that the size relationships of the parts shown in Figure 3 differ from the actual size relationships for the sake of explanation. As shown in Figure 3, the joint 31 includes a titanium nitride layer 311, a titanium-containing layer 312, and titanium silicide particles 313. The titanium nitride layer 311 is located on the ceramic substrate 10 side in the joint 31 and is formed to follow one of the main surfaces 10a of the ceramic substrate 10. The titanium silicide particles 313 are fine particles dispersed in the titanium-containing layer 312 which contains titanium. In the circuit board 1 of this embodiment, the absolute maximum length Lm of the titanium silicide particles 313 is 0.1 μm, which is 5 μm or less and also between 0.1 μm and 1 μm. Here, "absolute maximum length of titanium silicide particles 313" refers to the distance obtained by performing a binarization image processing on the cross-section of the joint 31 containing the titanium silicide particles 313, and drawing a straight line connecting the furthest pixels in the region corresponding to a single titanium silicide particle 313 included in the image processing result. Figure 3 describes the joint 31, but the joint 32 also contains titanium silicide particles in the same way as the joint 31, and the absolute maximum length of the titanium silicide particles is 5 μm or less.

[0022] In the circuit board 1 of this embodiment, the titanium silicide particles 313 are located on the conductive portion 21 side within the joint portion 31. Specifically, as shown in Figure 3, the titanium silicide particles 313 are dispersed in the titanium-containing layer 312 at a distance from the titanium nitride layer 311. For example, when viewing the titanium silicide particles 313 from the titanium nitride layer 311 and the conductive portion 21, as shown in Figure 3, the distance from the titanium silicide particles 313 to the titanium nitride layer 311 is often longer than the distance from the titanium silicide particles 313 to the conductive portion 21.

[0023] In the circuit board 1 of this embodiment, the area in the joint 31 where titanium silicide particles 313 exist is within a range where the distance Dcp from one main surface 10a of the ceramic substrate 10 is within 3 μm. That is, the titanium silicide particles 313 are located within a range of 3 μm from one main surface 10a of the ceramic substrate 10 within the joint 31. The distance Dcp is measured using a linear virtual line VL along the stacking direction (z-axis direction) of the ceramic substrate 10 and the conductive parts 21 and 22, as shown in Figure 3. One end VL1 of the virtual line VL is on one main surface 10a of the ceramic substrate 10, and the other end VL2 overlaps with the far end E313 of the titanium silicide particles 313, which is the position furthest from one main surface 10a of the ceramic substrate 10. The distance Dcp is the distance between the one end VL1 and the other end VL2 of the virtual line VL.

[0024] In the circuit board 1 of this embodiment, the thermal conductivity between the conductive part 21 and the conductive part 22 is 170 W / (m·K) or higher. Specifically, when the relationship between the thickness of the conductive part 21, the thickness of the ceramic substrate 10, and the thickness of the conductive part 22 is, for example, 0.5:0.32:0.5, the thermal conductivity of the circuit board 1 is 170 W / (m·K) or higher. As a result, even if the power semiconductor elements 5 arranged on both sides of the circuit board 1 generate a large amount of heat, the heat can be released to the outside through the ceramic substrate 10.

[0025] Next, the manufacturing method of the circuit board 1 will be described. In the manufacturing method of the circuit board 1, a ceramic substrate 10 is first made. In the manufacturing of the ceramic substrate 10, the raw material powder of the silicon nitride sintered body is weighed. The raw material powder of the silicon nitride sintered body may be oxides, carbonates, hydroxides, nitrides, etc. of each element contained in the silicon nitride sintered body. In addition to silicon nitride, the raw material powder of the silicon nitride sintered body may include, for example, magnesium carbonate, calcium carbonate, yttrium oxide, etc. Ethanol is added to these raw material powders, and a slurry is made by wet mixing and grinding using a ball mill, for example, at 40 rpm to 100 rpm for 6 to 60 hours. The prepared slurry is dried using a water bath or a spray dryer to produce a mixed powder.

[0026] In the fabrication of the ceramic substrate 10, the mixed powder is then filled into a mold and molded by uniaxial pressing at a pressure of, for example, 30 MPa. After that, a molded body is produced by performing CIP (cold isohydrostatic pressing) at a pressure of, for example, 100 MPa to 150 MPa. The fabricated molded body is then placed in a silicon carbide mold coated with BN on the inside and fired in a nitrogen atmosphere of 0.9 MPa at a maximum temperature of 1800°C to 1900°C for 5 to 30 hours to produce a silicon nitride sintered body. The ceramic substrate 10 is manufactured by processing the outer shape of the produced silicon nitride sintered body to a predetermined shape, for example, a flat plate shape and thickness. Processing can be done by cutting, grinding, polishing, etc. It is desirable that the surface roughness Ra of the surface on which the conductive parts 21 and 22 of the ceramic substrate 10 are arranged be polished to 0.5 μm or less.

[0027] In the manufacturing method of the circuit board 1, separate from the manufacturing of the ceramic substrate 10, a plate material of a predetermined thickness that will become the conductive parts 21 and 22 is prepared. The plate material that will become the conductive parts 21 and 22 may be formed from a metal containing copper or a metal mainly composed of copper, in addition to oxygen-free copper. Next, a metal film mainly composed of titanium that will become the joint parts 31 and 32 is formed on the surface of each of the two plate materials that will become the conductive parts 21 and 22, or on each of the pair of main surfaces 10a and 10b of the ceramic substrate 10. The metal film can be manufactured by sputtering, vapor deposition, plating, etc. The thickness of the metal film is preferably 3 μm or less. It is desirable to remove organic matter such as oil adhering to the surface of the ceramic substrate 10 and the plate material before forming the metal film. It is thought that by sufficiently removing organic matter from the surface, the gas generated during heat treatment is suppressed and contributes to the diffusion of copper that forms the conductive parts 21 and 22. The process of removing organic matter can be carried out by, for example, degreasing, washing with water, washing with acetone, etc. These steps may be combined, or a surface drying step may be included. Furthermore, if a thin titanium metal foil with a thickness of 3 μm or less is available, the metal foil may be attached to the surfaces of the two plate materials that will form the conductive parts 21 and 22, or to the pair of main surfaces 10a and 10b of the ceramic substrate 10. Even in this case, a step to remove organic matter and a step to dry the surface may be included before attaching the metal foil.

[0028] Next, the plate materials that will become the conductive parts 21 and 22 and the ceramic substrate 10 are laminated together such that a metal film is sandwiched between the plate materials that will become the conductive parts 21 and 22 and the ceramic substrate 10. If metal foil is available, the plate material that will become the conductive part 21, one of the two metal foils, the ceramic substrate 10, the other of the two metal foils, and the plate material that will become the conductive part 22 are laminated together in that order. The laminate formed by laminating the plate materials that will become the conductive parts 21 and 22 and the ceramic substrate 10 is then subjected to HP treatment (hot pressing treatment) or HIP treatment (hot isostatic pressing treatment) to bond the plate materials that will become the conductive parts 21 and 22 and the ceramic substrate 10. The conditions for HP treatment are, for example, a pressure of 5 MPa or more and 30 MPa or less, a maximum temperature of 850°C or more and 1050°C or less, and a maximum temperature holding time of 10 minutes or more and 2 hours or less. At this time, titanium silicide, a by-product of the titanium nitride layer formed at each of the joint portions 31 and 32, is formed in a liquid phase. As a result, the liquid titanium silicide flows and fills the microscopic irregularities formed on the surface of the ceramic substrate 10. This improves the bonding strength between the ceramic substrate 10 and the conductive portions 21 and 22 via the joint portions 31 and 32. However, the manufacturing method of the circuit board 1 is not limited to these methods.

[0029] Next, we will explain the results of the circuit board evaluation test. In this evaluation test, for each of the seven types of circuit boards (hereinafter simply referred to as "samples") with different methods of forming the joints, we measured the numerical values ​​related to the titanium silicide particles contained in the joints, as well as the relationship between mechanical strength and thermal properties.

[0030] Figure 4 illustrates the results of the evaluation test of the circuit board. Each of the samples 1 to 7 shown in Figure 4 was manufactured by a method corresponding to the manufacturing method of the circuit board 1 of this embodiment. Specifically, for samples 1 to 5, a titanium film corresponding to the joint portions 31 and 32 of the circuit board 1 was sputtered onto both sides of a 0.32 mm thick ceramic substrate made of silicon nitride to the "formed film thickness" shown in Figure 4. Then, a laminate consisting of a 0.5 mm thick copper plate, a ceramic substrate, and another 0.5 mm thick copper plate was laminated in that order via the titanium film and joined by hot pressing. The pressure during the hot pressing process was 10 MPa, the maximum temperature was 1000°C, and the maximum temperature holding time was the "joining time" shown in Figure 4. Sample 6 was constructed by attaching titanium foil (thickness: 1 μm) to both sides of a 0.32 mm thick ceramic substrate made of silicon nitride, then creating a laminate in the same manner as Samples 1 to 5, and bonding it by hot pressing (pressure: 10 MPa, maximum temperature: 1000 °C, maximum temperature holding time: 0.5 hours). Sample 7 was constructed by applying a brazing material (thickness: approximately 30 μm) containing Cu, Ag, and Ti to both sides of a 0.32 mm thick ceramic substrate made of silicon nitride, then creating a laminate in the same manner as Samples 1 to 5, and bonding it by hot pressing.

[0031] The "Lm (μm)" shown in Figure 4 represents the absolute maximum length of the titanium silicide particles contained in the junction. The "Lm (μm)" value is the maximum length of the titanium silicide particles measured using cross-sectional SEM images for each of the seven types of samples. When multiple titanium silicide particles are present in the cross-sectional SEM image, the results of measuring the maximum length of each of the multiple titanium silicide particles are shown. For example, in sample 1, the maximum length of the titanium silicide particles is dispersed within the range of 2.2 μm to 5 μm, and in sample 3, the maximum length of the titanium silicide particles is 0.1 μm.

[0032] The "Dcp (μm)" shown in Figure 4 indicates the range in which titanium silicide particles are present in the junction. "Dcp (μm)" is the distance from the junction side of the ceramic substrate, measured using cross-sectional SEM images taken for each of the seven types of samples. "Dcp (μm)" was measured using the same method as the measurement method for the range in which titanium silicide particles 313 are present in the circuit board 1 of this embodiment.

[0033] The value "Sp (kN / m)" shown in Figure 4 represents the peel strength of the sample. For the measurement of "Sp (kN / m)", for each of the seven types of samples, first, a slit with a peel width of 5 mm was made in a copper plate bonded to a ceramic substrate, then a portion of the edge of the copper plate was peeled off, and the plate was clamped in a tensile testing machine and pulled vertically to measure the load value when the copper plate was peeled off. Next, the measured load value was divided by the measured peel width and averaged to calculate the value.

[0034] The value "K(W / (m·K))" shown in Figure 4 represents the thermal conductivity of the sample. For the measurement of "K(W / (m·K))", for each of the seven types of samples, a measurement sample with sides of 10 mm was first prepared, coated with blackbody spray, and then the thermal diffusivity and specific heat were measured using the flash method. Next, the thermal conductivity was calculated as the product of the thermal diffusivity, specific heat, and density, using the density measured separately. A measurement sample may also be prepared using a semiconductor package from which the semiconductor elements have been removed.

[0035] As shown in Figure 4, samples 1 to 5, where "Lm (μm)" is 5 μm or less, were found to have higher peel strength ("Sp (kN / m)") and thermal conductivity ("K (W / (m·K))") compared to sample 6, which used titanium foil. In other words, it was confirmed that by making the absolute maximum length Lm of the titanium silicide particles contained in the joint 5 μm or less, the bonding strength between the conductive part and the ceramic substrate can be improved, as well as the thermal conductivity can be improved. Furthermore, samples 1 to 5 were found to have higher thermal conductivity ("K (W / (m·K))") compared to sample 7, which used brazing material.

[0036] As shown in Figure 4, among samples 1 to 5, samples 2 to 4, where "Lm (μm)" is between 0.1 μm and 1 μm, showed particularly high thermal conductivity ("K (W / mK)"). Furthermore, among samples 1 to 5, sample 4, with a sputter film thickness of 0.2 μm (Dcp = 0.9 μm), showed relatively low peel strength but relatively high thermal conductivity. On the other hand, sample 5, with a sputter film thickness of 1.0 μm (Dcp = 3.0 μm), showed relatively high peel strength but relatively low thermal conductivity. In other words, it was confirmed that the balance between peel strength and thermal conductivity can be adjusted by changing the sputter film thickness.

[0037] Figure 5 is a first cross-sectional SEM image of a sample used in the evaluation test of the circuit board. Figure 5 shows a cross-sectional SEM image S3 of sample 3. The cross-sectional SEM image S3 shown in Figure 5 is numbered according to the parts of the circuit board 1 of this embodiment. The boundary between the conductive part 21 and the junction part 31 is indicated by a dashed line BL. As shown in Figure 5, it was confirmed that the junction part 31 of sample 3 contains multiple titanium silicide particles 313. The absolute maximum length Lm of the titanium silicide particles 313 contained in the junction part 31 of sample 3 is 0.1 μm (see scale shown in Figure 5). In sample 3, it can be seen that the multiple titanium silicide particles 313 are dispersed at a position relatively far from the titanium nitride layer 311.

[0038] Figure 6 is a second cross-sectional SEM image of a sample used in the evaluation test of the circuit board. Figure 6 shows a cross-sectional SEM image of sample 6. In the cross-sectional SEM image S6 shown in Figure 6, the ceramic substrate 10c, the conductive part 21c, and the joint part 31c are shown as parts corresponding to each part of the circuit board 1 of this embodiment. The joint part 31c contains a titanium nitride layer 311c, a titanium-containing layer 312c, and titanium silicide particles 313c. The boundary between the conductive part 21c and the joint part 31c is indicated by the dashed line BL. In sample 6, the titanium silicide particles 313c are formed on the ceramic substrate 10c, and it can be seen that the absolute maximum length Lm is 10 μm or more (see scale shown in Figure 6).

[0039] As described above, according to the circuit board 1 of this embodiment, the joint portion 31 that joins the ceramic substrate 10 and the conductive portion 21 contains titanium silicide particles 313, and the joint portion 32 that joins the ceramic substrate 10 and the conductive portion 22 also contains titanium silicide particles. The absolute maximum length Lm of the titanium silicide particles contained in the joint portions 31 and 32 is 5 μm or less, which is relatively small. As a result, the titanium silicide particles, which have relatively low mechanical strength, can be dispersed as fine particles within the joint portions 31 and 32, thereby improving the bonding strength between the conductive portions 21 and 22 and the ceramic substrate 10 compared to cases where the joint portions contain relatively large titanium silicide particles.

[0040] Furthermore, according to the circuit board 1 of this embodiment, the titanium silicide particles contained in the joints 31 and 32 have an absolute maximum length Lm of 0.1 μm and are further dispersed as fine particles within the joints 31 and 32. As a result, localized heat concentration is suppressed, and the heat resistance of the circuit board 1 can be improved.

[0041] Furthermore, in the circuit board 1 of this embodiment, titanium silicide particles 313, which have relatively low thermal conductivity, are dispersed as fine particles in the joint portions 31 and 32. As a result, the thermal conductivity of the circuit board 1 can be improved compared to the case where the titanium silicide particles 313 are relatively large.

[0042] Furthermore, according to the circuit board 1 of this embodiment, the absolute maximum length Lm of the titanium silicide particles 313 is 0.1 μm or more and 1 μm or less, and they are even smaller fine particles. This makes it possible to further improve the bonding strength between the conductive parts 21, 22 and the ceramic substrate 10.

[0043] Furthermore, according to the circuit board 1 of this embodiment, the joints 31 and 32 do not contain either aluminum, which has relatively low thermal conductivity, or silver, which is expensive. This makes it possible to suppress the decrease in thermal conductivity of the joints 31 and 32, and to reduce the manufacturing cost of the circuit board 1.

[0044] Also, according to the circuit board 1 of the present embodiment, titanium silicide particles with relatively low mechanical strength are located on the conductive part 21 side inside the joint part 31 and on the conductive part 22 side inside the joint part 32. That is, the titanium silicide particles are dispersed away from the titanium nitride layer located on the ceramic substrate 10 side in the joint part. As a result, stress concentration can be suppressed more effectively than when the titanium silicide particles are gathered in contact with the titanium nitride layer, so that the bonding strength between the conductive parts 21 and 22 and the ceramic substrate 10 can be further improved.

[0045] Also, according to the circuit board 1 of the present embodiment, since the circuit board 1 including the two conductive parts 21 and 22 with the ceramic substrate 10 sandwiched therebetween has relatively high thermal conductivity in the two conductive parts 21 and 22, the heat of the power semiconductor device 5 connected to the conductive part 21 can be efficiently transmitted to the conductive part 22.

[0046] Also, according to the semiconductor package P1 of the present embodiment, the semiconductor package P1 can efficiently release the heat of the power semiconductor device 5 with a relatively large calorific value by means of the circuit board 1.

[0047] <Modifications of the Present Embodiment> The present invention is not limited to the above-described embodiment, and can be implemented in various aspects without departing from the gist thereof. For example, the following modifications are possible.

[0048] [Modification 1] In the above-described embodiment, the absolute maximum length of the titanium silicide particles is set to 0.1 μm, which is 0.1 μm or more and 1 μm or less. The absolute maximum length of the titanium silicide particles is not limited to 0.1 μm or more and 1 μm or less, and may be 5 μm or less.

[0049] [Modification 2] In the above-described embodiment, it is assumed that the joint part does not contain either aluminum or silver. The joint part may contain at least one of aluminum and silver.

[0050] [Modification 3] In the above embodiment, the joint has a titanium nitride layer on the ceramic substrate side, and the titanium silicide particles are located on the conductive side within the joint. However, the configuration of the joint and the position of the titanium silicide particles in the joint are not limited to these. By positioning the titanium silicide particles on the conductive side in the joint, stress concentration on the ceramic substrate can be suppressed.

[0051] [Modification 4] In the above embodiment, the titanium silicide particles were positioned within a range of 3 μm from the ceramic substrate in the bonding area. The position of the titanium silicide particles in the bonding area is not limited to this.

[0052] [Modification 5] In the above embodiment, the circuit board is provided with two conductive parts on a single ceramic substrate. The configuration of the circuit board is not limited to this. A configuration in which one conductive part is arranged on a single ceramic substrate is also possible.

[0053] [Modification 6] In the above embodiment, the semiconductor package comprises a circuit board and a power semiconductor element connected to the conductive part. The electronic component connected to the conductive part of the circuit board is not limited to a power semiconductor element.

[0054] The embodiments of this specification have been described above based on the embodiments and modifications described above. The embodiments described above are for the purpose of facilitating understanding of this specification and do not limit it. This specification may be modified and improved without departing from its spirit and the scope of the claims, and equivalents thereof are included in this specification. Furthermore, any technical features that are not described as essential in this specification may be deleted as appropriate.

[0055] <Application Example 1> A circuit board comprising: a ceramic substrate mainly composed of silicon nitride; a conductive part formed of a conductive material and connected to a semiconductor element; and a joint containing titanium that joins the ceramic substrate and the conductive part, wherein the joint contains titanium silicide particles, and the absolute maximum length of the titanium silicide particles is 5 μm or less. <Application Example 2> The circuit board according to Application Example 1, wherein the absolute maximum length of the titanium silicide particles is 0.1 μm or more and 1 μm or less. <Application Example 3> The circuit board according to Application Example 1 or Application Example 2, wherein the joint does not contain either aluminum or silver. <Application Example 4> The circuit board according to any one of Application Examples 1 to 3, wherein the joint has a titanium nitride layer on the ceramic substrate side and titanium silicide particles on the conductive part side. <Application Example 5> A circuit board according to any one of Application Examples 1 to 4, wherein the ceramic substrate has a pair of main surfaces, the conductive portion has a first conductive portion disposed on one of the pair of main surfaces of the ceramic substrate and a second conductive portion disposed on the other of the pair of main surfaces of the ceramic substrate, the joint portion has a first joint portion that joins the ceramic substrate and the first conductive portion and a second joint portion that joins the ceramic substrate and the second conductive portion, and the thermal conductivity between the first conductive portion and the second conductive portion is 170 W / (m·K) or more. <Application Example 6> A semiconductor package, comprising a circuit board according to any one of Application Examples 1 to 5 and a power semiconductor element connected to the conductive portion.

[0056] 1...Circuit board 5...Power semiconductor element 10...Ceramic substrate 10a...Main surface 21, 22...Conductive part 31, 32...Bond part 311...Titanium nitride layer 313...Titanium silicide particles Lm...Absolute maximum length P1...Semiconductor package

Claims

1. A circuit board comprising: a ceramic substrate mainly composed of silicon nitride; a conductive portion formed of a conductive material and connected to a semiconductor element; and a bonding portion containing titanium and joining the ceramic substrate and the conductive portion, wherein the bonding portion contains titanium silicide particles, and the absolute maximum length of the titanium silicide particles is 5 μm or less.

2. A circuit board according to claim 1, characterized in that the absolute maximum length of the titanium silicide particles is 0.1 μm or more and 1 μm or less.

3. A circuit board according to claim 1 or claim 2, characterized in that the joint portion does not contain either aluminum or silver.

4. A circuit board according to claim 1 or claim 2, characterized in that the joint portion has a titanium nitride layer on the ceramic substrate side and titanium silicide particles on the conductive portion side.

5. A circuit board according to claim 1 or claim 2, wherein the ceramic substrate has a pair of main surfaces, the conductive portion has a first conductive portion disposed on one of the pair of main surfaces of the ceramic substrate and a second conductive portion disposed on the other of the pair of main surfaces of the ceramic substrate, the joint portion has a first joint portion that joins the ceramic substrate and the first conductive portion and a second joint portion that joins the ceramic substrate and the second conductive portion, and the thermal conductivity between the first conductive portion and the second conductive portion is 170 W / (m·K) or more.

6. A semiconductor package comprising a circuit board according to claim 1 or claim 2, and a power semiconductor element connected to the conductive portion.

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