Quantum semiconductor device and quantum computer
By introducing a cavity or increasing the distance between components in quantum semiconductor devices, the cracking issue from bumps is resolved, maintaining reliability and stability in quantum computers operating at cryogenic temperatures.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- HITACHI LTD
- Filing Date
- 2025-12-02
- Publication Date
- 2026-07-02
AI Technical Summary
Existing quantum semiconductor devices face reliability issues due to cracking of semiconductor elements originating from bumps at extremely low temperatures, which are critical for quantum computers operating in cryogenic environments.
Incorporating a cavity between the semiconductor element and the resin, or increasing the distance between the semiconductor element and the substrate, to mitigate the tensile stress and compressive forces that cause cracking, using materials like gold or silver for bumps and silicon-based or epoxy-based resins for stability.
Prevents cracking of semiconductor elements by reducing vertical load and stress at low temperatures, ensuring reliable operation and stability of quantum computers.
Smart Images
Figure JP2025041926_02072026_PF_FP_ABST
Abstract
Description
Quantum Semiconductor Device and Quantum Computer
[0001] The present invention relates to a quantum semiconductor device and a quantum computer.
[0002] A flip-chip mounting method in which an IC chip is mounted face-down on a wiring board is well known, and there are flip-chip mounted semiconductor devices formed by the flip-chip mounting method.
[0003] By the way, in a quantum computer (for example, a silicon quantum computer) capable of large-scale integration, a quantum chip (for example, a CMOS-operated quantum chip) at an extremely low temperature (4K / 0.1K) suitable for large-scale integration may use flip-chip mounting for proximity to a wiring board (interposer chip). In such a quantum computer operating at an extremely low temperature, reliability of chip mounting at the extremely low temperature is particularly required. A quantum computer is a computer that manipulates data using quantum mechanical phenomena (quantum bits).
[0004] As related art, for example, there is Patent Document 1. Patent Document 1 discloses a structure including a layer for relaxing stress applied from a resin (underfill) to a semiconductor element (LSI). Further, Patent Document 1 discloses a quantum device as an example of a semiconductor element.
[0005] US2021 / 0066882A1
[0006] In a semiconductor element (quantum chip) of a quantum computer operating at an extremely low temperature (4K / 0.1K) suitable for large-scale integration, flip-chip mounting may be performed for proximity to a substrate (interposer). In this case, the quantum computer is left at an extremely low temperature of 0.1K and 4K in a dilution refrigerator. Alternatively, the quantum computer is placed under repeated thermal cycles between an extremely low temperature and room temperature.
[0007] Under such circumstances, reliability of flip-chip mounting at an extremely low temperature is required. Specifically, a highly reliable bond between the substrate and the semiconductor element is required.
[0008] Patent Document 1 discloses a structure that includes a layer of resin (underfill) to relieve stress on a semiconductor element. However, Patent Document 1 does not address the problem of cracking of the semiconductor element originating from bumps.
[0009] The objective of this invention is to prevent cracking of semiconductor elements in quantum semiconductor devices that originates from bumps.
[0010] A quantum semiconductor device according to one aspect of the present invention is characterized by comprising: a semiconductor element; a substrate; a first electrode disposed on the semiconductor element; a second electrode disposed on the substrate; a bump disposed between the first electrode and the second electrode; a resin disposed around the bump; and a cavity disposed between the semiconductor element and the resin.
[0011] According to one aspect of the present invention, it is possible to prevent cracking of semiconductor elements that originate from bumps in a quantum semiconductor device.
[0012] This figure shows the challenges of flip-chip mounting at low temperatures. This is a cross-sectional view of the semiconductor device of Example 1. This is a plan view of the semiconductor device of Example 2. This figure shows the configuration of a quantum computer.
[0013] Flip-chip mounting is a method of connecting semiconductor devices to a substrate. In this method, the electrodes of the semiconductor device are mounted inverted relative to the substrate. Bumps that act as electrodes are formed on the semiconductor device. Then, the chip is flipped over and placed on the substrate, and the bumps are made to directly contact the wiring on the substrate to connect them. Next, the substrate and semiconductor device are firmly bonded by heating in a reflow oven to melt the solder bumps.
[0014] Flip-chip packaging enables high-density mounting, reducing wiring delays and resistance, and improving signal processing speed. The bumps act as heat conduction paths, allowing for efficient heat dissipation from semiconductor elements, thus stabilizing performance. For these reasons, flip-chip packaging can be applied to some components of quantum computers. However, because the structure and requirements of quantum computers differ significantly from those of conventional semiconductor elements, quantum computers may be subject to their own unique constraints.
[0015] Applying flip-chip packaging to quantum computers makes it possible to shorten the wiring for controlling qubits and integrate them at high density. Furthermore, since qubits and other components operate at extremely low temperatures, cooling is crucial. The bumps in the flip-chip packaging function as heat dissipation paths, helping to improve cooling efficiency. Embodiments of the present invention prevent cracking of semiconductor elements at extremely low temperatures (4K / 0.1K) due to changes in the shape of the resin (underfill) between bumps caused by tensile stress on the sides of the bumps.
[0016] First, referring to Figure 1, we will explain the challenges of quantum semiconductor devices (quantum devices) that operate at extremely low temperatures.
[0017] The quantum semiconductor device 10 in Figure 1 comprises a semiconductor element 11 (chip), a substrate 12 (interposer), bumps 13 disposed between the semiconductor element 11 and the substrate 12, and a resin (underfill) 14 disposed around the bumps 13.
[0018] As shown in Figure 1, when left at low temperatures, the tensile stress applied to the sides of the bumps 13 generates compressive stress A in the resin (underfill) 14 between the bumps 13 near the center of the bump height. This compressive stress A causes a vertical load (stress) B to be generated between the bumps 13. Specifically, the resin 14 sealed between the bumps 13 is compressed by the compressive stress A of the bumps 13 at extremely low temperatures, resulting in a vertical load (stress) B, which causes damage to the semiconductor element 11 (chip) or substrate 12 (interposer).
[0019] In this embodiment of the present invention, we focus on the problem that cracks in the semiconductor element 11 occur starting from the bumps 13 described above, and aim to prevent cracks in the semiconductor element 11 that occur starting from the bumps 13. Specifically, we prevent cracks in the semiconductor element 11 by reducing the load (stress) B generated in the vertical direction between the bumps 13 at extremely low temperatures.
[0020] The following describes an embodiment with reference to the drawings.
[0021] Referring to Figure 2, the quantum semiconductor device of Example 1 will be described. In Example 1, a cavity 27 is placed between the semiconductor element 21 and the resin 24 to prevent cracking of the semiconductor element 11 that originates from the bump 13.
[0022] The quantum semiconductor device 20 of Example 1 includes a semiconductor element 21, a substrate 22, a first electrode 25 disposed on the semiconductor element 21, a second electrode 26 disposed on the substrate 22, a bump 23 disposed between the first electrode 25 and the second electrode 26, a resin 24 disposed around the bump 23, and a cavity 27 disposed between the semiconductor element 21 and the resin 24. By having such a cavity 27, the load (stress) generated in the longitudinal direction between the bumps 23 at extremely low temperatures is reduced, preventing cracking of the semiconductor element 21 (see Figure 1).
[0023] Here, the semiconductor element 21 is not in contact with the resin 24. The height of the resin 24 is preferably 3 / 4 or less of the height (a) of the bump 23. The distance (M) between the semiconductor element 21 and the resin 24 is preferably 1 / 4 or more of the height (a) of the bump.
[0024] The semiconductor element 21 is, for example, a silicon quantum semiconductor element. The bump 23 is made of, for example, gold (Au). The semiconductor element 21 operates in an extremely low temperature state in the range of 0.1K to 20K (preferably 0.1K to 4K). An example of the semiconductor element 21 is disclosed, for example, in Japanese Patent Application Publication No. 2021-027142.
[0025] Gold (Au) is preferred for the bump 23 used in silicon quantum devices. Gold is resistant to oxidation and has high connection reliability, allowing for stable connections even in cryogenic environments. It also has excellent electrical properties and low contact resistance even at cryogenic temperatures. Alternatively, silver (Ag) can also be used. Silver (Ag) has very high conductivity and low contact resistance.
[0026] The materials used for bump 23 in silicon quantum devices are primarily selected for their high stability and reliable connectivity even in cryogenic environments. Other materials may be used in combination depending on the application and design requirements, but their selection should take into account mechanical stress and electrical properties in cryogenic environments.
[0027] Resin materials used in quantum devices are crucial for providing protection, insulation, and mechanical stability. These resin materials must meet the requirement for stability at extremely low temperatures so as not to affect the performance of qubits or quantum circuits. For example, silicon-based and epoxy-based materials are preferred. Silicon-based materials are highly flexible and easily absorb stress even in low-temperature environments. Epoxy-based materials have high mechanical strength and are stable even at low temperatures.
[0028] According to Example 1, by placing a cavity 27 between the semiconductor element 21 and the resin 24, it is possible to prevent cracking of the semiconductor element 11 that originates from the bump 13.
[0029] Referring to Figure 3, the quantum semiconductor device of Example 2 will be described. In Example 2, cracking of the semiconductor element 31 that originates from the bump 33 is prevented by increasing the distance (L) between the semiconductor element 31 and the substrate 32 during bonding. In that respect, it solves the same problem as Example 1 in that it prevents cracking of the semiconductor element 31 that originates from the bump 33.
[0030] The quantum semiconductor device 30 of Example 2 includes a semiconductor element 31, a substrate 32, a first electrode 35 disposed on the semiconductor element 31, a second electrode 36 disposed on the substrate 32, a bump 33 disposed between the first electrode 35 and the second electrode 36, and a resin 34 disposed around the bump 33. Here, the distance (L) between the semiconductor element 31 and the substrate 32 is 3 / 2 or more of the height (a) of the bump. By setting the distance (L) to be large in this way, the load (stress) generated in the vertical direction between the bumps 23 at extremely low temperatures is reduced, preventing cracking of the semiconductor element 21 (see Figure 1).
[0031] The first electrode 35, which is placed on the semiconductor element 31, protrudes from the surface facing the substrate 32, and it is preferable that the height of the first electrode 35 is 1 / 2 or more of the height (a) of the bump 33.
[0032] The second electrode 36, positioned on the substrate 32, protrudes from the surface facing the semiconductor element 31, and it is preferable that the height of the second electrode 36 is at least half the height (a) of the bump 33.
[0033] The first electrode 35, positioned on the semiconductor element 31, protrudes from the surface facing the substrate 32, and the second electrode 36, positioned on the substrate 32, protrudes from the surface facing the semiconductor element 31. In this case, it is preferable that the distance (L) between the semiconductor element 31 and the substrate 32 is at least twice the height (a) of the bump.
[0034] The semiconductor element 31 is, for example, a silicon quantum semiconductor element. The bump 33 is made of, for example, gold. The semiconductor element 31 operates in an extremely low temperature state within the range of 0.1K to 20K (preferably 0.1K to 4K). An example of the semiconductor element 31 is disclosed, for example, in Japanese Patent Application Publication No. 2021-027142.
[0035] Gold (Au) is preferred for the bump 33 used in silicon quantum devices. Gold is resistant to oxidation and has high connection reliability, allowing for stable connections even in cryogenic environments. It also exhibits excellent electrical properties and low contact resistance even at cryogenic temperatures. Alternatively, silver (Ag) can also be used. Silver (Ag) has very high conductivity and low contact resistance.
[0036] The materials used for bump 33 in silicon quantum devices are primarily selected for their high stability and reliable connectivity even in cryogenic environments. Other materials may be used in combination depending on the application and design requirements, but their selection should take into account mechanical stress and electrical properties in cryogenic environments.
[0037] Resin materials used in quantum devices are crucial for providing protection, insulation, and mechanical stability. These resin materials must meet the requirement for stability at extremely low temperatures so as not to affect the performance of qubits or quantum circuits. For example, silicon-based and epoxy-based materials are preferred. Silicon-based materials are highly flexible and easily absorb stress even in low-temperature environments. Epoxy-based materials have high mechanical strength and are stable even at low temperatures.
[0038] According to Example 2, by increasing the distance (L) between the semiconductor element 31 and the substrate 32 and bonding them together, it is possible to prevent cracking of the semiconductor element 31 that originates from the bump 33.
[0039] Referring to Figure 4, the configuration of the computer (quantum computer) in Example 3 will be described.
[0040] Figure 4 is similar to the configuration of a conventional computer, but is characterized by the inclusion of a quantum computing device 1000. The quantum computing device 1000 is a quantum computing device having either the quantum semiconductor device 20 of Example 1 (see Figure 2) or the quantum semiconductor device 30 of Example 2 (see Figure 3). Other general calculations are performed by the general computing device 2002.
[0041] The above configuration may be implemented as an integrated computer, or any part of it, such as the main memory 2001, general processing unit 2002, control unit 2003, auxiliary storage device 2004, input device 2005, output device 2006, etc., may be implemented using other computers connected via a network.
[0042] General operations are performed in the same procedure as in a normal computer. Data is exchanged between the main memory device 2001, which is the storage unit, and the general arithmetic unit 2002, which is the arithmetic unit, and the operations are advanced by repeating this. At that time, the control device 2003 commands the whole. The program executed by the general arithmetic unit 2002 is stored in the main memory device 2001, which is the storage unit. When the storage capacity of the main memory device 2001 is insufficient, the auxiliary storage device 2004, which is also a storage unit, is used. An input device 2005 is used for input of data, programs, etc., and an output device 2006 is used for output of results. The input device 2005 includes, in addition to a manual input device such as a keyboard, an interface for network connection. Also, this interface also serves as an output device.
[0043] Quantum operations are also performed in the same procedure. Data is exchanged between the main memory device 2001, which is the storage unit, and the quantum computing device 1000, which is the arithmetic unit, and the operations are advanced by repeating this. At that time, the control device 2003 commands the whole. The program executed by the quantum computing device 1000 is stored in the main memory device 2001, which is the storage unit.
[0044] The program is converted into a language used in the quantum computing device 1000 using the general arithmetic unit 2002 and stored in the main memory device 2001. When the storage capacity is insufficient, the auxiliary storage device 2004, which is also a storage unit, is used. This programmed program is sent from the main memory device 2001 to the quantum computing device 1000, and the control device 2003 sends a control signal to the quantum computing device 1000 according to the programmed program to execute the operation. The execution result of the quantum computing device 1000 is sent to the main memory device 2001 and post-processed by the general arithmetic unit 2002 as necessary.
[0045] As described above, the quantum computer of Example 3 includes a quantum computing device 1000 having a quantum semiconductor device and a control device 2003 that controls the quantum computing device 1000. The quantum semiconductor device may use either the quantum semiconductor device 20 (see FIG. 3) of Example 1 or the quantum semiconductor device 30 (see FIG. 3) of Example 2. The quantum computing device 1000 operates in an extremely low temperature state within the range of 0.1 K to 20 K.
[0046] According to the above embodiment, it is possible to prevent cracking of semiconductor elements that originate from bumps in a quantum semiconductor device.
[0047] In this example, to prevent cracking of the semiconductor element originating from a bump, a cavity was placed between the semiconductor element and the resin, and in Example 2, the distance between the semiconductor element and the substrate was set to be large. However, the present invention is not limited to the above structures, and other structures may be adopted as long as they can prevent cracking of the semiconductor element originating from a bump. In other words, it is sufficient to have a means to prevent cracking of the semiconductor element originating from a bump.
[0048] 10 Quantum semiconductor device 11 Semiconductor element 12 Substrate 13 Bump 14 Resin 20 Quantum semiconductor device 21 Semiconductor element 22 Substrate 23 Bump 24 Resin 25 Electrode 26 Electrode 27 Cavity 30 Quantum semiconductor device 31 Semiconductor element 32 Substrate 33 Bump 34 Resin 35 Electrode 36 Electrode
Claims
1. A quantum semiconductor device comprising: a semiconductor element; a substrate; a first electrode disposed on the semiconductor element; a second electrode disposed on the substrate; a bump disposed between the first electrode and the second electrode; a resin disposed around the bump; and a cavity disposed between the semiconductor element and the resin.
2. The quantum semiconductor device according to claim 1, characterized in that the semiconductor element is not in contact with the resin.
3. The quantum semiconductor device according to claim 1, characterized in that the height of the resin is 3 / 4 or less of the height of the bump.
4. The quantum semiconductor device according to claim 1, characterized in that the distance between the semiconductor element and the resin is 1 / 4 or more of the height of the bump.
5. The quantum semiconductor device according to claim 1, characterized in that the semiconductor element is a silicon quantum semiconductor element and the bump is made of gold.
6. The quantum semiconductor device according to claim 1, characterized in that the semiconductor element operates in an extremely low temperature state within the range of 0.1K to 20K.
7. A quantum semiconductor device comprising: a semiconductor element; a substrate; a first electrode disposed on the semiconductor element; a second electrode disposed on the substrate; a bump disposed between the first electrode and the second electrode; and a resin disposed around the bump, wherein the distance between the semiconductor element and the substrate is 3 / 2 or more of the height of the bump.
8. The quantum semiconductor device according to claim 7, characterized in that the first electrode arranged on the semiconductor element protrudes from the surface facing the substrate, and the height of the first electrode is 1 / 2 or more of the height of the bump.
9. The quantum semiconductor device according to claim 7, characterized in that the second electrode disposed on the substrate protrudes from the surface facing the semiconductor element, and the height of the second electrode is 1 / 2 or more of the height of the bump.
10. The quantum semiconductor device according to claim 7, characterized in that the first electrode disposed on the semiconductor element protrudes with respect to the surface facing the substrate, the second electrode disposed on the substrate protrudes with respect to the surface facing the semiconductor element, and the distance between the semiconductor element and the substrate is at least twice the height of the bump.
11. The quantum semiconductor device according to claim 7, characterized in that the semiconductor element is a silicon quantum semiconductor element and the bump is made of gold.
12. The quantum semiconductor device according to claim 7, characterized in that the semiconductor element operates in an extremely low temperature state within the range of 0.1K to 20K.
13. A quantum computer comprising a quantum computing device having a quantum semiconductor device and a control device for controlling the quantum computing device, wherein the quantum semiconductor device comprises: a semiconductor element, a substrate, a first electrode disposed on the semiconductor element, a second electrode disposed on the substrate, a bump disposed between the first electrode and the second electrode, a resin disposed around the bump, and a cavity disposed between the semiconductor element and the resin.
14. The quantum computer according to claim 13, characterized in that the height of the resin is 3 / 4 or less of the height of the bump.
15. The quantum computer according to claim 13, characterized in that the quantum computing device operates in an extremely low temperature state within the range of 0.1K to 20K.