Method for assessing a thermal path, and electronic device

Abstract

The invention relates to an electronic device, in particular an electronic device having an integrated structure for assessing a thermal path within the electronic device during the intended use thereof. The electronic device comprises an electronic component, optionally an element adjoining the electronic component, in particular a support substrate or a submount, and a first conductor track and a second conductor track, each of which has a first end and an opposite second end. The first and the second conductor track each extend from a measurement plane in the direction of a reference plane, and the second ends of the first and the second conductor track are conductively connected to one another on the reference plane. The measurement plane or the reference plane is situated on the upper face of the electronic component, and the measurement plane is situated at a distance from the reference plane. The first ends of the first and the second conductor track are electrically insulated from one another on the measurement plane and are designed to be able to detect, on the conductor tracks, a voltage dropping across the first and second conductor tracks. The first conductor track consists of a first electrically conductive material, and the second conductor track consists of a second electrically conductive material which differs from the first.

Description

[0001] 2024PF01021

[0002] 1

[0003] METHOD FOR ASSESSING A THERMAL PATHWAY AND ELECTRONIC DEVICE

[0004] The present application claims priority over German patent application No. 10 2025 101 427 .2 of 16 January 2025, the disclosure content of which is hereby incorporated into the present application by reference.

[0005] The present invention relates to a method for evaluating a thermal path within an electronic component or from an electronic component to an element adjacent to the electronic component, in particular by determining a temperature difference between two measurement points subject to complaint using the Seebeck effect. Furthermore, the present invention relates to a corresponding electronic device with an integrated evaluation of a thermal path within an electronic component or from an electronic component to an element of the electronic device adjacent to the electronic component.

[0006] Background

[0007] Thermal paths are of central importance for the performance and lifetime of modern electronic components, especially in high-power applications such as lasers mounted on a submount, or chips and processors with high thermal loads.

[0008] The quality of the thermal path directly influences the ability of the electronic component to efficiently dissipate generated heat and thus avoid thermal overload. Deficiencies in the thermal path can occur both within the component itself, e.g., due to material inhomogeneities within the component, and at the interconnects between the component and adjacent heat dissipation structures. Such weaknesses lead to inefficient heat dissipation, which can significantly impair the functionality and lifespan of the components. 2024PF01021

[0009] 2

[0010] However, currently available methods for assessing thermal paths have significant limitations. For example, common methods such as ultrasonic measurements offer the possibility of detecting material defects, but the resolution is insufficient at very small dimensions.

[0011] 5 Thermographic methods, in turn, reach their functional limits when dealing with metallic surfaces, such as those used in many electronic components and heat dissipation structures.

[0012] Therefore, there is a need to provide an improved or alternative method for assessing a thermal path that addresses at least one of the aforementioned problems. Simultaneously, there is a need for an electronic device that enables a precise, reliable, and easy-to-perform assessment of a thermal path in order to identify weaknesses in the thermal path at an early stage.

[0013] Summary of the invention

[0014] This need is met by an electronic device as described in claim 1. Claim 22 describes the features of a method according to the invention for evaluating a thermal path. Further embodiments are the subject of the dependent claims.

[0015] The core idea of ​​the invention is to utilize the Seebeck effect to realize a relative measurement of a temperature difference between a top surface of an electronic component and a layer exposed to it, wherein the spaced-away layer lies within the electronic component or on or in an element adjacent to the electronic component (in the case of a laser chip, for example, between the top surface of the laser chip and a layer within the laser chip or between the top surface of the laser chip and a substrate layer on which the laser chip is arranged). For this purpose, at least two materials – with sufficiently different Seebeck coefficients – are incorporated into or onto the structure of the electronic component.

[0016] 5 applied. These materials are bonded alternately to each other on the top surface or the surface under complaint. By imprinting a quantity of heat on one of the top surfaces of the electronic component 2024PF01021

[0017] 3

[0018] or the plane affected by it and a subsequent (time) resolved measurement of the Seebeck voltage drop across the two different materials, it is possible to draw conclusions about the temperature difference between the top of the electronic component and the plane affected by it, and thus about the thermal path between the top of the electronic component and the plane affected by it.

[0019] According to the Seebeck effect, an electrical voltage of magnitude [insert magnitude here] arises in a circuit consisting of two different electrical conductor materials when there is a temperature difference between the contact points.

[0020]

[0021] Here, TI and T2 are the temperatures of the contacts between materials A and B. The Seebeck coefficients SA and SB are material constants that also depend on the temperature. The Seebeck coefficient has the dimension of an electrical voltage per unit temperature difference.

[0022] For Seebeck coefficient values ​​that can be considered constant over small temperature differences, the formula simplifies to

[0023]

[0024] The thermoelectric voltage always consists solely of the difference in the Seebeck coefficients. The typical magnitude of this difference for metals at room temperature is around 10 pV / °C.

[0025] To maximize the Seebeck effect, for example, a number n > 1 of material pairs can be used (connecting the material pairs in series to increase the measured thermoelectric voltage). Such temperature probes can be inserted to any desired depth within the electronic component, for example, using the so-called "Bosch process." Alternatively, metallization outside the electronic component, wire bonds, or classic contact vias are also conceivable. 2024PF01021

[0026] The proposed technical solution enables the direct measurement of a relative temperature difference between two selected planes / points within an electronic device, which at least comprises an electronic component that heats up during its intended use. To determine the heat generated, the invention does not rely on measuring changes in electrical and / or optical properties, for example, in the case of an optoelectronic component. Therefore, the proposed approach is not subject to manufacturing variations in the electronic component. Furthermore, the proposed approach is feasible for small geometric dimensions of the electronic component, unlike, for example, ultrasound methods, which are limited in their lateral resolution and therefore cannot be used, or can only be used inadequately, for increasingly smaller electronic or optoelectronic components.

[0027] According to at least one embodiment, an electronic device, in particular with an integrated structure for evaluating a thermal path within the electronic device during or in preparation for its intended use, comprises an electronic component, optionally an element adjacent to the electronic component, in particular a substrate or submount, and a first conductor and a second conductor, each with a first end and an opposite second end. The first and second conductors extend from a measurement plane towards a reference plane, and the second ends of the first and second conductors are conductively connected to each other in the reference plane. The measurement plane or the reference plane is arranged on a top surface of the electronic component and is spaced apart from the reference plane.The first ends of the first and second conductor tracks are electrically isolated from each other in the measuring plane and are designed to detect a voltage drop across them. The first conductor track consists of a first electrically conductive material, and the second conductor track consists of a second electrically conductive material that differs from the first. 2024PF01021.

[0028] Depending on several aspects, the electronic component can comprise a single component or an array of several electronic components that together define a thermal path. This could be a chip, processor, or other functional electronic component that heats up during operation, and for which heat dissipation plays a crucial role in its lifespan and functionality. Alternatively, the electronic component could be an optoelectronic component, such as a laser, LED, or laser diode array, which also heats up during operation and is thus subject to thermal stresses. Particularly in optoelectronic components, the quality of the thermal path can be critical for the stability of light emission and the efficiency of heat dissipation.However, the proposed device and method are equally applicable to all the aforementioned component types, and a precise evaluation of the thermal properties should be possible regardless of the specific function of the component.

[0029] In some aspects, the measurement plane is located on the top surface of the electronic component, while the reference plane is positioned at a different level within the component. This arrangement allows for the analysis of the thermal path or temperature differences within the component itself. Such a configuration is particularly advantageous for components with complex internal layer structures, such as processors, chips, or optoelectronic components, where thermal conductivity within the material layers is critical. Alternatively, the reference plane can be located in an intermediate layer or at a specific interconnection level within the component to focus the measurement on specific areas.The measuring plane preferably remains on the top side, since the voltage dropping across the first and second conductor tracks can be more easily detected on the top side compared to the interior of the electronic component.

[0030] 5

[0031] According to some aspects, the measurement plane or reference plane is located on the top side of the electronic component, and the other is the 2024PF01021

[0032] 6

[0033] The measurement plane and the reference plane are arranged on an element adjacent to the electronic component, such as a submount or a support substrate. This allows for the assessment of the thermal path from the component to a heat dissipation structure. Alternatively, the other of the measurement plane and the reference plane can also be positioned within or on another surface of the adjacent element, e.g., on a bottom surface of the adjacent element, to allow for an overall view of a longer thermal path.

[0034] In some respects, the measurement plane and the reference plane are arranged laterally spaced on the top surface of the electronic component. This allows for the measurement of the temperature difference within the surface, e.g., between a thermally active area and a less thermally stressed area on the top surface of the electronic component.

[0035] From several perspectives, the ends of the first and second conductor tracks are directly connected. This reduces the complexity of the device and ensures a reliable electrical connection between the two conductor tracks. In particular, a direct connection of the two conductor tracks can be advantageous because no other materials with a different Seebeck constant can influence the voltage measurement across the two conductor tracks. For example, such a connection can be achieved by directly bonding the materials together.

[0036] According to some aspects, the second ends of the first and second conductor tracks are directly connected and arranged or applied to the reference plane using a thermally conductive material, such as an adhesive or a sintered bond. This connection ensures, on the one hand, stable thermal coupling between the conductor tracks and the electronic component or the element adjacent to the electronic component. Alternatively, ceramic polymer materials can be used to accommodate specific properties such as insulation and / or flexibility when applying the connected conductor track ends to the reference plane. 2024PF01021

[0037] 7

[0038] From some perspectives, the conductor tracks are connected by a bonding layer, for example, a conductive bond pad made of one of the two conductor track materials. This bonding layer can be electrically isolated from the reference plane but thermally connected to it, and serves to ensure that the two conductor tracks are electrically connected to each other on / through the bonding layer.

[0039] Depending on several factors, the conductor tracks are connected with an additional, third material that differs from the materials of the two conductor tracks. This material can be specifically designed for thermal stability, electrical conductivity, and / or corrosion resistance. Alternatively, different coatings or alloys can be used for the connection. In particular, it can be advantageous if the additional material has a Seebeck constant that is similar to or lies between the Seebeck constants of the materials of the first and second conductor tracks.

[0040] According to some aspects, the first and second conductor tracks consist of a material such as Fe, Cu, Al, Ag, Au, Ti, Pt, Pd, Ni or an alloy of the aforementioned materials.

[0041] In some respects, the conductor tracks are formed by bond wires. This design allows for a flexible, simple, and above all, cost-effective connection of multiple components / elements between which a thermal path is to be evaluated. Special alloys can be used for bond wires, offering both high electrical conductivity and thermal stability. Specifically, bond wires can be used to connect the electronic component to an adjacent element in order to assess the thermal path between the component and the adjacent element.

[0042] According to some aspects, the conductive traces are realized by filled vias that pass through the material of the electronic component and / or through the material of the element adjacent to the electronic component. The vias can be created by processes such as the "Bosch process" and subsequently metallized. Al-2024PF01021

[0043] 8

[0044] Alternatively, the vias can remain hollow to increase their thermal capacity. The vias do not necessarily have to extend completely through the material of the electronic component and / or through the material of the element adjacent to the electronic component, but can also stop inside the component or the adjacent element, so that the reference plane is formed inside the component or the adjacent elements.

[0045] From some perspectives, the conductive traces extend to an embedded interconnect layer that forms the reference plane. This layer can be, for example, a structured contact layer embedded in the electronic component, a conductive film, or a specially applied metallization. The interconnect layer can, for instance, consist of a material that offers good electrical conductivity combined with good thermal conductivity. Alternatively, the embedded interconnect layer can simply be considered an etch stop layer used during the fabrication of the conductive traces. This layer is not itself electrically conductive but serves as a reference plane on which the conductive traces, particularly their endpoints, are directly electrically connected.

[0046] According to some considerations, the conductor tracks are electrically isolated from each other except for their connection at the other ends. This prevents short circuits and enables precise voltage measurement across the conductor tracks. Such isolation can be achieved through a spaced arrangement and / or by using insulating materials such as polymers, ceramic layers, or other dielectric materials.

[0047] According to some aspects, the conductor tracks are electrically isolated from the electronic component. This prevents short circuits and enables precise voltage measurement across the conductor tracks. Such isolation can be ensured by a spaced arrangement and / or by the use of insulating materials such as polymers, ceramic layers, or other dielectric materials. However, it can also be provided that the conductor tracks are insulated with 2024PF01021

[0048] 9

[0049] The potential side / electrode of the electronic component are electrically coupled, so that, for example, the conductor tracks are electrically coupled to a ground connection for operating the electronic component. This can result, for example, in simplified manufacturing due to a smaller number of conductor tracks or contact surfaces.

[0050] According to certain aspects, the electronic device comprises at least one additional first conductor and at least one additional second conductor, each extending from the measurement plane towards the reference plane. These additional conductors are alternately connected in series, thereby increasing the thermoelectric voltage measured across the conductors. The series connection of the conductors can be linear or in a zigzag pattern, such that the conductors extend between the reference plane and the measurement plane and are connected at nodes, leaving only two free ends of the series-connected conductors in the measurement plane. The nodes can be located alternately in the reference plane and the measurement plane.The first electrically connected ends of the first and second conductor tracks are electrically connected to each other in the measurement plane, forming a node in that plane. Similarly, the second electrically connected ends of the first and second conductor tracks are electrically connected to each other in the reference plane, also forming a node in that plane. The free ends of the first and second conductor tracks, connected in series, are electrically isolated from each other in the measurement plane to enable voltage measurement across the conductor tracks. This arrangement is particularly suitable for obtaining sufficient signal strength for assessing a thermal path, even with very small temperature differences.

[0051] According to some aspects, the electrically connected first ends of a first and second conductor track in the measurement plane are electrically isolated from the five adjacent electrically connected first ends of other conductor tracks. In particular, adjacent nodes of the conductor tracks in the measurement plane are isolated from each other. 2024PF01021

[0052] 10

[0053] Similarly, the free ends of the first and second conductor tracks connected in series are electrically isolated from the nodes in the measurement plane. This arrangement ensures that no unintentional short circuits or signal interference occur. The isolation can be achieved by using non-conductive materials, such as polymers or ceramic insulators, or by integrating protective layers between the nodes. Alternatively, the nodes can be arranged on different geometric planes, insulating layers, or bond pads within the measurement plane to ensure electrical separation. In particular, the nodes can be implemented on conductive pads in separate areas of the measurement plane, separated from each other by insulating materials.

[0054] From some perspectives, the electrically connected second ends of a first and second conductor in the reference plane are electrically isolated from the adjacent electrically connected second ends of other conductors. Specifically, adjacent nodes of the conductors in the reference plane are isolated from each other. This arrangement ensures that no unintentional short circuits or signal interference occur. The isolation can be achieved by using non-conductive materials, such as polymers or ceramic insulators, or by integrating protective layers between the nodes. Alternatively, the nodes can be arranged on different geometric planes, insulating layers, or bond pads within the reference plane to ensure electrical separation.In particular, the nodes can be implemented by / on conductive pads in separate areas of the reference plane, which are separated from each other by insulating materials.

[0055] According to some aspects, the electronic device comprises at least one further first conductor track and at least one further second conductor track extending from the same or a further measurement plane in the direction of the same or a further reference plane. In particular, at least one of the measurement planes and the reference plane between which the further first and second conductor tracks extend can be a 2024PF01021

[0056] 11

[0057] These may be different from the reference and measurement planes described previously. It is also possible that there is another measurement plane and another reference plane, between which the additional first and second conductor tracks extend. In particular, this allows a voltage drop across the additional first and second conductor tracks to be determined separately, so that a temperature difference along another thermal path within the electronic device can be determined. This configuration enables the simultaneous acquisition of temperature differences at different locations / areas within the electronic device, or at different locations within the electronic component, and / or at different locations between the component and the adjacent element.For example, a temperature difference between the top surface of the electronic component and layers at different depths within the electronic component can be detected separately, and / or the heat transfer along different connection surfaces within the electronic device can be assessed. The arrangement, connection, and contacting of the first and second conductor tracks can then be carried out according to the aspects mentioned above for the first and second conductor tracks.

[0058] According to some aspects, the additional measurement plane or the additional reference plane is arranged on the top side of an element adjacent to the electronic component, in particular a support substrate or a submount. The other of the additional measurement plane and the additional reference plane can be located within the adjacent element, in particular the support substrate or submount, or on its underside. This configuration is particularly advantageous for analyzing, for example, heat dissipation through the adjacent element in addition to heat dissipation within the electronic component or from the electronic component to the adjacent element. The additional planes can also be positioned at specific interfaces within the adjacent element to evaluate the efficiency of heat conduction between, for example, material layers within the adjacent element.

[0059] 12

[0060] In some respects, the first and second conductor tracks extend from the measurement plane towards a further reference plane, which is formed at a different level within the electronic component than the common reference plane. This arrangement enables a detailed analysis of multiple thermal paths within the electronic component. The additional reference plane can be located in an intermediate layer of the component or at another specific thermal interface. Alternatively, multiple reference planes can be provided at different levels to simultaneously evaluate different areas / interfaces within the component.

[0061] In some respects, the device includes a temperature sensor located on or near the measurement or reference plane. The sensor serves to determine the absolute temperature at the respective plane, thus supplementing the Seebeck effect measurement with an absolute temperature measurement. By determining the absolute temperature in one of the measurement or reference planes, the absolute temperature in the other plane can then be deduced using the temperature difference. The temperature sensor can be positioned in a plane that is easily accessible and where sufficient space is available. For example, the temperature sensor can be located on a freely accessible top surface, whereas it is not readily possible to install a temperature sensor inside the electronic component or the adjacent element.The temperature sensor can be implemented, for example, as a semiconductor sensor, thermistor, or infrared sensor. Alternatively, non-contact temperature measurement methods can be used to enable measurement independent of external mechanical influences. This combination of relative and absolute temperature measurement increases the accuracy and significance of the thermal analysis.

[0062] Furthermore, a method for assessing a thermal path within an electronic device is specified. The electronic device may, in particular, be an electronic device according to at least some of the aforementioned aspects. 2024PF01021

[0063] 13

[0064] Accordingly, the aspects already mentioned for the electronic device can also be applied to the method for assessing a thermal path within an electronic device, and vice versa.

[0065] 5

[0066] From several perspectives, the method for assessing a thermal path within an electronic component, or from an electronic component to an element adjacent to the electronic component, comprises the following steps: Operating the electronic component with a supply current and simultaneously or subsequently detecting a voltage drop across a first conductor and a second conductor. The conductors run between a measurement plane and a reference plane, with the measurement plane or the reference plane being located on a top surface of the electronic component and the measurement plane and the reference plane being spaced apart from each other.The second ends of the conductor tracks are electrically connected in the reference plane, while the first ends of the first and second conductor tracks are electrically isolated from each other in the measurement plane and configured to allow measurement of the voltage drop across the conductor tracks. The first conductor track consists of a primary electrically conductive material, and the second conductor track consists of a secondary electrically conductive material different from the first. Based on the measured voltage, a relative temperature difference between the measurement plane and the reference plane is determined to evaluate the efficiency of the thermal path between the two planes. This method is independent of the component's electrical or optical properties and enables precise measurement of the temperature difference between the measurement plane and the reference plane, even for electronic components with small geometric dimensions.

[0067] According to some aspects, the procedure for evaluating a thermal path includes determining a temperature difference between the measurement plane and the reference plane based on the voltage measured across the conductor tracks 5. The measured voltage results from the Seebeck effect, which is caused by the use of different materials for the two conductor tracks. The temperature difference e-2024PF01021

[0068] 14

[0069] The boundary is calculated from the stress and the known Seebeck coefficients of the materials used. This method allows for a direct analysis of a thermal path within the electronic device and is flexibly applicable, regardless of whether the reference plane is located within the electronic component or in an element adjacent to the electronic component, such as a submount or heat sink. The results of the method can be used to optimize heat conduction or to identify thermal weak points.

[0070] The proposed technical solution offers several advantages:

[0071] Precision: The measurement is based on the physical properties of the Seebeck effect and is therefore independent of manufacturing variations in the electronic component.

[0072] Miniaturization: The solution is also suitable for small geometric dimensions where existing methods such as ultrasound methods reach their limits.

[0073] Versatility: The introduction of conductor tracks and connections can be carried out using various established methods, such as the "Bosch process", which allows the method to be integrated into a wide variety of electronic components.

[0074] Robustness: The invention is also applicable to metallic surfaces and complex layer systems that are problematic for thermographic methods.

[0075] BRIEF DESCRIPTION OF THE DRAWINGS

[0076] Further aspects and embodiments according to the proposed principle will be revealed in relation to the various embodiments and examples, which are described in detail in conjunction with the accompanying drawings.

[0077] Figures 1A and 1B show a sectional view and a top view of an electronic device according to some aspects of the proposed principle 5; 2024PF01021

[0078] - 15 - Fig. 2A and 2B show a sectional view and a top view of further embodiments of an electronic device according to some aspects of the proposed principle;

[0079] 5

[0080] Figures 3A to 3D each show a sectional view of a support substrate and a top view of another partial aspect of an electronic device according to some aspects of the proposed principle;

[0081] Fig. 4 shows an isometric view and a detailed view of another embodiment of an electronic device according to some aspects of the proposed principle;

[0082] Figures 5A to 5F show steps for manufacturing an electronic device according to some aspects of the proposed principle;

[0083] Figures 6A to 6F show steps for manufacturing a further embodiment of an electronic device according to some aspects of the proposed principle;

[0084] Fig. 7 shows a sectional view of another embodiment of an electronic device according to some aspects of the proposed principle; and

[0085] Figures 8A and 8B each show a sectional view of a further embodiment of an electronic device according to some aspects of the proposed principle.

[0086] DETAILED DESCRIPTION

[0087] The following embodiments and examples show various aspects and their combinations according to the proposed principle. The embodiments and examples are not always to scale. Likewise, various elements may be enlarged or reduced.

[0088] - 16 - are presented to highlight individual aspects. It goes without saying that the individual aspects and features of the embodiments and examples shown in the figures can be readily combined without affecting the principle of the invention. Some aspects have a regular structure or shape. It should be noted that in practice minor deviations from the ideal shape may occur without contradicting the inventive idea.

[0089] Furthermore, the individual figures, features, and aspects are not necessarily depicted at the correct size, and the proportions between the individual elements may not be entirely accurate. Some aspects and features are emphasized by being shown enlarged. However, terms such as "above," "above," "below," "below," "larger," "smaller," and the like are correctly represented in relation to the elements in the figures. Thus, it is possible to deduce such relationships between the elements from the illustrations.

[0090] Figures 1A and 1B show a sectional view and a top view of an electronic device 1 according to some aspects of the proposed principle. The electronic device 1 comprises a support substrate or submount 3 on which an electronic component 2 is mounted on a bond pad 15 by means of an electrically and thermally conductive connection 16. The electronic component 2 is electrically connected to the submount 3 by means of a wire bond connection 17 on a further bond pad or bond pads 18. The electronic component 2 shown is a semiconductor laser configured to emit laser light during its intended use.However, the electronic component 2 also generates waste heat, which must be dissipated from the electronic device 1, for example via the submount 3, in order to maintain the functionality of the electronic device 1 as desired. The electronic component 2 could also be a different component, such as an LED, a chip, a processor, or 2024PF01021.

[0091] - 17 - any other functional electronic component which generates heat during its operation .

[0092] In order to assess the heat transfer / thermal path of the heat generated in the electronic component 2 during its operation into the submount 3, for example, to determine whether the heat is sufficiently dissipated into the submount 3, the electronic device includes an integrated structure for assessing a thermal path within the electronic device 1 during its intended use.

[0093] In particular, the electronic device 1 for evaluating a thermal path within the electronic device 1 comprises first and second conductor tracks 4, 5, each extending from a reference plane 7 to a measurement plane 6. The reference plane 7 is located on a top surface 8 of the electronic component 2, while the measurement plane 6 is located on a top surface 9 of the submount 3. The conductor tracks 4, 5 are formed by wire bonds extending from bond pads 18 on the top surface 9 of the submount 3 to bond pads 10 on the top surface 8 of the electronic component 2.

[0094] The first conductor tracks 4 are formed from a first electrically conductive material, and the second conductor tracks 5 from a different electrically conductive material. In particular, the electrically conductive materials differ in that they have different Seebeck constants. The first and second conductor tracks 4, 5 are connected in series at their ends 4a, 4b, 5a, 5b, with the second ends 4b, 5b of the first and second conductor tracks 4, 5 being connected to each other in the reference plane 7, and the first ends 4a, 5a of the first and second conductor tracks 4, 5 being connected to each other in the measurement plane 6. The respective resulting nodes of the connected ends are each arranged on separate and mutually insulated bonding points 10, 18 in the measurement and reference planes 6, 7.The two free first ends 4a, 5a of the conductor tracks 4, 5 connected in 5 rows are also arranged on two separate and mutually insulated bonding surfaces 18 in the measuring plane 6. The arrangement of the conductor tracks 4, 5 results in particular in2024PF01021.

[0095] - 18 - Zigzag pattern extending back and forth between the measurement and reference planes 6, 7 .

[0096] The bond pads 10 in the reference plane 7 are attached / arranged on the top surface 8 of the electronic component 2 by means of a thermally conductive material 13. The thermally conductive material 13 can be an electrically insulating material, so that the bond pads 10 are electrically isolated from each other and from the electronic component 2; however, it can also be a thermally and electrically conductive material, so that the bond pads 10 are connected at the same electrical potential as the top surface 8 of the electronic component 2.

[0097] When electronic component 2 is operated and heats up accordingly, this heat should be dissipated as efficiently as possible into submount 3 to prevent overheating of electronic component 2. To determine the heat transfer between electronic component 2 and submount 3, a voltage drop U (Seebeck voltage) across conductors 4 and 5 can be measured (with time resolution) at the free first ends 4a and 5a of the series-connected conductors 4 and 5. The greater the temperature difference between electronic component 2 and submount 3 (poor heat transfer), the greater the measured voltage. Conversely, the smaller the temperature difference between electronic component 2 and submount 3 (good heat transfer), the smaller the measured voltage.It is assumed that the heat transfer between the electronic component 2 and the bond pads 10 is ideal, and also that the heat transfer between the submount and the bond pads 18 is ideal. In particular, it is assumed for simplification that the heat transfer between the electronic component and the submount dominates other heat transfers. Alternatively, supported by (possibly time-resolved) thermal simulations and measurements, a spatially defined heat-generating area within the electronic component, or even five additional thermal resistances, can be considered when determining the heat transfer between the electronic component and the submount. Such a measurement is easy to perform and is also possible with miniaturized components.

[0098] 19

[0099] applicable to components, as well as independent of the optical or electrical properties of the electronic component.

[0100] The bond pads can be made of a material 5 that corresponds to either the first or second conductor track 4, 5, or they can be a different material onto which the wire bonds can be attached. In the case of a direct connection of the first and second conductor tracks 4, 5, for example by bonding them together (see Fig. 2A), it is not necessary for the bond pads 10 to be electrically conductive; they should merely provide a good mechanical and thermal connection of the wire bonds 4, 5 to the bond pads and the electronic component 2. However, the wire bonds 4, 5 can also be bonded side by side to the bond pads, so that the electrical connection of the second ends 4b 5b of the wire bonds 4, 5 is made via the bond pads 10.

[0101] Figure 2B shows an embodiment in which, by way of example, only a first conductor 4 and a second conductor 5 are provided. The function of the Seebeck voltage measurement is identical, however, several conductors connected in series, as shown in Figures 1A and 1B, can increase the signal strength of the measured Seebeck voltage U. Figure 2B also shows an embodiment in which the conductors are not formed by wire bonds, but by differently designed conductors 4, 5, which are welded at their second ends 4b, 5b and subsequently attached / arranged on the top surface 8 of the electronic component 2 by means of a thermally conductive material 13. Accordingly, in some aspects the bond pads 10 can also be omitted and the conductors 4, 5 can be attached / arranged directly on the top surface 8 of the electronic component 2 by means of a thermally conductive material 13.The thermally conductive material 13 can be electrically insulating or electrically conductive and can, for example, be formed by a thermally conductive core.

[0102] 5 Figures 3A to 3D each show a sectional view and a top view of the submount 3 and, in particular, each show a further partial aspect of an electronic device according to some aspects of the 2024PF01021

[0103] - 20 - proposed principle. Further first and second conductor tracks 4, 5 can be provided, extending in the form of vias from the top surface 9 of the submount 3 to a bottom surface 12 of the submount 3 opposite the top surface 9. The further first and 5 second conductor tracks are electrically connected in series and extend from the measurement plane 6 to a further reference plane 7a on the bottom surface 12 of the submount 3. The second ends 4b, 5b of the conductor tracks 4, 5 are electrically connected to each other on the further reference plane 7a, while the connected first ends 4a, 5a of the series-connected conductor tracks 4, 5 are connected to each other in the measurement plane 6. The free first ends 4a, 5a of the series-connected conductor tracks 4 , 5 are arranged and designed in the measuring plane such that a Seebeck voltage U falling across the conductor tracks 4 , 5 can be detected at them.According to the embodiment shown in Figures 3A and 3B, the first ends 4a, 5a and the second ends 4b, 5b are directly electrically connected to each other on the measurement or reference plane 6, 7a. According to the embodiment shown in Figures 3C and 3D, the first ends 4a, 5a and the second ends 4b, 5b are electrically connected to each other on the measurement or reference plane 6, 7a by means of an electrically conductive connecting layer 10. The free first ends 4a, 5a of the conductor tracks 4, 5 are accessible by means of bond pads 18 so that a Seebeck voltage U dropping across the conductor tracks 4, 5 can be detected.

[0104] By means of the further conductor tracks 4, 5 and the Seebeck voltage U measured across them, heat transfer within the submount 3 from its top surface 9 to its bottom surface 12 can be assessed. This can be done either in addition to a measurement of the temperature difference between the electronic component 2 and the submount 3 and / or in addition to a measurement of the temperature difference within the electronic component 2. However, an electronic device 1 is also disclosed here which merely provides a measurement of heat transfer within the submount 3 from its top surface 9 to its bottom surface 12, as illustrated.

[0105] 5

[0106] Fig. 4 shows an isometric view and a detail view of another embodiment of an electronic device 1 according to ei-2024PF01021

[0107] 21

[0108] Several aspects of the proposed principle are shown. A semiconductor laser with multiple semiconductor layers 14b, 14c, 14d arranged on a semiconductor substrate 14a is depicted. An active layer 14d is arranged between a first semiconductor layer 14b of a first conductivity type and a second semiconductor layer 14b of a second conductivity type. Furthermore, a first contact layer 19a is arranged on the top side of the semiconductor layer stack and a second contact layer 19b is arranged on the bottom side of the semiconductor substrate 14a, via which a supply voltage for operating the electronic component 2 can be connected. The first contact layer 19a is strip-shaped and covers only a central region of the semiconductor layer stack in order to provide a corresponding current concentration in a central region of the active layer 14d.The first contact layer 19a is further embedded in an insulating layer 20. However, the number, shape, and configuration of the semiconductor layers shown and marked with reference numerals are not to be considered limiting, restrictive, or relevant and can vary depending on the electronic component.

[0109] Integrated into the electronic component 2 are first and second conductor tracks 4, 5 in the form of vias, which extend in and through the semiconductor layer stack, respectively. In particular, two separate measurement structures are integrated into the electronic component 2, by means of which a temperature difference between the top surface 8 or the measurement plane 6 of the electronic component 2 and two reference planes 7, 7a of different depths within the electronic component 2 can be determined. The figure on the left shows an isometric view of the electronic device with details inside the electronic component 2 indicated by hatching, and the figure on the right shows a detailed sectional view along the section line AA.

[0110] One of the two measurement structures comprises first and second conductor tracks 5, 4, 5, which extend from the top surface 8 and measurement plane 6, respectively, into the semiconductor layer stack almost to the second contact layer 19b. The conductor tracks 4, 5 are formed by filled vias, where the vias 2024PF01021

[0111] 22

[0112] The circuit comprises an insulating layer 11, within which the material of the first and second conductor tracks is formed and which electrically insulates the conductor tracks 4, 5 from the semiconductor layers. The depth of the conductor tracks 4, 5, i.e., how far they extend into the semiconductor layer stack 5, is determined by the reference plane 7 between which a temperature difference is to be determined and the measurement plane. The depth or position of the reference plane 7 shown is merely an example, and the reference plane 7 can also be located at a different position within the semiconductor layer stack or on a lower surface of the electronic component 2 opposite the upper surface 8.

[0113] The second measurement structure also comprises first and second conductor tracks 4, 5, which extend from the top surface 8 or measurement level 6 into the semiconductor layer stack to a further reference level 7a. This further reference level is at a different depth / level than the reference level 7 of the first measurement structure, so that the heat transfer between different layers of the semiconductor layer stack can be determined using the two measurement structures.

[0114] The conductor tracks 4, 5 are each formed by vias filled with the respective electrically conductive material, the second ends 4b, 5b of which are directly connected to each other in the reference plane 7 and 7a respectively (see detailed view on the right in the figure). Furthermore, except for the free first ends 4a, 5a of the series-connected conductor tracks 4, 5, the first ends 4a, 5a of the conductor tracks 4, 5 are directly connected to each other in the measurement plane 6.

[0115] Figures 5A to 5F and 6A to 6F show steps of two methods for fabricating an electronic device 1 according to some aspects of the proposed principle. In a first step (Fig. 5A), a semiconductor layer stack is provided. A semiconductor layer stack with several semiconductor layers 14b, 14c, 14d arranged on a semiconductor substrate 14a is shown. An active layer 14d is arranged between a first semiconductor layer 14b of a first conductivity type and a second semiconductor layer 14b of a second conductivity type. Furthermore, 2024PF01021

[0116] 23

[0117] A first contact layer 19a is arranged on the top side of the semiconductor layer stack, and a second contact layer 19b is arranged on the bottom side of the semiconductor substrate 14a. A supply voltage for operating the subsequent electronic component 2 can be connected to the electronic component 2 via these contact layers. The first contact layer 19a is strip-shaped and covers only a central area of ​​the semiconductor layer stack to provide a corresponding current concentration in a central area of ​​the active layer 14d. The first contact layer 19a is further embedded in an insulating layer 20. The number, shape, and configuration of the semiconductor layers shown and indicated by reference numerals are not to be considered limiting, restrictive, or relevant and can vary depending on the electronic component.

[0118] In a further step (Fig. 5B), vias 21 are etched into the semiconductor layer stack and lined with an insulating layer 11. The vias 21 are designed such that related vias (to the left and right of the first contact layer 19a) extend to the same depth in the semiconductor layer stack, and that two vias 21 are connected to each other at their deepest point (not shown, but see the detailed view in Fig. 4). The creation of the vias 21 to a desired depth and the simultaneous introduction of an insulating layer 11 can be achieved, for example, using the so-called Bosch process.

[0119] Subsequently (Figs. 5C & 5D), the first vias 21 are filled with a first electrically conductive material, which then define the first conductor tracks 4, and subsequently (Figs. 5E & 5F), the remaining vias 21 are filled with a second electrically conductive material, which then define the second conductor tracks 4. The vias are arranged and formed, or filled, and connected to each other by means of a metallization (forming the second ends 4a, 5b of the conductor tracks) on the top side of the semiconductor layer stack, such that an electronic device 1, as described in Figure 4, is obtained. 2024PF01021

[0120] - 24 - The steps shown in Figures 6A to 6F differ from those shown in Figures 5A to 5F in that the depth of the conductor tracks 4, 5 and the depth of the reference planes 7, 7a are defined by interconnection layers 10 embedded in the semiconductor layer stack. The interconnection layers 10 can, in particular, serve as etch stop layers for creating the vias 21 and / or can electrically connect the second ends 4b, 5b of the conductor tracks 4, 5. The vias are arranged and formed, or filled, and connected to each other by means of a metallization (forming the second ends 4a, 5b of the conductor tracks) on the top side of the semiconductor layer stack in such a way that an electronic device 1, as described in Figure 4, is formed.

[0121] Fig. 7 shows a sectional view of another embodiment of an electronic device 1 based on some aspects of the proposed principle. In contrast to the embodiment shown in Fig. 4, at least the conductor tracks 4, 5, which extend to a reference plane 7 deeper in the semiconductor layer stack or into the semiconductor substrate 14a (left measurement structure in the Fig. 7), are formed by a combination of vias and metallized side surfaces of a mesa etching, which are electrically insulated from the etched side surfaces by an insulating layer 11. The conductor tracks 4, 5, which extend to a further reference plane 7a less deeply in the semiconductor layer stack or into the first semiconductor layer 14b (right measurement structure in the Fig. 7), can be formed solely from metallized side surfaces of a mesa etching. The depth of the reference planes 7, 7a is again determined by a connection or...Etching stop layer 10 is defined and is only to be understood as an example in the case shown. Depending on requirements, the reference planes 7, 7a can also be located at other locations within the electronic component 2.

[0122] Figures 8A and 8B each show a sectional view of a further embodiment of an electronic device 1 according to some aspects of the proposed principle. In each figure, an electronic device 1 is shown, which is formed by a horizontally contactable optoelectronic component 2.

[0123] - 25 - includes . Here, it should be indicated by way of example that, in addition to a via configured to connect a corresponding potential to a buried semiconductor layer, vias or conductor tracks 4, 5 can also be provided by means of which a temperature difference within the optoelectronic component 2 can be determined. The vias for the conductor tracks 4, 5 can be configured according to the previously mentioned embodiments and, for example, produced by means of the so-called Bosch process (Fig. 8A), but can also be configured according to / similar to the via configured to connect a potential corresponding to 0 to a buried semiconductor layer (Fig. 8B).

[0124] Although in some of the illustrated embodiments optoelectronic components have been represented as electronic components 2, it is again pointed out in section 5 that this is to be understood as merely exemplary, and that the proposed principle can also be applied to any other type of electronic component that heats up during its operation. 2024PF01021

[0125] - 26 - REFERENCE SYMBOL LIST

[0126] 1 electronic device

[0127] 2 electronic components

[0128] 3 adjacent element

[0129] 4 first conductor track

[0130] 5 second conductor track

[0131] 4a, 5a first end

[0132] 4b, 5b second end

[0133] 6, 6a Measurement plane

[0134] 7, 7a Reference plane

[0135] 8 Top

[0136] 9 Top

[0137] 10. Compound layer

[0138] 11 Insulation layer

[0139] 12 Subpage

[0140] 13 thermal connection

[0141] 14a, 14b,

[0142] 14c, 14d Semiconductor layer, Semiconductor substrate 15 Bond pad

[0143] 16 thermal connection

[0144] 17 Wirebond

[0145] 18 Bondpad

[0146] 19a, 19b Contact layer

[0147] 20 Insulation layer

[0148] 21 Via

[0149] U voltage

Claims

2024 PF01021 - 27 - PATENT CLAIMS 1. Electronic device ( 1 ), in particular with an integrated structure for assessing a thermal path within the electronic device during its intended use, comprising: an electronic component ( 2 ) ; optionally an element (3) adjacent to the electronic component (2), in particular a support substrate or a submount; and a first conductor (4) and a second conductor (5) each having a first end (4a, 5a) and an opposite second end (4b, 5b); wherein the first and second conductor tracks ( 4 , 5 ) extend from a measurement plane ( 6 ) towards a reference plane ( 7 ); wherein the second ends ( 4b , 5b ) of the first and second conductor tracks ( 4 , 5 ) are conductively connected to each other in the reference plane ( 7 ); wherein the measuring plane ( 6 ) is spaced apart from the reference plane ( 7 ); wherein the first ends ( 4a , 5a ) of the first and second conductor tracks ( 4 , 5 ) in the measuring plane ( 6 ) are electrically insulated from each other and are configured to detect a voltage (U ) dropping across the first and second conductor tracks ( 4 , 5 ); wherein the first conductor (4) consists of a first electrically conductive material and the second conductor (5) consists of a second electrically conductive material different from the first, wherein the measuring plane (6) is arranged on a top surface (8) of the electronic component (2) and the reference plane (7) is arranged in a plane within the electronic component (2) at a different level than the top surface (8), and wherein the first and second conductor tracks ( 4 , 5 ) are formed by a filled via in and / or by the material of the electronic component ( 2 ). 5 2. Electronic device according to claim 1, 2024 PF01021 - 28 - wherein the second ends ( 4b, 5b ) of the first and second conductor tracks ( 4 , 5 ) are directly connected to each other .

3. Electronic device according to claim 2 , 5 wherein the directly connected second ends ( 4b , 5b ) of the first and second conductor tracks ( 4 , 5 ) are applied to the reference plane ( 7 ) by means of a thermally conductive material ( 13 ).

4. Electronic device according to claim 3 , wherein the thermally conductive material ( 13 ) is an adhesive or a sintered compound .

5. Electronic device according to claim 1 , wherein the second ends ( 4b, 5b ) of the first and second conductor track ( 4 , 5 ) are connected by means of a connecting layer ( 10 ) made of the first or second electrically conductive material .

6. Electronic device according to claim 1 , wherein the second ends ( 4b, 5b ) of the first and second conductor tracks ( 4 , 5 ) are connected by means of another electrically conductive material .

7. Electronic device according to claim 1 , wherein the first and second conductor tracks ( 4 , 5 ) extend to a connection layer ( 10 ) embedded in the electronic component ( 2 ) in the reference plane ( 7 ), in particular the connecting layer ( 10 ) electrically connects the second end ( 4a , 5b ) of the first and second conductor tracks ( 4 , 5 ).

8. Electronic device according to one of the preceding claims, wherein the first and second conductor tracks (4, 5) are electrically insulated from each other except for the connection at the second ends (4b, 5b). 5 Electronic device according to one of the preceding claims ,2024 PF01021 - 29 - wherein the first and second conductor tracks ( 4 , 5 ) are electrically isolated from the electronic component ( 2 ).

10. Electronic device according to one of the preceding claims, 5 further comprising at least one further first conductor track (4) and at least one further second conductor track (5) each extending from the measuring plane (6) towards the reference plane (7); wherein the first and the second conductor tracks (4, 5) are alternately connected in series, in particular at their respective first (4a, 5a) and second ends (4b, 5b); wherein the free first end ( 4a ) of the first conductor track ( 4 ) and the free first end ( 5a ) of the second conductor track ( 5 ) in the measuring plane ( 6 ) are electrically insulated from each other and are designed to detect a voltage (U) dropping across the first and second conductor tracks ( 4 , 5 ); wherein the electrically connected first ends (4a, 5a) of the first and second conductor tracks (4, 5) in the measuring plane (6) are electrically connected to each other; and wherein each of the electrically connected second ends ( 4b, 5b ) of the first and second conductor tracks ( 4 , 5 ) are electrically connected to each other in the reference plane ( 7 ).

11. Electronic device according to claim 10 , wherein the electrically connected first ends (4a, 5a) of a first and second conductor track (4, 5) are electrically insulated from adjacent electrically connected first ends (4a, 5a) of another first and second conductor track (4, 5) in the measuring plane (6); and wherein the free first end (4a) of the first conductor (4) and the free first end (5a) of the second conductor (5) are electrically insulated from adjacent electrically connected first ends (4a, 5a) of each other first and second conductor (4, 5) in the measuring plane (6). 5 12. Electronic device according to claim 10 or 11 , wherein the electrically connected second ends (4b, 5b) of a first and second conductor track (4, 5) of adjacent elek-2024 PF01021 - 30 - trisch connected to each other second ends ( 4b, 5b ) each of a different first and second conductor track ( 4 , 5 ) in the reference plane ( 7 ) are electrically insulated . 5 13. Electronic device according to one of the preceding claims, further comprising at least one further first conductor (4) and at least one further second conductor (5) each extending from the same or a further measuring plane (6, 6a) towards the same or a further reference plane (7, 7a); wherein a first end (4a) of the further first conductor (4) and a first end (5a) of the further second conductor (5) are electrically insulated from each other in the measuring plane or a further measuring plane (6, 6a) and are configured to detect a voltage (U) across the further first and further second conductor (4, 5); and wherein the second ends (4b, 5b) opposite the first ends (4a, 5a) of the further first and second conductor tracks (4, 5) in the reference plane or a further reference plane (7, 7a) are electrically connected to each other.

14. Electronic device according to claim 13 , wherein the further measuring plane (6a) or the further reference plane (7a) is arranged on a top surface (9) of the element (3) adjacent to the electronic component (2); and wherein the other of the further measuring or reference plane ( 6a, 7a ) is arranged within the element ( 3 ) adjacent to the electronic component ( 2 ) or on a bottom surface ( 12 ) opposite the top surface ( 9 ) of the element ( 3 ) adjacent to the electronic component ( 2 ).

15. Electronic device according to one of the preceding claims, further comprising at least one further first conductor track ( 4 ) and at least one further second conductor track ( 5 ) each extending from the same measuring plane ( 6 ) towards a further reference plane 5 ( 7a ); wherein a first end ( 4a ) of the further first conductor track ( 4 ) and a first end ( 5a ) of the further second conductor track ( 5 ) in the2024 PF01021 31 Measuring plane ( 6 ) are electrically isolated from each other and are designed so that a voltage (U ) falling across them via the further first and further second conductor track ( 4 , 5 ) can be detected; 5 where the second ends (4b, 5a) are opposite the first ends (4a, 5a). 5b) the further first and second conductor tracks (4, 5) are electrically connected to each other in the further reference plane (7a); and wherein the reference plane (7) and the further reference plane (7a) are formed at different levels within the electronic component (2).

16. Electronic device according to one of the preceding claims, further comprising a temperature sensor on or near the measuring or reference plane ( 6 , 7 ) for determining the absolute temperature at the measuring or reference plane ( 6 , 7 ).

17. Method for assessing a thermal path within an electronic component ( 2 ) and / or from an electronic component ( 2 ) to an adjacent element ( 3 ) during intended use of the electronic component ( 2 ) comprising the steps: Operating the electronic component ( 2 ) with a supply current; and for operating the electronic component (2) simultaneous and / or sequential determination of a voltage (U) dropping across a first conductor (4) and a second conductor (5) at electrically isolated first ends (4a, 5a) of the first and second conductors (4, 5) in a measuring plane (6); wherein the first and second conductors (4, 5) extend from the measuring plane (6) towards a reference plane (7); wherein a second end (4b, 5b) of each of the first ends (4a, 5a) of the first and second conductors (4, 5) in the reference plane (7) is conductively connected to each other; wherein the measuring plane (6) is spaced apart from the reference plane (7); 5 wherein the first conductor ( 4 ) consists of a first electrically conductive material and the second conductor ( 5 ) consists of a second electrically conductive material different from the first ,2024 PF01021 - 32 - wherein the measuring plane ( 6 ) is arranged on a top surface ( 8 ) of the electronic component ( 2 ) and the reference plane ( 7 ) is arranged in a plane within the electronic component ( 2 ) at a different level than the top surface ( 8 ), and 5 wherein the first and second conductor tracks ( 4 , 5 ) are formed by a filled via in and / or by the material of the electronic component ( 2 ).

18. Method according to claim 17, wherein the step of determining the voltage drop (U) across the first and second conductor track (4, 5) comprises determining a temperature difference between the measuring and reference plane (6, 7) based on the determined voltage drop (U).

Images