Circuit arrangement for protecting against an input voltage amount being exceeded

WO2026175762A1PCT designated stage Publication Date: 2026-08-27SIEMENS AG
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Patent Information

Application Number
PCT/EP2026/053951
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-02-20
Filing Date
2026-02-13
Publication Date
2026-08-27

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Abstract

The invention relates to a circuit arrangement for protecting against an input voltage amount of the circuit arrangement being exceeded, comprising: • a first transistor (Q1), which is permanently switched on, • a second transistor (Q2), which is connected in series with the first transistor (Q1) and is designed to be switched on and off by a control circuit in order to bring about an input voltage step-down, • an overvoltage detection circuit (5) which is designed to detect that an input voltage amount has been exceeded and consequently to transmit a signal for switching off the first transistor (Q1) and the second transistor (Q2).
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Description

[0001] 202501452 Foreign version 12.02.2026

[0002] 1

[0003] Description

[0004] Circuit arrangement for protection against exceeding a certain input voltage level

[0005] DESCRIPTION INTRODUCTION

[0006] The invention relates to a circuit arrangement for protection against exceeding a certain input voltage. The invention also relates to a method for protecting an electronic circuit against exceeding a certain input voltage, as well as the use of a circuit arrangement.

[0007] STATE OF THE ART

[0008] Overvoltages can easily damage or even destroy electronic components. These often occur in mains supply voltages. Therefore, semiconductors in electronic circuits must be designed to withstand the highest expected voltage – in most cases, this voltage is far higher than the voltages encountered during normal operation.

[0009] For example, this could be a buck converter circuit at the input of a three-phase power supply. A switch can be used to disconnect the circuit in the event of an overvoltage (see FIG. 4.1). Alternatively, a buck converter transistor can be integrated into the circuit (see FIG. 4.2). The maximum voltage across the buck converter transistor at the highest input voltage is, for example, less than 900 V. However, due to overvoltages (surges) at the device input, the maximum voltage across the buck converter transistor can reach approximately 1600 V. Therefore, a transistor with a voltage rating of at least 1600 V must be used. These transistors often require more complex manufacturing processes to achieve the same current rating as a 900 V transistor. Furthermore, a higher voltage rating can result in a slower switching speed.

[0010] One way to protect components from overvoltages is to use one or more 1700 V SiC MOSFETs (Silicon Carbide Metal-Oxide-Semiconductor Field-Effect Transistors) connected in parallel. However, SiC MOSFETs are significantly more expensive and less robust than silicon MOSFETs. Furthermore, SiC MOSFETs require a higher gate voltage, necessitating an additional auxiliary supply voltage. 202501452 Foreign version 12.02.2026

[0011] 2

[0012] A series connection of several FETs (field-effect transistors) with simultaneous control is also known. However, this circuit is problematic because the transistors must be switched on at exactly the same time to divide the voltage.

[0013] Another way to protect components from overvoltages is the classic method of using an IGBT (Insulated Gate Bipolar Transistor) upstream of the converter (e.g., a classic buck converter followed by an LLC (Inductor-Inductor-Capacitor) or flyback converter). If the voltage or current rises sharply, the IGBT switches off. A small capacitor is placed after the IGBT to supply the buck converter with its pulse current. However, IGBTs typically have a slower switching speed compared to MOSFETs, which can be problematic in applications with fast switching operations. Due to their complex structure, IGBTs are also more expensive to manufacture.

[0014] German patent DE 102022 130515 A1 relates to power converters, power systems, and protective devices. It describes a circuit designed to monitor voltages and currents in a power converter and to protect it. The protective device is designed to intervene in the event of overvoltages or overcurrents to prevent damage to the electronic components of the power converter.

[0015] EP 1 067660 A2 discloses a circuit and a method for voltage level conversion and overvoltage protection for an input stage. The circuit uses a single gate oxide pass circuit and a single gate oxide voltage level shifting circuit. The aim is to process input signals with different voltage levels while simultaneously providing overvoltage protection.

[0016] US patent 2020 / 0195127 A1 discloses a protection system for power converters that uses an upstream cut-off switch for fault detection and rapid galvanic isolation. The circuit includes current and voltage monitoring that detects fault conditions and then triggers the tripping of the cut-off switch.

[0017] German patent DE 102018206269 A1 describes a DC-DC converter for vehicle electrical systems in which MOSFET switches are arranged in different current paths to achieve electrical isolation in the event of fault conditions such as reverse polarity or overcurrent by opening the switches. The protection concept is based on anti-series connected disconnect switches to interrupt the current paths. 202501452 Foreign version 12.02.2026

[0018] 3

[0019] Based on the previously described state of the art and the previously described disadvantages, the invention is based on the objective of providing a circuit arrangement for protection against overvoltage which offers better overcurrent behavior and involves lower material costs.

[0020] SOLUTION TO THE TASK

[0021] This problem is solved by a circuit arrangement for protection against exceeding a certain input voltage of the circuit arrangement having the features of claim 1. Furthermore, the problem is solved by using a circuit arrangement according to claim 10 and by a method. Advantageous embodiments are described in the dependent claims.

[0022] DESCRIPTION OF THE INVENTION

[0023] The circuit arrangement according to the invention for protection against exceeding a certain input voltage comprises a first transistor that is permanently switched on, and a second transistor that is connected in series with the first transistor and can be switched on and off by a control circuit to reduce the input voltage. Furthermore, the arrangement includes an overvoltage detection circuit that is capable of detecting an exceedance of a certain input voltage and consequently sending a signal to switch off the first and second transistors.

[0024] In this context, a circuit arrangement refers to the arrangement and connection of various electronic components, such as resistors, capacitors, transistors, diodes, etc., within an electrical circuit. The spatial arrangement and interconnection of the components play a central role. The circuit arrangement determines the functionality of the overall circuit, for example, whether it operates as an amplifier, filter, or oscillator. It also determines how electrical power is transferred from a source to a load and enables impedance matching between different circuit sections. Furthermore, the arrangement of the components also influences the stability and reliability of the circuit. 202501452 Foreign version 12.02.2026

[0025] 4

[0026] The input voltage is the voltage applied to the input of an electronic circuit. Conversely, the voltage delivered by an electronic circuit to a subsequent load or another circuit is called the output voltage.

[0027] Bucking refers to limiting or clipping a voltage or signal to a specific, lower voltage value. Bucking actively limits an electrical signal or voltage to a predefined maximum value, for example, to prevent damage to subsequent circuit components. Bucking electronics typically consist of diodes, transistors, or Zener diodes that limit the signal or voltage to the desired maximum value. Bucking can significantly increase the functionality and lifespan of electronic circuits.

[0028] Exceeding a certain amount of an input voltage of the circuit arrangement can in particular refer to an overvoltage that is present at the input of the circuit arrangement.

[0029] The overvoltage detection circuit in the described circuit arrangement has the task of detecting an exceedance of a certain amount of the input voltage (setpoint) and then causing the two transistors to be switched off.

[0030] With the circuit arrangement described above, an input voltage overrun can be reliably detected, and the voltage can then be actively reduced to protect downstream circuit components from damage caused by overvoltage. For example, the second transistor switches voltages in the range of 900 V, while the first transistor remains open and unused. If the input voltage becomes too high, the second transistor would experience an excessively high voltage in the OFF state, which would destroy or damage it. Therefore, in this case, the first transistor switches off, absorbing a portion of the overvoltage (for example, in the range of 600 V) to protect the second transistor. Together with the overvoltage detection circuit, this results in a robust and highly reliable overvoltage protection system. 202501452 Foreign version 12.02.2026

[0031] 5

[0032] Preferably, the circuit arrangement is designed such that the transistors are avalanche-proof, wherein the circuit arrangement is designed to divide the input voltage between both transistors when a certain amount of the input voltage is exceeded.

[0033] The term "avalanche-resistant" describes the property of a semiconductor device to withstand the avalanche effect without being damaged. In the avalanche effect, very high electric fields in a semiconductor create a self-reinforcing avalanche of charge carriers, which can lead to an uncontrolled increase in current and ultimately to the destruction of the component. An avalanche-resistant component is designed to withstand the avalanche effect, up to a certain point, without sustaining damage.

[0034] In the described circuit arrangement for overvoltage protection, the avalanche effect is used to distribute the input voltage evenly between the two series-connected transistors. As long as the voltage remains below the avalanche breakdown point, both transistors operate within their normal range. However, as soon as the input voltage exceeds a critical value, the situation changes. The first transistor suddenly begins to conduct significantly more current. This causes the voltage across this transistor to drop. The voltage is then distributed so that the second transistor absorbs the excess voltage. In this way, the input voltage is dynamically divided between the two transistors as soon as an overvoltage occurs. This prevents either transistor from being exposed to the full overvoltage alone and thus being destroyed.The avalanche effect thus ensures that the high voltage caused by the overvoltage is distributed across the two transistors. This reduces the load on each individual transistor, increasing the robustness and reliability of the circuit.

[0035] The transistors can be, in particular, NPN transistors (n-channel metal oxide semiconductor transistors).

[0036] In an advantageous further development of the invention, the circuit arrangement is configured such that the first transistor is a first MOSFET and the second transistor is a second MOSFET. The two MOSFETs can, in particular, be silicon MOSFETs or N-channel MOSFETs (NMOS transistors). As already mentioned at the beginning, in order to protect components from overvoltages, in many [202501452 Foreign version 12.02.2026]

[0037] 6

[0038] Buck converter circuits use one or more SiC-MOSFETs (Silicon Carbide Metal-Oxide-Semiconductor Field-Effect Transistors) connected in parallel.

[0039] NMOS transistors and silicon MOSFETs are characterized by high performance, faster switching speeds, and high current carrying capacity. Furthermore, the manufacturing of NMOS transistors and silicon MOSFETs is technologically simpler and less expensive than that of SiC MOSFETs. NMOS transistors and silicon MOSFETs are also robust against overload, overvoltage, and temperature fluctuations, making them very attractive for this invention.

[0040] Preferably, the circuit arrangement is designed such that the first transistor is directly connected to an input voltage terminal. Due to this direct connection, the first transistor does not require additional circuitry for control, and no additional drive circuits are necessary. The first transistor is permanently switched on, thus forming a stable basic circuit. Because the first transistor is permanently conducting, complex switching circuits are eliminated, increasing the robustness and reliability of the overall circuit. Furthermore, due to the direct connection to the input voltage, the first transistor can respond immediately to voltage changes without any delays caused by additional circuitry.Connecting the first transistor directly to the input voltage significantly simplifies circuit design and implementation compared to more complex drive circuits. Furthermore, the simple structure of the overvoltage protection circuit, with only one permanently switched-on first transistor, allows for a very cost-effective implementation.

[0041] The circuit arrangement can advantageously be configured such that the overvoltage detection circuit includes a voltage detection circuit designed to continuously monitor a certain amount of the input voltage. This continuous monitoring of the input voltage allows the circuit to react very quickly to an exceedance of the permissible voltage level, as the voltage detection circuit constantly checks the value of the input voltage. This enables rapid triggering of protective measures. Furthermore, the continuous monitoring ensures that overvoltages are detected reliably and without delay, even if they are only momentary exceedances of the voltage limit. This increases the operational reliability of the overall circuit, as overvoltages can be detected and mitigated early, before damage occurs to the components. 202501452 Foreign version 12.02.2026

[0042] 7

[0043] In an advantageous embodiment of the invention, the circuit arrangement is configured such that the voltage detection circuit includes an operational amplifier configured as a comparator. This comparator receives the input voltage to be monitored at its inverting input and a reference voltage at its non-inverting input. The comparator continuously compares these two voltage values. As long as the input voltage is below the reference voltage, a low level is present at the comparator's output. However, as soon as the input voltage exceeds the value of the reference voltage, which corresponds to an overvoltage, the comparator output switches to a high level. This switching signal from the comparator is then forwarded to the subsequent circuit components to initiate the necessary overvoltage protection measures.

[0044] Using a comparator in the voltage detection circuit enables precise and reliable detection of reference voltage exceedances, as operational amplifiers operate with high precision. The very short response time of comparators allows for the timely detection of overvoltages, enabling rapid initiation of countermeasures. Furthermore, operational amplifiers used as comparators are robust and reliable components that enhance the overall circuit stability. They are easily integrated into the overvoltage detection circuit and require no complex control. Therefore, using a comparator is a cost-effective solution for precise voltage detection.

[0045] Preferably, the circuit arrangement is designed such that the control circuit includes a high-side driver circuit configured to drive the second transistor. In the high-side arrangement, the second transistor is connected between the input voltage and the load. The task of the high-side driver circuit is to selectively switch the second transistor on and off to reduce the input voltage as soon as an overvoltage is detected. To achieve this, the driver circuit controls the gate electrode of the second transistor and supplies it with the necessary voltage and current values ​​to bring the second transistor into the desired state. This allows for direct and efficient control of the second transistor, as it is directly connected to the input voltage. The high-side driver circuit can be integrated into the overall circuit relatively easily and does not require any additional power supplies.It is robust against voltage fluctuations because it is directly connected to the input voltage. 202501452 Foreign version 12.02.2026.

[0046] 8

[0047] The circuit arrangement can advantageously be designed so that the two transistors together have a voltage withstand capability of more than 1300 V. A transistor's voltage withstand capability indicates the maximum voltage up to which the component can operate reliably and without damage. By connecting the two transistors in series, their voltage withstand capabilities are added together, resulting in a very high overvoltage withstand capability of over 1300 V for the overall circuit. This high voltage withstand capability is important to protect the circuit from damage caused by overvoltages. Even if very high voltage spikes occur briefly, these can be safely dissipated by the two transistors without damaging the components. This increases the lifespan and reliability of the overall circuit and allows the circuit arrangement to be used in applications with higher operating voltages without the risk of overvoltage damage.Furthermore, the dimensioning of the transistors for a voltage resistance of over 1300 V makes the overall circuit significantly more robust against voltage spikes and overloads.

[0048] Preferably, the circuit arrangement is configured such that the first transistor has a voltage rating in the range of 500 to 700 V and the second transistor has a voltage rating in the range of 800 to 1000 V. The voltage rating of a transistor indicates the maximum voltage up to which the component can be reliably operated without damage. By using transistors with different voltage ratings in the circuit arrangement, a targeted distribution and adjustment of the overvoltage load is achieved. The first transistor, with the lower voltage rating of 500 to 700 V, initially limits the input voltage to a lower range. The second transistor, with the higher voltage rating of 800 to 1000 V, then absorbs the remaining residual voltage.This graduated voltage distribution reliably and effectively protects the circuit from overvoltages without overloading individual transistors. This allows for optimized distribution and balancing of the overvoltage load, increasing the lifespan and reliability of the overall circuit. Furthermore, the use of transistors with different voltage ratings also reduces costs.

[0049] The invention also comprises a power supply, preferably three-phase, with a circuit arrangement according to the invention. 202501452 Foreign version 12.02.2026

[0050] 9

[0051] The previously formulated technical problem is also solved by using a circuit arrangement to protect against exceeding a certain input voltage of an electronic circuit.

[0052] In a method according to the invention for protecting a circuit arrangement from exceeding a certain input voltage, the method first comprises providing a first transistor that is permanently switched on and directly connected to a terminal of the input voltage. Additionally, a second transistor is provided, which is connected in series with the first transistor and is clocked by a control circuit. Subsequently, the input voltage of the circuit arrangement is continuously monitored for exceeding a specific value. This task is performed by an overvoltage detection circuit within the arrangement. As soon as the overvoltage detection circuit detects an exceedance of the permissible input voltage, the first transistor and the second transistor are immediately switched off.By switching off both transistors, the input voltage is now distributed across both transistors due to the avalanche effect. This reliably protects the circuit from damage caused by overvoltages. The direct connection of the first transistor to the input voltage, as well as its series connection with the second, switched-mode transistor, enables robust and effective overvoltage protection.

[0053] In an advantageous embodiment of the invention, the method is designed such that, as soon as the input voltage returns to a safe range, the first and second transistors are reactivated, with the first transistor remaining permanently switched on and the second transistor being clocked by the control circuit. This process occurs after both transistors have been switched off when the permissible input voltage is exceeded. Switching them off ensures that the overvoltage is distributed evenly across both transistors due to the avalanche effect, thus preventing damage to the components. Since the input voltage is now within a safe range, both transistors are reactivated. The first transistor remains permanently switched on to maintain a stable basic circuit.The second transistor, however, is clocked by the control circuit to return the circuit to its normal operating state. This allows the circuit to quickly return to normal operation after an overvoltage event.

[0054] FIGURE DESCRIPTION 202501452 Foreign version 12.02.2026

[0055] 10

[0056] Further features, properties and advantages of the present invention will become apparent from the following description with reference to the accompanying figures. These schematically illustrate:

[0057] FIG 1 shows a first exemplary circuit arrangement as a buck converter with two NPN transistors connected in series,

[0058] FIG 2 shows a second exemplary circuit arrangement as a buck converter with two NMOS transistors connected in series,

[0059] FIG 3 shows a third exemplary circuit arrangement in which the high-side driver circuit and the overvoltage detection circuit are integrated.

[0060] FIG 4.1 shows a first circuit arrangement as a buck converter according to the prior art,

[0061] FIG 4.2 shows a second circuit arrangement as a buck converter according to the prior art.

[0062] Figure 1 shows a buck converter circuit 1. The various components are arranged to protect electronic components from overvoltage. This electronic circuit can be used, for example, in a three-phase power supply.

[0063] The circuit has an input 2, labeled lnput+ and Input-, and an output 3, labeled Output. Input 2 is the source of the voltage fed into the circuit, and output 3 is the voltage delivered to the load.

[0064] The circuit contains two capacitors, C1 and C2. Each capacitor has a specific capacitance value, denoted by C. Capacitor C1 is connected between the positive and negative inputs 2, meaning it stabilizes and smooths the input voltage. Capacitor C2 is connected between output 3 and negative input 2 and also serves to stabilize and smooth the output voltage. Two NPN transistors, Q1 and Q2, are also part of the circuit. NPN transistor Q1 is controlled by Signal Control_1, and NPN transistor Q2 by Signal Control_2. Both transistors are connected to negative input 2. NPN transistor Q1 is permanently switched on.

[0065] 11

[0066] switched on and allows continuous current flow, while NPN transistor Q2 operates in clock mode to regulate the output voltage.

[0067] The circuit includes a diode D1. Diode D1 has a forward voltage drop and is connected between output 3 and the junction of the inductor and the second NPN transistor Q2. Diode D1 conducts current when NPN transistor Q2 is off, preventing reverse currents that could damage the circuit. The circuit also includes an inductor L1 with an inductance value of L. Inductor L1 is connected between the second NPN transistor Q2 and output 3. It stores energy when NPN transistor Q2 is on and releases this energy when NPN transistor Q2 is off to ensure a continuous power supply to the load.

[0068] In normal operation, the input voltage is applied to the source of the permanently switched-on NPN transistor Q1, which is directly connected to the input negative voltage. NPN transistor Q1 remains switched on at all times, thus enabling continuous current flow. A second NPN transistor, Q2, is connected in series with NPN transistor Q1 and is driven by a special control circuit, a high-side driver circuit 4 (see FIG. 3). In normal operation, NPN transistor Q2 performs the clocking procedure by switching on and off regularly to regulate the output voltage delivered to the load. This procedure ensures that the voltage delivered to the load is maintained at a desired level.

[0069] In parallel, an overvoltage detection circuit 5 continuously monitors the input voltage. This circuit is designed to detect overvoltages exceeding the normal operating voltage. As soon as an overvoltage is detected at input 2, the overvoltage detection circuit 5 sends a signal to switch off both NPN transistors Q1 and Q2. This is done to protect the circuit and downstream components from potential damage caused by the high voltages. Both NPN transistors Q1 and Q2 in the circuit are avalanche-proof. The avalanche effect ensures that the high voltage caused by the overvoltage is distributed across the two NPN transistors Q1 and Q2. This reduces the load on each individual NPN transistor, increasing the robustness and reliability of the circuit. 202501452 Foreign version 12.02.2026

[0070] 12

[0071] The circuit remains in this off state until the overvoltage dissipates and the input voltage returns to a safe range. Once the voltage is back to normal, NPN transistors Q1 and Q2 are reactivated. NPN transistor Q1 remains permanently switched on, while NPN transistor Q2 resumes its clocking process to regulate the output voltage.

[0072] Figure 2 also shows a buck converter circuit 1. The circuit arrangement in Figure 2 differs from the circuit arrangement in Figure 1 only in the transistors used. Instead of NPN transistors Q1 and Q2, N-channel MOSFETs (NMOS transistors) M1 and M2 are used in this circuit.

[0073] FIG 3 shows a third circuit arrangement in which, in addition to the circuit arrangement in FIG 2, the high-side driver circuit 4 and the overvoltage detection circuit are integrated.

[0074] The circuit has an input 2, labeled lnput+ and Input-, and an output 3, labeled Output. Input 2 is the source of the voltage fed into the circuit, and output 3 is the voltage delivered to the load.

[0075] A capacitor C1 is connected in parallel to the input terminals to filter out disturbances and fluctuations in the input voltage in order to ensure stability.

[0076] Due to its position, controlling transistor M2 requires a high-side driver circuit 4. This circuit consists of an N-channel MOSFET M3, which is placed in the gate signal line, and a P-channel transistor (PNP transistor) Q3. NMOS transistor M3 must have a higher voltage rating than M1 to reliably handle the potential differences that occur. P-channel transistor Q1 ensures the reliable switching off of NMOS transistor M2 in situations where NMOS transistor M3 is not conducting. This driver configuration ensures that NMOS transistor M2 responds precisely and in a timely manner to the PWM control signal (Control_2).

[0077] The circuit is controlled by the signals Control_1 and Control_2, which control the switching of the N-channel MOSFETs (NMOS transistors) M1 and M3. NMOS transistor M1 is permanently switched on and conducts the current directly from the input negative voltage to the [202501452 Foreign version 12.02.2026]

[0078] 13

[0079] Circuit. NMOS transistor M2 switches on and off periodically during normal operation to regulate the output voltage. NMOS transistors M2 and M3 are controlled by a high-side driver circuit 4, which provides the necessary gate voltage.

[0080] During normal operation, the PWM control unit 6 generates precise clock signals (Control_2) for M2. The clocking is designed to be optimally matched to the desired output voltage and load requirements. Simultaneously, the PWM control unit 6 works seamlessly with the overvoltage protection by immediately reacting to the comparator signals in the event of a fault.

[0081] An overvoltage detection circuit 5 is connected upstream of the capacitors. A dedicated comparator U1 continuously monitors the input voltage U1. As soon as this exceeds a critical reference value llref, U1 generates the control signal Control_1, which immediately deactivates both NMOS transistors. In this situation, the avalanche effect comes into play: The resulting overvoltage is distributed across both NMOS transistors, whose combined voltage rating of, for example, over 1600 V (M1: 650 V + M2: 950 V) can safely withstand this load.

[0082] The NMOS transistor M3, controlled by the signal Control_2, helps regulate the current flow through the circuit. A series resistor R3 limits the current flowing into the gate of NMOS transistor M3, while a parallel diode D2 protects the gate from overvoltage.

[0083] Resistors R1 and R2 form a voltage divider network and control the voltage at the base of the P-channel transistor Q3, which acts as a control component. A capacitor C3 connected in parallel with resistor R2 stabilizes the voltage at the base of the P-channel transistor Q3 and filters out interference.

[0084] At output 3 of the circuit, a diode D1 is connected between the output terminal and the inductor L1. Diode D1 provides a current path when the NMOS transistors are off and protects the circuit from reverse currents and voltage spikes. The inductor L1 smooths the output current and stores energy to ensure a stable output voltage. A capacitor C2 connected in parallel to the output terminals filters out noise and fluctuations in the output voltage. 202501452 Foreign version 12.02.2026

[0085] 14

[0086] The P-channel transistor Q3 and its associated resistors and capacitors control the current flow and ensure stable regulation of the output voltage. Output 3 of the circuit provides the regulated output voltage, which can be tapped at the output terminals.

[0087] In the event of an overvoltage, the overvoltage protection circuit activates, switching off both NMOS transistors M1 and M2 to protect the circuit from damage. The avalanche effect distributes the overvoltage across both NMOS transistors M1 and M2 to prevent damage. The avalanche-resistant NMOS transistors M1 and M2 absorb high voltages and protect the circuit from voltage spikes.

[0088] The circuit combines the functions of voltage regulation and overvoltage protection to ensure an efficient and reliable power supply.

[0089] Figure 4.1 shows a first circuit arrangement as a buck converter according to the prior art. In this circuit arrangement, the circuit can be switched off via a switch S in the event of an overvoltage.

[0090] Figure 4.2 shows a second circuit arrangement as a buck converter according to the prior art. In this circuit arrangement, a buck converter transistor Q1 is integrated into the circuit as an alternative to the switch from Figure 4.1.

[0091] Although the invention has been further illustrated and described by the preferred embodiment, the invention is not limited by the disclosed examples. Variations thereof can be derived by a person skilled in the art without departing from the scope of protection of the invention as defined by the subsequent claims. 202501452 Foreign version 12.02.2026

[0092] 15

[0093] Reference symbol list

[0094] 1 Buck converter circuit

[0095] 2 Entrance

[0096] 3 Exit

[0097] 4 High-side driver circuit

[0098] 5 Overvoltage detection circuit 6 PWM control unit

[0099] C1 first capacitor

[0100] C2 second capacitor

[0101] C3 third capacitor

[0102] Q1 first NPN transistor

[0103] Q2 second NPN transistor

[0104] Q3 P-channel transistor

[0105] D1 first diode

[0106] D2 second diode

[0107] L1 Inductance

[0108] M1 first N-channel MOSFET

[0109] M2 second N-channel MOSFET

[0110] M3 third N-channel MOSFET

[0111] U1 Comparator

[0112] llref Reference value

[0113] R1 first resistor

[0114] R2 second resistor

[0115] R3 third resistor

[0116] S switch

[0117] Control_1 first control signal Control_2 second control signal

Claims

202501452 Foreign version 12.02.2026 16 Patent claims 1. Circuit arrangement for protection against exceeding a certain amount of an input voltage of the circuit arrangement, comprising: • a first transistor (Q1) that is permanently switched on, • a second transistor (Q2) connected in series with the first transistor (Q1) and designed to be switched on and off by a control circuit to cause a reduction of the input voltage, • An overvoltage detection circuit configured to detect an exceedance of a certain input voltage and consequently send a signal to switch off the first transistor (Q1) and the second transistor (Q2), wherein the transistors (Q1 and Q2) are avalanche-proof, and wherein the circuit arrangement is configured to split the input voltage between the two transistors when a certain input voltage threshold is exceeded.

2. Circuit arrangement according to one of the preceding claims, wherein the first transistor (Q1) is a first MOSFET (M1) and the second transistor (Q2) is a second MOSFET (M2).

3. Circuit arrangement according to claim 1, wherein the first transistor (Q1) is directly connected to a terminal of an input voltage.

4. Circuit arrangement according to claim 1, wherein the overvoltage detection circuit (5) comprises a voltage detection circuit configured to continuously monitor an amount of the input voltage.

5. Circuit arrangement according to claim 4, wherein the voltage detection circuit comprises an operational amplifier configured as a comparator.

6. Circuit arrangement according to one of the preceding claims, wherein the control circuit comprises a high-side driver circuit (4) configured to drive the second transistor (Q2).

7. Circuit arrangement according to one of the preceding claims, wherein the transistors (Q1 and Q2) together have a voltage withstand rating of more than 1300 V. 202501452 Foreign version 12.02.2026 17 8. Circuit arrangement according to one of the preceding claims, wherein the first transistor (Q1) has a voltage withstand capability in a range between 500 and 700 V and the second transistor (Q2) has a voltage withstand capability in a range between 800 and 1000 V.

9. Power supply, preferably three-phase, with a circuit arrangement according to one of claims 1 to 8.

10. Use of a circuit arrangement according to any one of claims 1 to 8 for protection against exceeding a certain amount of an input voltage of an electronic circuit.

11. Method for protecting a circuit arrangement against exceeding a certain amount of an input voltage, comprising: a) Providing a first transistor (Q1) for the circuit arrangement, which is permanently switched on and directly connected to a terminal of an input voltage, b) Providing a second transistor (Q2) for the circuit arrangement, which is connected in series with the first transistor (Q1) and is clocked by a control circuit, c) Continuously monitoring the input voltage of the circuit arrangement for exceeding a certain amount by means of an overvoltage detection circuit (5) of the circuit arrangement, d) Switching off the first transistor (Q1) and the second transistor (Q2) of the circuit arrangement upon detection of an overvoltage by the overvoltage detection circuit (5), whereupon the input voltage is distributed between the first transistor (Q1) and the second transistor (Q2) by the avalanche effect.

12. Method according to claim 11, wherein, as soon as the input voltage is again in a safe range, the first transistor (Q1) and the second transistor (Q2) are reactivated, wherein the first transistor (Q1) remains permanently switched on and the second transistor (Q2) is clocked by the control circuit.