Manufacturing a part of a photonic integrated circuit

Abstract

A method of manufacturing a part of a photonic integrated circuit. The method comprises forming a passive photonic component on a first portion of a surface of a substrate, the passive photonic component comprising a first semiconductor part; and forming an electro-optical component by at least: i) forming a structure on a second portion of the surface of the substrate different to the first portion of the surface, the structure comprising a second semiconductor part; ii) forming a mask on the passive photonic component; iii) selectively contacting the second semiconductor part with a dopant source; and iv) heating the dopant source to selectively dope the second semiconductor part to form a doped semiconductor part.

Description

[0001] MANUFACTURING A PART OF A PHOTONIC INTEGRATED CIRCUIT

[0002] Background

[0003] A photonic integrated circuit (PIC) may have at least two types of components: passive photonic components such as waveguides, and electro-optical components such as optical amplifiers or photodetectors. These types of components may be referred to as ‘passive’ and ‘active’ respectively. The components of a PIC often share common layers of material to facilitate manufacture. The desired properties of the layers of material may be different for passive photonic components compared to electro-optical components. So, often the choice of the layers of material is a compromise between the desired properties of the passive and active components.

[0004] Brief Description of the Drawings

[0005] Figure 1 is a flow diagram of a method of manufacturing a part of a photonic integrated circuit in accordance with a first example;

[0006] Figure 2 shows schematically side cross sections during the method of Figure 1; Figure 3 is a flow diagram of a method of manufacturing a part of a photonic integrated circuit in accordance with a second example;

[0007] Figure 4 shows schematically side cross sections during the method of Figure 3; Figure 5 is a flow diagram of a method of manufacturing a part of a photonic integrated circuit in accordance with a third example;

[0008] Figure 6 shows schematically side cross sections during the method of Figure 5; Figure 7 is a flow diagram of a method of manufacturing a part of a photonic integrated circuit in accordance with a fourth example; and

[0009] Figure 8 shows schematically side cross sections during the method of Figure 7.Detailed Description

[0010] Examples described herein relate to a method of manufacturing a part of a PIC and to a part of a PIC. In examples, the part of the PIC comprises a passive photonic component and an electro-optical component that are monolithically integrated into the same structure, e.g., are on a shared substrate. In other words the PIC may be considered a monolithic PIC.

[0011] In examples, the passive photonic component is for passive functions performed by the PIC which do not require an electrical current and / or an electrical contact. For example, the passive photonic component may be or comprise a waveguide. The electro-optical component is for electro-optical (or ‘active’) functions performed by the PIC which do involve electrical current or voltage, for example, amplification of light.

[0012] It is desirable for a dopant concentration to be different for respective semiconductor parts of the passive photonic component and the electro-optical component. This is, for example, because increasing dopant concentration increases optical losses, which are undesirable in a passive photonic component; however, increasing dopant concentration increases the efficiency of an electro-optical effect utilised for the active photonic component, which is desirable for the active photonic component.

[0013] In examples described herein, the semiconductor part of the electro-optical component (herein the second semiconductor part) is selectively doped substantially without doping the semiconductor part of the passive photonic component (herein the first semiconductor part). This may facilitate the part of the PIC having greater electro-optical effects in the electro-optical component with a lower optical loss in the passive photonic component.

[0014] More specifically, example methods of manufacturing a part of a PIC herein comprise the following. A passive photonic component is formed on a first portion of a surface of a substrate. The passive photonic component includes a first semiconductor part. An electro-optical component is formed in at least the following four steps. A structure is formed on a second portion of the surface of the substrate. The structure comprises a second semiconductor part. The second portion of the surface of the substrate is different to the first portion of the surface of the substrate. Next, a mask is formed on the passive photonic component. Then, the second semiconductor part is selectively contacted with a dopant source. Then, the dopant source is heated to selectively dope the second semiconductor part to form a doped semiconductor part. Selectively contacting the second semiconductor part with the dopant source for example comprises contacting the second semiconductor part with the dopant source substantially without (e.g. without, or without, given measurement or manufacturingtolerances) contacting the first semiconductor part with the dopant source. Similarly, selectively doping the second semiconductor part using the dopant source for example comprises doping the second semiconductor part using the dopant source substantially without (e.g. without, or without, given measurement or manufacturing tolerances) doping the first semiconductor part using the dopant source. This approach for example gives greater control of the doping, e.g. to achieve a different dopant concentration in the passive photonic component and the electro-optical component.

[0015] Examples are now described with reference to the Figures. A description of some terms and features used when describing examples is given at the end of the detailed description.

[0016] A first example of a method 100 of manufacturing a part 200 of a PIC and of an associated part 200 of the PIC are now given with reference to Figures 1 and 2. Where a feature in relation to Figure 2 corresponds with a feature described using Figure 1, the same reference numeral is used. Figure 1 is a flow diagram of the method 100 of manufacturing the part 200 of the PIC. Figure 2 shows schematically side cross sections during the method of Figure 1. The relative orientations of the views in Figure 2 are indicated using Cartesian x-, y-, and z-axes.

[0017] Firstly, the method 100 comprises forming 101 a semiconductor layer 210 on a substrate 212. The semiconductor layer 210 is on a surface 208 of the substrate 212. The surface 208 of the substrate 212 is planar in the example shown in Figure 2. However, the substrate 212 may comprise at least one further surface (not shown in Figure 2) which is non-planar or, in further examples, the surface itself may be non-planar. For example, the substrate may be a half-processed wafer comprising non-planar topography. In such examples, the semiconductor layer may be formed on a planar or non-planar surface of the substrate. The semiconductor layer 210 is in contact with the substrate 212 in Figure 2. In other examples, the semiconductor layer is on but not in contact with the substrate. For example, the semiconductor layer may overlap the substrate, and be generally supported by the substrate, but with at least one intervening layer between the semiconductor layer and the substrate. The substrate 212 is a layer of indium phosphide (InP), although other substrate materials are envisaged and detailed later. The substrate 212 is provided before the method 100. Providing the substrate 212 may comprise forming the substrate, e.g., by epitaxy. The semiconductor layer 210 comprises a p-type semiconductor and is formed by epitaxy; other semiconductor layer materials and / or methods of fabrication are envisaged as detailed later. For example, the semiconductor layer may be an n-type semiconductor or an intrinsic semiconductor.In other examples, the semiconductor layer comprises a stack of semiconducting layers, e.g., n-type, intrinsic, and / or p-type semiconductor layers. For example, the semiconductor layer may comprise a n-type semiconductor layer in contact with the surface of the substrate, a p-type semiconductor layer, and an intrinsic semiconductor layer between the n-type semiconductor layer and the p-type semiconductor layer. In other examples, the semiconductor layer comprises a non-s emi conducting part, e.g., a dielectric part. Other arrangements of semiconductor layers are envisaged.

[0018] Next, the method 100 includes forming 102, from the semiconductor layer 210, a passive photonic component 220 and a structure 218. Forming the passive photonic component 220 and the structure 218 from the semiconductor layer 210 (in this case, from the same material as each other) may facilitate simplified and / or faster manufacture of the part 200 of the PIC. The forming 102 of the method 100, for example, includes etching the semiconductor layer 210; other processes are envisaged, such as lithography. The passive photonic component 220 is a ridge waveguide in this example, although other passive photonic components are envisaged in other examples, as detailed later. The passive photonic component 220 is on a first portion 214 of the surface 208 of the substrate 212, and the structure 218 is on a second portion 216 of the surface 208 of the substrate 212. The first and second portions 214, 216 are different from, and non-overlapping with, each other. The passive photonic component 220 includes, and in this example is formed of, a first semiconductor part, and the structure 218 includes, and in this example is formed of, a second semiconductor part. The first semiconductor part and the second semiconductor part are both p-type semiconductors. In other examples, the first semiconductor part and the second semiconductor part are both n-type semiconductors. In further examples, the first semiconductor part is an intrinsic semiconductor (e.g. formed of un-doped InP) and the second semiconductor part is an extrinsic semiconductor (e.g. an n-doped semiconductor), or vice versa.

[0019] Next, the method 100 includes forming 103 a mask 226 on the passive photonic component 220. The mask 226 is in contact with the passive photonic component 220; however in other examples the mask is not in contact with the passive photonic component but is nevertheless on, e.g. overlying, the passive photonic component. The mask 226 is not on or in contact with the structure 218. The mask 226 is e.g., formed by deposition. The mask 226 substantially covers the substrate 212, except for the second portion 216 of the surface 208 of the substrate 212 on which the structure 218 is formed. The structure 218 is substantially free from the mask 226, e.g. so that the structure 218 is free from the mask 226 or is free from themask 226 within measurement or manufacturing tolerances. The mask 226 is silicon nitride; however, other mask materials are envisaged, as described later.

[0020] Next, the method 100 includes contacting 104 the second semiconductor part of the structure 218 with a dopant source 228. A layer of the dopant source 228 is formed on the structure 218 (in this case, on the second semiconductor part forming the structure 218), and the mask 226. The passive photonic component 220 is separated from the dopant source 228 by the mask 226. In this way, the dopant source 228 is selectively brought into contact with the second semiconductor part forming the structure 218, substantially without contacting the first semiconductor part forming the passive photonic component 220 (due to the presence of the mask 226). The layer of the dopant source 228 is a solid. In other examples the dopant source is comprised by a gas or a plasma, as detailed later. The dopant source (which in this example is a p-dopant source) is zinc oxide; however other dopant sources (such as n-dopant sources) are envisaged, as detailed later.

[0021] Next, the method 100 includes heating 105 the dopant source 228. The heating 105 causes dopant within the dopant source 228 to diffuse from the dopant source 228 into the second semiconductor part of the structure 218 and be incorporated into the second semiconductor part, so as to selectively dope the second semiconductor part. Thus a doped semiconductor part is formed from the second semiconductor part, and a used dopant source 230 is formed from the dopant source 228. In this way, the electro-optical component 232 is formed. In this example, the heating 105 is after the contacting 104 of the second semiconductor part with the dopant source 228. The first semiconductor part is separated from the dopant source 228 by the mask 226 and is not doped by the dopant source 228.

[0022] After the heating 105, the used dopant source 230 (which may be considered to be a residual dopant source) may be removed. A wet etch process or a dry etch process may be used to remove the used dopant source 230 that remains after the heating 105.

[0023] Further examples are now described with reference to the remaining Figures.

[0024] A second example of a method 300 of manufacturing a part 400 of a PIC and of an associated part 400 of a PIC are now given with reference to Figures 3 and 4. Where a feature in relation to Figure 4 corresponds with a feature described using Figure 3, the same reference numeral is used. Figure 3 is a flow diagram of a method 300 of manufacturing the part 400 of the PIC. Figure 4 shows schematically side cross sections during the method of Figure 3. The relative orientations of the views in Figure 4 are indicated using Cartesian x-, y-, and z- axes. Where a feature in relation to Figures 3 or 4 corresponds with a feature described using Figures 1 or 2, a reference numeral is used which is 200 greater than the corresponding referencenumeral used for Figures 1 or 2 (e.g., 212 in Figure 2 is 412 in Figure 4); corresponding descriptions for such features apply here also.

[0025] Firstly, the method 300 comprises forming 301 a passive photonic component 420 and a structure 418. The passive photonic component 420 is on a first portion 414 of a surface 408 of a substrate 412, and the structure 418 is on a second portion 416 of the surface 408 of the substrate 412. The passive photonic component 420 includes, and in this example is formed of, a first semiconductor part, and the structure 218 includes, and in this example is formed of, a second semiconductor part. The first semiconductor part and the second semiconductor part are made of the same material in this example, but need not be in other examples. For example, the second semiconductor part may be formed by re-growth and / or from different epitaxial layers than the first semiconductor part.

[0026] Next, the method 300 includes forming 302 a mask 426 on and in contact with the passive photonic component 420. The mask 426 is not on or in contact with the structure 418. The mask 426 is e.g., formed by deposition.

[0027] Next, the method 300 includes forming 303 an inhibitor 434 on the mask 426. The inhibitor 434 is for achieving selective deposition of a dopant source 428 on the structure 418. The inhibitor 434 in this example is a molecular inhibitor, which inhibits binding of a dopant source 428 to the mask 426. In this example and other examples herein, the mask (e.g. a so-called ‘hard mask’, which is discussed further below) may inhibit diffusion of a dopant from the dopant source through the mask.

[0028] Next, the method 300 includes forming 304 a layer of a dopant source 428 on the structure 418 (in this case, on the second semiconductor part of the structure 418). The second semiconductor part of the structure 418 is selectively contacted by the dopant source 428. The inhibitor 434 otherwise inhibits formation of the dopant source 428, e.g., preventing or inhibiting formation of the dopant source on the mask 426. In other words, contact between the first semiconductor part of the passive photonic component 420 and the dopant source 428 is inhibited (and in this case, prevented) by the inhibitor 434 and the mask 426 deposited on the first semiconductor part of the passive photonic component 420. The inhibition of the formation of the dopant source where it is not desired, i.e. in locations other than on the structure 418, may facilitate a reduction in undesired doping of other structures of the part of the PIC.

[0029] Next, the method 300 includes heating 305 the dopant source 428 to dope the second semiconductor part of the structure 418 to form a doped semiconductor part and thus form the electro-optical component 432. The second semiconductor part of the structure 418 isselectively doped by the dopant source 428, substantially without doping the first semiconductor part of the passive photonic component 420 (which is not in contact with the dopant source 428). This leaves a used dopant source 430. In other examples, further processing, such as etching or deposition of other layers is used to form the electro-optical component. During the heating 305, the layer of the dopant source 428 is substantially not on the first semiconductor part of the passive photonic component 420 and is substantially not on the passive photonic component 420, such as not on or not on within measurement or manufacturing tolerances. This may facilitate the first semiconductor part and the passive photonic component 420 not or substantially not being doped during the heating 305 and / or the contacting 304. After the heating 305, the excess dopant source 430 remaining on the surface may be removed, e.g. using a wet etch process or a dry etch process.

[0030] A third example of a method 500 of manufacturing a part 600 of a PIC and of an associated part 600 of a PIC are now given with reference to Figures 5 and 6. Where a feature in relation to Figure 6 corresponds with a feature described using Figure 5, the same reference numeral is used. Figure 5 is a flow diagram of a method 500 of manufacturing the part 600 of the PIC. Figure 6 shows schematically side cross sections during the method of Figure 5. The relative orientations of the views in Figure 6 are indicated using Cartesian x-, y-, and z- axes. Where a feature in relation to Figures 5 or 6 corresponds with a feature described using Figures 1 or 2, a reference numeral is used which is 400 greater than the corresponding reference numeral used for Figures 1 or 2 (e.g., 212 in Figure 2 is 612 in Figure 6); corresponding descriptions for such features apply here also.

[0031] Firstly and similarly to the method 300 of the second example, the method 500 of the third example comprises forming 501 a passive photonic component 620 and a structure 618. The passive photonic component 620 is on a first portion 614 of a surface 608 of a substrate 612, and the structure 618 is on a second portion 616 of the surface 608 of the substrate 612. The passive photonic component 620 includes, and in this example is formed of, a first semiconductor part, and the structure 618 includes a second semiconductor part 618A. The first semiconductor part and the second semiconductor part 618A are made of the same material in this example, but need not be in other examples.

[0032] Next and similarly to the method 300 of the second example, the method 500 includes forming 502 a mask 626 on and in contact with the passive photonic component 620. The mask 626 is not on or in contact with the structure 618.

[0033] Next and in contrast to the previously described example methods 100, 300, the method 500 includes forming 503, by atomic layer deposition, a layer of a dopant source 628 on and incontact with the second semiconductor part 618A of the structure 618. Atomic layer deposition is described in more detail later. The layer of the dopant source 628 is formed selectively on the second semiconductor part 618A, substantially without being formed on the first semiconductor part of the passive photonic component 620. Selective deposition of the dopant source 628 in contact with the second semiconductor part 618A in this manner, e.g. using atomic layer deposition, can allow the coverage of the dopant source 628 on the second semiconductor part 618A to be controlled or otherwise tuned in order to achieve a desired doping profile within the structure 618. This approach can be used to control the thickness, coverage and depth profile of the layer of the dopant source 628 on the second semiconductor part 618A with greater accuracy than may be achieved using solely a mask.

[0034] The structure 618 includes a third semiconductor part 618B. In this example, the third semiconductor part 618B is formed of the same material as the first and second semiconductor parts, although this need not be the case in other examples. In further examples, the structure 618 includes at least one further semiconductor part in addition to the second and third semiconductor parts 618A, 618B. In examples in which the structure comprises a plurality of parts (such as two or more parts), each of the parts of the structure 618 may be formed of the same or a different material to each other. For example, the structure 618 may be formed of a further, n-doped, semiconductor part adjacent to the substrate 612, an intrinsic semiconductor comprising quantum wells as the third semiconductor part 618B, and the second semiconductor part 618A as a part of the structure 618 that is doped selectively using the method 500 herein. In this example and the example of Figure 6, the third semiconductor part 618B is between the second semiconductor part 618A and the substrate.

[0035] In examples such as that of Figure 6, the layer of the dopant source 628 is not on or in contact with the third semiconductor part 618B. The atomic layer deposition is performed in a non-conformal regime so as to achieve non-conformal coating of the structure 618, for example to obtain a particular doping profile within the structure 618. The non-conformal regime may be a precursor-limited or co-reactant limited regime, as further detailed below. In this way, the layer of the dopant source 628 can be deposited with a relatively low conformality. The layer of the dopant source 628 is a hat on the structure 618. In some examples the layer of the dopant source is in contact with no more than at least one of: 40%, 20%, 15%. 10%, or 5% of a surface area of the structure 618. In some examples, the structure is rotated during the forming 503 of the layer of the dopant source 628, e.g., at no less than 100 revolutions per minute (RPM), or no less than 200 RPM. Atomic layer deposition typically involves a dopant source precursor and a co-reactant. The dopant source precursor may be diethyl zinc. For a diethyl zinc dopantsource precursor, suitable co-reactants include a water (H2O), ozone (O3) or oxygen (O2) plasma. In some examples, the forming 503 of the layer of the dopant source 628 is conducted under a partial pressure of the dopant source precursor and the co-reactant and a partial pressure of an inert gas, e.g., argon (Ar) or nitrogen (N2). A flow rate of the dopant layer precursor and / or the co-reactant over the structure 618 during the forming 503 of the layer of the dopant source 628 is, e.g., no more than 25 standard cubic centimetres per minute (SCCM), 20 SCCM, 15 SCCM, 10 SCCM, or 5 SCCM. SCCM is described later. In some examples, the layer of the dopant source is in contact with all of a surface area of the second semiconductor part. Further, in some examples the third semiconductor part is substantially free from the layer of the dopant source, not in contact with the layer of the dopant source, and / or separated from the layer of the dopant source. In other examples, the method includes forming an inhibitor on the mask before forming 503 the layer of the dopant source.

[0036] Next, the method 500 includes heating 504 the dopant source 628 to dope the second semiconductor part 618A of the structure 618 to form a doped semiconductor part 632A and thus form the electro-optical component 632. The second semiconductor part 618A is selectively doped, substantially without doping the first semiconductor part of the passive photonic component 620, due to the selective deposition of the dopant source 628 on the second semiconductor part 618A. This leaves a used dopant source 630. The third semiconductor part 618B is between the doped semiconductor part 632B and the substrate 612. In other examples, though, the third semiconductor part is not between the doped semiconductor part and the substrate. For example, the second and third semiconductor parts may be non-overlapping, e.g. so that the second and third semiconductor parts are each on different respective portions of the surface 608 of the substrate 612. As the layer of the dopant source 628 is not on or in contact with the third semiconductor part 618B, the third semiconductor part 618B is not doped during the heating 505. The electro-optical structure 632 includes the third semiconductor part 618B and the doped semiconductor part 632A. This may facilitate the dopant concentration being different in the doped semiconductor part 618A compared to the undoped semiconductor part 618B in the part 600 of the PIC. Here ‘undoped’ is used to indicate that it is not doped during the heating 505; however, the undoped part 632B may be doped during other processes or after the method 500. In other examples, the third semiconductor part 632B is partly doped, not substantially doped, or is free from dopant.

[0037] In some examples, the used dopant source 630 is removed and / or the mask 626 is removed.A fourth example of a method 700 of manufacturing a part 800 of a PIC and of an associated part 800 of a PIC are now given with reference to Figures 7 and 8. Where a feature in relation to Figure 8 corresponds with a feature described using Figure 7, the same reference numeral is used. Figure 7 is a flow diagram of a method 700 of manufacturing the part 800 of the PIC. Figure 8 shows schematically side cross sections during the method of Figure 7. The relative orientations of the views in Figure 8 are indicated using Cartesian x-, y-, and z- axes. Where a feature in relation to Figures 7 or 8 corresponds with a feature described using Figures 1 or 2, a reference numeral is used which is 600 greater than the corresponding reference numeral used for Figures 1 or 2 (e.g., 212 in Figure 2 is 812 in Figure 4); corresponding descriptions for such features apply here also.

[0038] Firstly, the method 700 comprises forming 701 a semiconductor layer 810 on a substrate 812. The semiconductor layer 810 includes a first n-type semiconductor layer 810A and a second n-type semiconductor layer 810B. In other examples, the semiconductor layer has an intrinsic semiconductor layer between the first n-type semiconductor layer and the second n-type semiconductor layer. In further examples, the semiconductor layer includes a p-type semiconductor layer.

[0039] Then, the method 700 comprises forming 702, from the semiconductor layer 810, a passive photonic component 820 and a structure 818, leaving a portion of the semiconductor layer 822. The passive photonic component 820 is on a first portion 814 of a surface 808 of a substrate 812, and the structure 818 is on a second portion 816 of the surface 808 of the substrate 812. The passive photonic component 820 includes a first semiconductor part 820A and a third semiconductor part 820B, and the structure 818 includes a second semiconductor part 818A and a fourth semiconductor part 818B. The third semiconductor part 820B and the fourth semiconductor part 818B are made of the same material as each other (but need not be in other examples), are n-type semiconductors, and are comprised by the portion of the semiconductor layer 822. The second semiconductor part 818A and the first semiconductor part 820A are n-type semiconductors, are made of the same material as each other (but need not be in other examples), and are formed from the second n-type semiconductor layer 810B. The portion of the semiconductor layer 822 is substantially the first n-type semiconductor layer 810A.

[0040] In other examples, the first 820A, second 818A, third 820B, and fourth 818B semiconductor parts are all p-type semiconductors. In some examples, the semiconductor layer comprises a layer of n-type semiconductor and / or a layer of p-type semiconductor. Other choices of types of semiconductors are envisaged.In other examples the structure comprises a first intrinsic semiconductor part between the second semiconductor part and the fourth semiconductor part. The passive photonic structure comprises a second intrinsic semiconductor part between the first semiconductor part and the third semiconductor part. In some such examples, the first intrinsic semiconductor part and the second intrinsic semiconductor part are comprised by an intrinsic semiconductor layer which may be comprised by the semiconductor layer.

[0041] Next, the method 700 includes forming 703 a mask 826 on and in contact with the first semiconductor part 820 A, the portion of the semiconductor layer 822, and part of the second semiconductor part 818A. The mask 826 is not on or in contact with a surface 836 of the second semiconductor part 818A, in other words, the surface 836 of the semiconductor part 818A is substantially free from the mask 826. The surface 836 of the second semiconductor part 818A is the top surface and is parallel to the second portion 816 of the surface of the substrate 812. In other examples, the surface of the second semiconductor part uncontacted by the mask is a side surface of the structure and is, e.g. perpendicular to the second portion of the surface of the substrate. The portion of the semiconductor layer 822 inhibits and / or prevents forming of the mask 826 in contact with the third semiconductor part 820B and the fourth semiconductor part 818B. In other examples, the portion of the semiconductor layer inhibits forming of the mask in contact with at least part of at least one of the third semiconductor part or the fourth semiconductor part. This may facilitate the portion of the semiconductor layer and the mask being between the later-used dopant source and the third and fourth semiconductor parts, which may facilitate the inhibition or prevention of doping of the third and fourth semiconductor parts.

[0042] In other examples not shown here, the method includes forming an inhibitor on the mask. The inhibitor is for at least one of: inhibiting binding of a dopant source to the mask, or inhibiting diffusion of a dopant from the dopant source through the inhibitor.

[0043] Next, the method 700 includes forming 704 a layer of a dopant source 828 on the mask 826 and the surface 836 of the second semiconductor part 818A. In other examples, e.g., those with an inhibitor on the mask, the layer of the dopant source is not formed on the mask. This allows the dopant source 828 to be selectively brought into contact with the second semiconductor part 818A (in this case, with the surface 836 of the second semiconductor part 818A that is exposed through the mask 826), with the mask 826 inhibiting contact between the dopant source 828 and the first semiconductor part 820A (and the third semiconductor part 820B) of the passive photonic component 820.

[0044] Next, the method 700 includes heating 705 the dopant source 828 to dope the second semiconductor part 818A of the structure 818 to form a doped semiconductor part 832A andthus form the electro-optical component 832 and leave a used dopant source 830. The second semiconductor part 818A is selectively doped by the dopant source 828, substantially without doping the first semiconductor part 820A, as the dopant source 828 is in contact with the second semiconductor 818A but not in contact with the first semiconductor part 820 A. After the heating 705, the used dopant source 830 may be removed, e.g. using a wet etch process or a dry etch process.

[0045] Example materials for the dopant source, mask, second semiconductor part, and inhibitor referred to previously are now given. For each set of example materials all of the combinations of the indicated materials are included.

[0046] A first set of example materials includes the following. The dopant source comprises at least one of zinc oxide or diethyl zinc. The zinc oxide may be a zinc oxide layer. The mask comprises at least one of amorphous silicon, silicon nitride, silicon oxynitride or silica. The inhibitor comprises a volatile aldehyde. A volatile aldehyde preferentially binds with mask materials such as this and not a semiconductor material of the structure 418, such as InP, GaP, InAlGaP and so on. In these examples, the inhibitor inhibits deposition of the chemical precursor for the solid-phase dopant source on a mask, such as a hard mask. A volatile aldehyde herein is for example a molecule that has an aldehyde functional group (i.e., R-CH=O), and has a boiling point of no more than at least one of: 360 Kelvin, 320 Kelvin, or 280 Kelvin. The volatile aldehyde is, for example, formaldehyde, acetaldehyde, butyraldehyde.

[0047] A second set of example materials includes the following. The dopant source comprises at least one of zinc oxide, cadmium oxide, magnesium oxide, or tin oxide. The layer of the dopant source may be formed by atomic layer deposition (ALD) using a precursor comprising at least one of: diethyl zinc ((C2Hs)2Zn), dimethyl cadmium, or bis(ethylciclopentadienyl) magnesium. The ALD may include using a co-reactant, e.g., at least one of: water, ozone, or oxygen. The mask comprises at least one of: SiNx, SiO2, SiON, and a-Si (amorphous silicon). The inhibitor comprises a photopattemable polymer with non-reactive surface sites, e.g. CH3 or CFXmoieties. The semiconductor part may include gallium arsenide. Heating the dopant source may comprise heating the dopant source to no less than 1073 Kelvin.

[0048] A third set of example materials includes the following materials. The dopant source includes hydrogen sulfide plasma. The mask is a hard mask. The method may comprise annealing the doped semiconductor part.

[0049] A fourth set of example materials includes the dopant source including germanium oxide (GeCh). Heating the dopant source may include heating the dopant source to no less than 473 Kelvin in the presence of hafnium oxide (HfCh).A fifth set of example materials includes the dopant source including cadmium oxide and the second semiconductor part including zinc oxide (ZnO). Heating the dopant source may include heating the dopant source to no less than 873 Kelvin.

[0050] A sixth set of example materials includes the dopant source including magnesium oxide and the second semiconductor part including silicon. Heating the dopant source may include heating the dopant source to no less than 873 Kelvin.

[0051] Each of the sets of example materials may facilitate the dopant source being inhibited from binding to the mask by the inhibitor. This may reduce undesired doping of, e.g., other portions of the part of the PIC.

[0052] A seventh set of example materials includes the following. The dopant-source comprises zinc oxide, the dopant source comprises diethyl zinc, and / or the dopant is a zinc cation. This may facilitate electron hole doping, e.g., so that the doped semiconductor structure is p-type.

[0053] A description of some terms and features used previously is now given, to elaborate on features of examples described herein.

[0054] A material herein refers to an atomic composition of a compound. The composition relates to the types of atoms included in the material in question, and also to the relative quantities of those types of atoms. For example, InP is a particular material, while InGaAsP is referred to as a different material because it also comprises gallium and arsenic atoms, making the composition different. For example, doped InP where the dopant is zinc is referred to as a different material to doped InP where the dopant is sulfur. Also, for example, p-doped InP with a particular concentration of zinc as dopant is referred to as a different material to p-doped InP with a different concentration of zinc as dopant (because the relative quantities of the types of atoms involved are different). Accordingly, a material is referred to as a different material on the basis of having a different dopant concentration. For example, the material of the doped semiconductor part is different to the material of the first semiconductor part and the second semiconductor part. For example, the dopant type, dopant concentration, and / or a dopant concentration gradient of the doped semiconductor part is different to that of the first semiconductor part and the second semiconductor part. Accordingly, the doped semiconductor part is a different material to the first semiconductor part and the second semiconductor part.

[0055] A semiconductor herein has a Fermi level within an electronic bandgap between its electronic valance and conduction bands. An energy of the electronic bandgap is low enough for the conduction band to be thermally populated by electrons or electron holes, for example at 298 Kelvin (K). An electrical conductivity of a semiconductor increases with temperature.An n-type semiconductor herein is a semiconductor that has been doped with an electron donor. Example electron donors for n-type semiconductors herein include germanium (Ge) sulfur (S) or tin (Sn). Other electron donors are envisaged. A p-type semiconductor herein is a semiconductor that has been doped with an electron hole donor. Example electron hole donors include zinc (Zn), cadmium (Cd), or magnesium (Mg). Other electron hole donors are envisaged. A dopant herein may be an electron donor, an electron hole donor, or an ion thereof.

[0056] Doping of the second semiconductor part herein is the diffusion of a dopant from the dopant source into the second semiconductor part to change the material of the second semiconductor part and form the doped semiconductor part. The doping may be different in different regions of the second semiconductor part, e.g., to provide a doped semiconductor part with differing properties in different regions of the doped semiconductor part. The diffusion rate of dopant through into the second semiconductor part may depend on the material of the second semiconductor part. In some examples the type of semiconductor is changed by the doping, e.g., the structure may have an n-type semiconductor part, and the electro-optical component may have a p-type semiconductor part or vice versa.

[0057] In some examples, the structure and the passive photonic component each comprise an intrinsic semiconductor part between two n-type semiconductor parts (an n-i-n structure); then, as described above, one of the n-type semiconductor parts of the structure is doped to form an electro-optical component comprising the intrinsic semiconductor part between a p-type semiconductor part and the remaining n-type semiconductor part (a p-i-n structure). This may facilitate the integration of an electro-optical component with a p-i-n with a passive photonic component with a n-i-n. It is envisaged that the types of these examples could be reversed. The electro-optical component and / or the passive photonic component may have a semiconductor junction. The semiconductor junction at least one of a n-i-n, n-i-p, or n-i-n-p junction. Other semiconductor junction arrangements are envisaged. The semiconductor junction may be vertical or horizontal, in other words the different semiconductor types of the semiconductor junction may be in a vertical stack on the substrate or a horizontal stack on the substrate.

[0058] A dopant source herein is a material comprising the dopant. The dopant source may be provided as at least one of a layer. The layer of dopant source may be solid which may facilitate less undesired doping elsewhere in the part of the PIC. A plasma may comprise the dopant source, e.g., during the contacting of the dopant source with the second semiconductor part. This may facilitate efficient doping and / or increase the rate of doping.

[0059] The semiconductor layer herein may be pattemable, photo-pattemable, a resist, or etchable.In some examples, at least one of the structure, the passive photonic component, the electro-optical component, the semi, the cladding, or the substrate comprises at least one of: a semiconductor, an n-type semiconductor, or a p-type semiconductor.

[0060] A PIC herein integrates a plurality of photonic functions, for example any of a semiconductor optical amplifier, an electro-optical modulator, an interferometer, a Mach-Zehnder interferometer, a grating, a laser or a photodetector, though other photonic functions are envisaged. In some examples, a PIC is configured for use with at least one of ultraviolet light, visible light, or infrared light. Optical radiation e.g. includes at least one of ultraviolet light, visible light, or infrared light. In some examples, a PIC comprises an electrical circuit. PICs may be used for communications devices, biomedical devices, and photonic computing, but other applications are envisaged.

[0061] Some examples relate to a part of a PIC obtained by the method of manufacturing a PIC described herein.

[0062] Some examples relate to a PIC comprising the part of a PIC described herein.

[0063] A component of a PIC can be considered a structure, building block or assembly designed to perform or contribute to a particular optical and / or electrical function in the PIC, such as coupling, waveguiding, amplification, modulation, interfere or another optical function. A component can be electrically active or electrically passive depending, e.g., on whether the component comprises electrodes for application of a voltage and / or electrical current for the component to perform the optical function.

[0064] In some examples the PIC is for at least one of: interferometry, light detection and ranging (LiDAR), frequency-modulated continuous wave light detection and ranging (FMCW LiDAR), coherent detection, telecommunications, or quantum computing. Other uses of the PIC are envisaged.

[0065] A substrate may also be referred to as a chip, a slice, a wafer, or a layer. A substrate is, e.g., a generally planar or relatively thin portion of material, and in some examples is crystalline. A substrate may be a disc or part of a disc of crystalline Si for use in a semiconductor fabrication plant, and in some such examples is a 125 gram, 300 millimetre diameter disc. A substrate may alternatively be a disc or part of a disc of crystalline InP for use in a semiconductor fabrication plant, and in some such examples is a 25 millimetre, 51 millimetre, 76 millimetre, 100 millimetre, 200 millimetre or 300 millimetre diameter disc. A substrate referred to herein is, for example, a single layer of the same homogenous material, though it is envisaged for other examples that a substrate instead comprises one or more layers or portions each deposited or formed independently of each other (for example one afteranother during a manufacture process to form a stack of sub-layers which together could be considered a substrate). In some examples, a substrate comprises portions of different materials, for example, for fabrication.

[0066] In some examples, the substrate herein is a semiconductor, a III-V semiconductor, a polymer, and / or a dielectric. In some examples, the substrate comprises at least one of: silicon (Si), gallium (Ga), germanium (Gr), lithium niobate (LiNbCh), graphene (C), indium (In), or an alloy, oxide, nitride, or phosphide of at least one of such.

[0067] In some examples, the layers, parts or portions herein is a single layer of the same homogenous material, though it is envisaged for other examples that a layer instead comprises one or more sub-layers or portions each deposited or formed independently of each other (e.g., one after another during a fabrication process to form a stack of sub-layers which together could be considered a layer). A layer or portion may have sub-portions of different materials, for example, for fabrication. Sub-portions of a layer or portion may have different dopant concentrations.

[0068] An electro-optical component herein may be at least one of: a semiconductor optical amplifier, a multi quantum well structure, a quantum dot layer, a photodetector, an electro-optical modulator, a Mach-Zehnder modulator, an avalanche photodiode (APD), or a wavelength converter. An electro-optical component herein may be considered an active photonic component. An electro-optical component herein may be configured to generate, modulate, or detect light.

[0069] In some examples the electro-optical component comprises indium gallium arsenide phosphide (InGaAsP).

[0070] The passive photonic component herein may be: a waveguide, an optical coupler, an optical splitter, an optical filter, an optical antenna, an interferometer, or a multi-mode interferometer (MMI). A passive photonic component herein may be configured to: guide, split, combine, or filter light without requiring electrical power.

[0071] A waveguide herein is for guiding light; when a waveguide is in use light propagates along the waveguide. A waveguide comprises a core and cladding, e.g., at least partly in contact with the core. In some examples, the cladding includes a least one of: a solid, a fluid, gas, air, or a vacuum. Properties of a waveguide at least partly confine light propagating along the waveguide to within the waveguide, including, for example: a boundary of the waveguide, a boundary between the waveguide layer and the cladding, the refractive index of the waveguide layer, the refractive index of the cladding, and / or the structure of the waveguide. For example, light propagating along the waveguide might be predominantly within the core. In someexamples, the boundary between the core and the cladding can be thought of as resulting in constructive interference of light which confines light to propagate substantially within the core. An evanescent field may exist in the cladding when light is guided by the waveguide. The cladding may comprise a solid structure; however, in some examples the cladding comprises gas, liquid, and / or a vacuum in contact with the waveguide layer. The core may have a greater refractive index than the cladding for the wavelengths of light guided by the waveguide. In some examples, the cladding comprises a plurality of portions, e.g., with different refractive indices. Examples of such cladding include step-index cladding and graded-index cladding. In some examples the waveguide comprises a plurality of cores; such waveguides may be referred to as multi-core waveguides.

[0072] When the waveguide herein is in use, light propagates along the waveguide in the light propagation direction. The light propagation direction is parallel to the Poynting vector of light propagating along the waveguide. The light propagation direction is the general propagation direction of an energy of light propagating along the waveguide.

[0073] In some examples the waveguide comprises indium gallium arsenide phosphide (InGaAsP).

[0074] Although examples herein illustrate the formation of a single electro-optical component and a single passive photonic component on a substrate, it is to be appreciated that there may be a plurality of electro-optical components and / or a plurality of passive photonic components disposed on the substrate. At least one set of an electro-optical component and a passive component may be formed using the methods described herein. Respective electro-optical components arranged on the substrate may be similar to, the same as or different from the electro-optical component of examples herein. Similarly, respective passive photonic components arranged on the substrate may be similar to, the same as or different from the passive photonic component of examples herein. For example, there may be a plurality of passive waveguides and active electro-optical components arranged on the substrate.

[0075] In some examples, any of the portions, layers, materials, or electrodes described herein, comprises at least one of a semiconductor, a dielectric, or a polymer.

[0076] In various examples, a semiconductor described herein, comprises at least one of Si, InP, gallium arsenide (GaAs), gallium antimonide (GaSb), gallium nitride (GaN), indium gallium arsenide (InGaAs), indium gallium arsenide phosphide (InGaAsP), indium aluminium arsenide (InAlAs), indium aluminium gallium arsenide (InAlGaAs), AlGaAs, InGaAsP, zinc oxide (ZnO), or lithium niobate (LiNbCE). Other materials are envisaged in further examples.In some examples herein forming comprises a manufacture process, e.g., using known techniques such as: epitaxy, metalorganic vapour-phase epitaxy (MOVPE), surface passivation, lithography, photolithography, ion implantation, etching, dry etching ion etching, wet etching, buffered oxide etching, plasma ashing, plasma etching, thermal treatment, annealing, thermal oxidation, chemical vapor deposition, atomic layer deposition, physical vapor deposition, molecular beam epitaxy, laser lift-off, electrochemical deposition, electroplating, chemical-mechanical polishing, wafer fusion, anodic bonding, or adhesion.

[0077] Atomic layer deposition (ALD) herein is a technique for deposition of a layer. ALD may comprise exposure of a surface on which the layer is being deposited on to a precursor and a co-reactant, e.g. in a cyclic fashion. The precursor may be a gas. The precursor may react with the surface in a self-limiting manner, e.g., facilitating uniform film growth. This may be repeated to increase conformality of the deposition. An inhibitor can be added to ALD using a cyclic dose scheme or prior to ALD, e.g. as a single dose.

[0078] Area-selective atomic layer deposition (AS-ALD) is ALS wherein the precursor reacts with a first portion of the surface and not with a second portion of the surface. This may be achieved by providing the first portion with a different chemical surface to the second portion.

[0079] A standard cubic centimetres per minute (SCCM) herein is a unit of flow rate of a fluid k G

[0080] and is defined in comparison to the SI unit of kilograms per second — by the following relationship.

[0081]

[0082] Wherein: Tnis a standard temperature in Kelvin (e.g., 237.15 Kelvin), pnis a standard pressure in kilograms per metre per second squared (e.g., 101000 kilograms per metre per second squared), Znis a compressibility factor (e.g., 1), Ruis the universal gas constant (8.31446261815324 Joules per kilogram per mol), and M is the molecular mass of the fluid (e.g., 0.1235 kilograms per mol).

[0083] Heating herein may comprise or be referred to as annealing. Heating herein may activate dopants and or the dopant source, e.g., by integrating dopant atoms of the dopant source into the semiconductor lattice of the second semiconductor part, e.g., making them electrically active. Heating herein is, e.g., to no less than 400°C, 600°C, 800°C, or 1000°C. Heating herein may comprise furnace annealing, and laser annealing.A monolayer here is a layer that is formed of constituent units and is substantially one constituent unit thick. The constituent units may be atoms, molecules, or cells. The monolayer herein is, e.g., a Langmuir monolayer, a Gibbs monolayer, hydrophobic and / or self-assembled.

[0084] A self-assembled monolayer (SAMs) herein is a monolayer that forms spontaneously on a surface at least partly by adsorption, e.g., a surface of the mask. In some examples, the constituent units of the SAM each include a head group, and a tail group. The “head group” is to bind to the mask, and a “tail group” is to extends away from the mask. The head group may include at least one of a thiol, a silane, or a phosphonate.

[0085] Etching referred to herein is the use of an etchant to remove material, for example, by dissolving or vaporising the material in the etchant. The etchant is chosen depending on the material being etched and any material that is not to be etched as different materials will be etched at a different rate. If a first material is more resistant to an etchant than a second material, in the same conditions (such temperature or pressure) the first material will be etched at a slower rate than the second material, e.g. fewer units of mass or volume of the first material will be dissolved or vaporised into the etchant per unit time than the second material. Etching herein comprises at least one of wet etching or dry etching. In some examples, etching comprises at least one of: isotropic etching, anisotropic etching, or under-etching. In some examples, the mask is highly resistant to the dopant used to prevent doping by the dopant through the mask. In some examples, the mask is removed after the doping. In some examples the mask comprises at least one of silicon (Si), silicon nitride (SiN, SisN^, chromium (Cr), silicon oxide (SiCh), silicon carbide (SiC), or carbon-doped hydrogenated silicon oxide (SiOCH). The mask may be referred to as a ‘hard mask’. In some examples, forming the mask comprises: depositing a mask precursor on the structure and the passive photonic component; and removing a part of the mask precursor on the structure to form the mask. In some examples, removing part of the mask comprises lithography and / or etching.

[0086] In wet etching herein a liquid-phase etchant is used to dissolve material. Example liquid-phase etchants include hydrochloric acid (HC1), hydrofluoric acid (HF), phosphoric acid (H3PO4), acetic acid (CH3COOH), citric acid (CeHsO?), nitric acid (HNO3), ethylenediamine pyrocatechol (EDP), potassium hydroxide (KOH), isopropyl alcohol (IPA), tetramethyl ammonium hydroxide (TMAH), hydrogen peroxide (H2O2), water (H2O), and mixtures thereof. Other liquid-phase etchants are envisaged. In some examples, a mixture of HCL, H3PO4 and H2O is used, which etches the desired material. In some examples, etchants for wet etching include a catalyst such metal particles.In dry etching herein a plasma-phase etchant is used to dissolve material. In some examples, dry etching is plasma etching. Example plasma-phase etchants include tetrafluoromethane (CF4), sulfur hexafluoride (SFg), nitrogen trifluoride (NF3), fluoroform (CHF3), tetrachloromethane (CCI4), silicon tetrachloride (SiCU), boron trichloride (BCI3), dichlorodifluoromethane (CCI2F2), chlorine Ch, argon (Ar), nitrogen (N2), hydrogen (H2) or mixes thereof.

[0087] Isotropic etching herein is when the material being etched is etched at the same rate (or has the same resistance to the etchant) independent of the orientation of the material. Anisotropic etching herein is when the material being etched is etched at a different rate (or has a different resistance to the etchant) dependent of the orientation of the material, such as because of the crystal planes of the material.

[0088] Dashed lines in the Figures herein (for example indicating the substrate 212 in Figure 2) that are not labelled with a figure numeral are used to indicate where the feature may extend laterally beyond the illustration (for example, as to other parts of the sport size converter or the PIC), or the boundary within a layer (e.g., the boundaries of the fourth semiconductor part 818B).

[0089] It is to be understood that any feature described in relation to any one example may be used alone, or in combination with other features described, and may also be used in combination with one or more features of any other of the example, or any combination of any other of the examples. Furthermore, equivalents and modifications not described above may also be employed without departing from the scope of the accompanying claims.

[0090] For example, aspects of the method 300 of Figures 3-4 can be combined with aspects the methods 500, 700 of Figures 5-6 and 7-8, respectively. For example, an inhibitor (similar to or the same as the inhibitor 434 used in the method 300 of Figures 3-4) can be deposited on the mask 626 of the method 500 of Figures 5-6, before selectively depositing the layer of the dopant source 628 on and in contact with the second semiconductor part 618A of the structure 618, e.g. using ALD. An inhibitor similar to or the same as the inhibitor 434 of the method 300 of Figures 3-4 may be used similarly in the method 700 of Figures 7-8. For example, the inhibitor 434 of the method 300 of Figures 3-4 may be deposited on the mask 826 of the method 700 of Figures 7-8 to inhibit diffusion of a dopant from the dopant source 836 into the mask 826, which can facilitate removal of the mask 826 subsequently.

Claims

CLAIMS1. A method of manufacturing a part of a photonic integrated circuit, the method comprising:forming a passive photonic component on a first portion of a surface of a substrate, the passive photonic component comprising a first semiconductor part; andforming an electro-optical component by at least:i) forming a structure on a second portion of the surface of the substrate different to the first portion of the surface, the structure comprising a second semiconductor part;ii) forming a mask on the passive photonic component;iii) selectively contacting the second semiconductor part with a dopant source; andiv) heating the dopant source to selectively dope the second semiconductor part to form a doped semiconductor part.

2. The method of claim 1, wherein the second semiconductor part is of the same material as the first semiconductor part.

3. The method of claim 1 or claim 2, comprising:before i), forming a semiconductor layer on the surface of the substrate,and wherein:forming the passive photonic component comprises forming the passive photonic component from the semiconductor layer; andforming the structure comprises forming the structure from the semiconductor layer.

4. The method of claim 3, wherein the semiconductor layer comprises at least one of: a layer of an n-type semiconductor, and a layer of a p-type semiconductor.

5. The method of claim 3 or 4, wherein:a portion of the semiconductor layer remains after i); andduring ii), the portion of the semiconductor layer inhibits forming of the mask in contact with at least part of:a third semiconductor part of the passive photonic component, or a fourth semiconductor part of the structure.

6. The method of any previous claim, wherein the first semiconductor part and the second semiconductor part are:an n-type semiconductor, ora p-type semiconductor.

7. The method of any previous claim, wherein the mask is configured to inhibit diffusion of a dopant from the dopant source through the mask.

8. The method of any previous claim, comprising, between ii) and iii):forming an inhibitor on the mask, the inhibitor for inhibiting binding of the dopant source to the mask.

9. The method of claim 8, wherein:the dopant source comprises at least one of zinc oxide or diethyl zinc;the mask comprises at least one of amorphous silicon, silicon nitride, silicon oxynitride, or silica; andthe inhibitor comprises a volatile aldehyde.

10. The method of claim 8, wherein:the dopant source comprises at least one of zinc oxide, cadmium oxide, magnesium oxide or tin oxide;the mask comprises at least one of: SiOx, SiNx, or a-Si; andthe inhibitor comprises a photo-pattemable resist.

11. The method of any of claims 1 to 8, wherein at least one of:the dopant source comprises zinc oxide;the dopant source comprises diethyl zinc; orthe dopant is a zinc cation.

12. The method of claim 8, wherein:the dopant source comprises hydrogen sulfide plasma; andthe mask is a hard mask.

13. The method of any previous claim, wherein the electro-optical component comprises a third semiconductor part, and:the third semiconductor part is an n-type semiconductor and the doped semiconductor part is a p-type semiconductor; orthe third part is a p-type semiconductor and the doped semiconductor part is an n-type semiconductor.

14. The method of claim 13, wherein the third semiconductor part is between the doped semiconductor part and the substrate.

15. The method of claim 13, wherein the third semiconductor part is not between the doped semiconductor part and the substrate.

16. The method of any previous claim, wherein iii) comprises:forming a layer of the dopant source on the second semiconductor part.

17. The method of claim 16, wherein the layer of dopant source is solid.

18. The method of claim 16 or 17, wherein during iv):the layer of the dopant source is substantially not on the first semiconductor part and the layer of the dopant is substantially not on the passive photonic component.

19. The method of any of claims 16 to 18, wherein:forming the layer of the dopant source comprises atomic layer deposition, and after iii), the layer of the dopant source is in contact with no more than 40% of a surface area of the structure.

20. The method of any of claims 15 to 19, wherein after iii):forming the layer of the dopant source comprises atomic layer deposition; and the layer of the dopant source is in contact with no more than 20% of the surface area of the structure.

21. The method of any of claims 1 to 15, wherein in iii) a plasma comprises the dopant source.

22. The method of any previous claim, wherein the passive photonic component is a waveguide.

23. The method of any previous claim, wherein the electro-optical component is at least one of:a semiconductor optical amplifier,a multi quantum well structure,a quantum dot layer,a photodetector, oran electro-optical modulator.

24. The part of a photonic integrated circuit obtained by the method of any previous claim.

25. A photonic integrated circuit comprising the part of claim 24.

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