Semiconductor device

Abstract

The present invention improves heat dissipation from a mounting surface side of a semiconductor chip.　This semiconductor device comprises a semiconductor chip and an interposer provided with a through electrode electrically connected to the semiconductor chip, the semiconductor chip being mounted on the interposer. The base material of the interposer may be a metal, a semiconductor material, or an inorganic material. The semiconductor device may further comprise an underfill material provided between the semiconductor chip and the interposer. The semiconductor chip may be flip-chip mounted on the interposer. The semiconductor chip may comprise a bonding electrode bonded to the through electrode by Cu-Cu bonding.

Description

Semiconductor equipment

[0001] This technology relates to semiconductor devices. More specifically, this technology relates to semiconductor devices in which semiconductor chips are arranged on an interposer.

[0002] In semiconductor packaging, semiconductor chips are sometimes mounted on a wiring substrate. For example, a technique has been proposed to mount semiconductor chips on a wiring substrate with a conductor pattern via metal bumps (see, for example, Patent Document 1).

[0003] International Publication No. 2012 / 029579

[0004] However, the conventional technology described above had the potential to lead to a decrease in heat dissipation from the semiconductor chip mounting side due to the high thermal resistance of the wiring board.

[0005] This technology was developed in light of these circumstances and aims to improve heat dissipation from the mounting side of semiconductor chips.

[0006] This technology was developed to solve the aforementioned problems, and its first aspect is a semiconductor device comprising a semiconductor chip and an interposer on which the semiconductor chip is mounted and which is provided with through-electrodes that are electrically connected to the semiconductor chip. This results in heat being dissipated from the mounting side of the semiconductor chip to the interposer.

[0007] Furthermore, in the first aspect, the base material of the interposer may be a metal, a semiconductor, or an inorganic material. This results in improved heat dissipation from the semiconductor chip mounting side to the interposer.

[0008] Furthermore, in the first aspect, an underfill may be provided between the semiconductor chip and the interposer. This results in heat being dissipated from the mounting side of the semiconductor chip through through electrodes and also to the interposer through the underfill.

[0009] Furthermore, in the first aspect, the semiconductor chip may be flip-chip mounted on the interposer. This suppresses an increase in the mounting area of ​​the semiconductor chip while allowing heat to be dissipated from the mounting side of the semiconductor chip to the interposer.

[0010] Furthermore, in the first aspect, the semiconductor chip may include a bonding electrode that is Cu-Cu bonded to the through-electrode. This allows for a multi-pin semiconductor chip while improving thermal conductivity from the mounting side of the semiconductor chip to the through-electrode.

[0011] Furthermore, in the first aspect, the difference in the coefficient of thermal expansion between the semiconductor chip and the interposer may be 15 ppm / K or less. This has the effect of relieving the stress generated between the semiconductor chip and the interposer.

[0012] Furthermore, the first aspect may include an insulating layer that insulates the through-electrode from the interposer. This provides the effect that the through-electrode is insulated from the interposer even when the base material of the interposer is conductive.

[0013] Furthermore, the first side surface may include a wiring layer formed on the back side of the interposer and connected to the through-electrode. This provides the effect of setting the bonding position on the back side of the interposer without being constrained by the placement position of the through-electrode.

[0014] Furthermore, in the first aspect, a stiffener may be provided on the interposer so as to surround the semiconductor chip. This provides the effect of reinforcing the interposer with the stiffener while dissipating heat from around the semiconductor chip to the stiffener.

[0015] Furthermore, in the first aspect, the difference in the coefficient of linear expansion between the stiffener and the interposer may be 15 ppm / K or less. This has the effect of relieving the stress generated between the stiffener and the interposer.

[0016] Furthermore, in the first aspect, the stiffener may extend outward from the outer circumference of the interposer. This has the effect of increasing the heat dissipation area of ​​the stiffener.

[0017] Furthermore, in the first aspect, the stiffener may be bonded to the side surface of the semiconductor chip. In this case, an underfill or similar thermally conductive resin may be provided between the semiconductor chip and the stiffener. This improves heat dissipation from the area around the semiconductor chip to the stiffener.

[0018] Furthermore, in the first aspect, the stiffener may be provided with fastening holes into which fastening members to be fastened to the housing are inserted. This allows heat to be dissipated to the housing via the stiffener, while the semiconductor chip is fixed to the housing via the stiffener.

[0019] Furthermore, in the first aspect, a solid-state image sensor may be formed on the semiconductor chip. This allows the solid-state image sensor to receive light while improving heat dissipation from the solid-state image sensor.

[0020] Furthermore, in the first aspect, a transparent member disposed on the semiconductor chip may be provided. This allows the solid-state image sensor to receive light while sealing the light-receiving surface of the solid-state image sensor.

[0021] Furthermore, in the first aspect, the mounting substrate on which the semiconductor chip is mounted via the interposer may be provided. This improves the heat dissipation of the semiconductor chip while packaging the semiconductor chip.

[0022] Furthermore, in the first aspect, the semiconductor chip may include electronic components mounted adjacent to the interposer on the mounting substrate. This improves the heat dissipation of the semiconductor chip while adding the functionality of the electronic components to the semiconductor chip.

[0023] This is a diagram showing an example configuration of a semiconductor device according to the first embodiment. This is a perspective view showing an exploded view of an example configuration of a semiconductor device according to the first embodiment. This is a cross-sectional view showing an example of a manufacturing method for the first interposer according to the first embodiment. This is a cross-sectional view showing an example of a manufacturing method for the second interposer according to the first embodiment. This is a cross-sectional view showing an example of a manufacturing method for a semiconductor device configuration of a semiconductor device according to the second embodiment. This is a cross-sectional view showing an example configuration of a semiconductor device according to the third embodiment. This is a cross-sectional view showing an example configuration of a semiconductor device according to the fourth embodiment. This is a cross-sectional view showing an example configuration of a semiconductor device according to the fifth embodiment. This is a cross-sectional view showing an example configuration of a semiconductor device according to the sixth embodiment. This is a cross-sectional view showing an example configuration of a semiconductor device according to the seventh embodiment. This is a cross-sectional view showing an example configuration of a semiconductor device according to the eighth embodiment. This is a cross-sectional view showing an example configuration of a semiconductor device according to the ninth embodiment. This is a block diagram showing a schematic example configuration of a vehicle control system. This is an explanatory diagram showing an example of the installation position of the imaging unit.

[0024] The following describes embodiments for implementing this technology (hereinafter referred to as embodiments). The description will be in the following order: 1. First embodiment (an example in which a semiconductor chip is mounted on a mounting substrate via an interposer provided with through electrodes, and the semiconductor chip is flip-chip mounted on the interposer) 2. Second embodiment (an example in which a semiconductor chip is mounted on a mounting substrate via an interposer provided with through electrodes, and the semiconductor chip is Cu-Cu bonded to the interposer) 3. Third embodiment (an example in which a semiconductor chip is mounted on a mounting substrate via an interposer provided with through electrodes, and a stiffener is provided that extends laterally from the interposer so as to surround the semiconductor chip) 4. Fourth embodiment (an example in which a semiconductor chip is mounted on a mounting substrate via an interposer provided with through electrodes, and fastening holes are provided in the stiffener that extends laterally from the interposer so as to surround the semiconductor chip) 5. 5th Embodiment (An example in which a semiconductor chip is mounted on a mounting substrate via an interposer equipped with through electrodes, and a wiring layer connected to the through electrodes is formed on the back side of the interposer) 6. 6th Embodiment (An example in which a semiconductor chip is mounted on a mounting substrate via an interposer equipped with through electrodes, and the interposer is connected to a housing supporting a lens via a thermal conductive sheet) 7. 7th Embodiment (An example in which a semiconductor chip is mounted on a mounting substrate via an interposer equipped with through electrodes, and a stiffener around the semiconductor chip is fastened to a housing supporting a lens) 8. 8th Embodiment (An example in which a semiconductor chip is mounted on a mounting substrate via an interposer equipped with through electrodes, and electronic components placed adjacent to the interposer are also mounted on the mounting substrate) 9. 9th Embodiment (An example in which a mounting substrate on which a semiconductor chip is mounted via an interposer equipped with through electrodes is made into a WLCSP (Wafer Level Chip Size Package)) 10. Application Examples to Mobile Devices

[0025] <1. First Embodiment> Figure 1 is a diagram showing an example of the configuration of a semiconductor device according to the first embodiment, and Figure 2 is a perspective view showing an exploded view of the example of the configuration of a semiconductor device according to the first embodiment. In Figure 1, a is a cross-sectional view showing an example of the configuration of the semiconductor device 100, and in Figure 1, b is a plan view showing an example of the configuration of the semiconductor device 100. In Figure 1, a shows an example of the configuration cut along the line A1-A2 in Figure 1, b. Furthermore, the drawings used in the following explanation may differ in scale and shape from the actual structure in order to make each configuration easier to understand.

[0026] In the figure, the semiconductor device 100 includes a semiconductor chip P11 and an interposer 131. The semiconductor chip P11 may have optical elements or semiconductor elements formed on it.

[0027] The optical element may be a light-receiving element, a light-emitting element, or a display element. The light-receiving element may be an image sensor such as a CCD (Charged Coupled Device) sensor, a CMOS (Complementary Metal-Oxide Semiconductor) sensor, or a SPAD (Single Photon Avalanche Diode) sensor, or an EVS (Event-based Vision Sensor) sensor. The light received by the image sensor may be visible light, near-infrared light (NIR), short-wavelength infrared light (SWIR), ultraviolet light, or X-rays. The light-emitting element may be an LD (Laser Diode), LED (Light Emitting Diode), or VCSEL (Vertical Cavity Surface Emitting Laser). The display element may be a liquid crystal display element or an organic EL (Electro-Luminescence) element. The material used for the optical element may be a semiconductor such as Si, GaAs, InGaAs, or LiNbO ３ Alternatively, a dielectric material such as glass or transparent resin may be used.

[0028] The semiconductor elements may include transistors, resistors, capacitors, etc. A memory, processor, signal processing circuit, data processing circuit, or interface circuit may be formed as the semiconductor elements. Hardware circuits such as FPGAs (Field-Programmable Gate Arrays) or ASICs (Application Specific Integrated Circuits) may also be formed as the semiconductor elements. The materials used for the semiconductor elements may include Si, GaAs, SiC, GaN, or InGaAsP.

[0029] In the following explanation, an example of a back-illuminated solid-state image sensor being formed on the semiconductor chip P11 is shown.

[0030] In this configuration, the semiconductor chip P11 has pixels and pixel transistors arranged in a matrix along the row and column directions. Photodiodes can be formed in the pixels. The pixel transistors may include a reset transistor for resetting the pixels, a selection transistor for selecting pixels, a transfer transistor for transferring charge accumulated in the pixels, and an amplifier transistor that forms a source follower with the pixels.

[0031] The semiconductor chip P11 comprises a semiconductor substrate 111 and a wiring layer 112. The wiring layer 112 is stacked on the semiconductor substrate 111. A color filter 115 is formed on the back side of the semiconductor substrate 111 for each pixel. An on-chip lens 114 is formed on the color filter 115 for each pixel. The material of the color filter 115 and the on-chip lens 114 is, for example, SiO ２Insulating films such as SiN and SiCN, or transparent resins such as acrylic or polycarbonate can be used. The color filter 115 may contain pigments. The color filter 115 may, for example, form a Bayer array or a quad Bayer array. The color filter 115 may include an RGB filter, a complementary color filter, or a white filter. The material of the semiconductor substrate 111 may be Si, GaAs, SiC, GaN, InGaAs, or InP, etc.

[0032] The wiring layer 112 is provided with wiring 122 embedded in the insulating layer and land electrodes 124. The wiring layer 112 is also provided with vias 123 used for interlayer connections. A protruding electrode 119 is formed on the land electrode 124. The semiconductor chip P11 is flip-chip mounted on the interposer 131 via the protruding electrode 119. At this time, the semiconductor chip P11 can dissipate heat from its mounting side to the interposer 131. The insulating layer material used in the wiring layer 112 is, for example, SiO ２ SiN or SiCN can be used. The materials for the wiring 122, vias 123 and land electrodes 124 can be metals such as Al, Cu, AlCu, AlSiCu, or Co.

[0033] The interposer 131 forms a heat dissipation path from the mounting side of the semiconductor chip P11. The interposer 131 may also be an interposer substrate. To reduce stress between the interposer 131 and the semiconductor chip P11, the difference in the coefficient of linear expansion between the interposer 131 and the semiconductor chip P11 is preferably 15 ppm / K or less. The thermal conductivity of the base material of the interposer 131 is preferably greater than that of the mounting substrate 141. In this case, the base material of the interposer 131 may be a metal, semiconductor, or inorganic material. For example, the base material of the interposer 131 may be Cu, CuW, W, Al, Si, AlN, Al ２ O ３Other configurations are also possible. A through electrode 132 is formed on the interposer 131. The through electrode 132 penetrates the interposer 131 in its thickness direction. The through electrode 132 may be formed in a straight shape in the thickness direction of the interposer 131. The material of the through electrode 132 can be a metal such as Cu, Ti, Ta, Al, W, Ni, Ru, or Co, and a laminated structure of multiple materials may be used. To insulate the interposer 131 from the through electrode 132, an insulating layer 133 may be formed between the base material of the interposer 131 and the through electrode 132. Here, by joining the protruding electrode 119 to the through electrode 132, electrical conductivity can be established between the semiconductor chip P11 and the through electrode 132. A protruding electrode 134 is formed on the back side of the through electrode 132. The interposer 131 is flip-chip mounted on the mounting substrate 141 via the protruding electrode 134.

[0034] Land electrodes 142 are formed on the mounting substrate 141. Land electrodes 143 are formed on the back surface of the mounting substrate 141. The base material of the mounting substrate 141 may be, for example, ceramic or resin. Wiring and vias may be formed on the mounting substrate 141. The mounting substrate 141 may be a multilayer substrate. Here, by joining the protruding electrode 134 to the land electrode 142, electrical conductivity can be established between the interposer 131 and the mounting substrate 141. A protruding electrode 144 is formed on the land electrode 143. The mounting substrate 141 is flip-chip mounted on the motherboard 151 via the protruding electrode 144.

[0035] Land electrodes 152 are formed on the motherboard 151. Wiring and vias may be formed on the motherboard 151. The motherboard 151 may also be a multilayer board. Here, by joining the protruding electrodes 144 to the land electrodes 152, electrical conductivity can be established between the mounting board 141 and the motherboard 151. Each of the protruding electrodes 119, 134, and 144 may be a solder ball or a pillar electrode made of Ni or the like.

[0036] The stiffener 116 reinforces the interposer 131. The stiffener 116 is disposed on the interposer 131 so as to surround the periphery of the semiconductor chip P11. At this time, the planar shape of the stiffener 116 can be set to a frame shape. The position of the top surface of the stiffener 116 can be higher than the position of the top surface of the semiconductor chip P11. In order to reduce the stress between the interposer 131 and the stiffener 116, the difference in the linear expansion coefficient between the interposer 131 and the stiffener 116 is preferably 15 ppm / K or less. The thermal conductivity of the stiffener 116 is preferably greater than the thermal conductivity of the mounting substrate 141. At this time, the material of the stiffener 116 may be a metal, a semiconductor, or an inorganic substance. For example, the material of the stiffener 116 may be Cu, CuW, W, Al, Si, AlN, Al[[ID=~]] ２ [[ID=~]]O[[ID=~]] ３ [[ID=~]]and so on. The material of the stiffener 116 may be the same as the base material of the interposer 131. [[ID=~]] [[ID=~]]

[0037] By reinforcing the interposer 131 with the stiffener 116, even if the mounting substrate 141 is deformed due to temperature change or moisture absorption, it is possible to suppress the influence of the deformation of the mounting substrate 141 from reaching the semiconductor chip P11, and the flatness of the semiconductor chip P11 can be maintained. Therefore, a special heat dissipation structure or an expensive material (low CTE high elastic material) is not required for the mounting substrate 141, and the cost increase of the semiconductor device 100 can be suppressed without reducing the reliability of the semiconductor device 100. Also, the interposer 131 can be made thinner within the range that ensures flatness, and an increase in loop inductance that degrades high-speed transmission characteristics can be suppressed. [[ID=~]] [[ID=~]]

[0038] A transparent substrate 118 is provided on the stiffener 116. At this time, the transparent substrate 118 can cover the semiconductor chip P11. The transparent substrate 118 may be a glass substrate, a quartz substrate, or a transparent resin substrate such as acrylic or polycarbonate. The transparent substrate 118 is made of Al[[ID=~]] ２ [[ID=~]]O[[ID=~]] ３ [[ID=~]]CaF[[ID=~]] ２ [[ID=~]]MgF[[ID=~]] ２ or LiF, etc. may also be used according to the wavelength detected by the light receiving element formed on the semiconductor chip P11.

[0039] An underfill 117 is filled between the semiconductor chip P11 and the interposer 131. The underfill 117 can cover the periphery of the protruding electrodes 119. The underfill 117 may rise up on the side surface of the semiconductor chip P11. At this time, the underfill 117 may contact the inner surface of the stiffener 116. The underfill 117 may be a CUF (Capillary Underfill) with high thermal conductivity. As the material of the underfill 117, resins such as silicone-based resins, siloxane-based resins, acrylic-based resins, and epoxy-based resins can be used. Here, the underfill 117 can form a heat dissipation path from the mounting surface of the semiconductor chip P11 to the interposer 131, and can also form a heat dissipation path from the side surface of the semiconductor chip P11 to the stiffener 116.

[0040] FIG. 3 is a cross-sectional view showing an example of a method for manufacturing a first interposer according to the first embodiment.

[0041] In a of FIG. 3, a base material 161 of the interposer 131 is prepared. The base material 161 may be plate-shaped. As the material of the base material 161, conductors such as metals and semiconductors can be used.

[0042] Next, as shown in b of FIG. 3, through holes 162 are formed in the base material 161. When the material of the base material 161 is a metal, for example, photolithography or electrical discharge machining can be used as the method for forming the through holes 162. When the material of the base material 161 is a sintered material, for example, punching or laser processing can be used.

[0043] Next, as shown in c of FIG. 3, an insulating layer 163 is formed on the base material 161 so as to fill the through holes 162. When the insulating layer 163 is a resin, for example, lamination of insulating films or PP (Pre-preg) lamination press can be used as the method for forming the insulating layer 163. The insulating layer 163 may be formed based on printing of a sintered material.

[0044] [[ID=十七]] Next, as shown in d of FIG. 3, through holes 164 are formed in the insulating layer 163. As the method for forming the through holes 162, for example, drilling or laser processing can be used.

[0045] Next, as shown in Figure 3e, a conductor 165 is formed on the insulating layer 163 so that the through hole 164 is filled. If the conductor 165 is a metal, for example, Cu-filled plating can be used to form the conductor 165. Alternatively, the conductor 165 may be formed based on printing of a sintered material.

[0046] Next, as shown in Figure 3f, the insulating layer 163 and the conductor 165 on the upper and lower surfaces of the base material 161 are removed to form an interposer 131 in which the through electrode 132 is embedded via the insulating layer 133. For example, a double-sided surface plane can be used to remove the insulating layer 163 and the conductor 165. Under Barrier Metal (UBM) plating may be applied to the exposed surface of the through electrode 132.

[0047] Alternatively, after step e in Figure 3, as shown in g in Figure 3, the insulating layer 163 and conductor 165 on the upper surface of the base material 161 may be removed to form an interposer 171 with a through electrode 172 embedded via the insulating layer 173. In this case, a land electrode 174 connected to the through electrode 172 can be formed on the back surface of the insulating layer 173. Here, for example, a surface surface plane can be used to remove the insulating layer 163 and conductor 165. UBM plating may be applied to the exposed surface of the through electrode 172.

[0048] Figure 4 is a cross-sectional view showing an example of a method for manufacturing a second interposer according to the first embodiment.

[0049] In Figure 4a, the base material 181 of the interposer 191 is prepared. The base material 181 may be in the form of a plate. The material of the base material 181 can be an insulator such as ceramic.

[0050] Next, as shown in Figure 4b, a through hole 182 is formed in the base material 181. If the base material 181 is a sintered material, for example, punching or laser processing can be used.

[0051] Next, as shown in c in Figure 4, a through electrode 192 is embedded in the through hole 182 to form the interposer 191. At this time, the through electrode 192 may be embedded in the through hole 182 based on Cu-filled plating. Alternatively, the through electrode 192 may be formed by embedding a conductor based on printing of the sintered material.

[0052] Furthermore, as shown in d in Figure 4, a land electrode 193 connected to the through electrode 192 may be formed on the back surface of the interposer 191.

[0053] Figures 5 and 6 are cross-sectional views showing an example of a method for manufacturing a semiconductor device according to the first embodiment. In these figures, an example using the interposer 131 f in Figure 3 is shown, but the interposer 191 c in Figure 4 may also be used.

[0054] In Figure 5a, the semiconductor chip P11 is flip-chip mounted on the interposer 131 by joining the protruding electrode 119 to the through electrode 132.

[0055] Next, as shown in Figure 5b, a stiffener 116 is mounted on the interposer 131 so as to surround the semiconductor chip P11. The stiffener 116 may be fixed to the interposer 131 via adhesive. Alternatively, the semiconductor chip P11 may be flip-chip mounted on the interposer 131 after the stiffener 116 has been mounted on the interposer 131.

[0056] Next, as shown in c in Figure 5, underfill 117 is filled between the semiconductor chip P11 and the interposer 131, and the underfill 117 is cured. At this time, the underfill 117 may protrude laterally from the semiconductor chip P11 and come into contact with the inner surface of the stiffener 116.

[0057] Next, as shown in Figure 6a, the transparent substrate 118 is placed on the stiffener 116 so as to cover the semiconductor chip P11. The transparent substrate 118 may be fixed to the stiffener 116 via adhesive.

[0058] Next, as shown in Figure 6b, a protruding electrode 134 is formed on the back side of the through electrode 132. The protruding electrode 134 may be formed by solder printing or solder plating.

[0059] Next, as shown in c in Figure 6, the interposer 131 is flip-chip mounted onto the mounting substrate 141 via the protruding electrode 134.

[0060] As described above, in the first embodiment, the semiconductor chip P11 is mounted on the mounting substrate 141 via an interposer 131 provided with through electrodes 132, and the semiconductor chip P11 is flip-chip mounted on the interposer 131. This allows heat to be dissipated from the mounting surface side of the semiconductor chip P11 to the interposer 131 while suppressing an increase in the mounting area of ​​the semiconductor chip P11. Therefore, it is possible to suppress the temperature rise of the semiconductor chip P11 while suppressing the occurrence of temperature distribution of the semiconductor chip P11, and to improve reliability while suppressing an increase in the planar size of the semiconductor device 100.

[0061] <2. Second Embodiment> In the first embodiment described above, the semiconductor chip P11 is mounted on the mounting substrate 141 via an interposer 131 provided with through electrodes 132, and the semiconductor chip P11 is flip-chip mounted on the interposer 131. In this second embodiment, the semiconductor chip is mounted on the mounting substrate 141 via an interposer 131 provided with through electrodes 132, and the semiconductor chip is Cu-Cu bonded to the interposer 131.

[0062] Figure 7 is a cross-sectional view showing an example of the configuration of a semiconductor device according to the second embodiment.

[0063] In the figure, the semiconductor device 200 includes a semiconductor chip P21 instead of the semiconductor chip P11 of the first embodiment described above. The other configurations of the semiconductor device 200 of the second embodiment are the same as those of the semiconductor device 100 of the first embodiment described above.

[0064] The semiconductor chip P21 includes a wiring layer 212 in place of the wiring layer 112 of the first embodiment described above. The other configurations of the semiconductor chip P21 of the second embodiment are the same as those of the semiconductor chip P11 of the first embodiment described above.

[0065] The wiring layer 212 includes a bonding electrode 224 in place of the land electrode 124 of the first embodiment described above. The other configurations of the wiring layer 212 of the second embodiment are the same as those of the wiring layer 112 of the first embodiment described above.

[0066] The junction electrode 224 is exposed from the surface of the wiring layer 212. The junction electrode 224 can be positioned opposite the surface of the through electrode 132 of the interposer 131. Cu can be used as the material for the junction electrode 224 and the through electrode 132. In this case, the junction electrode 224 can be connected to the surface of the through electrode 132 based on a Cu-Cu junction. An underfill 117 is filled between the semiconductor chip P21 and the interposer 131. The underfill 117 can cover the periphery of the junction electrode 224.

[0067] As described above, in the second embodiment, the semiconductor chip P21 is mounted on the mounting substrate 141 via an interposer 131 provided with through electrodes 132, and the semiconductor chip P21 is Cu-Cu bonded to the interposer 131. This makes it possible to miniaturize the external terminals of the semiconductor chip P21 while suppressing an increase in the mounting area of ​​the semiconductor chip P21, and also allows heat to be dissipated from the mounting side of the semiconductor chip P21 to the interposer 131. Therefore, it is possible to suppress the temperature rise of the semiconductor chip P21 while suppressing the occurrence of temperature distribution of the semiconductor chip P21, making it possible to improve reliability while suppressing an increase in the planar size of the semiconductor device 200, and also making it possible to increase the number of pins of the semiconductor device 200.

[0068] <3. Third Embodiment> In the first embodiment described above, the semiconductor chip P11 was mounted on the mounting substrate 141 via an interposer 131 provided with through electrodes 132. In this third embodiment, the semiconductor chip P11 is mounted on the mounting substrate 141 via an interposer 131 provided with through electrodes 132, and a stiffener is provided that extends laterally from the interposer 131 so as to surround the semiconductor chip P11.

[0069] Figure 8 is a cross-sectional view showing an example of the configuration of a semiconductor device according to the third embodiment.

[0070] In the figure, the semiconductor device 300 is equipped with a stiffener 316 instead of the stiffener 116 of the first embodiment described above. The other configurations of the semiconductor device 300 of the third embodiment are the same as those of the semiconductor device 100 of the first embodiment described above.

[0071] The stiffener 316 is positioned on the interposer 131 so as to surround the semiconductor chip P11. Here, the stiffener 316 can extend outward from the outer periphery of the interposer 131. In this case, the stiffener 316 may cover at least a portion of the side surface of the interposer 131. Fins may be formed on the outer periphery surface of the stiffener 316. The other configurations of the stiffener 316 in the third embodiment are the same as those of the stiffener 116 in the first embodiment described above.

[0072] As described above, in the third embodiment, the semiconductor chip P11 is mounted on the mounting substrate 141 via an interposer 131 provided with through electrodes 132, and a stiffener 316 is provided that extends laterally from the interposer 131 so as to surround the semiconductor chip P11. This improves the lateral heat dissipation of the semiconductor chip P11 while allowing heat to be dissipated from the mounting surface side of the semiconductor chip P11 to the interposer 131. Therefore, it is possible to suppress the temperature rise of the semiconductor chip P11 while suppressing the occurrence of temperature distribution of the semiconductor chip P11, and thereby improve the reliability of the semiconductor device 300.

[0073] <4. Fourth Embodiment> In the first embodiment described above, the semiconductor chip P11 was mounted on the mounting substrate 141 via an interposer 131 provided with through electrodes 132. In this fourth embodiment, the semiconductor chip P11 is mounted on the mounting substrate 141 via an interposer 131 provided with through electrodes 132, and fastening holes are provided in stiffeners that protrude laterally from the interposer 131 so as to surround the semiconductor chip P11.

[0074] Figure 9 is a cross-sectional view showing an example of the configuration of a semiconductor device according to the fourth embodiment.

[0075] In the figure, the semiconductor device 400 is equipped with a stiffener 416 instead of the stiffener 116 of the first embodiment described above. The other configurations of the semiconductor device 400 of the fourth embodiment are the same as those of the semiconductor device 100 of the first embodiment described above.

[0076] The stiffener 416 is positioned on the interposer 131 so as to surround the semiconductor chip P11. Here, the stiffener 416 can protrude outward from the outer circumference of the interposer 131. At the protruding position of the stiffener 416, fastening holes 417 are provided in the thickness direction of the stiffener 416. The fastening holes 417 are used to fasten the stiffener 416. At this time, bolts can be inserted into the fastening holes 417 and screwed in. The other configurations of the stiffener 416 of the fourth embodiment are the same as those of the stiffener 116 of the first embodiment described above.

[0077] As described above, in the fourth embodiment, the semiconductor chip P11 is mounted on the mounting substrate 141 via an interposer 131 provided with through electrodes 132, and fastening holes 417 are provided in a stiffener 416 that extends laterally from the interposer 131 so as to surround the semiconductor chip P11. This improves the lateral heat dissipation of the semiconductor chip P11 while allowing heat to be dissipated from the mounting surface side of the semiconductor chip P11 to the interposer 131. Therefore, it is possible to suppress the temperature rise of the semiconductor chip P11 while suppressing the occurrence of temperature distribution of the semiconductor chip P11, and thereby improve the reliability of the semiconductor device 400.

[0078] <5. Fifth Embodiment> In the first embodiment described above, the semiconductor chip P11 was mounted on the mounting substrate 141 via an interposer 131 provided with through electrodes 132. In this fifth embodiment, the semiconductor chip P11 is mounted on the mounting substrate 141 via an interposer provided with through electrodes 132, and a wiring layer connected to the through electrodes 132 is formed on the back side of the interposer.

[0079] Figure 10 is a cross-sectional view showing an example of the configuration of a semiconductor device according to the fifth embodiment.

[0080] In the figure, the semiconductor device 500 includes an interposer 531 instead of the interposer 131 of the first embodiment described above. The other configurations of the semiconductor device 500 of the fifth embodiment are the same as those of the semiconductor device 100 of the first embodiment described above.

[0081] The semiconductor chip P11 is flip-chip mounted on the interposer 531 via a protruding electrode 119. A through electrode 532 is formed on the interposer 531. The through electrode 532 penetrates the interposer 531 in its thickness direction. A wiring layer 534 is formed on the back side of the interposer 531. At this time, an insulating layer 533 is formed between the base material of the interposer 531 and the through electrode 532, and on the back side of the interposer 531. The insulating layer 533 can be formed continuously from between the base material of the interposer 531 and the through electrode 532 to the back side of the interposer 531. A protruding electrode 134 is formed on the wiring layer 534. The interposer 531 is flip-chip mounted on the mounting substrate 141 via the protruding electrode 134. At this time, the position of the protruding electrode 119 may be positioned further inward than the position of the protruding electrode 134.

[0082] As described above, in the fifth embodiment, the semiconductor chip P11 is mounted on the mounting substrate 141 via an interposer 531 provided with through electrodes 132, and a wiring layer 534 connected to the through electrodes 132 is formed on the back side of the interposer 531. This allows the protruding electrodes 134 to be placed on the back side of the interposer 531 without being restricted by the placement position of the through electrodes 132, while allowing heat to be dissipated from the mounting side of the semiconductor chip P11 to the interposer 131. Therefore, it is possible to suppress the temperature rise of the semiconductor chip P11 while suppressing the occurrence of temperature distribution of the semiconductor chip P11, and the degree of freedom in designing the mounting substrate 141 can be improved.

[0083] <6. Sixth Embodiment> In the first embodiment described above, the semiconductor chip P11 was mounted on the mounting substrate 141 via an interposer 131 provided with through electrodes 132. In this sixth embodiment, the semiconductor chip P11 is mounted on the mounting substrate 141 via an interposer 131 provided with through electrodes 132, and the interposer 131 is connected to the housing supporting the lens via a thermal conductive sheet.

[0084] Figure 11 is a cross-sectional view showing an example of the configuration of a semiconductor device according to the sixth embodiment.

[0085] In the figure, the semiconductor device 600 is the same as the semiconductor device 100 of the first embodiment described above, with the addition of a lens 611, a housing 613, and thermal conductive sheets 601 and 602. The other configurations of the semiconductor device 600 are the same as those of the semiconductor device 100 of the first embodiment described above.

[0086] The lens 611 forms an optical image on the light-receiving surface of the semiconductor chip P11. The lens 611 is placed on the semiconductor device 100. The lens 611 is supported on the semiconductor chip P11 by a holder 612. The holder 612 may be a lens barrel. The material of the holder 612 may be black resin, or a metal such as aluminum or stainless steel.

[0087] The housing 613 houses the semiconductor device 100. The housing 613 supports the holder 612 on the semiconductor device 100. The material of the housing 613 may be black resin or a metal such as aluminum or stainless steel. A support member 614 is provided on the inner surface of the housing 613. The support member 614 can support the lower end of the motherboard 151. At this time, an electronic component P10 may be mounted on the back side of the motherboard 151.

[0088] A thermal conductive sheet 601 is in contact with the upper surface of the stiffener 116. A thermal conductive sheet 602 is in contact with the lower surface of the interposer 131. Each thermal conductive sheet 601 and 602 can be in contact with the inner surface of the housing 613. Each thermal conductive sheet 601 and 602 may be a graphite sheet, copper foil, or aluminum foil. In this case, the heat from the stiffener 116 can be dissipated to the housing 613 via the thermal conductive sheet 601. The heat from the interposer 131 can be dissipated to the housing 613 via the thermal conductive sheet 602.

[0089] As described above, in the sixth embodiment, the semiconductor chip P11 is mounted on the mounting substrate 141 via an interposer 131 provided with through electrodes 132, and the interposer 131 is connected to the housing 613 supporting the lens 611 via a thermal conductive sheet 602. This makes it possible to improve heat dissipation from the mounting surface side of the semiconductor chip P11 to the interposer 131 while suppressing an increase in the mounting area of ​​the semiconductor chip P11. As a result, it is possible to suppress the temperature rise of the semiconductor chip P11 while suppressing the occurrence of temperature distribution of the semiconductor chip P11, and to improve reliability while suppressing an increase in the planar size of the semiconductor device 600.

[0090] <7. Seventh Embodiment> In the sixth embodiment described above, the semiconductor chip P11 is mounted on the mounting substrate 141 via an interposer 131 provided with through electrodes 132, and the interposer 131 is connected to the housing 613 supporting the lens 611 via a thermal conductive sheet 602. In this seventh embodiment, the semiconductor chip P11 is mounted on the mounting substrate 141 via an interposer 131 provided with through electrodes 132, and the stiffener around the semiconductor chip is fastened to the housing supporting the lens 611.

[0091] Figure 12 is a cross-sectional view showing an example of the configuration of a semiconductor device according to the seventh embodiment.

[0092] In the figure, the semiconductor device 700 has a lens 611 and a housing 713 added to the semiconductor device 400 of the fourth embodiment described above. The other configurations of the semiconductor device 700 are the same as those of the semiconductor device 400 of the fourth embodiment described above.

[0093] The housing 713 houses the semiconductor device 400. A heat conduction member 711 is provided on the inner surface of the housing 713. The heat conduction member 711 is fastened to the stiffener 416 via a bolt 701. At this time, the bolt 701 can be inserted into the fastening hole 417 and screwed to the heat conduction member 711. The bolt 701 is an example of a fastening member described in the claims. Fastening screws may be used instead of the bolt 701. The material of the heat conduction member 711 may be metal, semiconductor, or inorganic. The material of the heat conduction member 711 may be the same as the material of the stiffener 416. At this time, the heat from the stiffener 416 can be dissipated to the housing 713 via the heat conduction member 711. The other configurations of the housing 713 are the same as those of the housing 613 in the sixth embodiment described above.

[0094] As described above, in the seventh embodiment, the semiconductor chip P11 is mounted on the mounting substrate 141 via an interposer 131 provided with a through electrode 132, and the stiffener 416 around the semiconductor chip P11 is fastened to the housing 713 that supports the lens 611. This improves the lateral heat dissipation of the semiconductor chip P11 while allowing heat to be dissipated from the mounting surface side of the semiconductor chip P11 to the interposer 131. Therefore, it is possible to suppress the temperature rise of the semiconductor chip P11 while suppressing the occurrence of temperature distribution of the semiconductor chip P11, thereby improving the reliability of the semiconductor device 700.

[0095] <8. Eighth Embodiment> In the first embodiment described above, the semiconductor chip P11 was mounted on the mounting substrate 141 via an interposer 131 provided with through electrodes 132. In this eighth embodiment, the semiconductor chip P11 is mounted on the mounting substrate 141 via an interposer 131 provided with through electrodes 132, and electronic components positioned adjacent to the interposer 131 are also mounted on the mounting substrate.

[0096] Figure 13 is a cross-sectional view showing an example of the configuration of a semiconductor device according to the eighth embodiment.

[0097] In the figure, the semiconductor device 800 includes a mounting substrate 841 instead of the mounting substrate 141 of the first embodiment described above. Furthermore, the semiconductor device 800 has an electronic component P12 and a lid 811 added to the semiconductor device 100 of the first embodiment described above. The other configurations of the semiconductor device 800 of the eighth embodiment are the same as those of the semiconductor device 100 of the first embodiment described above.

[0098] Land electrodes 142, 842 are formed on the mounting substrate 841, and a land electrode 143 is formed on the back surface of the mounting substrate 841. The other configurations of the mounting substrate 841 are the same as those of the mounting substrate 141 in the first embodiment described above.

[0099] The electronic component P12 may have a semiconductor element formed on it, or it may have a transistor, resistor, capacitor, etc. A protruding electrode 834 is formed on the electronic component P12. The protruding electrode 834 is joined to a land electrode 842. At this time, the electronic component P12 is flip-chip mounted on the mounting substrate 841 via the protruding electrode 834.

[0100] The lid 811 is placed on the mounting substrate 841 so as to cover the outer periphery of the stiffener 116 and the electronic component P12. At this time, the lid 811 can have an opening 815 that can accommodate the transparent substrate 118. The lid 811 can be fixed to the mounting substrate 841 via adhesive 812. Furthermore, the lower surface of the lid 811 can be bonded to the electronic component P12 via a TIM (Thermal Interface Material) material 813, and also to the outer periphery of the stiffener 116 via a TIM material 814. The material of the lid 811 may be metal, semiconductor, or inorganic. The material of the lid 811 may be the same as the material of the stiffener 116. The TIM materials 813 and 814 may be grease. Additionally, a heat sink or the like may be separately installed on top of the lid 811.

[0101] As described above, in the eighth embodiment, the semiconductor chip P11 is mounted on the mounting substrate 141 via an interposer 131 provided with a through electrode 132, and the electronic component P2, positioned adjacent to the interposer 131, is mounted on the mounting substrate 841. This makes it possible to dissipate heat from the mounting surface side of the semiconductor chip P11 to the interposer 131 while suppressing an increase in the mounting area of ​​the semiconductor chip P11, and also makes it possible to make the semiconductor chip P11 and the electronic component P2 into chiplets. As a result, it is possible to suppress the temperature rise of the semiconductor chip P11 while suppressing the occurrence of a temperature distribution of the semiconductor chip P11, and it is possible to suppress an increase in the mounting area of ​​the semiconductor chip P11 and the electronic component P12.

[0102] <9. Ninth Embodiment> In the first embodiment described above, the semiconductor chip P11 was mounted on the mounting substrate 141 via an interposer 131 provided with through electrodes 132, and the semiconductor chip P11 was flip-chip mounted on the interposer 131. In this ninth embodiment, the mounting substrate on which the semiconductor chip is mounted via an interposer provided with through electrodes is made into a WLCSP.

[0103] Figure 14 is a cross-sectional view showing an example of the configuration of a semiconductor device according to the ninth embodiment.

[0104] In the figure, the semiconductor device 900 comprises a semiconductor chip P91 and an interposer 931. The semiconductor chip P91 may have an optical element or a semiconductor element formed on it.

[0105] The semiconductor chip P91 comprises a semiconductor substrate 911 and a wiring layer 912. The wiring layer 912 is laminated on the semiconductor substrate 911. The wiring layer 912 includes a bonding electrode 924. The bonding electrode 924 can be embedded in the wiring layer 912. The bonding electrode 924 is exposed from the surface of the wiring layer 912. The bonding electrode 924 can be positioned opposite the surface of the through electrode 192 of the interposer 191. The materials for the bonding electrode 924 and the through electrode 192 can be Cu. In this case, the bonding electrode 924 can be connected to the surface of the through electrode 192 based on a Cu-Cu junction. In addition, the insulator of the wiring layer 912 can be bonded to the insulator of the interposer 191. In this case, hybrid bonding can be used for bonding the semiconductor chip P91 and the interposer 191. The interposer 191 is flip-chip mounted on a mounting substrate 941 via a protruding electrode 134.

[0106] The transparent substrate 918 is bonded to the semiconductor chip P91 via a transparent resin layer 919. At this time, the transparent resin layer 919 can cover the on-chip lens 114. The material of the transparent resin layer 919 can be acrylic or polycarbonate, etc. At this time, in order to ensure the light-gathering ability of the on-chip lens 114, the refractive index of the transparent resin layer 919 can be made different from the refractive index of the on-chip lens 114.

[0107] Here, the positions of the lateral end faces of the transparent substrate 918, the semiconductor chip P91, the interposer 191, and the mounting substrate 941 can be made to coincide with each other. In this case, the lateral end faces of the transparent substrate 918, the semiconductor chip P91, the interposer 191, and the mounting substrate 941 can be formed as dicing surfaces. This makes it possible to make the semiconductor device 900 a WLCSP. The other configurations of the semiconductor chip P91, the transparent substrate 918, and the mounting substrate 941 are the same as those of the semiconductor chip P11, the transparent substrate 118, and the mounting substrate 141 in the first embodiment described above.

[0108] Thus, in the ninth embodiment described above, the semiconductor device 900, in which the semiconductor chip P91 is mounted on the mounting substrate 941 via the interposer 191, is made into a WLCSP. This makes it possible to miniaturize the external terminals of the semiconductor chip P91 and to dissipate heat from the mounting side of the semiconductor chip P91 to the interposer 191. As a result, it is possible to suppress the temperature rise of the semiconductor chip P91 while suppressing the occurrence of temperature distribution of the semiconductor chip P91, improve reliability while suppressing an increase in the planar size of the semiconductor device 900, and enable the semiconductor device 900 to have a larger number of pins.

[0109] <10. Examples of Application to Mobile Devices> The technology disclosed herein (the technology) can be applied to various products. For example, the technology disclosed herein may be implemented as a device mounted on any type of mobile device such as automobiles, electric vehicles, hybrid electric vehicles, motorcycles, bicycles, personal mobility devices, airplanes, drones, ships, and robots.

[0110] Figure 15 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technology described herein may be applied.

[0111] The vehicle control system 12000 comprises a plurality of electronic control units connected via a communication network 12001. In the example shown in Figure 15, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. The functional configuration of the integrated control unit 12050 is shown in the figure, which includes a microcomputer 12051, an audio / image output unit 12052, and an in-vehicle network interface 12053.

[0112] The drivetrain control unit 12010 controls the operation of devices related to the vehicle's drivetrain according to various programs. For example, the drivetrain control unit 12010 functions as a control device for a drivetrain generating device that generates driving force for the vehicle, such as an internal combustion engine or a drive motor; a drivetrain transmission mechanism that transmits driving force to the wheels; a steering mechanism that adjusts the steering angle of the vehicle; and a braking device that generates braking force for the vehicle.

[0113] The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window system, or various lamps such as headlights, reverse lights, brake lights, turn signals, or fog lights. In this case, the body system control unit 12020 may receive radio waves transmitted from a portable device that replaces a key or signals from various switches. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock system, power window system, lamps, etc.

[0114] The external information detection unit 12030 detects information from outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the external information detection unit 12030. The external information detection unit 12030 causes the imaging unit 12031 to capture images of the outside of the vehicle and receives the captured images. Based on the received images, the external information detection unit 12030 may perform object detection processing such as detecting people, cars, obstacles, signs, or characters on the road surface, or distance detection processing.

[0115] The imaging unit 12031 is a light sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0116] The in-vehicle information detection unit 12040 detects information inside the vehicle. The in-vehicle information detection unit 12040 is connected to, for example, a driver status detection unit 12041 that detects the driver's state. The driver status detection unit 12041 includes, for example, a camera that captures images of the driver, and the in-vehicle information detection unit 12040 may calculate the driver's level of fatigue or concentration, or determine whether the driver is drowsy, based on the detection information input from the driver status detection unit 12041.

[0117] The microcomputer 12051 can calculate control target values ​​for the drive force generator, steering mechanism, or braking device based on information inside and outside the vehicle acquired by the external information detection unit 12030 or the internal information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing ADAS (Advanced Driver Assistance System) functions, including collision avoidance or impact mitigation, following driving based on distance between vehicles, maintaining vehicle speed, vehicle collision warning, or vehicle lane departure warning.

[0118] Furthermore, the microcomputer 12051 can perform cooperative control for purposes such as autonomous driving, where the vehicle drives autonomously without driver intervention, by controlling the drive force generating device, steering mechanism, or braking device, etc., based on information about the vehicle's surroundings acquired by the external information detection unit 12030 or the internal information detection unit 12040.

[0119] Furthermore, the microcomputer 12051 can output control commands to the body system control unit 12020 based on external information acquired by the external information detection unit 12030. For example, the microcomputer 12051 can control the headlights according to the position of a preceding or oncoming vehicle detected by the external information detection unit 12030, and perform coordinated control aimed at reducing glare, such as switching from high beams to low beams.

[0120] The audio-image output unit 12052 transmits at least one of audio and image output signals to an output device capable of visually or audibly notifying information to the vehicle's occupants or to those outside the vehicle. In the example shown in Figure 15, the output devices include an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an onboard display and a head-up display.

[0121] Figure 16 shows an example of the installation position of the imaging unit 12031.

[0122] In Figure 16, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0123] The imaging units 12101, 12102, 12103, 12104, and 12105 are installed, for example, on the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield inside the vehicle 12100. The imaging unit 12101 installed on the front nose and the imaging unit 12105 installed on the upper part of the windshield inside the vehicle mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 installed on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 installed on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 installed on the upper part of the windshield inside the vehicle is mainly used for detecting preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, or lanes.

[0124] Figure 16 shows an example of the imaging range of imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of imaging unit 12101 located on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of imaging units 12102 and 12103 located on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of imaging unit 12104 located on the rear bumper or back door. For example, by superimposing the image data captured by imaging units 12101 to 12104, an overhead view image of the vehicle 12100 can be obtained.

[0125] At least one of the imaging units 12101 to 12104 may have a function for acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera consisting of multiple image sensors, or an image sensor having pixels for phase difference detection.

[0126] For example, the microcomputer 12051, based on distance information obtained from the imaging units 12101 to 12104, can determine the distance to each object within the imaging range 12111 to 12114 and the temporal change of this distance (relative speed to the vehicle 12100). In particular, it can extract the closest object on the vehicle 12100's path that is traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or more) as the preceding vehicle. Furthermore, the microcomputer 12051 can set a predetermined distance to be maintained before the preceding vehicle and perform automatic braking control (including follow-and-stop control) and automatic acceleration control (including follow-and-start control), etc. In this way, cooperative control aimed at autonomous driving, etc., that drives autonomously without driver operation, can be performed.

[0127] For example, the microcomputer 12051 can use distance information obtained from imaging units 12101 to 12104 to classify and extract three-dimensional object data related to three-dimensional objects, such as motorcycles, passenger cars, large vehicles, pedestrians, utility poles, and other three-dimensional objects, and use this data for automatic obstacle avoidance. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines the collision risk, which indicates the degree of risk of collision with each obstacle. If the collision risk is above a set value and there is a possibility of collision, the microcomputer 12051 can provide driving assistance to avoid collisions by outputting a warning to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or evasive steering via the drive system control unit 12010.

[0128] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared light. For example, the microcomputer 12051 can recognize pedestrians by determining whether or not pedestrians are present in the images captured by the imaging units 12101 to 12104. Such pedestrian recognition is performed, for example, by a procedure to extract feature points from the images captured by the imaging units 12101 to 12104 as infrared cameras, and a procedure to perform pattern matching on a series of feature points that indicate the contour of an object to determine whether or not it is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the imaging units 12101 to 12104 and recognizes a pedestrian, the audio-image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio-image output unit 12052 may also control the display unit 12062 to display an icon indicating a pedestrian at a desired position.

[0129] The above describes an example of a vehicle control system to which the technology of this disclosure can be applied. The technology of this disclosure can be applied to the drive system control unit 12010, the body system control unit 12020, the external information detection unit 12030, the internal information detection unit 12040, the integrated control unit 12050, and the imaging unit 12031 among the configurations described above. Specifically, for example, the semiconductor device of the above embodiment can be applied to the drive system control unit 12010, the body system control unit 12020, the external information detection unit 12030, the internal information detection unit 12040, the integrated control unit 12050, and the imaging unit 12031. By applying the technology of this disclosure to the vehicle control system 12000, it is possible to improve reliability while suppressing an increase in the planar size of the vehicle control system 12000.

[0130] Furthermore, any of the semiconductor devices of the first to third embodiments described above can be applied to imaging devices, as well as to electronic circuits used in communication devices, display devices, data processing devices, control devices, measuring devices, or printing devices.

[0131] Furthermore, the embodiments described above are merely examples of how to realize the present technology, and there is a corresponding relationship between the matters in the embodiments and the inventive features in the claims. Similarly, there is a corresponding relationship between the inventive features in the claims and the matters in the embodiments of the present technology that bear the same name. However, the present technology is not limited to the embodiments and can be realized by making various modifications to the embodiments without departing from the gist of the present technology. Also, the effects described herein are merely examples and are not limiting, and there may be other effects.

[0132] Furthermore, this technology can also take the following configurations: (1) A semiconductor device comprising a semiconductor chip and an interposer on which the semiconductor chip is mounted and which is provided with through electrodes that are electrically connected to the semiconductor chip. (2) The semiconductor device according to (1), wherein the base material of the interposer is a metal, a semiconductor, or an inorganic material. (3) The semiconductor device according to claim 1, further comprising an underfill provided between the semiconductor chip and the interposer. (4) The semiconductor device according to any one of (1) to (3), wherein the semiconductor chip is flip-chip mounted on the interposer. (5) The semiconductor device according to any one of (1) to (4), wherein the semiconductor chip is provided with a junction electrode that is Cu-Cu bonded to the through electrode. (6) The semiconductor device according to any one of (1) to (5), wherein the difference in the coefficient of linear expansion between the semiconductor chip and the interposer is 15 ppm / K or less. (7) The semiconductor device according to any one of (1) to (6), further comprising an insulating layer that insulates the through electrode from the interposer. (8) A semiconductor device according to any one of (1) to (7), comprising a wiring layer formed on the back side of the interposer and connected to the through electrode. (9) A semiconductor device according to any one of (1) to (8), comprising a stiffener disposed on the interposer so as to surround the semiconductor chip. (10) A semiconductor device according to (9), wherein the difference in the coefficient of linear expansion between the stiffener and the interposer is 15 ppm / K or less. (11) A semiconductor device according to (9) or (10), wherein the stiffener protrudes outward from the outer circumference of the interposer. (12) A semiconductor device according to (11), wherein the stiffener is bonded to the side surface of the semiconductor chip. (13) A semiconductor device according to (11) or (12), wherein the stiffener has fastening holes into which fastening members for fastening to the housing are inserted. (14) A semiconductor device according to any one of (1) to (13), wherein a solid-state image sensor is formed on the semiconductor chip. (15) The semiconductor device according to (14), comprising a transparent member disposed on the semiconductor chip.(16) A semiconductor device according to any one of (1) to (15), comprising a mounting substrate on which the semiconductor chip is mounted via the interposer. (17) A semiconductor device according to (16), comprising an electronic component mounted on the mounting substrate at a position adjacent to the interposer.

[0133] 100 Semiconductor equipment P11 Semiconductor chip 111 Semiconductor substrate 112 Wiring layer 114 On-chip lens 115 Color filter 116 Stiffener 117 Underfill 118 Transparent substrate 119, 134, 144 Protruding electrode 131 Interposer 132 Through electrode 133 Insulating layer 141 Mounting substrate 151 Motherboard

Claims

1. A semiconductor device comprising a semiconductor chip and an interposer on which the semiconductor chip is mounted and which is provided with through-electrodes that are electrically connected to the semiconductor chip.

2. The semiconductor device according to claim 1, wherein the base material of the interposer is a metal, a semiconductor, or an inorganic material.

3. The semiconductor device according to claim 1, further comprising an underfill provided between the semiconductor chip and the interposer.

4. The semiconductor device according to claim 1, wherein the semiconductor chip is flip-chip mounted on the interposer.

5. The semiconductor device according to claim 1, wherein the semiconductor chip comprises a bonding electrode that is Cu-Cu bonded to the through electrode.

6. The semiconductor device according to claim 1, wherein the difference in the coefficient of thermal expansion between the semiconductor chip and the interposer is 15 ppm / K or less.

7. The semiconductor device according to claim 1, further comprising an insulating layer that insulates the through electrode from the interposer.

8. The semiconductor device according to claim 1, comprising a wiring layer formed on the back side of the interposer and connected to the through electrode.

9. The semiconductor device according to claim 1, further comprising a stiffener disposed on the interposer so as to surround the semiconductor chip.

10. The semiconductor device according to claim 9, wherein the difference in the coefficient of linear expansion between the stiffener and the interposer is 15 ppm / K or less.

11. The semiconductor device according to claim 9, wherein the stiffener protrudes outward from the outer circumference of the interposer.

12. The semiconductor device according to claim 11, wherein the stiffener is bonded to the side surface of the semiconductor chip.

13. The semiconductor device according to claim 11, wherein the stiffener has a fastening hole into which a fastening member to be fastened to the housing is inserted.

14. The semiconductor device according to claim 1, wherein an image sensor is formed on the semiconductor chip.

15. The semiconductor device according to claim 14, further comprising a transparent member disposed on the semiconductor chip.

16. The semiconductor device according to claim 1, further comprising a mounting substrate on which the semiconductor chip is mounted via the interposer.

17. The semiconductor device according to claim 16, comprising an electronic component mounted on the mounting substrate at a position adjacent to the interposer.

Images