Display device and electronic device

Abstract

This display device may comprise a pixel electrode disposed on a substrate, and a light-emitting element disposed on the pixel electrode and electrically connected to the pixel electrode, wherein the light-emitting element comprises: a semiconductor stack including a first semiconductor layer, an active layer, and a second semiconductor layer; a protective layer surrounding side surfaces of the semiconductor stack; and a first contact electrode disposed on a side surface of the protective layer and electrically connected to the first semiconductor layer, and the first contact electrode includes a transparent conductive material.

Description

Display devices and electronic devices

[0001] Embodiments of the present invention relate to a display device and an electronic device capable of displaying an image.

[0002] As the information society develops, the demand for display devices and electronic devices capable of displaying images is increasing in various forms. Accordingly, various types of display devices and electronic devices containing pixels for displaying images are being developed. Display devices may be provided independently or integrated into electronic devices to be used as the display screen of the electronic device.

[0003] The problem that the present invention aims to solve is to provide a display device and an electronic device capable of improving light efficiency.

[0004] The problems of the present invention are not limited to the technical problems mentioned above, and other unmentioned technical problems will be clearly understood by those skilled in the art from the description below.

[0005] A display device according to one embodiment may include a pixel electrode disposed on a substrate; and a light-emitting element disposed on the pixel electrode and electrically connected to the pixel electrode. The light-emitting element may include a semiconductor stack comprising a first semiconductor layer, an active layer, and a second semiconductor layer; a protective film covering the side of the semiconductor stack; and a first contact electrode disposed on the side of the protective film and electrically connected to the first semiconductor layer, wherein the first contact electrode may include a transparent conductive material.

[0006] In one embodiment, the display device may further include a bank spaced apart from the light-emitting element and surrounding the light-emitting element; and a reflective film disposed on the side of the bank.

[0007] In one embodiment, the reflective film may face the side of the light-emitting element.

[0008] In one embodiment, the first contact electrode may include indium-tin oxide or indium-zinc oxide.

[0009] In one embodiment, the first contact electrode may be disposed on a portion of each of the side and bottom surfaces of the light-emitting element.

[0010] In one embodiment, the display device may further include a first conductive pattern disposed between a portion of the pixel electrode and a lower surface of the first contact electrode; and a first connecting electrode disposed on another portion of the pixel electrode, a side of the first contact electrode and a side of the first conductive pattern.

[0011] In one embodiment, the light-emitting element further includes a second contact electrode disposed at a different part of each of the side and bottom surfaces of the light-emitting element and electrically connected to the second semiconductor layer, and the second contact electrode may include a transparent conductive material.

[0012] In one embodiment, the display device may further include a common electrode disposed on the substrate and spaced apart from the pixel electrode; a second conductive pattern disposed between a portion of the common electrode and the lower surface of the second contact electrode; and a second connecting electrode disposed on another portion of the common electrode, the side of the second contact electrode and the side of the second conductive pattern.

[0013] In one embodiment, the first conductive pattern and the second conductive pattern may include a conductive photoresist.

[0014] In one embodiment, the first conductive pattern and the second conductive pattern may include carbon black.

[0015] In one embodiment, the first connecting electrode and the second connecting electrode may include a transparent conductive material.

[0016] In one embodiment, the display device may further include an organic layer disposed between the pixel electrode and the light-emitting element and covering a portion of the pixel electrode; and a first connecting electrode disposed on a portion of the organic layer and electrically connecting the pixel electrode and the first contact electrode.

[0017] In one embodiment, the light-emitting element further includes a second contact electrode disposed spaced apart from the first contact electrode on the side of the protective film and electrically connected to the second semiconductor layer, and the second contact electrode may include a transparent conductive material.

[0018] In one embodiment, the display device may further include: a common electrode disposed on the substrate and spaced apart from the pixel electrode; an organic layer disposed below the light-emitting element and covering a portion of the pixel electrode and the common electrode; a first connecting electrode disposed on a portion of the organic layer and electrically connecting the pixel electrode and the first contact electrode; and a second connecting electrode disposed on another portion of the organic layer and electrically connecting the common electrode and the second contact electrode.

[0019] An electronic device according to one embodiment may include a display module including a display panel; and a processor that transmits an image data signal to the display module. The display panel includes a pixel electrode disposed on a substrate; and a light-emitting element disposed on the pixel electrode and electrically connected to the pixel electrode. The light-emitting element may include a semiconductor stack comprising a first semiconductor layer, an active layer, and a second semiconductor layer; a protective film covering the side of the semiconductor stack; and a first contact electrode disposed on the side of the protective film, electrically connected to the first semiconductor layer, and comprising a transparent conductive material.

[0020] In one embodiment, the display panel may further include a bank spaced apart from the light-emitting element and surrounding the light-emitting element; and a reflective film disposed on the side of the bank.

[0021] In one embodiment, the first contact electrode is disposed on a portion of each of the side and bottom surfaces of the light-emitting element, and the display panel may further include a first conductive pattern disposed between a portion of the pixel electrode and the bottom surface of the first contact electrode; and a first connecting electrode disposed on another portion of the pixel electrode, the side of the first contact electrode and the side of the first conductive pattern.

[0022] In one embodiment, the first conductive pattern may include a conductive photoresist.

[0023] In one embodiment, the light-emitting element further includes a second contact electrode disposed spaced apart from the first contact electrode on the side of the protective film and electrically connected to the second semiconductor layer, and the second contact electrode may include a transparent conductive material.

[0024] In one embodiment, the display panel may further include: a common electrode disposed on the substrate and spaced apart from the pixel electrode; a first connecting electrode disposed on the pixel electrode and electrically connecting the pixel electrode and the first contact electrode; and a second connecting electrode disposed on the common electrode and electrically connecting the common electrode and the second contact electrode.

[0025] Specific details of other embodiments are included in the detailed description and drawings.

[0026] A display device and an electronic device according to the embodiments include a light-emitting element including a contact electrode disposed on the side, and the contact electrode may include a transparent conductive material. In some embodiments, the display device and the electronic device may further include a reflective film disposed around the light-emitting element. According to the embodiments, the light emission rate of light generated from the light-emitting element can be increased, and the brightness and light efficiency of the display device and the electronic device can be improved.

[0027] In some embodiments, the display device and the electronic device may further include a conductive pattern disposed between a pixel electrode layer including a pixel electrode and a light-emitting element, and a connecting electrode disposed on the side of the light-emitting element. According to the embodiments, the light-emitting element can be disposed more stably on the pixel electrode layer, and the contact resistance between the pixel electrode layer and the light-emitting element can be lowered. Accordingly, the electrical characteristics and reliability of the display device and the electronic device can be improved.

[0028] The effects according to the embodiments are not limited to those exemplified above, and a wider variety of effects are included in this specification.

[0029] FIG. 1 is a perspective view showing a display device according to one embodiment.

[0030] FIG. 2 is a layout diagram showing a display device according to one embodiment.

[0031] FIG. 3 is a block diagram showing a display device according to one embodiment.

[0032] FIG. 4 is an equivalent circuit diagram showing a subpixel according to one embodiment.

[0033] FIG. 5 is a plan view showing the display area of ​​a display panel according to one embodiment.

[0034] FIG. 6 is a cross-sectional view showing the display area of ​​a display panel according to one embodiment.

[0035] Figure 7 is a cross-sectional view showing the A1 region of Figure 6 in detail.

[0036] FIG. 8 is a cross-sectional view showing the display area of ​​a display panel according to one embodiment.

[0037] FIG. 9 is a cross-sectional view showing the display area of ​​a display panel according to one embodiment.

[0038] FIG. 10 is a plan view showing the display area of ​​a display panel according to one embodiment.

[0039] FIG. 11 is a cross-sectional view showing the display area of ​​a display panel according to one embodiment.

[0040] FIG. 12 is a cross-sectional view showing the A2 region of FIG. 11 in detail.

[0041] FIG. 13 is a block diagram of an electronic device according to one embodiment.

[0042] FIG. 14 is a schematic diagram of an electronic device according to various embodiments.

[0043] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims.

[0044] When elements or layers are referred to as being "on" another element or layer, this includes cases where another layer or element is interposed directly on or in the middle of another element. Throughout the specification, the same reference numerals refer to the same components. Shapes, sizes, ratios, angles, numbers, etc., disclosed in the drawings for describing embodiments are exemplary and therefore the invention is not limited to the depicted details.

[0045] The features of each of the various embodiments of the present invention may be combined or combined with one another, either partially or wholly, and may technically enable various interlocking and operation. Each embodiment may be implemented independently of one another or may be implemented together in an associated relationship.

[0046] Specific embodiments will be described below with reference to the attached drawings.

[0047] FIG. 1 is a perspective view showing a display device according to one embodiment.

[0048] Referring to FIG. 1, the display device (1) may be a device capable of providing images such as video or still images. For example, the display device (1) may be a device capable of displaying images by including a display module including a display panel (100). As an example, the display device (1) may refer to any electronic device that provides a display screen on which an image can be displayed or includes a display module for displaying an image.

[0049] The display device (1) may be provided independently or may be included in an electronic device that provides a display screen to form the display screen of said electronic device. For example, the display device (1) may be included in various electronic devices such as televisions, laptops, monitors, billboards, and the Internet of Things (IOT), as well as portable electronic devices such as mobile phones, smartphones, tablet personal computers, smartwatches, watch phones, mobile communication terminals, electronic notebooks, e-books, PMPs (portable multimedia players), navigation systems, and UMPCs (Ultra Mobile PCs), and used as a display screen. Additionally, the display device (1) may be included in other electronic devices such as virtual reality (VR) devices or augmented reality (AR) devices and used to display images on said electronic devices. In one embodiment, the electronic device including the display device (1) may further include a display device housing in which the display device (1) is housed, and / or a case or cover for protecting said display device (1).

[0050] FIG. 1 illustrates a display module, which is a major component of a display device (1). In one embodiment, the display device (1) (or an electronic device including a display module) may further include additional components. For example, the display device (1) may further include a housing or case, etc., for housing the display module of FIG. 1.

[0051] In one embodiment, the display device (1) may be a light-emitting display device such as an organic light-emitting display device using an organic light-emitting diode, a quantum dot light-emitting display device including a quantum dot light-emitting layer, an inorganic light-emitting display device including an inorganic semiconductor, and a micro light-emitting display device using a micro light-emitting diode (for example, a micro LED or a nano LED). Hereinafter, as an example of a display device (1) to which the embodiments may be applied, a micro light-emitting display device including a micro light-emitting diode is disclosed. However, the embodiments are not limited thereto. For example, the type of light-emitting element included in the display device (1) is not limited to a micro light-emitting diode, and the display device (1) may include a light-emitting element of a different type and / or size.

[0052] The display device (1) may include a display panel (100), a display driving circuit (250), a circuit board (300), and a power supply unit (500) (also referred to as a “power supply circuit”).

[0053] The display panel (100) may be formed as a rectangular plane having sides in a first direction (DR1) and sides in a second direction (DR2) that intersect the first direction (DR1). The corners where the sides in the first direction (DR1) and the sides in the second direction (DR2) meet may be formed in a rounded or angular shape. The plane shape of the display panel (100) is not limited to a rectangle and may be formed in other polygons, circles, or ellipses. The display panel (100) may be formed substantially flat, but is not limited thereto. The display panel (100) may be formed rigidly as a whole, or may be formed flexibly so that it can be bent, curved, folded, or rolled up in at least a part.

[0054] The display panel (100) may include a main area (MA) and a sub area (SBA).

[0055] The main area (MA) may include a display area (DA) that displays an image and a non-display area (NDA) which is a surrounding area of ​​the display area (DA). The display area (DA) may include pixels that display an image. Each pixel may include a plurality of subpixels. For example, each pixel may include a first subpixel emitting light of a first color, a second subpixel emitting light of a second color, and a third subpixel emitting light of a third color, but the embodiments of the present specification are not limited thereto.

[0056] A sub-region (SBA) may protrude in a second direction (DR2) from one side of a main region (MA). Although FIG. 1 illustrates a sub-region (SBA) unfolded, the sub-region (SBA) may be bent, in which case it may be placed on the lower surface of the display panel (100). When the sub-region (SBA) is bent, it may overlap with the main region (MA) in a third direction (DR3), which is the thickness direction of the display panel (100). A display driving circuit (250) may be placed in the sub-region (SBA).

[0057] The display driving circuit (250) can generate signals and voltages to drive the display panel (100). The display driving circuit (250) may be formed as an integrated circuit (IC) and attached to the display panel (100) using a COG (chip on glass) method, a COP (chip on plastic) method, or an ultrasonic bonding method, but is not limited thereto. For example, the display driving circuit (250) may be attached to the circuit board (300) using a COF (chip on film) method.

[0058] The circuit board (300) may be attached to one end of the sub-region (SBA). If the sub-region (SBA) is omitted, the circuit board (300) may be attached to one end of the main area (MA) (for example, one end of the non-display area (NDA)). As a result, the circuit board (300) may be electrically connected to the display panel (100) and the display driving circuit (250). The display panel (100) and the display driving circuit (250) may receive digital video data, timing signals, and driving voltages through the circuit board (300). The circuit board (300) may be a flexible printed circuit board, a printed circuit board, or a flexible film such as a chip-on-film.

[0059] The power supply unit (500) can generate multiple panel driving voltages according to the power voltage supplied from the outside. The power supply unit (500) can be formed as an integrated circuit (IC) and attached to the circuit board (300) in a COF manner.

[0060] FIG. 2 is a layout diagram showing a display device according to one embodiment. FIG. 2 illustrates a sub-region (SBA) that is unfolded without being bent.

[0061] Referring to FIG. 2, the display panel (100) may include a main area (MA) and a sub area (SBA).

[0062] The main area (MA) may include a display area (DA) that displays images and a non-display area (NDA) that is the surrounding area of ​​the display area (DA). The display area (DA) may occupy most of the main area (MA). The display area (DA) may be positioned in the center of the main area (MA).

[0063] A display area (DA) includes pixels (PX) for displaying an image, and each pixel (PX) may include a plurality of subpixels (SPX). A pixel (PX) may be defined as a group of subpixels of the smallest unit capable of expressing a white gradation.

[0064] The non-display area (NDA) may be placed adjacent to the display area (DA). The non-display area (NDA) may be an outer area of ​​the display area (DA). The non-display area (NDA) may surround the display area (DA). The non-display area (NDA) may be an edge area of ​​the display panel (100).

[0065] The first scan driver (SDC1) and the second scan driver (SDC2) may be placed in a non-display area (NDA). The first scan driver (SDC1) may be placed on one side (e.g., the left side) of the display panel (100), and the second scan driver (SDC2) may be placed on the other side (e.g., the right side) of the display panel, but is not limited thereto. Each of the first scan driver (SDC1) and the second scan driver (SDC2) may be electrically connected to the display driving circuit (250) through scan fan-out lines. Each of the first scan driver (SDC1) and the second scan driver (SDC2) may receive a scan control signal from the display driving circuit (250), generate scan signals according to the scan control signal, and output them to the scan lines.

[0066] A sub-region (SBA) may protrude in a second direction (DR2) from one side of a main region (MA). The length of the second direction (DR2) of the sub-region (SBA) may be shorter than the length of the second direction (DR2) of the main region (MA). The length of the first direction (DR1) of the sub-region (SBA) may be shorter than the length of the first direction (DR1) of the main region (MA) or substantially equal to the length of the first direction (DR1) of the main region (MA). The sub-region (SBA) may be bent and may be positioned at the bottom of the display panel (100). In this case, the sub-region (SBA) may overlap with the main region (MA) in a third direction (DR3).

[0067] The sub-region (SBA) may include a connection region (CA), a pad region (PA), and a bending region (BA).

[0068] The connection area (CA) is an area protruding in a second direction (DR2) from one side of the main area (MA). One side of the connection area (CA) is in contact with the non-display area (NDA) of the main area (MA), and the other side of the connection area (CA) may be in contact with the bending area (BA).

[0069] The pad area (PA) is an area where pads (PDs) and a display driving circuit (250) are placed. The display driving circuit (250) can be attached to the driving pads of the pad area (PA) using a conductive adhesive member such as an anisotropic conductive film. The circuit board (300) can be attached to the pads (PDs) of the pad area (PA) using a conductive adhesive member such as an anisotropic conductive film. One side of the pad area (PA) may be in contact with the bending area (BA).

[0070] The bending area (BA) is a bending area. When the bending area (BA) is bent, the pad area (PA) may be positioned below the connecting area (CA) and below the main area (MA). The bending area (BA) may be positioned between the connecting area (CA) and the pad area (PA). One side of the bending area (BA) is in contact with the connecting area (CA), and the other side of the bending area (BA) may be in contact with the pad area (PA).

[0071] FIG. 3 is a block diagram showing a display device according to one embodiment.

[0072] Referring to FIG. 3 in addition to FIG. 1 and 2, the display area (DA) may include pixels (PX), scan lines (SL), light emission control lines (EL), and data lines (DL).

[0073] Pixels (PX) may be arranged in a matrix form, etc. For example, pixels (PX) may be arranged in a matrix form in a first direction (DR1 in FIG. 2) and a second direction (DR2 in FIG. 2), but are not limited thereto. Scan lines (SL) and light emission control lines (EL) may extend in the first direction (DR1) and be arranged in the second direction (DR2). Data lines (DL) may extend in the second direction (DR2) and be arranged in the first direction (DR1). In one embodiment, scan lines (SL) may include write scan lines (GWL), initialization scan lines (GIL), and bias scan lines (GBL).

[0074] Each of the plurality of subpixels (SPX) included in each of the pixels (PX) may be connected to any one of the write scan lines (GWL), any one of the initial scan lines (GIL), any one of the bias scan lines (GBL), any one of the light emission control lines (EL), and any one of the data lines (DL). In describing the embodiments, the term "connection" may include direct connection or indirect connection, and may include the meaning of electrical and / or physical connection. Each of the plurality of subpixels (SPX) may receive a data voltage of the data line (DL) according to the write scan signal of the write scan line (GWL), and may emit light from the light-emitting element according to the data voltage.

[0075] The non-display area (NDA) includes a first scan drive unit (SDC1), a second scan drive unit (SDC2), and a display drive circuit (250).

[0076] Each of the first scan drive unit (SDC1) and the second scan drive unit (SDC2) may include a write scan signal output unit (611), an initial scan signal output unit (612), a bias scan signal output unit (613), and a light emission control signal output unit (614). Each of the write scan signal output unit (611), the initial scan signal output unit (612), the bias scan signal output unit (613), and the light emission control signal output unit (614) may receive a scan timing control signal (SCS) from a timing control unit (251) (also referred to as a "timing control circuit").

[0077] The write scan signal output unit (611) can generate write scan signals according to the scan timing control signal (SCS) of the timing control unit (251) and output them sequentially to the write scan lines (GWL).

[0078] The initialization scan signal output unit (612) can generate initialization scan signals according to the scan timing control signal (SCS) and output them sequentially to the initialization scan lines (GIL).

[0079] The bias scan signal output unit (613) can generate bias scan signals according to the scan timing control signal (SCS) and output them sequentially to the bias scan lines (GBL).

[0080] The light emission control signal output unit (614) can generate light emission control signals according to the scan timing control signal (SCS) and output them sequentially to the light emission control lines (EL).

[0081] The display driving circuit (250) includes a timing control unit (251) and a data driving unit (252) (also referred to as the "data driving circuit").

[0082] The data driver (252) can receive digital video data (DATA) and a data timing control signal (DCS) from the timing control unit (251). The data driver (252) converts the digital video data (DATA) into analog data voltages according to the data timing control signal (DCS) and outputs them to the data lines (DL). In this case, subpixels (SPX) are selected by the write scan signals of the first scan driver (SDC1) and the second scan driver (SDC2), and data voltages can be supplied to the selected subpixels (SPX).

[0083] The timing control unit (251) can receive digital video data (DATA) and timing signals from the outside. The timing control unit (251) can generate a scan timing control signal (SCS) and a data timing control signal (DCS) to control the display panel (100) according to the timing signals. The timing control circuit (400) can output the scan timing control signal (SCS) to the first scan driving unit (SDC1) and the second scan driving unit (SDC2). The timing control unit (251) can output the digital video data (DATA) and the data timing control signal (DCS) to the data driving unit (252).

[0084] The power supply unit (500) can generate a plurality of panel driving voltages according to the power voltage supplied from the outside. For example, the power supply unit (500) can generate a first driving voltage (VDD), a second driving voltage (VSS), a third driving voltage (VINT), and a fourth driving voltage (VAINT) and supply them to the display panel (100).

[0085] FIG. 4 is an equivalent circuit diagram showing a subpixel according to one embodiment.

[0086] Referring to FIG. 4 in addition to FIG. 3, a subpixel (SPX) according to one embodiment may be connected to scan lines (GWL, GIL, GBL), a light emission control line (EL), and a data line (DL). For example, the subpixel (SPX) may be connected to a write scan line (GWL), an initialization scan line (GIL), a bias scan line (GBL), a light emission control line (EL), and a data line (DL).

[0087] A subpixel (SPX) according to one embodiment may include a driving transistor (DT), switching elements, a capacitor (C1), and a light-emitting element (LE). In one embodiment, the switching elements may include first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6).

[0088] The driving transistor (DT) includes a gate electrode, a first electrode, and a second electrode. The driving transistor (DT) controls a driving current (Ids) flowing between the first electrode and the second electrode according to a data voltage applied to the gate electrode.

[0089] The light-emitting element (LE) is electrically connected to the driving transistor (DT) and can emit light with a brightness corresponding to the driving current (Ids). In one embodiment, the anode electrode of the light-emitting element (LE) is connected to the first electrode of the fourth transistor (ST4) and the second electrode of the sixth transistor (ST6), and the cathode electrode can be connected to a second power line (VSL) to which a second driving voltage is applied. In one embodiment, the light-emitting element (LE) may be a micro light-emitting diode.

[0090] A capacitor (C1) is formed between the gate electrode of a driving transistor (DT) and a first power line (VDL) to which a first driving voltage is applied. The first driving voltage may be a voltage level higher than the second driving voltage. One electrode of the capacitor (C1) may be connected to the gate electrode of the driving transistor (DT), and the other electrode may be connected to the first power line (VDL).

[0091] In one embodiment, the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) may all be formed as p-type MOSFETs as shown in FIG. 4. The active layer of each of the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) may be formed of polysilicon.

[0092] The gate electrode of the first transistor (ST1) and the gate electrode of the second transistor (ST2) may be connected to the write scan line (GWL), the gate electrode of the third transistor (ST3) may be connected to the initialization scan line (GIL), and the gate electrode of the fourth transistor (ST4) may be connected to the bias scan line (GBL). Since the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) are formed as p-type MOSFETs, they may be turned on when a scan signal of gate low voltage and a light emission control signal are applied to the initialization scan line (GIL), the write scan line (GWL), the bias scan line (GBL), and the light emission line (EL), respectively. One electrode of the third transistor (ST3) may be connected to a first initialization voltage line (VIL) to which a third driving voltage (VINT in FIG. 3) is applied, and one electrode of the fourth transistor (ST4) may be connected to a second initialization voltage line (VAIL) to which a fourth driving voltage (VAINT in FIG. 3) is applied. The third driving voltage (VINT in FIG. 3) and the fourth driving voltage (VAINT in FIG. 3) may be different voltages. Additionally, the third driving voltage (VINT in FIG. 3) and the fourth driving voltage (VAINT in FIG. 3) may be voltages at a lower level than the first driving voltage (VDD) and voltages at a higher level than the second driving voltage (VSS).

[0093] Alternatively, the driving transistor (DT), the second transistor (ST2), the fourth transistor (ST4), the fifth transistor (ST5), and the sixth transistor (ST6) may be formed as p-type MOSFETs, and the first transistor (ST1) and the third transistor (ST3) may be formed as n-type MOSFETs. In this case, the active layer of each of the driving transistor (DT), the second transistor (ST2), the fourth transistor (ST4), the fifth transistor (ST5), and the sixth transistor (ST6) formed as p-type MOSFETs may be formed of polysilicon, and the active layer of each of the first transistor (ST1) and the third transistor (ST3) formed as n-type MOSFETs may be formed of oxide semiconductor. Additionally, since the first transistor (ST1) and the third transistor (ST3) are formed as n-type MOSFETs, the first transistor (ST1) may be turned on when a gate high voltage scan signal is applied, and the third transistor (ST3) may be turned on when an initialization scan signal of a gate high voltage is applied. In contrast, the second transistor (ST2), the fourth transistor (ST4), the fifth transistor (ST5), and the sixth transistor (ST6) are formed as p-type MOSFETs, so they can be turned on when a scan signal of the gate low voltage and a light emission control signal are applied.

[0094] Alternatively, if the fourth transistor (ST4) is formed as an n-type MOSFET and the remaining transistors (DT, ST1, ST2, ST3, ST5, ST6) are formed as p-type MOSFETs, the active layer of the fourth transistor (ST4) may be formed as an oxide semiconductor, and the active layer of each of the remaining transistors (DT, ST1, ST2, ST3, ST5, ST6) may be formed as polysilicon. In addition, the fourth transistor (ST4) may be turned on when a scan signal of gate high voltage is applied, whereas the remaining transistors (DT, ST1, ST2, ST3, ST5, ST6) may be turned on when a scan signal of gate low voltage and a light emission control signal are applied.

[0095] Alternatively, the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) may all be formed as n-type MOSFETs. In this case, the active layer of each of the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) is formed of an oxide semiconductor and can be turned on when a scan signal of gate high voltage and a light emission control signal are applied.

[0096] FIG. 5 is a plan view showing a display area of ​​a display panel according to one embodiment. For example, FIG. 5 shows a part of a display area (DA) including two pixels (PX) arranged sequentially in a second direction (DR2). FIG. 5 shows an embodiment of a layout structure of a light-emitting element layer including light-emitting elements (LE) of subpixels (SPX) among the elements included in a display panel (100 of FIG. 1 to 3). The display panel (100) may further include a backplane layer (for example, a thin-film transistor layer (TFTL) of FIG. 6) including circuit elements of each subpixel (SPX) (for example, transistors and capacitor (C1) of FIG. 4).

[0097] Referring to FIG. 5, each of the subpixels (SPX) may include a pixel electrode (PXE) and a light-emitting element (LE) disposed on the pixel electrode (PXE). In one embodiment, when the light-emitting element (LE) is a flip-type light-emitting element (e.g., a flip-chip micro LED), each of the subpixels (SPX) may further include a common electrode (CE) disposed on one side (e.g., a bottom side) of the light-emitting element (LE) together with the pixel electrode (PXE).

[0098] In one embodiment, subpixels (SPX) of each pixel (PX) may be arranged in a first direction (DR1) and may share a common electrode (CE). For example, the common electrode (CE) may extend in the first direction (DR1) from each pixel row (or horizontal line) of the display area (DA), and the subpixels (SPX) of the pixels (PX) placed in that pixel row may share a common electrode (CE). The common electrode (CE) may be electrically connected to a second power line (VSL in FIG. 4) to which a second driving voltage (VSS in FIG. 3) is applied, in the interior and / or non-display area (NDA in FIG. 1 to 3) of the display area (DA).

[0099] However, the shape or connection structure of the common electrode (CE) is not limited thereto. For example, subpixels (SPX) of a pixel (PX) according to another embodiment may include separate common electrodes (CE). In this case, the common electrode (CE) may be formed separately for each subpixel (SPX) and may be electrically connected to a second power line (VSL in FIG. 4) through a contact hole and / or connection pattern.

[0100] In one embodiment, among the subpixels (SPX) of the display area (DA), subpixels (SPX) emitting light of the same type and / or color may be arranged sequentially or continuously along the second direction (DR2). For example, the first subpixels (SPX1) of the pixels (PX) included in each pixel column extending from the display area (DA) to the second direction (DR2) may be arranged sequentially or continuously in the second direction (DR2). Additionally, the second subpixels (SPX2) of the pixels (PX) included in each pixel column may be arranged sequentially or continuously in the second direction (DR2), and the third subpixels (SPX3) of the pixels (PX) included in each pixel column may be arranged sequentially or continuously in the second direction (DR2). However, the arrangement of the pixels (PX) and / or subpixels (SPX) may be varied according to the embodiments.

[0101] A first subpixel (SPX1) may include a first pixel electrode (PXE1) and a common electrode (CE) (or a part of the common electrode (CE)) spaced apart from each other, and a first light-emitting element (LE1) disposed on the first pixel electrode (PXE1) and the common electrode (CE). The first pixel electrode (PXE1) may refer to the pixel electrode (PXE) of the first subpixel (SPX1), and the first light-emitting element (LE1) may refer to the light-emitting element (LE) of the first subpixel (SPX1). The first light-emitting element (LE1) may be electrically connected between the first pixel electrode (PXE1) and the common electrode (CE).

[0102] The second subpixel (SPX2) may include a second pixel electrode (PXE2) and a common electrode (CE) spaced apart from each other, and a second light-emitting element (LE2) disposed on the second pixel electrode (PXE2) and the common electrode (CE). The second pixel electrode (PXE2) may refer to the pixel electrode (PXE) of the second subpixel (SPX2), and the second light-emitting element (LE2) may refer to the light-emitting element (LE) of the second subpixel (SPX2). The second light-emitting element (LE2) may be electrically connected between the second pixel electrode (PXE2) and the common electrode (CE).

[0103] The third subpixel (SPX3) may include a third pixel electrode (PXE3) and a common electrode (CE) spaced apart from each other, and a third light-emitting element (LE3) disposed on the third pixel electrode (PXE3) and the common electrode (CE). The third pixel electrode (PXE3) may refer to the pixel electrode (PXE) of the third subpixel (SPX3), and the third light-emitting element (LE3) may refer to the light-emitting element (LE) of the third subpixel (SPX3). The third light-emitting element (LE3) may be electrically connected between the third pixel electrode (PXE3) and the common electrode (CE).

[0104] In one embodiment, the first pixel electrode (PXE1), the second pixel electrode (PXE2), and the third pixel electrode (PXE3) of each pixel (PX) are arranged sequentially along a first direction (DR1) and may be spaced apart from the common electrode (CE) in a second direction (DR2). The first pixel electrode (PXE1), the second pixel electrode (PXE2), and the third pixel electrode (PXE3) may face different parts of the common electrode (CE) in the second direction (DR2).

[0105] The pixel electrode (PXE) and circuit elements of each of the subpixels (SPX) can be electrically connected to each other through at least one contact hole (ANH) and / or a connection pattern, etc. For example, the first pixel electrode (PXE1) of the first subpixel (SPX1) can be electrically connected to at least one circuit element included in the first subpixel (SPX1) (e.g., the fourth and sixth transistors (ST4, ST6) of FIG. 4) through the first anode contact hole (ANH1) and / or at least one connection pattern. Similarly, the second pixel electrode (PXE2) of the second subpixel (SPX2) may be electrically connected to at least one circuit element included in the second subpixel (SPX2) through the second anode contact hole (ANH2) and / or at least one connection pattern, and the third pixel electrode (PXE3) of the third subpixel (SPX3) may be electrically connected to at least one circuit element included in the third subpixel (SPX3) through the third anode contact hole (ANH3) and / or at least one connection pattern.

[0106] Light-emitting elements (LE) may be placed between each pixel electrode (PXE) and a common electrode (CE). For example, a first light-emitting element (LE1) may be placed on the first pixel electrode (PXE1) and the common electrode (CE), and a part of the first light-emitting element (LE1) may overlap with the first pixel electrode (PXE1) and another part of the first light-emitting element (LE1) may overlap with the common electrode (CE). A second light-emitting element (LE2) may be placed on the second pixel electrode (PXE2) and the common electrode (CE), and a part of the second light-emitting element (LE2) may overlap with the second pixel electrode (PXE2) and another part of the second light-emitting element (LE2) may overlap with the common electrode (CE). The third light-emitting element (LE3) is placed on the third pixel electrode (PXE3) and the common electrode (CE), and a part of the third light-emitting element (LE3) overlaps with the third pixel electrode (PXE3) and another part of the third light-emitting element (LE3) overlaps with the common electrode (CE).

[0107] Each of the light-emitting elements (LE) can emit light of a specific color (e.g., red light, green light, blue light, or white light). In one embodiment, the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3) can emit light of different colors. For example, the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3) can each emit light of a first color (e.g., red light), light of a second color (e.g., green light), and light of a third color (e.g., blue light).

[0108] In another embodiment, the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3) may emit light of the same color. In this case, a light conversion layer (e.g., a light conversion layer including wavelength conversion particles) for converting light emitted from the light-emitting element (LE) of the corresponding subpixel (SPX1), the second subpixel (SPX2), and the third subpixel (SPX3) into light corresponding to the light emission color of the corresponding subpixel (SPX) may be disposed on at least one light-emitting element (LE) of the first subpixel (SPX1), the second subpixel (SPX2), and the third subpixel (SPX3).

[0109] FIG. 6 is a cross-sectional view showing a display area of ​​a display panel according to one embodiment. For example, FIG. 6 shows one embodiment of a cross-section of a pixel (PX) corresponding to the line I1-I1' of FIG. 5.

[0110] FIG. 7 is a cross-sectional view showing the A1 region of FIG. 6 in detail. For example, FIG. 7 shows in detail a light-emitting element (LE) according to one embodiment, for example, a first light-emitting element (LE1) placed in the A1 region of FIG. 6. In one embodiment, the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3) may have substantially the same cross-sectional structure.

[0111] Referring to FIG. 6 and FIG. 7 in addition to FIG. 5, the substrate (SUB) may be made of an insulating material such as glass or a polymer resin. If the substrate (SUB) is made of a polymer resin, it may be a stretchable flexible substrate. The polymer resin may be an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0112] A barrier layer (BR) may be disposed on a substrate (SUB). The barrier layer (BR) is a film intended to protect the transistors of the thin-film transistor layer (TFTL) and the light-emitting elements (LE) disposed on the thin-film transistor layer (TFTL) from moisture penetrating through the substrate (SUB), which is susceptible to moisture permeability. The barrier layer (BR) may be composed of a plurality of alternately stacked inorganic films.

[0113] A thin-film transistor (TFT1) may be disposed on the barrier layer (BR). In one embodiment, the thin-film transistor (TFT1) may be either the fourth transistor (ST4) or the sixth transistor (ST6) shown in FIG. 4. The thin-film transistor (TFT1) may include a first active layer (ACT1) and a first gate electrode (G1).

[0114] A first active layer (ACT1) of a thin-film transistor (TFT1) may be disposed on the barrier layer (BR). The first active layer (ACT1) of the thin-film transistor (TFT1) may include polycrystalline silicon, single-crystal silicon, low-temperature polycrystalline silicon, or amorphous silicon. Alternatively, the first active layer (ACT1) of the thin-film transistor (TFT1) may include an oxide semiconductor (for example, indium-gallium-zinc oxide (IGZO), indium-gallium-zinc-tin oxide (IGZTO), or indium-gallium-tin oxide (IGTO)).

[0115] The first active layer (ACT1) may include a first channel region (CHA1), a first source region (S1), and a first drain region (D1). The first channel region (CHA1) may overlap with the first gate electrode (G1) in the third direction (DR3). The first source region (S1) may be disposed on one side of the first channel region (CHA1), and the first drain region (D1) may be disposed on the other side of the first channel region (CHA1). At least a portion of the first source region (S1) and the first drain region (D1) may not overlap with the first gate electrode (G1) in the third direction (DR3). The conductivity (e.g., carrier concentration) of the first source region (S1) and the first drain region (D1) may be higher than the conductivity of the first channel region (CHA1).

[0116] A first gate insulating layer (131) may be disposed on the first channel region (CHA1), the first source region (S1), and the first drain region (D1) of the thin-film transistor (TFT1).

[0117] A first gate metal layer may be disposed on the first gate insulating layer (131). The first gate metal layer may include a first gate electrode (G1) and a first capacitor electrode (CAE1) of a thin-film transistor (TFT1). The first gate electrode (G1) may overlap with the first active layer (ACT1) in the third direction (DR3). Although the first gate electrode (G1) and the first capacitor electrode (CAE1) are shown as being separated from each other in FIG. 6, if the thin-film transistor (TFT1) is the driving transistor (DT) of FIG. 4, the first gate electrode (G1) and the first capacitor electrode (CAE1) may be electrically and / or physically connected to each other. For example, the first capacitor electrode (CAE1) may be formed integrally with the gate electrode of the driving transistor (DT) of FIG. 4 and may be formed separately from the gate electrodes of the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) of FIG. 4.

[0118] A second gate insulating layer (132) may be disposed on the first gate electrode (G1) and the first capacitor electrode (CAE1) of the thin-film transistor (TFT1).

[0119] A second gate metal layer may be disposed on the second gate insulating layer (132). The second gate metal layer may include a second capacitor electrode (CAE2). The second capacitor electrode (CAE2) may overlap with the first capacitor electrode (CAE1) in the third direction (DR3). A capacitor (C1 in FIG. 4) may be formed by the first capacitor electrode (CAE1), the second capacitor electrode (CAE2), and the second gate insulating layer (132).

[0120] An interlayer insulating layer (141) may be disposed on the second capacitor electrode (CAE2).

[0121] A first data metal layer may be disposed on the interlayer insulating layer (141). The first data metal layer may include a first source connection electrode (PCE1). The first source connection electrode (PCE1) may be connected to a first drain region (D1) of a first active layer (ACT1) through a first source contact hole (PCT1) penetrating the first gate insulating layer (131), the second gate insulating layer (132), and the interlayer insulating layer (141).

[0122] A first flattening layer (160) for flattening the step difference caused by the thin-film transistor (TFT1) may be disposed on the first source connection electrode (PCE1).

[0123] A second data metal layer may be disposed on the first flattening layer (160). The second data metal layer may include a second source connection electrode (PCE2). The second source connection electrode (PCE2) may be connected to the first source connection electrode (PCE1) through a second source contact hole (PCT2) that penetrates the first flattening layer (160).

[0124] A second flattening layer (180) may be placed on the second source connection electrode (PCE2).

[0125] The barrier layer (BR), the first gate insulating layer (131), the second gate insulating layer (132), and the interlayer insulating layer (141) may be formed with at least one inorganic insulating layer comprising an inorganic insulating material (e.g., silicon nitride (SiNx), silicon nitride oxide (SiON), silicon oxide (SiOx), titanium oxide (TiOx), or aluminum oxide (AlOx), etc.). Each of the barrier layer (BR), the first gate insulating layer (131), the second gate insulating layer (132), and the interlayer insulating layer (141) may be formed as a single layer or a multilayer structure.

[0126] The first gate metal layer, the second gate metal layer, the first data metal layer, and the second data metal layer may include a conductive material (for example, any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof). Each of the first gate metal layer, the second gate metal layer, the first data metal layer, and the second data metal layer may be formed as a single layer or a multilayer structure.

[0127] The first flattening layer (160) and the second flattening layer (180) may include at least one organic insulating layer comprising an organic insulating material (e.g., acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin). Each of the first flattening layer (160) and the second flattening layer (180) may be formed as a single layer or a multilayer structure.

[0128] A light-emitting element layer may be disposed on the second planarization layer (180). The light-emitting element layer may include pixel electrodes (PXE), a common electrode (CE), and light-emitting elements (LE). The light-emitting element layer may further include first and second organic layers (210, 211), a light-transmitting layer (212) (or a third organic layer), first and second capping layers (CAP1, CAP2), a bank (BNK) (or a light-blocking layer), and a reflective film (RF), etc. disposed around the light-emitting elements (LE).

[0129] A pixel electrode layer may be disposed on the second planarization layer (180). The pixel electrode layer may include pixel electrodes (PXE) of subpixels (SPX) (e.g., a first pixel electrode (PXE1), a second pixel electrode (PXE2), and a third pixel electrode (PXE3)). In one embodiment, the light-emitting element (LE) of the subpixel (SPX) may be a flip-type micro LED (e.g., a flip-chip micro LED) in which first and second contact electrodes (CTE1, CTE2) are disposed on one side (e.g., the bottom side) of the light-emitting element (LE). In this case, the pixel electrode layer may further include a common electrode (CE).

[0130] Each pixel electrode (PXE) may be electrically connected to a second source connection electrode (PCE2) of each subpixel (SPX) through a contact hole (ANH) (e.g., a first anode contact hole (ANH1), a second anode contact hole (ANH2), or a third anode contact hole (ANH3) of FIG. 5) penetrating the second planarization layer (180). Each pixel electrode (PXE) may be electrically connected to a first source region (S1) or a first drain region (D1) of a thin film transistor (TFT1) through the first source connection electrode (PCE1) and the second source connection electrode (PCE2).

[0131] The pixel electrode layer may include a conductive material (for example, any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof) and may be formed as a single layer or a multilayer. For example, each of the pixel electrodes (PXE) and the common electrode (CE) may be formed as a single layer or a multilayer conductive pattern including at least one conductive material. The pixel electrodes (PXE) and the common electrode (CE) may be formed simultaneously and, accordingly, may have the same conductive material and cross-sectional structure.

[0132] In one embodiment, the pixel electrode layer may include a reflective layer comprising a metal with high reflectivity. As an example, each of the pixel electrodes (PXE) and the common electrode (CE) may include a reflective layer. Accordingly, the brightness and light efficiency of the subpixels (SPX) can be improved by reflecting downward light from the light-emitting elements (LE).

[0133] In one embodiment, a first organic layer (210) may be disposed on the pixel electrodes (PXE) and the common electrode (CE). For example, the first organic layer (210) may be disposed between the pixel electrode layer and the light-emitting element (LE) and may cover a portion of each of the pixel electrodes (PXE) and the common electrode (CE). The first organic layer (210) may not cover a portion of each of the pixel electrodes (PXE) and the common electrode (CE). For example, the first organic layer (210) may be removed or etched at the portion where the first connection hole (BH1) and the second connection hole (BH2) are formed to expose a portion of each of the pixel electrodes (PXE) and the common electrode (CE).

[0134] The first organic layer (210) serves to temporarily fix or adhere the plurality of light-emitting elements (LE) to prevent the plurality of light-emitting elements (LE) from tilting or falling over during the process of transferring the plurality of light-emitting elements (LE) to the display panel (100). For example, the first organic layer (210) may be a film for temporarily adhering the light-emitting elements (LE) onto pixel electrodes (PXE) and a common electrode (CE). To facilitate temporary adhesion, the thickness of the first organic layer (210) may be greater than the thickness of each of the pixel electrodes (PXE) and the common electrode (CE), and greater than the thickness of each of the first and second contact electrodes (CTE1, CTE2) of the light-emitting elements (LE).

[0135] FIG. 6 illustrates a structure in which the first organic layer (210) is formed over the entire display area (DA), but embodiments are not limited thereto. For example, the first organic layer (210) may be placed only in a part of the subpixel area, including a part of the pixel electrode (PXE) and common electrode (CE) of each subpixel (SPX).

[0136] The first organic layer (210) may include an organic insulating material. For example, the first organic layer (210) may be formed of a photosensitive organic film including a photoresist. Alternatively, the first organic layer (210) may be formed of an organic film including an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0137] Light-emitting elements (LE) can be disposed on the first organic layer (210). Each light-emitting element (LE) can be formed from an inorganic material such as gallium nitride (GaN). In one embodiment, the length of the first direction (DR1), the length of the second direction (DR2), and the length of the third direction (DR3) of each light-emitting element (LE) may each be several to several hundred μm. For example, the length of the first direction (DR1), the length of the second direction (DR2), and the length of the third direction (DR3) of each light-emitting element (LE) may each be 100 μm or less.

[0138] Light-emitting elements (LEs) can be formed by growing on a semiconductor substrate, such as a silicon substrate or a sapphire substrate. The light-emitting elements (LEs) can be transferred directly from the semiconductor substrate onto the pixel electrodes (PXE) and the common electrode (CE). Alternatively, the light-emitting elements (LEs) can be transferred onto the pixel electrodes (PXE) and the common electrode (CE) via an electrostatic method using an electrostatic head or a stamping method using an elastic polymer material, such as PDMS or silicon, as a transfer substrate.

[0139] In one embodiment, the light-emitting element (LE) may include a conductive layer (E1), a semiconductor stack (STC), first and second contact electrodes (CTE1, CTE2), and a protective film (INS) as shown in FIG. 7. The semiconductor stack (STC) may include a first semiconductor layer (SEM1), an active layer (MQW), and a second semiconductor layer (SEM2) sequentially arranged or stacked in a third direction (DR3). In one embodiment, the semiconductor stack (STC) may further include a third semiconductor layer (SEM3) on the second semiconductor layer (SEM2).

[0140] A conductive layer (E1) may be disposed on the lower surface of the first semiconductor layer (SEM1). Although FIG. 7 illustrates the conductive layer (E1) covering the entire lower surface of the first semiconductor layer (SEM1), the embodiments of this specification are not limited thereto. For example, the conductive layer (E1) may be disposed only on a part of the lower surface of the first semiconductor layer (SEM1). The conductive layer (E1) may include a conductive material (for example, any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or a transparent conductive material such as a metal oxide).

[0141] The first semiconductor layer (SEM1) can be placed on the conductive layer (E1). The first semiconductor layer (SEM1) may be made of a semiconductor material layer doped with a first conductive type dopant such as magnesium (Mg), zinc (Zn), calcium (Ca), strontium (Sr), barium (Ba), etc., for example, gallium nitride (GaN).

[0142] An active layer (MQW) may be disposed on a first semiconductor layer (SEM1). The active layer (MQW) may include the same semiconductor material as the first semiconductor layer (SEM1) and the second semiconductor layer (SEM2). For example, if the first semiconductor layer (SEM1) and the second semiconductor layer (SEM2) include gallium nitride (GaN), the active layer (MQW) may also include gallium nitride (GaN). For example, the active layer (MQW) may include at least one of gallium nitride (GaN), indium gallium nitride (InGaN), and aluminum gallium nitride (AlGaN). The active layer (MQW) may emit light through the coupling of electron-hole pairs according to an electric signal applied through the first semiconductor layer (SEM1) and the second semiconductor layer (SEM2).

[0143] The active layer (MQW) can be formed as a single or multiple quantum well structure. When the active layer (MQW) is formed as a multiple quantum well structure, the active layer (MQW) may include well layers and barrier layers that are alternately stacked. In one embodiment, each well layer may be formed of InGaN, and each barrier layer may be formed of GaN or AlGaN, but is not limited thereto. Alternatively, the active layer (MQW) may be a structure in which semiconductor materials with a large band gap energy and semiconductor materials with a small band gap energy are alternately stacked, or it may include different Group 3 to Group 5 semiconductor materials depending on the wavelength range of the emitted light.

[0144] When the active layer (MQW) contains indium gallium nitride (InGaN), the color of the emitted light may vary depending on the indium (In) content. For example, as the indium (In) content increases, the wavelength band of the light emitted by the active layer (MQW) shifts toward the red wavelength band, and as the indium (In) content decreases, the wavelength band of the light emitted by the active layer shifts toward the blue wavelength band. For example, the indium (In) content of the active layer (MQW) included in the second light-emitting element (LE2) may be higher than the indium (In) content of the active layer (MQW) included in the first light-emitting element (LE1), and lower than the indium (In) content of the active layer (MQW) included in the third light-emitting element (LE3).

[0145] The second semiconductor layer (SEM2) can be disposed on the active layer (MQW). The second semiconductor layer (SEM2) may be a semiconductor material layer doped with a second conductivity type dopant, such as silicon (Si), germanium (Ge), tin (Sn), etc., for example, gallium nitride (GaN).

[0146] A third semiconductor layer (SEM3) may be disposed on the second semiconductor layer (SEM2). The third semiconductor layer (SEM3) is a semiconductor material layer in which the n-type dopant concentration is lower than a predetermined threshold value and may be referred to as an un-doped semiconductor layer. For example, the third semiconductor layer (SEM3) may be indium aluminum gallium nitride (InAlGaN), gallium nitride (GaN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), aluminum nitride (AlN), or indium nitride (InN), in which the n-type dopant concentration is lower than a predetermined threshold value. The third semiconductor layer (SEM3) may be omitted.

[0147] An electron blocking layer may be placed between the first semiconductor layer (SEM1) and the active layer (MQW). The electron blocking layer may be a layer designed to suppress or prevent too many electrons from flowing into the active layer (MQW). For example, the electron blocking layer may be AlGaN or p-AlGaN doped with p-type Mg. The electron blocking layer may be omitted.

[0148] A superlattice layer may be disposed between the active layer (MQW) and the second semiconductor layer (SEM2). The superlattice layer may be a layer for relieving stress between the second semiconductor layer (SEM2) and the active layer (MQW). For example, the superlattice layer may be formed of InGaN or GaN. The superlattice layer may be omitted.

[0149] The protective film (INS) can wrap around the sides of the semiconductor stack (STC). For example, the protective film (INS) can be placed on the sides of the first semiconductor layer (SEM1), the sides of the active layer (MQW), and the sides of the second semiconductor layer (SEM2). In one embodiment, the protective film (INS) can further wrap around the sides of the third semiconductor layer (SEM3).

[0150] The protective film (INS) may be a film for protecting the side of the light-emitting element (LE). For example, the protective film (INS) may be formed of an inorganic film, such as silicon nitride (SiNx), silicon nitride oxide (SiON), silicon oxide (SiOx), titanium oxide (TiOx), or aluminum oxide (AlOx).

[0151] In one embodiment, the protective film (INS) may cover the side and bottom surfaces of the conductive layer (E1). An opening may be formed in the protective film (INS) to expose a portion of the conductive layer (E1). In the portion where the conductive layer (E1) is exposed, the conductive layer (E1) and the first contact electrode (CTE1) may come into contact.

[0152] Additionally, a hole (LEH) may be formed in the light-emitting element (LE) that penetrates the conductive layer (E1), the first semiconductor layer (SEM1), and the active layer (MQW) to expose the second semiconductor layer (SEM2). The hole (LEH) may have a circular planar shape, but the embodiments of this specification are not limited thereto. As an example, the hole (LEH) may have a polygonal planar shape such as an ellipse or a square.

[0153] A protective film (INS) may be disposed on the sidewall of the conductive layer (E1) exposed in the hole (LEH), the sidewall of the first semiconductor layer (SEM1), and the sidewall of the active layer (MQW). The protective film (INS) may not cover the second semiconductor layer (SEM2) in the hole (LEH). Therefore, the second semiconductor layer (SEM2) may be exposed without being covered by the protective film (INS). In the portion where the second semiconductor layer (SEM2) is exposed, the second semiconductor layer (SEM2) and the second contact electrode (CTE2) may come into contact.

[0154] The first contact electrode (CTE1) may be disposed on the side of the protective film (INS). For example, the first contact electrode (CTE1) may be disposed on a portion of the protective film (INS) covering a portion of the side of each of the semiconductor stack (STC) and the conductive layer (E1), and a portion of the bottom surface of the conductive layer (E1). Accordingly, the first contact electrode (CTE1) may be disposed on a portion of the side and bottom surfaces of each of the light-emitting element (LE). As an example, the first contact electrode (CTE1) may be disposed on a portion of the side of each of the semiconductor stack (STC) and the conductive layer (E1), and a portion of the bottom surface of the conductive layer (E1), which overlaps with the pixel electrode (PXE). The first contact electrode (CTE1) may be disposed on the bottom surface of the conductive layer (E1) that is exposed and not covered by the protective film (INS), and may be electrically connected to the conductive layer (E1). The first contact electrode (CTE1) can be electrically connected to the first semiconductor layer (SEM1) through the conductive layer (E1). The conductive layer (E1) of the light-emitting element (LE) can be electrically connected to each pixel electrode (PXE) through the first contact electrode (CTE1) and the first connecting electrode (BE1).

[0155] The second contact electrode (CTE2) may be disposed on the side of the protective film (INS) spaced apart from the first contact electrode (CTE1). For example, the second contact electrode (CTE2) may be disposed on another part of the side of the semiconductor stack (STC) and the conductive layer (E1), respectively, and on another part of the protective film (INS) covering another part of the bottom surface of the conductive layer (E1). Accordingly, the second contact electrode (CTE2) may be disposed on another part of the side and bottom surface of the light-emitting element (LE). As an example, the second contact electrode (CTE2) may be disposed on another part of the side of the semiconductor stack (STC) and the conductive layer (E1), respectively, and on another part of the bottom surface of the conductive layer (E1), which overlaps with the common electrode (CE). The second contact electrode (CTE2) may also be disposed inside the hole (LEH) and may be disposed on the second semiconductor layer (SEM2) exposed in the hole (LEH) without being covered by the protective film (INS). Accordingly, the second contact electrode (CTE2) can be electrically connected to the second semiconductor layer (SEM2). The second semiconductor layer (SEM2) can be electrically connected to the common electrode (CE) through the second contact electrode (CTE2) and the second connecting electrode (BE2).

[0156] In one embodiment, the first contact electrode (CTE1) and the second contact electrode (CTE2) may each be placed on three sides of the semiconductor stack (STC). For example, if the semiconductor stack (STC) includes first to fourth sides, the first contact electrode (CTE1) may be placed on the first side, the second side, and the third side of the semiconductor stack (STC), and the second contact electrode (CTE2) may be placed on the second side, the third side, and the fourth side of the semiconductor stack (STC).

[0157] Each of the first contact electrode (CTE1) and the second contact electrode (CTE2) can be formed as a transparent electrode through which light generated from the light-emitting element (LE) can pass. For example, each of the first contact electrode (CTE1) and the second contact electrode (CTE2) can have light transmittance through which light in the visible light wavelength band generated from the light-emitting element (LE) can pass, and can be substantially transparent.

[0158] Each of the first contact electrode (CTE1) and the second contact electrode (CTE2) may include a transparent conductive material. For example, each of the first contact electrode (CTE1) and the second contact electrode (CTE2) may include a transparent conductive material that combines conductivity and light transmittance. For example, each of the first contact electrode (CTE1) and the second contact electrode (CTE2) may include a transparent conductive oxide (TCO) with excellent conductivity and transparency, such as indium tin oxide (ITO) or indium zinc oxide (IZO). When the first contact electrode (CTE1) and the second contact electrode (CTE2) are formed simultaneously, the first contact electrode (CTE1) and the second contact electrode (CTE2) may include the same transparent conductive material.

[0159] As the first contact electrode (CTE1) and the second contact electrode (CTE2) are each formed as transparent electrodes, the amount of light passing through the first contact electrode (CTE1) and the second contact electrode (CTE2) to reach the reflective film (RF) can be increased. Accordingly, the reflected light (Lrf) reflected by the reflective film (RF) can be increased, thereby increasing the light emission rate of each subpixel (SPX). For example, some of the light generated in the active layer (MQW) can pass through the first contact electrode (CTE1) to reach the reflective film (RF) as indicated by the arrow in FIG. 7, and then be reflected by the reflective film (RF) to proceed to the top of the light-emitting element (LE). Accordingly, the amount of light emitted from the subpixel (SPX) increases, and the brightness and light efficiency of the subpixel (SPX) can be improved. On the other hand, if the first contact electrode (CTE1) and the second contact electrode (CTE2) are each formed as opaque electrodes, light emitted in the lateral direction of the light-emitting element (LE) toward the first contact electrode (CTE1) and the second contact electrode (CTE2) may not be able to pass through the first contact electrode (CTE1) and the second contact electrode (CTE2). Accordingly, the light loss of the light-emitting element (LE) may increase.

[0160] In one embodiment, the light-emitting element (LE) may include light extraction patterns (LEP) formed on one surface from which light is emitted. For example, the light-emitting element (LE) may include light extraction patterns (LEP) formed on the upper surface of a semiconductor stack (STC) (for example, the upper surface of a third semiconductor layer (SEM3)). The light extraction patterns (LEP) may have a shape suitable for diffusing and / or scattering light on the upper surface of the light-emitting element (LE). For example, the upper surface of the light-emitting element (LE) may be formed non-flat so that the upper surface of the light-emitting element (LE) has a shape suitable for light scattering. Accordingly, the light efficiency of the light-emitting element (LE) (for example, the light emission rate of light generated from the light-emitting element (LE)) can be increased.

[0161] In one embodiment, the light-emitting element layer may further include a first connecting electrode (BE1) and a second connecting electrode (BE2).

[0162] A first connecting electrode (BE1) is disposed on a portion of the first organic layer (210) and can electrically connect the first contact electrode (CTE1) of the light-emitting element (LE) and the pixel electrode (PXE). For example, the first connecting electrode (BE1) of the first sub-pixel (SPX1) can electrically connect the first contact electrode (CTE1) of the first light-emitting element (LE1) and the first pixel electrode (PXE1). The first connecting electrode (BE1) of the second sub-pixel (SPX2) can electrically connect the first contact electrode (CTE1) of the second light-emitting element (LE2) and the second pixel electrode (PXE2). The first connecting electrode (BE1) of the third sub-pixel (SPX3) can electrically connect the first contact electrode (CTE1) of the third light-emitting element (LE3) and the third pixel electrode (PXE3).

[0163] In one embodiment, the first connecting electrode (BE1) may be connected to the pixel electrode (PXE) through a first connecting hole (BH1) penetrating the first organic layer (210). Additionally, the first connecting electrode (BE1) may be disposed on the upper surface of the first organic layer (210) and on the first contact electrode (CTE1).

[0164] A second connecting electrode (BE2) may be disposed on another part of the first organic layer (210) to electrically connect the second contact electrode (CTE2) of the light-emitting element (LE) and the common electrode (CE). For example, the second connecting electrode (BE2) of the first subpixel (SPX1) may electrically connect the second contact electrode (CTE2) of the first light-emitting element (LE1) and the common electrode (CE). The second connecting electrode (BE2) of the second subpixel (SPX2) may electrically connect the second contact electrode (CTE2) of the second light-emitting element (LE2) and the common electrode (CE). The second connecting electrode (BE2) of the third subpixel (SPX3) may electrically connect the second contact electrode (CTE2) of the third light-emitting element (LE3) and the common electrode (CE).

[0165] In one embodiment, the second connecting electrode (BE2) may be connected to the common electrode (CE) through a second connecting hole (BH2) penetrating the first organic layer (210). Additionally, the second connecting electrode (BE2) may be disposed on the upper surface of the first organic layer (210) and on the second contact electrode (CTE2).

[0166] Each of the first connecting electrode (BE1) and the second connecting electrode (BE2) may include a conductive material. For example, each of the first connecting electrode (BE1) and the second connecting electrode (BE2) may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

[0167] In one embodiment, the first connecting electrode (BE1) and the second connecting electrode (BE2) are each formed to a height close to the reflective film (RF) and may include a transparent conductive material. In this case, the contact area between the first connecting electrode (BE1) and the first contact electrode (CTE1) and the contact area between the second connecting electrode (BE2) and the second contact electrode (CTE2) can be sufficiently secured, while increasing the amount of light reaching the reflective film (RF) from the light-emitting element (LE). Accordingly, the effect of improving the light emission rate by the reflective film (RF) can be secured or increased.

[0168] In another embodiment, the first connecting electrode (BE1) and the second connecting electrode (BE2) may each be formed at a lower height, for example, a height suitable for not blocking light that passes through the first and second contact electrodes (CTE1, CTE2) and proceeds toward the reflective film (RF). Additionally, the first connecting electrode (BE1) and the second connecting electrode (BE2) may each include a transparent conductive material or a metal material with high reflectivity, such as aluminum (Al). When the first connecting electrode (BE1) and the second connecting electrode (BE2) are each placed on the lower side of the light-emitting element (LE) and include a metal material with high reflectivity, light emitted from the active layer (MQW) of the light-emitting element (LE) that proceeds toward the lower side of the light-emitting element (LE) may be reflected by the connecting electrodes (BE) and proceed toward the upper direction of the light-emitting element (LE). Accordingly, the light emission rate of the light-emitting element (LE) may be increased.

[0169] The second organic layer (211) may cover a portion of the side of the light-emitting elements (LE) and the connecting electrodes (BE). For example, the second organic layer (211) may be formed at a height lower than the height of the light-emitting elements (LE) to cover a portion of the side of the light-emitting elements (LE) and the connecting electrodes (BE).

[0170] The second organic layer (211) can be formed from an organic film such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin. The second organic layer (211) can mitigate the step difference caused by light-emitting elements (LE).

[0171] The first capping layer (CAP1) may be disposed on the light-emitting elements (LE) and the second organic layer (211). The first capping layer (CAP1) may include a material suitable for protecting the light-emitting elements (LE), for example, an inorganic insulating material.

[0172] A bank (BNK) may be disposed on a first capping layer (CAP1). The bank (BNK) may surround the light-emitting elements (LE) at a position spaced apart from the light-emitting elements (LE). For example, the bank (BNK) may include openings corresponding to light-emitting regions (or light-emitting region) where the light-emitting elements (LE) are disposed. The bank (BNK) may define light-transmitting regions (e.g., light-emitting regions of each subpixel (SPX)) through which light emitted from the light-emitting elements (LE) can pass, and light-blocking regions (e.g., non-light-emitting regions) surrounding the light-transmitting regions. The bank (BNK) may be formed from an organic film such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin, but is not limited thereto. In one embodiment, the bank (BNK) includes a light-blocking material such as an inorganic black pigment, such as carbon black, or an organic black pigment, and may also function as a light-blocking layer. For example, the bank (BNK) may include a light-blocking pattern containing a light-blocking material. The bank (BNK) may further include a capping layer (e.g., an inorganic film) covering the light-blocking pattern.

[0173] The side of the bank (BNK) may include a curved surface or an inclined surface at a certain angle. The bank (BNK) may have a shape in which the width decreases toward the upper layer or the width increases toward the upper layer. Alternatively, the side of the bank (BNK) may have a uniform width overall and be substantially perpendicular to the substrate (SUB). The side of the bank (BNK) may have other shapes. FIGS. 6 and 7 illustrate an embodiment in which the side of the bank (BNK) includes a curved surface. The shape of the bank (BNK) may be varied depending on the forming material or process method of the bank (BNK) and / or the light emission characteristics of the subpixels (SPX).

[0174] A reflective film (RF) may be placed on the side of the bank (BNK). FIGS. 6 and 7 illustrate an embodiment in which the reflective film (RF) is placed directly on the side of the bank (BNK), but the embodiments are not limited thereto. For example, in other embodiments, after forming an additional capping layer covering the bank (BNK) and the first capping layer (CAP1), the reflective film (RF) may be placed on a part of the capping layer covering the side of the bank (BNK).

[0175] In one embodiment, the reflective film (RF) may also be placed on the upper surface of the bank (BNK). Alternatively, the reflective film (RF) may not be placed on the upper surface of the bank (BNK). FIGS. 6 and 7 illustrate an embodiment in which the reflective film (RF) is placed on the side and upper surfaces of the bank (BNK).

[0176] The reflective film (RF) may face the side of the light-emitting element (LE). The fact that the reflective film (RF) faces the side of the light-emitting element (LE) includes cases where the reflective film (RF) faces horizontally at the same height as at least one part of the side of the light-emitting element (LE), as well as cases where the reflective film (RF) faces the side of the light-emitting element (LE) in a diagonal direction. For example, the reflective film (RF) may be positioned at a location and / or height where light transmitted in a horizontal or diagonal direction can reach the side of the light-emitting element (LE) on which the first contact electrode (CTE1) and the second contact electrode (CTE2) are placed.

[0177] The reflective film (RF) can reflect light traveling in a lateral direction from the light-emitting element (LE) and the light-transmitting layer (212), etc. The reflective film (RF) may include a material with high light reflectivity, for example, a metal such as aluminum (Al). Alternatively, the reflective film (RF) may consist of inorganic films having different refractive indices that are alternately arranged (for example, silicon nitride (SiN2)). x ), silicon nitride oxide (SiON), silicon oxide (SiO x ), titanium oxide (TiO₂) x ), or aluminum oxide (AlO x It may also be formed as a dispersed Bragg reflector including )).

[0178] The light-transmitting layer (212) may be disposed on the light-emitting elements (LE) and the first capping layer (CAP1). In one embodiment, the light-transmitting layer (212) may be formed to a height greater than the height of the bank (BNK) and the reflective film (RF) to cover the bank (BNK) and the reflective film (RF). For example, the light-transmitting layer (212) may be formed over the entire display area (DA) to cover the light-emitting elements (LE), the first capping layer (CAP1), the bank (BNK), and the reflective film (RF). However, the embodiments are not limited thereto, and the light-transmitting layer (212) may be formed to a height less than or equal to the height of the bank (BNK) and the reflective film (RF).

[0179] The light-transmitting layer (212) may include an organic material. For example, the light-transmitting layer (212) may be a light-transmitting organic film including an epoxy resin, an acrylic resin, a cardo resin, or an imide resin. The light-transmitting layer (212) may also be referred to as a "third organic layer." The light-transmitting layer (212) can mitigate or flatten the step difference caused by light-emitting elements (LE) and banks (BNK), etc.

[0180] In one embodiment, a light-emitting element (LE) emits light of a color corresponding to the light-emitting color of each subpixel (SPX), and a light-transmitting layer (212) can transmit light emitted from the light-emitting elements (LE) of the subpixels (SPX). For example, the light-transmitting layer (212) can transmit light of a first color, light of a second color, and light of a third color emitted from a first light-emitting element (LE1), a second light-emitting element (LE2), and a third light-emitting element (LE3). When the subpixels (SPX) include light-emitting elements (LE) that emit light corresponding to each light-emitting color, the light emitted from the light-emitting elements (LE) can be utilized more efficiently. For example, a decrease in the light efficiency of the subpixels (SPX) due to light conversion can be prevented. In addition, the color purity of the light emitted from the subpixels (SPX) can be increased.

[0181] The second capping layer (CAP2) may be disposed on the light-transmitting layer (212). The second capping layer (CAP2) may include an inorganic insulating material. The second capping layer (CAP2) may be omitted.

[0182] Color filters may be disposed on the second capping layer (CAP2) (or light-transmitting layer (212)). The color filters may include a first color filter (CF1), a second color filter (CF2), and a third color filter (CF3).

[0183] A first color filter (CF1) may be placed on a first light-emitting element (LE1) of a first subpixel (SPX1). The first color filter (CF1) may transmit light of a first color (e.g., red light) and absorb or block light of other colors (e.g., green light and blue light). Accordingly, the first subpixel (SPX1) may emit light of the first color.

[0184] A second color filter (CF2) may be placed on the second light-emitting element (LE2) of the second subpixel (SPX2). The second color filter (CF2) may transmit light of a second color (e.g., green light) and absorb or block light of other colors (e.g., red light and blue light). Accordingly, the second subpixel (SPX2) may emit light of the second color.

[0185] A third color filter (CF3) may be placed on the third light-emitting element (LE3) of the third subpixel (SPX3). The third color filter (CF3) may transmit light of a third color (e.g., blue light) and absorb or block light of other colors (e.g., red light and green light). Accordingly, the third subpixel (SPX3) may emit light of a third color.

[0186] The first color filter (CF1), the second color filter (CF2), and the third color filter (CF3) can overlap with the bank (BNK) in the third direction (DR3). For example, the first color filter (CF1), the second color filter (CF2), and the third color filter (CF3) can overlap each other on the bank (BNK) to form a light-blocking pattern.

[0187] A fourth organic layer (214) may be disposed on the color filters. The fourth organic layer (214) may be formed from an organic film including acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin. The fourth organic layer (214) may mitigate or flatten the step difference caused by the first color filter (CF1), the second color filter (CF2), and the third color filter (CF3). For example, the upper surface of the fourth organic layer (214) may be substantially flat.

[0188] FIG. 8 is a cross-sectional view showing a display area of ​​a display panel according to one embodiment. For example, FIG. 8 shows one embodiment of a cross-section of a pixel (PX) corresponding to the line I1-I1' of FIG. 5. Compared to FIG. 6, FIG. 8 shows an embodiment further comprising a light conversion layer. In describing the following embodiments, the same reference numerals are assigned to elements similar or identical to at least one embodiment described above, and redundant descriptions are omitted.

[0189] Referring to FIG. 8, a bank (BNK), a second capping layer (CAP2'), and a reflective film (RF) may be disposed on the first capping layer (CAP1). Additionally, a first light conversion layer (QDL1), a second light conversion layer (QDL2), a light transmission layer (TPL), a third capping layer (CAP3), and a third flattening layer (213) may be disposed on the second capping layer (CAP2').

[0190] A bank (BNK) is disposed on a first capping layer (CAP1) and may surround light-emitting elements (LE), a first light-converting layer (QDL1), a second light-converting layer (QDL2), and a light-transmitting layer (TPL). The bank (BNK) may define respective light-transmitting regions where the first light-converting layer (QDL1), the second light-converting layer (QDL2), and the light-transmitting layer (TPL) are disposed. The height of the bank (BNK) may be similar to or equal to the height of the first light-converting layer (QDL1), the second light-converting layer (QDL2), and the light-transmitting layer (TPL). In one embodiment, the bank (BNK) may be formed of an organic film and may include a light-blocking material.

[0191] FIG. 8 illustrates an embodiment in which the side of the bank (BNK) includes an inclined surface at a certain angle. However, the embodiments are not limited thereto, and the side of the bank (BNK) may include a curved surface as in the embodiments of FIG. 6 and FIG. 7.

[0192] A second capping layer (CAP2') may be disposed on the first capping layer (CAP2) and the bank (BNK). The second capping layer (CAP2') may comprise an inorganic material suitable for encapsulating a light-emitting element layer including light-emitting elements (LE), and / or a first light-converting layer (QDL1), a second light-converting layer (QDL2), and a light-transmitting layer (TPL). The second capping layer (CAP2') may be omitted.

[0193] A reflective film (RF) may be disposed on a portion of a second capping layer (CAP2') covering a bank (BNK). FIG. 8 illustrates an embodiment in which the reflective film (RF) is disposed only on the side surface of the bank (BNK) and not on the top surface of the bank (BNK). However, the embodiments are not limited thereto, and the reflective film (RF) may also be disposed on the top surface of the bank (BNK).

[0194] The reflective film (RF) may face the sides of each of the light-emitting elements (LE), the first light conversion layer (QDL1), the second light conversion layer (QDL2), and the light-transmitting layer (TPL). The reflective film (RF) may also face a portion of the sides of each of the light-emitting elements (LE). The reflective film (RF) may include a material with high light reflectivity or be formed as a dispersion Bragg reflector. The reflective film (RF) can reflect light traveling in a lateral direction from the light-emitting elements (LE), the first light conversion layer (QDL1), the second light conversion layer (QDL2), and the light-transmitting layer (TPL). Accordingly, the light emission rate of the subpixels (SPX) can be improved by increasing the proportion of light emitted above each of the subpixels (SPX) from the light generated and / or converted in the subpixels (SPX).

[0195] A first light conversion layer (QDL1) may be disposed on a first light-emitting element (LE1). In one embodiment, the first light-emitting element (LE1) emits light of a third color (e.g., light in the blue wavelength band), and the first light conversion layer (QDL1) may convert a portion of the light of the third color incident from the first light-emitting element (LE1) into light of a first color (e.g., light in the red wavelength band). The first light conversion layer (QDL1) may include a first base resin (BRS1) and a first wavelength conversion particle (WCP1). The first base resin (BRS1) may include a light-transmitting organic material. The first wavelength conversion particle (WCP1) may convert a portion of the light of the third color incident from the first light-emitting element (LE1) into light of the first color. The first wavelength conversion particle (WCP1) may be a quantum dot, a quantum rod, a fluorescent material, or a phosphorescent material. In one embodiment, the first light conversion layer (QDL1) may further include a light scatterer (particles capable of scattering or diffusing light, such as titanium dioxide (TiO2) or silicon dioxide (SiO2), etc.).

[0196] A second light conversion layer (QDL2) may be disposed on a second light-emitting element (LE2). In one embodiment, the second light-emitting element (LE2) emits light of a third color, and the second light conversion layer (QDL2) may convert a portion of the light of the third color incident from the second light-emitting element (LE2) into light of the second color (e.g., light in the green wavelength band). The second light conversion layer (QDL2) may include a second base resin (BRS2) and a second wavelength conversion particle (WCP2). The second base resin (BRS2) may include a light-transmitting organic material. The second wavelength conversion particle (WCP2) may convert a portion of the light of the third color incident from the second light-emitting element (LE2) into light of the second color. The second wavelength conversion particle (WCP2) may be a quantum dot, a quantum rod, a fluorescent material, or a phosphorescent material. In one embodiment, the second light conversion layer (QDL2) may further include a light scatterer.

[0197] A light-transmitting layer (TPL) may be disposed on a third light-emitting element (LE3). In one embodiment, the third light-emitting element (LE3) emits light of a third color, and the light-transmitting layer (TPL) may transmit the light of the third color incident from the third light-emitting element (LE3) as is. The light-transmitting layer (TPL) may include a light-transmitting organic material. In one embodiment, the light-transmitting layer (TPL) may further include a light scatterer. If the subpixels (SPX) include light-emitting elements (LE) that emit light of the same color, the manufacturing efficiency of the display panel (100) can be increased.

[0198] A third capping layer (CAP3) may be disposed on a bank (BNK), a second capping layer (CAP2), a reflective film (RF), a first light conversion layer (QDL1), a second light conversion layer (QDL2), and a light-transmitting layer (TPL). The third capping layer (CAP3) may include an inorganic material suitable for encapsulating the first light conversion layer (QDL1), the second light conversion layer (QDL2), and the light-transmitting layer (TPL), etc. For example, the first light conversion layer (QDL1), the second light conversion layer (QDL2), and the light-transmitting layer (TPL) may be encapsulated by the second capping layer (CAP2') and the third capping layer (CAP3). If the display panel (100) does not include a second capping layer (CAP2'), the first light conversion layer (QDL1), the second light conversion layer (QDL2), and the light transmission layer (TPL) can be encapsulated by the first capping layer (CAP1) and the third capping layer (CAP3).

[0199] In one embodiment, the first capping layer (CAP1), the second capping layer (CAP2'), and the third capping layer (CAP3) may each comprise an inorganic material. For example, the first capping layer (CAP1), the second capping layer (CAP2'), and the third capping layer (CAP3) may each be formed from an inorganic film including silicon nitride (SiNx), silicon nitride oxide (SiON), silicon oxide (SiOx), titanium oxide (TiOx), or aluminum oxide (AlOx).

[0200] A third flattening layer (213) may be disposed on the third capping layer (CAP3). Color filters (e.g., first, second, and third color filters (CF1, CF2, CF3)) and a fourth organic layer (214) may be disposed on the third flattening layer (213).

[0201] The third flattening layer (213) may be formed from an organic film including acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin. The third flattening layer (213) may also be referred to as the "fifth organic layer." The third flattening layer (213) may mitigate or flatten the step difference caused by the first color filter (CF1), the second color filter (CF2), and the third color filter (CF3). For example, the upper surface of the third flattening layer (213) may be substantially flat.

[0202] FIG. 9 is a cross-sectional view showing a display area of ​​a display panel according to one embodiment. For example, FIG. 9 shows one embodiment of a cross-section of a pixel (PX) corresponding to the line I1-I1' of FIG. 5. Compared to FIG. 6, FIG. 9 shows an embodiment in which the display panel (100) further includes conductive patterns (CP). Each of the embodiments disclosed herein may be practiced or applied alone, or may be combined with at least one other embodiment.

[0203] Referring to FIG. 9, the display panel (100) may further include conductive patterns (CP) disposed on each subpixel (SPX). For example, the display panel (100) may further include a first conductive pattern (CP1) disposed between the pixel electrode (PXE) and the light-emitting element (LE) of each subpixel (SPX), and a second conductive pattern (CP2) disposed between the common electrode (CE) and the light-emitting element (LE) of each subpixel (SPX). The light-emitting element (LE) of each subpixel (SPX) may be disposed on the first conductive pattern (CP1) and the second conductive pattern (CP2). In one embodiment, the light-emitting element (LE) of each subpixel (SPX) may have the structure shown in FIG. 7.

[0204] The first conductive pattern (CP1) may be placed between a portion of the pixel electrode (PXE) and the lower surface of the first contact electrode (CTE1 in FIG. 7) of the light-emitting element (LE). The second conductive pattern (CP2) may be placed between a portion of the common electrode (CE) and the lower surface of the second contact electrode (CTE2 in FIG. 7) of the light-emitting element (LE).

[0205] The first conductive pattern (CP1) and the second conductive pattern (CP2) may include a material suitable for bonding a light-emitting element (LE) onto a pixel electrode (PXE) and a common electrode (CE). For example, the first conductive pattern (CP1) and the second conductive pattern (CP2) may include a conductive photoresist. As an example, the first conductive pattern (CP1) and the second conductive pattern (CP2) may include a conductive photoresist containing an organic material such as carbon black.

[0206] A light-emitting element (LE) can be bonded to a pixel electrode (PXE) and a common electrode (CE) by means of a first conductive pattern (CP1) and a second conductive pattern (CP2). Additionally, the light-emitting element (LE) can be electrically connected to the pixel electrode (PXE) and the common electrode (CE) through the first conductive pattern (CP1) and the second conductive pattern (CP2), respectively. For example, the first conductive pattern (CP1) can electrically connect the first contact electrode (CTE1) of the light-emitting element (LE) to the pixel electrode (PXE), and the second conductive pattern (CP2) can electrically connect the second contact electrode (CTE2) of the light-emitting element (LE) to the common electrode (CE).

[0207] In one embodiment, the first contact electrode (CTE1) of the light-emitting element (LE) may also be electrically connected to the pixel electrode (PXE) through the first connection electrode (BE1). Additionally, the second contact electrode (CTE2) of the light-emitting element (LE) may also be electrically connected to the common electrode (CE) through the second connection electrode (BE2).

[0208] The first connecting electrode (BE1) may be placed on another part of the pixel electrode (PXE) that is not covered by the first conductive pattern (CP1). The other part of the pixel electrode (PXE) may include a portion of the top surface of the pixel electrode (PXE) and / or a portion of the side surface of the pixel electrode (PXE). The first connecting electrode (BE1) may also be placed on the side surface of the first contact electrode (CTE1) and the side surface of the first conductive pattern (CP1). For example, the first connecting electrode (BE1) may be in contact with a portion of the top surface and a portion of the side surface of the pixel electrode (PXE), a side surface of the first contact electrode (CTE1), and a side surface of the first conductive pattern (CP1). Accordingly, the first connecting electrode (BE1) may be electrically connected to the pixel electrode (PXE), the first contact electrode (CTE1), and the first conductive pattern (CP1).

[0209] In one embodiment, the first connecting electrode (BE1) may be a transparent electrode comprising a transparent conductive material. Accordingly, light emitted laterally from the light-emitting element (LE) can pass through the first contact electrode (CTE1) and the first connecting electrode (BE1).

[0210] The second connecting electrode (BE2) may be placed on another part of the common electrode (CE) that is not covered by the second conductive pattern (CP2). The other part of the common electrode (CE) may include a portion of the upper surface of the common electrode (CE). The second connecting electrode (BE2) may also be placed on the side of the second contact electrode (CTE2) and the side of the second conductive pattern (CP2). For example, the second connecting electrode (BE2) may be in contact with a portion of the upper surface of the common electrode (CE), the side of the second contact electrode (CTE2), and the side of the second conductive pattern (CP2). Accordingly, the second connecting electrode (BE2) may be electrically connected to the common electrode (CE), the second contact electrode (CTE2), and the second conductive pattern (CP2).

[0211] In one embodiment, the second connecting electrode (BE2) may be a transparent electrode comprising a transparent conductive material. Accordingly, light emitted laterally from the light-emitting element (LE) can pass through the second contact electrode (CTE2) and the second connecting electrode (BE2).

[0212] The display panel (100) according to the above-described embodiment can be manufactured by a hybrid bonding method utilizing conductive patterns (CP) and connecting electrodes (BE). For example, a manufacturing method for the display panel (100) according to one embodiment may include the steps of bonding a light-emitting element (LE) onto a pixel electrode (PXE) and a common electrode (CE) using a first conductive pattern (CP1) and a second conductive pattern (CP2), and strengthening the bonding of the light-emitting element (LE) by forming a first connecting electrode (BE1) and a second connecting electrode (BE2).

[0213] The step of bonding a light-emitting element (LE) onto a pixel electrode (PXE) and a common electrode (CE) using a first conductive pattern (CP1) and a second conductive pattern (CP2) may include the step of forming the first conductive pattern (CP1) and the second conductive pattern (CP2) on the pixel electrode (PXE) and the common electrode (CE), respectively, and the step of performing a bonding process such that the first conductive pattern (CP1) and the second conductive pattern (CP2) are bonded and / or connected to the first contact electrode (CTE1) and the second contact electrode (CTE2), respectively. For example, after applying a conductive photoresist onto a pixel electrode layer including a pixel electrode (PXE) and a common electrode (CE), a photolithography process may be performed to form the first conductive pattern (CP1) and the second conductive pattern (CP2) on the pixel electrode (PXE) and the common electrode (CE), respectively. The first conductive pattern (CP1) and the second conductive pattern (CP2) may be formed separately from each other. Afterwards, a light-emitting element (LE) can be bonded onto the first conductive pattern (CP1) and the second conductive pattern (CP2).

[0214] In one embodiment, the conductive photoresist may be placed only on a portion of each of the pixel electrode (PXE) and the common electrode (CE), including the region where the light-emitting element (LE) is to be bonded, and removed from other portions of each of the pixel electrode (PXE) and the common electrode (CE). Accordingly, the first conductive pattern (CP1) and the second conductive pattern (CP2) may be placed only on a portion of each of the pixel electrode (PXE) and the common electrode (CE), and may not cover other portions of each of the pixel electrode (PXE) and the common electrode (CE). In one embodiment, if each of the pixel electrode (PXE) and the common electrode (CE) includes a reflective layer containing a material with high reflectivity, the light efficiency of the subpixel (SPX) can be further improved by increasing the reflectivity of the pixel electrode (PXE) and the common electrode (CE) by locally placing the first conductive pattern (CP1) and the second conductive pattern (CP2) only in the bonding region.

[0215] The step of forming a first connecting electrode (BE1) and a second connecting electrode (BE2) may include forming the first connecting electrode (BE1) on a part of a pixel electrode (PXE), a first conductive pattern (CP1), and a first contact electrode (CTE1), and forming the second connecting electrode (BE2) on a part of a common electrode (CE), a second conductive pattern (CP2), and a second contact electrode (CTE2). For example, a first connecting electrode (BE1) may be formed on a part of the pixel electrode (PXE) not covered by the first conductive pattern (CP1) (e.g., a part of the upper surface of the pixel electrode (PXE) and / or a part of the side of the pixel electrode (PXE)), a side of the first conductive pattern (CP1), and a side of the first contact electrode (CTE1), and a second connecting electrode (BE2) may be formed on a part of the common electrode (CE) not covered by the second conductive pattern (CP2) (e.g., a part of the upper surface of the common electrode (CE) and / or a part of the side of the common electrode (CE)), a side of the second conductive pattern (CP2), and a side of the second contact electrode (CTE2).

[0216] The light-emitting element (LE) can be electrically connected between the pixel electrode (PXE) and the common electrode (CE) by the first conductive pattern (CP1) and the second conductive pattern (CP2), and also electrically connected between the pixel electrode (PXE) and the common electrode (CE) by the first connecting electrode (BE1) and the second connecting electrode (BE2). Accordingly, the contact resistance between the pixel electrode (PXE) and the light-emitting element (LE), and the contact resistance between the common electrode (CE) and the light-emitting element (LE) can be lowered, and the quality of the contact can be improved.

[0217] Accordingly, the light-emitting element (LE) can be more stably positioned and connected between the pixel electrode (PXE) and the common electrode (CE). For example, the light-emitting element (LE) can be stably positioned and connected on the pixel electrode (PXE) and the common electrode (CE) by a hybrid bonding structure and / or method utilizing conductive patterns (CP) and connecting electrodes (BE). The bottom surface of the light-emitting element (LE) (for example, the bottom surface of the first contact electrode (CTE1) and the second contact electrode (CTE2)) can be bonded and / or connected to the pixel electrode (PXE) and the common electrode (CE) by the conductive patterns (CP), and the side surface of the light-emitting element (LE) (for example, the side surface of the first contact electrode (CTE1) and the second contact electrode (CTE2)) can be connected to the pixel electrode (PXE) and the common electrode (CE) by the connecting electrodes (BE).

[0218] When a light-emitting element (LE) is bonded to the first conductive pattern (CP1) and the second conductive pattern (CP2), the first organic layer (210) of FIG. 6 may be omitted. Accordingly, it is possible to prevent an increase in contact resistance due to residues of the first organic layer (210).

[0219] In addition, in the embodiment of FIG. 9, the first contact electrode (CTE1) and the second contact electrode (CTE2) of the light-emitting element (LE) may each be a transparent electrode containing a transparent conductive material. Accordingly, the amount of light emitted from the light-emitting element (LE) that is reflected by the reflective film (RF) and reflected upward toward the subpixel (SPX) can be increased. By doing so, the brightness and light efficiency of the subpixel (SPX) can be improved.

[0220] The first capping layer (CAP1) may be disposed on the pixel electrode layer, conductive patterns (CP), light-emitting elements (LE), and connecting electrodes (BE). If the display panel (100) does not include the first organic layer (210) and the second organic layer (211) of FIG. 6, the first capping layer (CAP1) may be disposed directly on the pixel electrode (PXE) and the common electrode (CE) around the first and second connecting electrodes (BE1, BE2).

[0221] A bank (BNK) may be disposed on a first capping layer (CAP1). The bank (BNK) may be formed with a height or thickness sufficient to surround the light-emitting elements (LE). For example, the bank (BNK) may be formed with a height greater than the height of the light-emitting elements (LE), but is not limited thereto.

[0222] A reflective film (RF) can be placed on a bank (BNK). For example, the reflective film (RF) can be placed on the side of the bank (BNK) and optionally further placed on the top surface of the bank (BNK). The reflective film (RF) can be placed directly on the bank (BNK) or on a capping layer covering the bank (BNK) (for example, the second capping layer (CAP2') in FIG. 8). The reflective film (RF) can face the side of the light-emitting elements (LE).

[0223] A light-transmitting layer (212) (or a third organic layer) may be disposed on the light-emitting elements (LE), the first capping layer (CAP1), the bank (BNK), and the reflective film (RF). In one embodiment, a second capping layer (CAP2) may be disposed on the light-transmitting layer (212). The second capping layer (CAP2) may be omitted.

[0224] Color filters (e.g., first, second, and third color filters (CF1, CF2, CF3)) may be disposed on the second capping layer (CAP2) (or light-transmitting layer (212)). A fourth organic layer (214) may be disposed on the color filters.

[0225] FIG. 10 is a plan view showing a display area of ​​a display panel according to one embodiment. For example, FIG. 10 shows one embodiment of a layout structure of a light-emitting element layer corresponding to a part of a display area (DA) including two pixels (PX). Compared to FIG. 5 to 7, FIG. 10 to 12 show a display panel (100) including vertical type light-emitting elements (LE).

[0226] FIG. 11 is a cross-sectional view showing a display area of ​​a display panel according to one embodiment. For example, FIG. 11 shows one embodiment of a cross-section of a pixel (PX) corresponding to the line I2-I2' of FIG. 10.

[0227] FIG. 12 is a cross-sectional view showing the A2 region of FIG. 11 in detail. For example, FIG. 12 shows in detail a light-emitting element (LE) according to one embodiment, for example, a first light-emitting element (LE1) placed in the A1 region of FIG. 11. In one embodiment, the first light-emitting element (LE1), the second light-emitting element (LE2), and the third light-emitting element (LE3) may have substantially the same cross-sectional structure.

[0228] Referring to FIGS. 10 to 12, each of the subpixels (SPX) may include a pixel electrode (PXE), a light-emitting element (LE) disposed on the pixel electrode (PXE), and a common electrode (CE) disposed on the light-emitting element (LE). In one embodiment, the pixel electrode (PXE) may be individually disposed in each subpixel area, and the common electrode (CE) may be formed as a common layer disposed across the entire display area (DA). A first capping layer (CAP1) may be disposed on the common electrode (CE).

[0229] Each light-emitting element (LE) of each subpixel (SPX) may include a first contact electrode (CTE1) disposed on the side of the semiconductor stack (STC) and the conductive layer (E1), respectively, and on the lower surface of the conductive layer (E1). Although FIG. 12 discloses an embodiment in which the first contact electrode (CTE1) covers the entire lower surface of the conductive layer (E1), the embodiments are not limited thereto. For example, the first contact electrode (CTE1) may cover only a portion of the lower surface of the conductive layer (E1). The first contact electrode (CTE1) may contact the conductive layer (E1) on a portion of the lower surface of the conductive layer (E1) that is not covered by the protective film (INS). Accordingly, the first contact electrode (CTE1) may be electrically connected to the conductive layer (E1).

[0230] A first connecting electrode (BE1) may be disposed on the side of the first contact electrode (CTE1). The first connecting electrode (BE1) may electrically connect the pixel electrode (PXE) and the first contact electrode (CTE1). In one embodiment, the first connecting electrode (BE1) may be electrically connected to the pixel electrode (PXE) through a plurality of connecting holes including a first connecting hole (BH1) and a second connecting hole (BH2). In one embodiment, the first connecting electrode (BE1) may be formed as a single integrated pattern to wrap around the side of the light-emitting element (LE), or may be formed as a plurality of divided patterns. For example, in FIG. 12, the first connecting electrode (BE1) disposed on the left side of the light-emitting element (LE) and the first connecting electrode (BE1) disposed on the right side of the light-emitting element (LE) may be formed as a single pattern connected to each other, or as separate divided patterns.

[0231] The light-emitting element (LE) may not include the hole (LEH) and the second contact electrode (CTE2) disclosed in FIG. 7. In one embodiment, the light-emitting element (LE) may not include the third semiconductor layer (SEM3) of FIG. 7, but is not limited thereto. A common electrode (CE) may be disposed on the second semiconductor layer (SEM2). Accordingly, the second semiconductor layer (SEM2) may be electrically connected to the common electrode (CE).

[0232] FIG. 12 discloses an embodiment in which a common electrode (CE) is disposed directly on a second semiconductor layer (SEM2), but the embodiments are not limited thereto. As an example, the light-emitting element (LE) may further include at least one semiconductor layer and / or conductive layer disposed between the second semiconductor layer (SEM2) and the common electrode (CE). In this case, the second semiconductor layer (SEM2) and the common electrode (CE) may be electrically connected to each other via the at least one semiconductor layer and / or conductive layer.

[0233] Additionally, FIGS. 10 to 12 illustrate a display panel (100) in which a vertical type light-emitting element (LE) is connected to a pixel electrode (PXE) by a first connecting electrode (BE1), but the embodiments are not limited thereto. For example, a vertical type light-emitting element (LE) may be bonded onto a pixel electrode (PXE) by a hybrid bonding structure and / or method described in the embodiment of FIG. 9. In this case, a conductive pattern (CP in FIG. 9) (for example, a first conductive pattern (CP1)) may be formed on the pixel electrode (PXE), and the light-emitting element (LE) may be bonded onto the pixel electrode (PXE) using the conductive pattern (CP). Subsequently, by forming a first connecting electrode (BE1) on a part of the pixel electrode (PXE) not covered by the conductive pattern (CP), a side of the conductive pattern (CP), and a side of the first contact electrode (CTE1), the connection between the pixel electrode (PXE) and the light-emitting element (LE) can be strengthened.

[0234] As described above, the display device (1) according to the embodiments includes a light-emitting element (LE) including a contact electrode disposed on the side, and the contact electrode may be formed as a transparent electrode including a transparent conductive material. For example, the display device (1) according to the embodiments may include a flip-type light-emitting element (LE) including a first contact electrode (CTE1) and a second contact electrode (CTE2) disposed separately from each other on the side of the light-emitting element (LE), or a vertical-type light-emitting element (LE) including a first contact electrode (CTE1) disposed on the side of the light-emitting element (LE). Accordingly, the amount of light emitted from the light-emitting element (LE) can be increased, and the brightness and light efficiency of the light-emitting element (LE) can be improved. For example, among the light generated in the active layer (MQW) of the light-emitting element (LE), light that travels in the lateral direction of the light-emitting element (LE) can pass through the contact electrode (for example, the first contact electrode (CTE1) and / or the second contact electrode (CTE2)) and be emitted to the outside of the light-emitting element (LE).

[0235] In some embodiments, the display device (1) may further include a reflective film (RF) facing the side of the light-emitting element (LE). By reflecting light that has traveled toward the side direction of the light-emitting element (LE) by the reflective film (RF), the brightness and light efficiency of the subpixel (SPX) can be improved. For example, a portion of the light emitted from the light-emitting element (LE) through the first contact electrode (CTE1) and / or the second contact electrode (CTE2) may be reflected by the reflective film (RF) and travel toward the front direction of the display device (1) (for example, a third direction (DR3)).

[0236] According to the embodiments described above, the brightness and light efficiency of the subpixel (SPX) and the display device (1) including it can be improved.

[0237] In some embodiments, the display device (1) further comprises a conductive pattern (CP) disposed between a pixel electrode layer including a pixel electrode (PXE) and / or a common electrode (CE) and a light-emitting element (LE), and the light-emitting element (LE) may be bonded onto the pixel electrode (PXE) and / or the common electrode (CE) by the conductive pattern (CP). Additionally, a first connecting electrode (BE1) and / or a second connecting electrode (BE2) may be further disposed on the side of the light-emitting element (LE).

[0238] According to the embodiments described above, a light-emitting element (LE) can be more stably positioned and / or connected between a pixel electrode (PXE) and a common electrode (CE). For example, by means of a conductive pattern (CP) and a connecting electrode (BE), the light-emitting element (LE) can be more stably bonded onto the pixel electrode layer, and the contact resistance between the pixel electrode layer and the light-emitting element (LE) can be lowered.

[0239] A display device (1) according to at least one of the embodiments described above may be applied to various electronic devices. An electronic device according to one embodiment may include the display device (1) described above (or a display module including a display panel (100) according to at least one embodiment), and may further include a module or device having additional functions other than the display device (1).

[0240] FIG. 13 is a block diagram of an electronic device according to one embodiment. Referring to FIG. 13, an electronic device (10) according to one embodiment may include a display module (11), a processor (12), a memory (13), and a power module (14).

[0241] The electronic device (10) can output various information in the form of an image through the display module (11). For example, when the processor (12) executes an application stored in memory (13), the image information provided by the application can be provided to the user through the display module (11).

[0242] The display module (11) may include a display panel (100) for displaying an image. For example, the display module (11) may include a display panel (100) according to at least one of the embodiments described above.

[0243] The processor (12) may include at least one of a central processing unit (CPU), an application processor (AP), a graphic processing unit (GPU), a communication processor (CP), an image signal processor (ISP), and a controller.

[0244] The memory (13) may store data information necessary for the operation of the processor (12) or the display module (11). For example, the memory (13) may store image data signals and / or input control signals.

[0245] The processor (12) can control the display module (11) using information stored in the memory (13). The processor (12) can transmit video data signals and / or input control signals stored in the memory (13) to the display module (11). For example, when the processor (12) executes an application stored in the memory (13), video data signals and / or input control signals are transmitted to the display module (11), and the display module (11) can process the received signals and output video information through a display screen.

[0246] The power module (14) may include a power supply module, such as a power adapter or battery device, and a power conversion module that converts the power supplied by the power supply module to generate power required for the operation of the electronic device (10).

[0247] At least one of each component of the electronic device (10) described above may be included in the display device (1) according to the embodiments described above. Additionally, some of the individual modules functionally included in one module may be included in the display device (1), while others may be provided separately from the display device (1). For example, the display device (1) may include a display module (11), and the processor (12), memory (13), and power module (14) may be provided in the form of other devices within the electronic device (10) other than the display device (1).

[0248] FIG. 14 is a schematic diagram of an electronic device according to various embodiments.

[0249] Referring to FIG. 14, various electronic devices to which the display device (1) according to the embodiments is applied may include not only image display electronic devices such as a smartphone (10_1a), tablet PC (10_1b), laptop (10_1c), TV (10_1d), and desk monitor (10_1e), but also wearable electronic devices including display modules such as smart glasses (10_2a), head-mounted display (10_2b), and smart watch (10_2c), and automotive electronic devices (10_3) including display modules such as a CID (Center Information Display) and room mirror display placed on the instrument panel, center fascia, and dashboard of a car.

[0250] Although embodiments of the present invention have been described above with reference to the attached drawings, those skilled in the art will understand that the present invention may be implemented in other specific forms without changing the technical concept or essential features thereof. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive.

Claims

1. Pixel electrodes disposed on a substrate; and It includes a light-emitting element disposed on the pixel electrode and electrically connected to the pixel electrode, The above light-emitting element is, A semiconductor stack including a first semiconductor layer, an active layer, and a second semiconductor layer; A protective film covering the side of the semiconductor stack; and It includes a first contact electrode disposed on the side of the above protective film and electrically connected to the first semiconductor layer, The first contact electrode above is a display device comprising a transparent conductive material.

2. In Paragraph 1, A bank spaced apart from the light-emitting element and surrounding the light-emitting element; and A display device further comprising a reflective film disposed on the side of the bank.

3. In Paragraph 2, The above reflective film is a display device facing the side of the above light-emitting element.

4. In Paragraph 1, A display device wherein the first contact electrode comprises indium-tin oxide or indium-zinc oxide.

5. In Paragraph 1, The first contact electrode is a display device disposed on a portion of each of the side and bottom surfaces of the light-emitting element.

6. In Paragraph 5, A first conductive pattern disposed between a portion of the pixel electrode and the lower surface of the first contact electrode; and A display device further comprising a first connecting electrode disposed on the side of the first contact electrode and the side of the first conductive pattern, on another part of the pixel electrode.

7. In Paragraph 6, The light-emitting element further includes a second contact electrode disposed at a different part of the side and bottom surfaces of the light-emitting element and electrically connected to the second semiconductor layer. The above second contact electrode is a display device comprising a transparent conductive material.

8. In Paragraph 7, A common electrode disposed on the substrate and spaced apart from the pixel electrode; A second conductive pattern disposed between a portion of the common electrode and the lower surface of the second contact electrode; and A display device further comprising a second connecting electrode disposed on another part of the common electrode, the side of the second contact electrode and the side of the second conductive pattern.

9. In Paragraph 8, A display device comprising a conductive photoresist, wherein the first conductive pattern and the second conductive pattern are the above-mentioned first conductive pattern and the above-mentioned second conductive pattern.

10. In Paragraph 9, The first conductive pattern and the second conductive pattern are a display device comprising carbon black.

11. In Paragraph 8, A display device comprising a first connecting electrode and a second connecting electrode, the first connecting electrode and the second connecting electrode comprising a transparent conductive material.

12. In Paragraph 1, An organic layer disposed between the pixel electrode and the light-emitting element and covering a portion of the pixel electrode; and A display device further comprising a first connecting electrode disposed on a portion of the organic layer and electrically connecting the pixel electrode and the first contact electrode.

13. In Paragraph 1, The light-emitting element further includes a second contact electrode disposed spaced apart from the first contact electrode on the side of the protective film and electrically connected to the second semiconductor layer. The above second contact electrode is a display device comprising a transparent conductive material.

14. In Paragraph 13, A common electrode disposed on the substrate and spaced apart from the pixel electrode; An organic layer covering a portion of the pixel electrode and the common electrode, and disposed below the light-emitting element; A first connecting electrode disposed on a portion of the above organic layer and electrically connecting the pixel electrode and the first contact electrode; and A display device further comprising a second connecting electrode disposed on another part of the above organic layer and electrically connecting the common electrode and the second contact electrode.

15. A display module including a display panel; and It includes a processor that transmits an image data signal to the above-mentioned display module, The above display panel is, Pixel electrodes disposed on a substrate; and It includes a light-emitting element disposed on the pixel electrode and electrically connected to the pixel electrode, The above light-emitting element is, A semiconductor stack including a first semiconductor layer, an active layer, and a second semiconductor layer; A protective film covering the side of the semiconductor stack; and An electronic device comprising a first contact electrode disposed on the side of the protective film, electrically connected to the first semiconductor layer, and including a transparent conductive material.

16. In Paragraph 15, The above display panel is, A bank spaced apart from the light-emitting element and surrounding the light-emitting element; and An electronic device further comprising a reflective film disposed on the side of the above bank.

17. In Paragraph 15, The first contact electrode is disposed on a portion of each of the side and bottom surfaces of the light-emitting element, and The above display panel is, A first conductive pattern disposed between a portion of the pixel electrode and the lower surface of the first contact electrode; and An electronic device further comprising a first connecting electrode disposed on the side of the first contact electrode and the side of the first conductive pattern, on another part of the pixel electrode.

18. In Paragraph 17, The above first conductive pattern is an electronic device comprising a conductive photoresist.

19. In Paragraph 15, The light-emitting element further includes a second contact electrode disposed spaced apart from the first contact electrode on the side of the protective film and electrically connected to the second semiconductor layer. The above second contact electrode comprises a transparent conductive material, in an electronic device.

20. In Paragraph 19, The above display panel is, A common electrode disposed on the substrate and spaced apart from the pixel electrode; A first connecting electrode disposed on the pixel electrode and electrically connecting the pixel electrode and the first contact electrode; and An electronic device further comprising a second connecting electrode disposed on the common electrode and electrically connecting the common electrode and the second contact electrode.

Images