OLED sub-pixel circuit with protective passivation material

Abstract

Embodiments described herein generally relate to a display. More specifically, embodiments described herein relate to sub-pixel circuits and methods of forming sub-pixel circuits that may be utilized in a display such as an organic light-emitting diode (OLED) display. In one or more embodiments, a sub-pixel circuit includes at least two anodes disposed over a substrate. A pixel-isolation structure (PIS) is disposed between the anodes. An overhang structure is disposed over the PIS. A protective layer is disposed between the PIS and the overhang structure. The protective layer extends over a portion of an upper surface of the anodes.

Description

PATENTAttorney Docket No.: 44025949WO01OLED SUB-PIXEL CIRCUIT WITH PROTECTIVE PASSIVATION MATERIAL BACKGROUNDField

[0001] Embodiments described herein generally relate to a display. More specifically, embodiments described herein relate to sub-pixel circuits and methods of forming sub-pixel circuits that may be utilized in a display such as an organic lightemitting diode (OLED) display.Description of the Related Art

[0001] Input devices including display devices may be used in a variety of electronic systems. An organic light-emitting diode (OLE) is a light-emitting diode (LED) in which the emissive electroluminescent layer is a film of an organic compound that emits light in response to an electric current. OLE devices are classified as bottom emission devices if light emitted passes through the transparent or semi-transparent bottom electrode and substrate on which the panel was manufactured. Top emission devices are classified based on whether or not the light emitted from the OLE device exits through the lid that is added following the fabrication of the device. OLEs are used to create display devices in many electronics today. Today’s electronics manufacturers are pushing these display devices to shrink in size while providing higher resolution than just a few years ago.

[0002] Therefore, a need exists for sub-pixel circuits and methods of forming sub-pixel circuits.SUMMARY

[0002] Embodiments described herein generally relate to a display. More specifically, embodiments described herein relate to sub-pixel circuits and methods of forming sub-pixel circuits that may be utilized in a display such as an organic lightemitting diode (OLED) display.

[0003] In one or more embodiments, a method of forming a sub-pixel circuit includes depositing a lower inorganic layer over a substrate. The substrate has anodes patterned over an upper surface of the substrate. The method further includesPATENTAttorney Docket No.: 44025949WO01depositing a pixel-isolation material over the lower inorganic layer and removing portions of the pixel-isolation material disposed over upper surfaces of the anodes to form a pixel-isolation structure (PIS) between adjacent anodes. The method further includes depositing a protective layer over the PIS and across the upper surfaces of the anodes and depositing an upper inorganic layer over the protective layer. The method further includes depositing a first overhang material over the upper inorganic layer and depositing a second overhang material over the first overhang material and patterning the second overhang material to define a second structure. The method further includes etching the first overhang material to define a first structure disposed under the second structure, removing portions of the upper inorganic layer disposed over the upper surfaces of the anodes, and removing portions of the protective layer disposed over the upper surfaces of the anodes.

[0004] In one or more embodiments, a method of forming a sub-pixel circuit includes depositing a lower protective layer over a substrate. The substrate has anodes patterned over an upper surface of the substrate. The method further includes depositing a lower inorganic layer over the lower protective layer, depositing a pixelisolation material over the lower inorganic layer, and removing portions of the pixel-isolation material disposed over upper surfaces of the anodes to form a pixelisolation structure (PIS) between adjacent anodes. The method further includes depositing an upper protective layer over the PIS and across the upper surfaces of the anodes, depositing an upper inorganic layer over the upper protective layer, and depositing a first overhang material over the upper inorganic layer and depositing a second overhang material over the first overhang material. The method further includes patterning the second overhang material to define a second structure, etching the first overhang material to define a first structure disposed under the second structure, and removing portions of the upper inorganic layer disposed over the upper surfaces of the anodes. The method further includes removing portions of the upper protective layer and the lower protective layer disposed over the upper surfaces of the anodes.

[0005] In one or more embodiments, a sub-pixel circuit includes at least two anodes disposed over a substrate. A pixel-isolation structure (PIS) is disposed between thePATENTAttorney Docket No.: 44025949WO01anodes. An overhang structure is disposed over the PIS. A protective layer is disposed between the PIS and the overhang structure. The protective layer extends over a portion of an upper surface of the anodes.BRIEF DESCRIPTION OF THE DRAWINGS

[0006] So that the manner in which the above recited features of the present disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only exemplary embodiments and are therefore not to be considered limiting of its scope, and may admit to other equally effective embodiments.

[0007] Figure 1 is a schematic, cross-sectional view of a sub-pixel circuit, according to one or more embodiments.

[0008] Figure 2 is a flow diagram of a method for forming a sub-pixel circuit, according to one or more embodiments.

[0009] Figure 3A-3H are schematic, cross-sectional views of a substrate during a method for forming a sub-pixel circuit, according to embodiments described herein.

[0010] Figure 4 is a flow diagram of a method for forming a sub-pixel circuit, according to one or more embodiments.

[0011] Figures 5A-5H are schematic, cross-sectional views of a substrate during a method for forming a sub-pixel circuit, according to embodiments described herein.

[0012] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation.DETAILED DESCRIPTION

[0013] Embodiments described herein generally relate to a display. More specifically, embodiments described herein relate to sub-pixel circuits and methods of forming sub-pixel circuits that may be utilized in a display such as an organic light-PATENTAttorney Docket No.: 44025949WO01emitting diode (OLED) display. In various embodiments, the sub-pixels employ advanced overhang structures to improve functionality of the display.

[0014] In one embodiment, a sub-pixel is provided. The sub-pixel includes an anode, overhang structures, an inorganic layer, an organic light emitting diode (OLE) material, and a cathode. The anode is defined by adjacent first overhang structure and adjacent second overhang structure. The overhang structures are disposed over the inorganic layer. The overhang structures include a second structure disposed over the first structure. A bottom surface of the second structure extends laterally past an upper surface of the first structure The OLE material is disposed over the anode and an upper surface of the inorganic layer. The cathode disposed over the OLE material and an upper surface of the inorganic layer under the extensions of the second structures of the adjacent overhang structures. In one or more embodiments a pixelisolation structure (PIS) is deposited below the adjacent overhang structures. In one or more embodiments the PIS is deposited below an inorganic layer. In one or more embodiments the PIS is deposited over an upper surface of the inorganic layer.

[0015] Each of the embodiments described herein of the sub-pixel circuit include a plurality of sub-pixels with each of the sub-pixels are defined by adjacent overhang structures that are permanent to the sub-pixel circuit. While the Figures depict two sub-pixels with each sub-pixel defined by adjacent overhang structures, the sub-pixel circuit of the embodiments described herein include a plurality of sub-pixels, such as two or more subpixels. Each sub-pixel has OLE materials configured to emit a white, red, green, blue or other color light when energized. E.g., the OLE materials of a first sub-pixel emits a red light when energized, the OLE materials of a second sub-pixel emits a green light when energized, and the OLE materials of a third sub-pixel emits a blue light when energized.

[0016] The overhangs are permanent to the sub-pixel circuit and include at least a second structure disposed over a first structure. The adjacent overhang structures defining each sub-pixel of the sub-pixel circuit of the display provide for formation of the sub-pixel circuit using evaporation deposition and provide for the overhang structures to remain in place after the sub-pixel circuit is formed. Evaporation deposition is utilized for deposition of OLE materials (including a hole injection layerPATENTAttorney Docket No.: 44025949WO01(H IL), a hole transport layer (HTL), an emissive layer (EML), and an electron transport layer (ETL)) and cathode. In some instances, an encapsulation material may be disposed via evaporation deposition. In embodiments including one or more capping layers, the capping layers are disposed between the cathode and the encapsulation layer. The overhang structures and the evaporation angle set by the evaporation source define the deposition angles, i.e., the overhang structures provide for a shadowing effect during evaporation deposition with the evaporation angle set by the evaporation source. In order to deposit at a particular angle, the evaporation source is configured to emit the deposition material at a particular angle with regard to the overhang structure. The encapsulation layer of a respective subpixel is disposed over the cathode with the encapsulation layer extending under at least a portion of each of the adjacent overhang structures and along a sidewall of each of the adjacent overhang structures.

[0017] Figure 1 is a schematic, cross-sectional view of a sub-pixel circuit 100, according to one or more embodiments. The sub-pixel circuit 100 includes a substrate 102. In one or more embodiments, the anodes 104 are pre-patterned on the substrate 102. E.g., the substrate is pre-patterned with anodes 104 of indium tin oxide (ITO). The anodes 104 are configured to operate as anodes of respective sub-pixels. In one embodiment, the anode 104 is a layer stack of a first transparent conductive oxide (TCO) layer, a second metal-containing layer disposed on the first TCO layer, and a third TCO layer disposed on the second metal-containing layer. The anodes 104 include, but are not limited to, chromium, titanium, gold, silver, copper, aluminum, ITO, a combination thereof, or other suitably conductive materials.

[0018] In one or more embodiments, a lower protective layer 183 is deposited over the substrate 102 in between each of the anodes 104. The lower protective layer 183 is disposed between the adjacent anodes 104 and extends along a sidewall of each of the anodes 104, and extends over a portion of an upper surface of the adjacent anodes 104. In one or more embodiments, the lower protective layer 183 includes a ceramic material. The ceramic material may bean aluminum oxide (AI2O3) containing material. In one or more embodiments, the lower protective layer 183 has a thickness from about 10 nm to about 50 nm. A lower inorganic layer 182 is disposed over aPATENTAttorney Docket No.: 44025949WO01portion of the lower protective layer 183. In one or more embodiments, the lower inorganic layer 182 includes a silicon containing material. The silicon containing material may be a silicon nitride (SisN4) containing material. In one or more embodiments, the lower inorganic layer 182 has a thickness from about 10 nm to about 50 nm. In one or more embodiments, the sub-pixel circuit 100 does not include the lower protective layer 183. In one or more embodiments, the lower inorganic layer is disposed between the adjacent anodes 104 and extends along a sidewall of each of the anodes 104.

[0019] One or more PIS 126 are disposed over the substrate 102. The PIS 126 includes one of an organic material, an organic material with an inorganic coating disposed thereover, or an inorganic layer. The organic material of the PIS 126 includes, but is not limited to, polyimides. The inorganic layer of the PIS 126 includes, but is not limited to, silicon oxide (SiC ), silicon nitride (SisN4), silicon oxynitride (Si2N2O), magnesium fluoride (MgF2), or combinations thereof.

[0020] The sub-pixel circuit 100 has a plurality of sub-pixel lines (e.g., first sub-pixel line 106A, second sub-pixel line 106B, and third sub-pixel line 106C). The sub-pixel lines are adjacent to each other along the pixel plane. While Figure 1 depicts the first sub-pixel line 106A, the second sub-pixel line 106B, and the third sub-pixel line 106C, the sub-pixel circuit 100 of the embodiments described herein may include two or more sub-pixel lines, such as a fourth sub-pixel. Each sub-pixel line has OLE materials configured to emit a white, red, green, blue or other color light when energized. In one or more embodiments the OLE materials within a pixel line are configured to emit the same color light when energized. In one or more embodiments the OLE materials within a pixel line are configured to emit different colors of light when energized

[0021] Each sub-pixel line includes overhang structures 110, with adjacent subpixel lines sharing the overhang structures 110 in the pixel plane. The overhang structures 110 are permanent to the sub-pixel circuit 100. The overhang structures 110 further define each sub-pixel line of the sub-pixel circuit 100. Each overhang structure 110 includes adjacent overhang extensions 109. The adjacent overhang extensions 109 are defined by a bottom surface 107 of a second structure 110B extending laterally past an upper surface 105 of a first structure 110A. In one or morePATENTAttorney Docket No.: 44025949WO01embodiments the first structure 11OA is disposed on an upper inorganic layer 180. In one or more embodiments, the upper inorganic layer includes a silicon containing material, such as a silicon nitride (SiNx) containing material. In one or more embodiments, the upper inorganic layer 180 includes the same material as the lower protective layer 183. In one or more embodiments, the upper inorganic layer 180 has a thickness from about 10 nm to about 50 nm.

[0022] The upper inorganic layer 180 is disposed over an upper protective layer 181. In one or more embodiments, the upper protective layer includes a ceramic material, such as an aluminum oxide (AI2O3) containing material. In one or more embodiments, the upper protective layer 181 includes the same material as the lower protective layer 183. In one or more embodiments, the upper protective layer 181 has a thickness from about 10 nm to about 50 nm. In one or more embodiments, the upper protective layer 181 has a thickness from about 20 nm to about 100 nm. The upper protective layer 181 is at least partially disposed over the PIS 126 and extends over part of the anode 104 under the adjacent overhang extensions 109. The second structure 110B is disposed over the first structure 110A. The second structure 110B may be disposed on the upper surface 105 of the first structure 110A.

[0023] In one embodiment, the overhang structures 110 include the second structure 110B of a conductive inorganic layer and the first structure 110A of a non-conductive inorganic layer. The conductive materials of the second structure 110B include a copper (Cu), aluminum (Al), aluminum neodymium (AINd), molybdenum (Mo), molybdenum tungsten (MoW), or combinations thereof. The non-conductive materials of the first structure 110A include amorphous silicon (a-Si), titanium (Ti), silicon nitride (SisN4), silicon oxide (SiC>2), silicon oxynitride (Si2N2O), or combinations thereof. The overhang structures 110 are able to remain in place, i.e. , are permanent.

[0024] The adjacent overhang extensions 109 are defined by the bottom surface 107 of the second structure 110B. The bottom surface 107 of the second structure 110B is wider than the upper surface 105 of the first structure 110A to form the overhang extension 109. The overhang extension 109 of the second structure 110B allows for the second structure 110B to shadow the first structure 110A. The shadowing of the overhang extension 109 provides for evaporation deposition of anPATENTAttorney Docket No.: 44025949WO01OLE material 112 and a cathode 114. The OLE material 112 may include one or more of a HIL, a HTL, an EML, and an ETL. The OLE material 112 is partly disposed over and in contact with the anode 104. The OLE material 112 is disposed under the adjacent overhang extensions 109 is in contact with the upper surface of the upper inorganic layer 180. The OLE material 112 is at least partially disposed under adjacent overhang extensions 109 and may contact a sidewall 111 of the first structure 110A. In one or more embodiments, the OLE material 112 is different from the material of the first structure 110A and the second structure 110B. The cathode 114 is disposed over the OLE material 112 and extends under the adjacent overhang extensions 109. The cathode 114 may extend past an endpoint of the OLE material 112. The cathode 114 may contact the upper protective layer 181. The overhang structures 110 and an evaporation angle set by an evaporation source define deposition angles, i.e., the overhang structures provide for a shadowing effect during evaporation deposition with the evaporation angle set by the evaporation source.

[0025] The cathode 114 includes a conductive material, such as a metal. E.g., the cathode 114 includes, but is not limited to, silver, magnesium, chromium, titanium, aluminum, ITO, or a combination thereof. In one embodiment, material of the cathode 114 is different from the material of the first structure 110A and the second structure 110B. In one or more embodiments the OLE material 112 and the cathode 114 do not contact the sidewall 111 of the first structure 110A. In one or more embodiments the OLE material 112 contacts the sidewall 111 of the first structure 110A.

[0026] In one or more embodiments, each sub-pixel 106A, 106B, 106C includes an encapsulation layer 116 disposed over the cathode 114 and the OLE material 112. The encapsulation layer 116 extends under at least a portion of the second structure 110B and along a sidewall 111 of the first structure 110A. The encapsulation layer 116 may include a non-conductive inorganic layer, for example, a silicon nitride-containing material. In some embodiments, one or more capping layers are disposed between the cathode 114 and the encapsulation layer 116. A global passivation layer 118 may be disposed over the overhang structures 110 and the encapsulation layers 116. An inkjet layer may be disposed between the global passivation layer 118 and the overhang structures 110 and the encapsulation layers 116. The inkjet layer mayPATENTAttorney Docket No.: 44025949WO01include an acrylic material. The permanent overhang geometry, in combination with directional deposition, facilitates sub-pixel definition, promotes selective cathode sidewall contact, and supports encapsulation coverage within shadowed regions while avoiding debris associated with lift-off processes.

[0027] Figure 2 is a flow diagram of a method 200 for forming a sub-pixel circuit 100 according to one or more embodiments. Figures 3A-3H are schematic, cross-sectional views of a substrate 102 during a method 200 for forming a sub-pixel circuit 100 according to embodiments described herein. It should be understood that although Figures 3A - 3H depict a substrate with two anodes, method 200 can be performed on a substrate with any number of anodes.

[0028] At operation 202, as shown in Figure 3A, a pixel-isolation material 326 is deposited over a substrate 102. In one or more embodiments, the anodes 104 are prepatterned on the substrate 102 prior to the pixel-isolation material 326 being deposited. In one or more embodiments prior to the pixel-isolation material 326 being deposited, a lower protective layer 183 is deposited over the substrate 102. In one or more embodiments, the lower protective layer 183 is deposited in between each of the anodes 104 and extends along a sidewall of each of the anodes 104 and extends across the upper surface of the adjacent anodes 104. In one or more embodiments, the lower protective layer includes a ceramic material, such as an aluminum oxide (AI2O3) containing material. In one or more embodiments, the lower protective layer 183 has a thickness from about 10 nm to about 50 nm. A lower inorganic layer 182 is disposed over a portion of the lower protective layer 183. In one or more embodiments, the lower inorganic layer 182 includes a silicon containing material, such as a silicon nitride (SiNx) containing material. In one or more embodiments, the lower inorganic layer 182 has a thickness from about 10 nm to about 50 nm. In one or more embodiments, the lower inorganic layer 182 is disposed between the adjacent anodes 104 and extends along a sidewall of each of the anodes 104, and extends across the upper surface of the adjacent anodes 104.

[0029] In one or more embodiments, during operation 202 a pixel-isolation material 326 is deposited over a substrate 102. In one or more embodiments, the pixel-isolation material 326 includes a silicon oxide material. The pixel-isolation material 326 isPATENTAttorney Docket No.: 44025949WO01deposited over the lower inorganic layer 182. In one or more embodiments, the pixelisolation material 326 contacts the lower inorganic layer 182. In one or more embodiments, the pixel-isolation material 326 is disposed between the adjacent anodes 104 and extends along a sidewall of each of the anodes 104, and extends across the upper surface of the adjacent anodes 104.

[0030] At operation 204, as shown in Figure 3B, the pixel-isolation structure (PIS) 126 is formed in an etching process. In one or more embodiments, the etching process includes removing a portion of the pixel-isolation material 326 disposed over the upper surface of the adjacent anodes 104. In one or more embodiments, the portion of the pixel-isolation material 326 disposed over the upper surface of the adjacent anodes 104 is removed using a chemical mechanical polishing (CMP) process. The portion of the pixel-isolation material 326 disposed between the anodes 104 defines the PIS 126.

[0031] In one or more embodiments, after the portion of the pixel-isolation material 326 disposed over the upper surface of the adjacent anodes 104 is removed, a portion of the lower inorganic layer 182 disposed over the upper surface of the adjacent anodes 104 is exposed. In one or more embodiments, the exposed portions of the lower inorganic layer 182 disposed over the upper surface of the adjacent anodes 104 are removed in a dry etching process.

[0032] At operation 206, as shown in Figure 3C, an upper protective layer 181 and an upper inorganic layer 180 are deposited over the substrate 102. In one or more embodiments, the upper protective layer 181 is deposited over the substrate 102. The upper protective layer 181 is deposited over an upper surface of the PIS 126 and extends across the upper surface of the adjacent anodes 104. In one or more embodiments, the upper protective layer includes a ceramic material, such as an aluminum oxide (AI2O3) containing material. In one or more embodiments, the upper protective layer 181 includes the same material as the lower protective layer 183. In one or more embodiments, the upper protective layer 181 has a thickness from about 10 nm to about 50 nm. In one or more embodiments, the upper protective layer 181 has a thickness from about 20 nm to about 100 nm.PATENTAttorney Docket No.: 44025949WO01

[0033] In one or more embodiments, the upper inorganic layer 180 is deposited over the upper protective layer 181. In one or more embodiments, the upper inorganic layer 180 includes a silicon containing material, such as a silicon nitride (SiNx) containing material. In one or more embodiments, the upper inorganic layer 180 includes the same material as the lower protective layer 183. In one or more embodiments, the upper inorganic layer 180 has a thickness from about 10 nm to about 50 nm. The upper protective layer 181 is deposited over an upper surface of the PIS 126 and extends across the upper surface of the adjacent anodes 104.

[0034] At operation 208, as shown in Figure 3D, a first overhang material 310A and a second overhang material 310B are deposited over the substrate 102. In one or more embodiments, the first overhang material 310A includes a non-conductive material. In one or more embodiments, first overhang material 310A includes amorphous silicon (a-Si), titanium (Ti), silicon nitride (SisN4), silicon oxide (SiC>2), silicon oxynitride (Si2N2O), or combinations thereof. The first overhang material 310A is deposited over the upper inorganic layer 180. In one or more embodiments, the second overhang material 310B includes a conductive material. In one or more embodiments, the second overhang material 310B includes copper (Cu), aluminum (Al), aluminum neodymium (AINd), molybdenum (Mo), molybdenum tungsten (MoW), chromium (Cr), chromium oxide (Cr20s), or combinations thereof. In one or more embodiments the second overhang material 310B has a thickness from about 100 nm to about 200 nm, such as about 130 nm. The second overhang material 310B is deposited over the first overhang material 310A.

[0035] At operation 210, as shown in Figure 3E, a photoresist 320 is patterned over the substrate 102. In one or more embodiments, the photoresist 320 is deposited over the second overhang material 310B.

[0036] At operation 212, as shown in Figure 3F, a desired portion of the second overhang material 310B is removed in an etching process. In one or more embodiments, the portions of the second overhang material 310B deposited over the anodes 104 is removed in the etching process. After the etching process, a remaining portion of the second overhang material 310B is disposed over the PIS 126. In one or more embodiments, the remaining portion of the second overhang material 310BPATENTAttorney Docket No.: 44025949WO01defines the second structure 11 OB. In one or more embodiments, after the etching process is performed the photoresist 320 is stripped. During removal of the second overhang material 31 OB, the upper protective layer 181 , the lower protective layer 183, or a combination thereof, the anode 104 in order to protect the upper surface of the anode 104 from the etching chemistry. In one or more embodiments, the protective layers 181, 183 inhibit plasma-induced damage and particle generation, thereby preserving anode integrity for subsequent OLED deposition.

[0037] At operation 214, as shown in Figure 3G, a desired portion of the first overhang material 310A is removed in an etching process. In one or more embodiments, the portions of the first overhang material310A deposited over the anodes 104 is removed in the etching process. After the etching process, a remaining portion of the first overhang material 310A is disposed over the PIS 126. In one or more embodiments, the etching process is a biased etching process, an unbiased etching process, or a combination thereof. In one or more embodiments, the etching process is an isotropic etching process, such as a low powered isotropic etching process. In one or more embodiments, the remaining portion of the first overhang material 310A defines the first structure 110A. The bottom surface 107 of the second structure 110B is wider than the upper surface 105 of the first structure 110A to form the overhang extension 109. In one or more embodiments, after the etching process is performed a portion of the upper inorganic layer 180 is exposed. The exposed portion of the upper inorganic layer 180 is removed in a dry etching operation. After the dry etching operation a portion of the upper inorganic layer 180 protected by the first structure 110A remains. During removal of the first overhang material 310A, the upper protective layer 181, the lower protective layer 183, or a combination thereof, the anode 104 in order to protect the upper surface of the anode 104 from the etching chemistry. In one or more embodiments, the protective layers 181, 183 inhibit plasma-induced damage and particle generation, thereby preserving anode integrity for subsequent OLED deposition.

[0038] At operation 216, as shown in Figure 3H, a desired portion of the upper protective layer 181 and the lower protective layer 183 is removed in an etching process. During the etching process, a photoresist 320 is patterned over substratePATENTAttorney Docket No.: 44025949WO01102. In one or more embodiments, the patterned photoresist is deposited over the overhang structure 110, and extends over a portion of the upper surface of each of the adjacent anodes 104. A wet etching process is performed to remove the portion of the upper protective layer 181 and the lower protective layer 183 not protected by the photoresist 320. In one or more embodiments, after the etching process is performed, the photoresist 320 is stripped.

[0039] In one or more embodiments, after operation 216 the OLE material 112, the cathode 114, and an encapsulation layer 116 for each sub-pixel are deposited. The OLE material 112 is evaporation-deposited over the exposed anode regions and over an upper surface of the upper protective layer 181 of each sub-pixel opening. The cathode 114 is evaporation-deposited over the OLE material such that the overhang extension 109 of the second structure 110B provides shadowing to control deposition coverage under the overhang extension 109. In certain embodiments, one or more capping layers are disposed between the cathode 114 and an encapsulation layer 116. The encapsulation layer 116 is then deposited over the cathode 114 and extends under at least a portion of the adjacent overhang structures 110 and along a sidewall 111 of each of the adjacent overhang structures 110 to protect the OLE material 112 and cathode 114 within the sub-pixel.

[0040] Figure 4 is a flow diagram of a method 400 for forming a sub-pixel circuit 100 according to one or more embodiments. Figures 5A-5H are schematic, cross-sectional views of a substrate 102 during a method 400 for forming a sub-pixel circuit 100 according to embodiments described herein. It should be understood that although Figures 5A - 5H depict a substrate with two anodes, method 400 can be performed on a substrate with any number of anodes.

[0041] At operation 402, as shown in Figure 5A, a pixel-isolation material 326 is deposited over a substrate 102. In one or more embodiments, the anodes 104 are prepatterned on the substrate 102 prior to the pixel-isolation material 326 being deposited. In one or more embodiments prior to the pixel-isolation material 326 being deposited, a lower protective layer 183 is deposited over the substrate 102, a lower inorganic layer 182 is deposited in between each of the anodes 104 and extends along a sidewall of each of the anodes 104, and extends across the upper surface of thePATENTAttorney Docket No.: 44025949WO01adjacent anodes 104. In one or more embodiments, the lower inorganic layer 182 includes a silicon containing material, such as a silicon nitride (SiNx) containing material. In one or more embodiments, the lower inorganic layer 182 has a thickness from about 10 nm to about 50 nm.

[0042] In one or more embodiments, during operation 402 a pixel-isolation material 326 is deposited over a substrate 102. In one or more embodiments, the pixel-isolation material 326 includes a silicon oxide material. The pixel-isolation material 326 is deposited over the lower inorganic layer 182. In one or more embodiments, the pixelisolation material 326 contacts the lower inorganic layer 182. In one or more embodiments, the pixel-isolation material 326 is disposed between the adjacent anodes 104 and extends along a sidewall of each of the anodes 104, and extends across the upper surface of the adjacent anodes 104.

[0043] At operation 404, as shown in Figure 5B, the pixel-isolation structure (PIS) 126 is formed in an etching process. In one or more embodiments, the etching process includes removing a portion of the pixel-isolation material 326 disposed over the upper surface of the adjacent anodes 104. In one or more embodiments, the portion of the pixel-isolation material 326 disposed over the upper surface of the adjacent anodes 104 is removed using a chemical mechanical polishing (CMP) process. The portion of the pixel-isolation material 326 disposed between the anodes 104 defines the PIS 126.

[0044] In one or more embodiments, after the portion of the pixel-isolation material 326 disposed over the upper surface of the adjacent anodes 104 is removed, a portion of the lower inorganic layer 182 disposed over the upper surface of the adjacent anodes 104 is exposed. In one or more embodiments, the exposed portions of the lower inorganic layer 182 disposed over the upper surface of the adjacent anodes 104 are removed in a dry etching process.

[0045] At operation 406, as shown in Figure 5C, a protective layer 381 and an upper inorganic layer 180 are deposited over the substrate 102. In one or more embodiments, the protective layer 381 is deposited over the substrate 102. The protective layer 381 is deposited over an upper surface of the PIS 126 and extends across the upper surface of the adjacent anodes 104. In one or more embodiments,PATENTAttorney Docket No.: 44025949WO01the protective layer 381 includes a ceramic material, such as an aluminum oxide (AI2O3) containing material. In one or more embodiments, the protective layer 381 has a thickness from about 10 nm to about 50 nm. In one or more embodiments, the upper protective layer 181 has a thickness from about 20 nm to about 100 nm, such as from about 50 nm to about 60 nm.

[0046] In one or more embodiments, the upper inorganic layer 180 is deposited over the protective layer 381. In one or more embodiments, the upper inorganic layer 180 includes a silicon containing material, such as a silicon nitride (SiNx) containing material. In one or more embodiments, the upper inorganic layer 180 includes the same material as the lower protective layer 183. In one or more embodiments, the upper inorganic layer 180 has a thickness from about 10 nm to about 50 nm. The upper protective layer 181 is deposited over an upper surface of the PIS 126 and extends across the upper surface of the adjacent anodes 104.

[0047] At operation 408, as shown in Figure 5D, a first overhang material 310A and a second overhang material 310B are deposited over the substrate 102. In one or more embodiments, the first overhang material 310A includes a non-conductive material. In one or more embodiments, first overhang material 310A includes amorphous silicon (a-Si), titanium (Ti), silicon nitride (Si3N4), silicon oxide (SiO2), silicon oxynitride (Si2N2O), or combinations thereof. The first overhang material 310A is deposited over the upper inorganic layer 180. In one or more embodiments, the second overhang material 310B includes a conductive material. In one or more embodiments, the second overhang material 310B includes copper (Cu), aluminum (Al), aluminum neodymium (AINd), molybdenum (Mo), molybdenum tungsten (MoW), chromium (Cr), chromium oxide (Cr2O3), or combinations thereof. In one or more embodiments the second overhang material 310B has a thickness from about 100 nm to about 200 nm, such as about 130 nm. The second overhang material 310B is deposited over the first overhang material 310A.

[0048] At operation 410, as shown in Figure 5E, a photoresist 320 is patterned over the substrate 102. In one or more embodiments, the photoresist 320 is deposited over the second overhang material 310B.PATENTAttorney Docket No.: 44025949WO01

[0049] At operation 412, as shown in Figure 5F, a desired portion of the second overhang material 31 OB is removed in an etching process. In one or more embodiments, the portions of the second overhang material 31 OB deposited over the anodes 104 is removed in the etching process. After the etching process, a remaining portion of the second overhang material 31 OB is disposed over the PIS 126. In one or more embodiments, the remaining portion of the second overhang material 31 OB defines the second structure 11 OB. In one or more embodiments, after the etching process is performed the photoresist 320 is stripped. During removal of the second overhang material 31 OB, the upper protective layer 181 , the lower protective layer 183, or a combination thereof, the anode 104 in order to protect the upper surface of the anode 104 from the etching chemistry. In one or more embodiments, the protective layers 181, 183 inhibit plasma-induced damage and particle generation, thereby preserving anode integrity for subsequent OLED deposition.

[0050] At operation 414, as shown in Figure 5G, a desired portion of the first overhang material 310A is removed in an etching process. In one or more embodiments, the portions of the first overhang material 310A deposited over the anodes 104 is removed in the etching process. After the etching process, a remaining portion of the first overhang material 310A is disposed over the PIS 126. In one or more embodiments, the etching process is a biased etching process, an unbiased etching process, or a combination thereof. In one or more embodiments, the etching process is an isotropic etching process, such as a low powered isotropic etching process. In one or more embodiments, the remaining portion of the first overhang material 310A defines the first structure 110A. The bottom surface 107 of the second structure 110B is wider than the upper surface 105 of the first structure 110A to form the overhang extension 109. In one or more embodiments, after the etching process is performed a portion of the upper inorganic layer 180 is exposed. The exposed portion of the upper inorganic layer 180 is removed in a dry etching operation. After the dry etching operation a portion of the upper inorganic layer 180 protected by the first structure 110A remains. During removal of the first overhang material 310A, the upper protective layer 181, the lower protective layer 183, or a combination thereof, the anode 104 in order to protect the upper surface of the anode 104 from the etching chemistry. In one or more embodiments, the protective layers 181, 183 inhibitPATENTAttorney Docket No.: 44025949WO01plasma-induced damage and particle generation, thereby preserving anode integrity for subsequent OLED deposition.

[0051] At operation 416, as shown in Figure 5H, a desired portion of the protective layer 381 is removed in an etching process. During the etching process, a photoresist 320 is patterned over substrate 102. In one or more embodiments, the patterned photoresist is deposited over the overhang structure 110, and extends over a portion of the upper surface of each of the adjacent anodes 104. A wet etching process is performed to remove the portion of the protective layer 381 not protected by the photoresist 320. In one or more embodiments, after the etching process is performed, the photoresist 320 is stripped.

[0052] In one or more embodiments, after operation 416 the OLE material 112, the cathode 114, and an encapsulation layer 116 for each sub-pixel are deposited. The OLE material 112 is evaporation-deposited over the exposed anode regions and over an upper surface of the protective layer 381 of each sub-pixel opening. The cathode 114 is evaporation-deposited over the OLE material such that the overhang extension 109 of the second structure 110B provides shadowing to control deposition coverage under the overhang extension 109. In certain embodiments, one or more capping layers are disposed between the cathode 114 and an encapsulation layer 116. The encapsulation layer 116 is then deposited over the cathode 114 and extends under at least a portion of the adjacent overhang structures 110 and along a sidewall 111 of each of the adjacent overhang structures 110 to protect the OLE material 112 and cathode 114 within the sub-pixel.

[0053] Benefits of the present disclosure include display devices and related methods that integrate an inorganic pixel-isolation structure beneath a permanent overhang architecture to improve electrical isolation and deposition control. In one or more embodiments, the present disclosure provides reduced bottom encapsulation breach and decreased cathode-to-anode shorting by employing a silicon oxide gap-fill in combination with ceramic passivation (e.g., aluminum oxide) and an upper inorganic layer (e.g., silicon nitride), yielding a flat and uniform inter-anode topology. Benefits of the present disclosure further include enhanced shadowing fidelity during evaporation deposition due to the lateral overhang extension of a conductive second structure overPATENTAttorney Docket No.: 44025949WO01a non-conductive first structure, widened process windows for isotropic / anisotropic etching and wet passivation opening, improved mechanical robustness of the overhang roof (e.g., reduced peel-off and tip breakage), and compatibility with both top- and bottom-emission OLED stacks. Collectively, these features can yield increased device reliability, improved yield and image quality through reduced leakage and crosstalk, and manufacturing efficiency.

[0054] While the foregoing is directed to examples of the present disclosure, other and further examples of the disclosure may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.

Claims

PATENTAttorney Docket No.: 44025949WO01What is claimed is:

1. A method of forming a sub-pixel circuit, comprising:depositing a lower inorganic layer over a substrate, the substrate having anodes patterned over a surface of the substrate;depositing a pixel-isolation material over the lower inorganic layer; removing portions of the pixel-isolation material disposed over upper surfaces of the anodes to form a pixel-isolation structure (PIS) between adjacent anodes; depositing a protective layer over the PIS and across the upper surfaces of the anodes;depositing an upper inorganic layer over the protective layer;depositing a first overhang material over the upper inorganic layer and depositing a second overhang material over the first overhang material;patterning the second overhang material to define a second structure; etching the first overhang material to define a first structure disposed under the second structure;removing portions of the upper inorganic layer disposed over the upper surfaces of the anodes; andremoving portions of the protective layer disposed over the upper surfaces of the anodes.

2. The method of claim 1 , wherein the protective layer comprises a ceramic material.

3. The method of claim 1 , wherein the protective layer comprises an aluminum oxide material.

4. The method of claim 1 , wherein the protective layer has a thickness from about 10 nm to about 50 nm.

5. The method of claim 1 , wherein the protective layer has a thickness from about 20 nm to about 100 nm.PATENTAttorney Docket No.: 44025949WO016. The method of claim 1 , wherein the protective layer has a thickness from about 50 nm to about 60 nm.

7. The method of claim 1 , further comprising depositing the lower protective layer over the substrate, wherein at least a portion of the lower protective layer is disposed between the substrate and the lower inorganic layer.

8. The method of claim 7, wherein the depositing wherein the lower protective layer has a thickness from about 10 nm to about 50 nm.

9. The method of claim 7, wherein the depositing wherein the lower protective layer and the protective layer comprise aluminum oxide material.

10. A method of forming a sub-pixel circuit, comprising:depositing a lower protective layer over a substrate, the substrate having anodes patterned over a surface of the substrate;depositing a lower inorganic layer over the lower protective layer; depositing a pixel-isolation material over the lower inorganic layer; removing portions of the pixel-isolation material disposed over upper surfaces of the anodes to form a pixel-isolation structure (PIS) between adjacent anodes; depositing an upper protective layer over the PIS and across the upper surfaces of the anodes;depositing an upper inorganic layer over the upper protective layer; depositing a first overhang material over the upper inorganic layer and depositing a second overhang material over the first overhang material;patterning the second overhang material to define a second structure; etching the first overhang material to define a first structure disposed under the second structure;removing portions of the upper inorganic layer disposed over the upper surfaces of the anodes; andPATENTAttorney Docket No.: 44025949WO01removing portions of the upper protective layer and the lower protective layer disposed over the upper surfaces of the anodes.

11. The method of claim 10, wherein the upper protective layer and the lower protective layer comprise a ceramic material.

12. The method of claim 10, wherein the upper protective layer and the lower protective layer comprise an aluminum oxide material.

13. The method of claim 10, wherein the upper protective layer has a thickness from about 10 nm to about 50 nm.

14. The method of claim 10, wherein the lower protective layer has a thickness from about 10 nm to about 50 nm.

15. A sub-pixel circuit, comprising:at least two anodes disposed over a substrate;a pixel-isolation structure (PIS) disposed between the anodes;an overhang structure disposed over the PIS; anda protective layer disposed between the PIS and the overhang structure, the protective layer extending over a portion of an upper surface of the anodes.

16. The sub-pixel circuit of claim 15, further comprising a lower inorganic layer disposed between the anodes and extending along a sidewall of each of the anodes.

17. The sub-pixel circuit of claim 16, further comprising a lower protective layer disposed between the substrate and the lower inorganic layer.

18. The sub-pixel circuit of claim 15, further comprising an upper inorganic layer disposed between the protective layer and the overhang structure.PATENTAttorney Docket No.: 44025949WO0119. The sub-pixel circuit of claim 15, wherein the protective layer comprises an aluminum oxide material.

20. The sub-pixel circuit of claim 15, further comprising:an organic light emitting (OLE) material disposed over the anodes; and a cathode disposed over the OLE material.

Images