Larger grains at the cover-side margin boundary suppress cracks, helping MLCCs keep thin margins, high capacitance, and reliability.
Si-rich grain boundaries in BaTiO3 dielectric layers raise breakdown reliability in thinner multilayer ceramic capacitors.
Additional electrode regions ease electric field concentration at internal electrode ends, raising multilayer capacitor withstand voltage without losing capacitance.
A tuned third-lead length ratio lowers ESL in multilayer ceramic capacitors while avoiding tilted mounting, open failures, and capacitance loss.
ALD coats MLCC metal and ceramic powders with uniform thin layers, replacing mixed retardants to improve sintering control and capacitance.
Using multicore-shell dielectric grains, this case maintains capacitance and specific resistance in multilayer capacitors under atomized grain conditions.
A Ba-Ti-Zr perovskite protection section maintains sintering hardness during rapid firing while preserving internal electrode continuity.
A two-region baked electrode uses glass frit at the bond interface and high-melting-point oxide at the surface to improve plating and resist peeling.
Uneven electrode and insulator protrusions expand contact area in scaled semiconductor capacitors, raising capacitance and device performance.
Oxide interface protrusions improve copper external electrode bonding to ceramic layers through anchoring, wetting, and stronger thermal shock reliability.
Stacked capacitor units share an electrode and connect in parallel to raise capacitance density without adding separate capacitor structures.
An intermetallic interface between resin-based and first electrode layers cuts ESR while strengthening adhesion under mechanical and thermal stress.
Rigid phenoxy resin skeletons suppress dielectric loss above 125°C, helping film capacitors run stably across a wider temperature range.
Nickel and magnesium segregation near side gaps helps multilayer ceramic capacitors resist moisture while preserving capacitance and stable connections.
Shape memory resin electrode layers help multilayer ceramic components resist peeling, delamination, and vibration-induced stress.
A recessed lead terminal redirects molten solder to lower fillet stress, suppress ceramic cracks, and strengthen the end-face electrode joint.
Nickel and rare-earth doped barium titanate suppresses Mg-Ni protrusions, helping MLCCs keep insulation resistance in hot, humid use.
An intermetallic Sn-plated layer lets hydrogen escape from Ni plating while blocking moisture, preserving insulation resistance and solderability.
Ultra-low-temperature electrochemical deposition forms MLCC terminal electrodes and protective layers while reducing internal stress, cracks, and breading.
Dielectric grain-size gradients and side margins help miniaturized multilayer capacitors limit capacitance dispersion and improve breakdown life.
Optimized external electrode overlap and dielectric thickness improve flexural strength, reliability, and arc resistance in miniaturized MLCCs.
Li-free alkaline niobate ceramics enable Ni co-firing and keep MLCC capacitance stable from -55°C to 200°C with lower leakage current.
A 4-6 metal alloy capacitor layer achieves the required work function without annealing, improving thermal stability and simplifying semiconductor processing.
A recessed external electrode layout reduces thermal-expansion stress in MLCCs while keeping plating continuous to prevent cracks and insulation failure.
Spherical recesses on electrode-covered ceramic surfaces boost adhesion and block moisture ingress, improving capacitor reliability.
Via-connected main-surface electrodes cut mounting thickness while preserving flexural strength and connection reliability in MLCC assembly.
Varying silicon content across MLCC side margin layers helps thin margins resist cracking and water ingress while preserving insulation.
Curved internal electrode ends preserve moisture resistance and prevent shorts in multilayer ceramic capacitors with thin side margins.
Spaced non-conductive resin layers in external electrodes block arc discharge while preserving connectivity and improving bending strength.
An insulating peripheral pattern blocks etch redeposition in multilayer conductive stacks, improving contact recovery, precision, and reliability.
A core-double shell grain structure raises grain boundary resistance, helping thin ceramic capacitors keep reliability and high dielectric constant.
Cu and Sn tune Ni electrode lattice constants to cut interface dislocation, improving connectivity, breakdown voltage, and high-temperature reliability.
Controlling the margin-to-capacitance height ratio limits sintering shrinkage mismatch, reducing deformation, shorts, and voltage failure.
A high-hardness layer beside the coil layer prevents cracking while preserving low dielectric loss and high-frequency performance.
An oxygen-vacancy gradient in metal oxide layers enables tunable capacitance, resistive switching, and charge storage without losing insulation.
Individual chip-storing slots isolate ceramic chip assemblies during firing to reduce shape variation, adhesion, and handling defects.
A Ba-Ca-TiO3/BaTi2O5 dielectric composition keeps multilayer ceramic capacitor capacitance stable above 150°C while limiting nickel diffusion.
Non-uniform hydrophobic coating on ceramic chip electrodes blocks dew-driven breakdown while preserving solder bonding during mounting.
Higher Mg at dielectric grain boundaries boosts insulation resistance in thin MLCC layers while avoiding Ni-Mg-O secondary phases.
A composite external electrode with metal particles, elastic plated powder, and resin improves bending durability without losing conductivity.
Controlled nickel and tin plating thickness improves flexural strength and solderability in ceramic electronic components.
Localized external nickel layers and a metal-filled resin coating improve MLCC moisture resistance while limiting shrinkage-induced cracking.
An asymmetric outer-layer structure guides correct MLCC mounting and suppresses vibration transfer that causes substrate acoustic noise.