Drive circuit

Abstract

A drive circuit for driving an electromechanical load with a drive output signal based on a digital reference signal at a first sampling rate, the drive output signal inducing a first electrical quantity at the electromechanical load, the drive circuit comprising: a functional block configured to digitally determine an adjustment signal based on the first electrical quantity at a second sampling rate greater than the first sampling rate, the adjustment signal indicating a second electrical quantity to be induced at a target output impedance of the drive circuit due to the first electrical quantity; and a driver configured to generate the drive output signal based on the reference signal and the adjustment signal so that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include the target output impedance, wherein the first electrical quantity is a current and the second electrical quantity is a voltage, or vice versa.

Description

Technical Field

[0001] The present disclosure relates generally to drive circuits, and in particular to drive circuits used in driving electromechanical loads or devices.An example of an electromechanical load (electromechanical device) is an actuator, such as a linear resonant actuator (LRA).

[0002] The present disclosure extends to methods performed by such drive circuits and to systems, such as haptic systems, including such drive circuits. Background Art

[0003] The driving circuit may be implemented within a host device (host equipment) (at least partially on an IC), which may be considered an electrical or electronic device and may be a mobile device. Exemplary host devices include portable and / or battery-powered host devices such as mobile phones, smart phones, audio players, video players, PDAs, mobile computing platforms such as laptops or tablets, and / or gaming devices.

[0004] As is well known, haptic technology reproduces a sense of touch by applying force, vibration, or motion to a user. A haptic device (a device enabled with haptic technology) may incorporate a tactile sensor (input transducer) that measures the force applied by a user to a user interface (such as a button or touch screen on a mobile phone or tablet computer) and an output transducer (electromechanical load) that applies force to the user directly or indirectly (e.g., via a touch screen). Taking a haptic system as an example, where an LRA acts as an electromechanical load, a drive circuit may be employed to drive the LRA to produce a tactile effect (such as vibration or other tactile sensation) for the user. Audio-to-tactile conversion may also be employed, for example, in conjunction with a user playing a video game to convert an audio signal into a corresponding tactile signal to provide a tactile sensation (output via an electromechanical load such as an LRA) together with the audio signal (output via a speaker).

[0005] The main components of an LRA are a voice coil, a movable magnetic mass, a spring, and a housing or frame. The magnetic mass is connected to the spring, which in turn is mounted to the housing or frame of the LRA. An AC voltage signal (drive signal) is used to drive the voice coil, which is arranged to magnetically couple with the movable magnetic mass.

[0006] An LRA typically generates an oscillating force or vibration along an axis. When the voice coil is driven with an AC voltage signal (particularly at the resonant frequency of the spring-mass arrangement), the resulting magnetic field induces movement in the magnetic mass and causes it to vibrate with a force perceptible to a human. It is the vibration of the mass under the perceptible force that provides the haptic effect. In essence, the frequency and amplitude of the AC voltage signal are converted into the frequency and amplitude of vibration of the magnetic mass connected to the spring. The LRA is thus in the form of a transducer. LRAs are typically highly resonant and are therefore typically driven at their resonant frequency to improve efficiency, i.e., to optimize the relationship between haptic effect and power consumption.

[0007] Of course, an LRA is one exemplary type of electromechanical load (as an actuator or transducer) that is particularly suitable for generating haptic effects for a user in the context of a host device as mentioned above. The drive circuit can be used to drive other types of electromechanical loads (electromechanical devices), for example, the electromechanical load can be modeled as a resonant actuator such as a speaker or micro speaker or with a non-resonant mechanical load such as a non-resonant solenoid or voice coil motor.

[0008] The example of driving an LRA in the context of a haptic system will be carried forward in this document as a convenient running example.

[0009] The accuracy of controlling actuators and transducers is important, for example, in the field of haptic technology (e.g., tactile feedback). For example, the quality of the user's tactile experience is defined by the accuracy of controlling the LRA when using an LRA.

[0010] Accordingly, it would be desirable to provide improved drive circuits to improve control (eg, mechanical control) of an electromechanical load driven by the circuits. Summary of the invention

[0011] According to a first aspect of the present disclosure, a drive circuit is provided for driving an electromechanical load with a drive output signal based on a digital reference signal at a first sampling rate, wherein the drive output signal induces a first electrical quantity at the electromechanical load. The drive circuit comprises: a functional block configured to digitally determine an adjustment signal based on the first electrical quantity at a second sampling rate greater than the first sampling rate, the adjustment signal indicating a second electrical quantity to be induced at a target output impedance of the drive circuit due to the first electrical quantity; and a driver configured to generate the drive output signal based on the reference signal and the adjustment signal so that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include the target output impedance. The first electrical quantity is a current and the second electrical quantity is a voltage, or vice versa.

[0012] By digitally determining the adjustment signal, it is possible to cause the drive output signal to behave as if the output impedance of the drive circuit has been adjusted to include a target output impedance in a highly adaptable and controllable manner. Furthermore, by digitally determining the adjustment signal at a second sampling rate that is higher than the first sampling rate, the target output impedance is achieved over a relatively wide bandwidth.

[0013] The drive output signal may be a voltage signal (voltage mode control). In this case, the first quantity may be the current drawn by the electromechanical load and the second quantity may be the voltage across the target output impedance.

[0014] The drive output signal may be a current signal (current mode control). In this case, the first quantity may be the voltage across the electromechanical load and the second quantity may be the current drawn by the target output impedance.

[0015] The functional block may be configured to digitally determine the adjustment signal based on the first electrical quantity and the definition of the target output impedance. For example, the definition may include one or more configuration values. The driver circuit may include (or access) a storage device for storing the one or more configuration values, wherein the impedance value of the target output impedance is maintained when the one or more configuration values ​​stored in the storage device are maintained. That is, the impedance value of the target output impedance may depend on the configuration value.

[0016] The (hypothetical) target equivalent circuit representing the target output impedance may include one or more impedance components and a circuit structure for connecting the one or more impedance components together. The one or more configuration values ​​may define at least one impedance component and / or circuit structure.

[0017] The target equivalent circuit may include a plurality of impedance components connected together. The functional block may be configured to: determine a plurality of adjustment sub-signals based on the first electrical quantity and the one or more configuration values, each adjustment sub-signal representing a corresponding portion of the target equivalent circuit and indicating a portion of the second electrical quantity that will be induced at the corresponding portion of the target equivalent circuit if the second electrical quantity is induced at the target equivalent circuit; and determine the adjustment signal by combining the plurality of adjustment sub-signals.

[0018] If the second electrical quantity is the voltage across the target output impedance, the portion of the second electrical quantity may be the voltage across the corresponding portion of the target equivalent circuit. If the second electrical quantity is the current drawn by the target output impedance, the portion of the second electrical quantity may be the current drawn by the corresponding portion of the target equivalent circuit.

[0019] The one or more configuration values ​​may define the target equivalent circuit to include at least one of a series resistor, a series capacitor, a series inductor, and a parallel impedance network. The parallel impedance network may include at least two of a parallel resistor, a parallel capacitor, and a parallel inductor connected together in parallel. Each of those resistors, capacitors, and inductors may be considered as the impedance component.

[0020] Those of the series resistor, the series capacitor, the series inductor, and the parallel impedance network present in the target equivalent circuit may be connected in series, for example, wherein the second electrical quantity is the voltage across the target output impedance.

[0021] The one or more configuration values ​​may define the target equivalent circuit to optionally include only: the series resistor, wherein the series resistor has a negative resistance (eg, substantially equal in magnitude to a positive resistance of a voice coil of an electromechanical load).

[0022] The one or more configuration values ​​may define a target equivalent circuit to optionally include only: the series resistor and the series inductor connected in series, wherein the series resistor has a negative resistance (e.g., substantially equal in magnitude to a positive resistance of a voice coil of an electromechanical load), and the series inductor has a negative inductance (e.g., substantially equal in magnitude to a positive inductance of a voice coil of an electromechanical load).

[0023] The one or more configuration values ​​may define the target equivalent circuit to optionally include only: the series resistor and the series inductor connected together in series and connected to the parallel impedance network, wherein the series resistor has a negative resistance and the series inductor has a negative inductance, and wherein the parallel impedance network includes the parallel resistor, the parallel capacitor, and the parallel inductor connected together in parallel.

[0024] The one or more configuration values ​​may define a target equivalent circuit to optionally include only: the series resistor and the series capacitor connected together in series, wherein the series resistor has a negative resistance and the series capacitor has a positive capacitance.

[0025] The one or more configuration values ​​may define the target equivalent circuit to optionally include only: the series resistor, wherein the series resistor has a positive resistance, and wherein the positive resistance is substantially greater than the resistance of the electromechanical load, or greater than the resistance of a resistor in the electromechanical load equivalent circuit that represents the mechanical impedance of the electromechanical load.

[0026] The drive circuit may include a controller. The controller may be configured to generate the reference signal based on a drive input signal and based on a current drawn by the electromechanical load and / or a voltage across the electromechanical load. The controller may be configured to control a definition of the target output impedance based on the current drawn by the electromechanical load and / or the voltage across the electromechanical load, such that a performance of the electromechanical load, such as a mechanical performance, meets a performance target. The controller may be configured to control a definition of the target output impedance based on the current drawn by the electromechanical load and / or the voltage across the electromechanical load, such that the target output impedance cancels an impedance of at least one electrical component of the electromechanical load, optionally a coil such as a voice coil. The controller may be configured to control a definition of the target output impedance based on an impedance control signal, such that a performance of the drive circuit varies with the impedance control signal.

[0027] The driver may be configured to generate the drive output signal such that the drive output signal has a predefined relationship with a sum of the adjustment signal and the reference signal.

[0028] The function block may be configured to generate a control signal having a predefined relationship with a sum of an adjustment signal and a reference signal. The driver may be configured to generate the drive output signal such that the drive output signal has a predefined relationship with the control signal.

[0029] The drive circuit is selectively operable in an impedance drive mode or a current drive mode. When the drive circuit is in the impedance drive mode, a control signal is generated based on the reference signal and the adjustment signal so that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include the target output impedance (as mentioned earlier). In the current drive mode, the functional block can be configured to generate the control signal based on a current control reference signal and a current drawn by the electromechanical load, and adjust the control signal based on the current drawn by the electromechanical load so that the current drawn by the electromechanical load has a predefined relationship with the current control reference signal.

[0030] At least one of the control signal and the adjustment signal may be a digital signal. The control signal and the adjustment signal may be digital signals, and the function block may be a digital function block (e.g., implemented in digital hardware or in software running on a processor). The drive output signal may be referred to as an analog signal.

[0031] The control signal may be a digital signal. The driver may include a digital-to-analog converter and an analog amplifier connected together to convert the control signal into an analog signal, and then amplify the analog signal to form a drive output signal.

[0032] The drive circuit may include a monitoring unit configured to generate a current monitoring signal indicative of a current drawn by the electromechanical load and / or a voltage monitoring signal indicative of a voltage across the electromechanical load. The functional block may be configured to digitally determine the adjustment signal based on the current monitoring signal and / or the voltage monitoring signal.

[0033] The reference signal may indicate an expected mechanical performance of the electromechanical load. The performance of the drive output signal as if the output impedance of the drive circuit has been adjusted to include the target output impedance may be an expected performance relative to an expected drive output signal expected to be generated by the driver based on the reference signal in the absence of the adjustment signal (or based on an adjustment signal having a zero value). The drive circuit may include one or more simulated impedance components, which are connected to contribute to the output impedance of the drive circuit. The target output impedance may be configured to offset the impedance of at least one electrical component of the electromechanical load, optionally a coil such as a voice coil. The electromechanical load may be an electromechanical device, such as an actuator. The electromechanical load may be a resonant electromechanical load, such as a linear resonant actuator, a speaker, or a micro speaker.

[0034] The driver may be considered to form part of a first control loop operable to control a driver output signal based on a reference signal. The driver and the functional block may be considered to form part of a second control loop operable to control the driver output signal based on a current drawn by an electromechanical load and / or a voltage across the electromechanical load. The second control loop may be configured to have a lower latency than the first control loop.

[0035] At least a portion of the first control loop and at least a portion of the second control loop may be implemented as digital circuits. The delays of the first control loop and the second control loop may be defined by the sampling rates of the respective digital signals of the first control loop and the second control loop.

[0036] The drive circuit may include: an analog impedance, the analog impedance being configured to form a portion of the output impedance of the drive circuit. The analog impedance may be a controllable analog impedance, and the functional block may be configured to control the controllable analog impedance to adjust the output impedance of the drive circuit. For example, the drive circuit may be configured to control the definition of the target output impedance and / or the impedance of the analog impedance to control the output impedance of the drive circuit.

[0037] The drive circuit may be implemented as an integrated circuit, such as on an IC chip.

[0038] According to a second aspect of the present disclosure, there is provided an IC chip, comprising the driving circuit according to the first aspect of the present disclosure.

[0039] According to a third aspect of the present disclosure, a control system is provided, comprising: the drive circuit according to the aforementioned first aspect of the present disclosure; and the electromechanical load, wherein the electromechanical load is connected to be driven by the drive output signal.

[0040] According to a fourth aspect of the present disclosure, a tactile system is provided, comprising a control system according to the aforementioned third aspect of the present disclosure, wherein the electromechanical load is a linear resonant actuator (or other type of actuator) connected to a physical structure or surface of the system to produce a tactile effect for a user.

[0041] According to a fifth aspect of the present disclosure, a host device is provided, such as a portable electrical or electronic device, which includes the driving circuit according to the first aspect of the present disclosure, or the IC chip according to the second aspect of the present disclosure, or the control system according to the third aspect of the present disclosure, or the tactile system according to the fourth aspect of the present disclosure.

[0042] According to a sixth aspect of the present disclosure, there is provided a method performed by a drive circuit to drive an electromechanical load with a drive output signal based on a digital reference signal, wherein the drive output signal induces a first electrical quantity at the electromechanical load, the method comprising: digitally determining an adjustment signal at a second sampling rate higher than the first sampling rate based on the first electrical quantity, the adjustment signal indicating a second electrical quantity that will be induced at a target output impedance of the drive circuit due to the first electrical quantity; and generating the drive output signal based on the reference signal and the adjustment signal so that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include the target output impedance, wherein the first electrical quantity is a current and the second electrical quantity is a voltage, or vice versa.

[0043] According to a seventh aspect of the present disclosure, a drive circuit for driving an electromechanical load with a drive output signal is provided, the drive circuit comprising: a first control loop, the first control loop being operable to control the drive output signal based on a drive input signal; and a second control loop, the second control loop being operable to control the drive output signal based on a current flowing through the electromechanical load and / or a voltage induced across the electromechanical load, wherein the second control loop is configured to have a lower delay than the first control loop.

[0044] The second control loop may be configured to control the drive output signal to compensate for the impedance of the electromechanical load.The second control loop may be configured to control the drive output signal such that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include a target output impedance.

[0045] The drive output signal may be a voltage signal, and the second control loop may be configured to perform its control on the drive output signal based on the voltage signal to be induced by the current across the target output impedance. The second control loop may be configured to determine an adjustment signal indicative of the voltage signal based on the current, and control the drive output signal based on the adjustment signal.

[0046] The drive output signal may be a current signal, and the second control loop may be configured to perform its control on the drive output signal based on the current signal that will be induced by the voltage to flow through the target output impedance. The second control loop may be configured to determine an adjustment signal indicative of the current signal based on the voltage, and control the drive output signal based on the adjustment signal.

[0047] According to an eighth aspect of the present disclosure, a drive circuit is provided for driving an electromechanical load with a drive output signal based on a reference signal, wherein the drive output signal induces a first electrical quantity at the electromechanical load, and the drive circuit comprises: a functional block configured to digitally determine an adjustment signal based on the first electrical quantity, the adjustment signal indicating a second electrical quantity that will be induced at a target output impedance of the drive circuit due to the first electrical quantity; and a driver configured to generate the drive output signal based on the reference signal and the adjustment signal so that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include the target output impedance.

[0048] The drive output signal may be a voltage signal. In this case, the first electrical quantity may be the current drawn by the electromechanical load, and the second electrical quantity may be the voltage across the target output impedance.

[0049] The drive output signal may be a current signal. In this case, the first electrical quantity may be the voltage across the electromechanical load, and the second electrical quantity may be the current drawn by the target output impedance.

[0050] According to a ninth aspect of the present disclosure, a drive circuit is provided for driving an electromechanical load with a drive output signal based on a reference signal, wherein the drive output signal is a voltage signal and causes current to be drawn by the electromechanical load, the drive circuit comprising: a functional block configured to digitally determine an adjustment signal based on the current, the adjustment signal indicating a voltage signal that will be induced by the current across a target output impedance of the drive circuit; and a driver configured to generate the drive output signal based on the reference signal and the adjustment signal so that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include the target output impedance.

[0051] According to a tenth aspect of the present disclosure, a drive circuit for driving a linear resonant actuator is provided, the drive circuit comprising: a functional block configured to generate a digital control signal based on a digital reference signal and a monitoring signal intended to control the linear resonant actuator; and a driver configured to convert the digital control signal into an analog drive signal to drive the linear resonant actuator, wherein: the monitoring signal indicates a current flowing through the linear resonant actuator and / or a voltage across the linear resonant actuator; and the functional block is configured to control a difference between the digital control signal and the digital reference signal based on the monitoring signal so that the analog drive signal has a target performance when driving the linear resonant actuator, in which the analog drive signal behaves as if the output impedance of the drive circuit has been adjusted to include a target output impedance relative to a desired analog drive signal expected to be generated when the digital control signal is used as a digital reference signal.

[0052] According to an eleventh aspect of the present disclosure, a drive circuit is provided for driving an electromechanical load with a drive output signal based on a reference signal, the drive circuit being configured to generate the drive output signal based on digital operation according to the reference signal and the electrical quantity induced at the electromechanical load, so that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include a target output impedance.

[0053] According to the twelfth aspect of the present disclosure, a drive circuit is provided for driving an electromechanical load with a drive output signal based on a reference signal, wherein the drive output signal induces a first electrical quantity at the electromechanical load, and the drive circuit comprises: a functional block configured to digitally determine an adjustment signal based on the first electrical quantity, the adjustment signal indicating a second electrical quantity that will be induced at a target output impedance of the drive circuit due to the first electrical quantity; and a driver configured to generate the drive output signal based on the reference signal and the adjustment signal so that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include the target output impedance.

[0054] According to a thirteenth aspect of the present disclosure, a drive circuit is provided for driving an electromechanical load with a drive output signal based on a reference signal, the drive circuit being configured to digitally control the drive output signal based on the reference signal so that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include a predefined or predetermined target output impedance.

[0055] According to a fourteenth aspect of the present disclosure, a drive circuit is provided for driving an electromechanical load with a drive output signal based on a reference signal, the drive circuit being configured to digitally control the drive output signal based on the reference signal and an amount of electricity (a feedback signal indicative of the amount of electricity) at the electromechanical load (in response to the drive output signal) so that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include a predefined or predetermined target output impedance.

[0056] Method and computer program aspects corresponding to the circuit aspects are contemplated.IC chip, control system, haptic system and host device system aspects are contemplated for each of the drive circuit aspects, similar to those specified above with respect to the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] Reference will now be made, by way of example only, to the accompanying drawings in which:

[0058] Figure 1 is a schematic diagram showing an equivalent circuit of a driving circuit for driving an LRA under open loop control;

[0059] Figure 2 is corresponding to Figure 1 Schematic diagram of the equivalent circuit of but including the target output impedance;

[0060] FIG. 3A to FIG. 3E Yes means Figure 2 A schematic diagram of an equivalent circuit of a specific configuration of a target output impedance;

[0061] Figure 4is a schematic diagram of a driving circuit according to one embodiment;

[0062] Figure 5 is a schematic diagram of a driving circuit according to one embodiment;

[0063] Figure 6 According to the detailed implementation Figure 5 A schematic diagram of a portion of a driving circuit;

[0064] Figure 7 yes Figure 4 A schematic diagram of an exemplary implementation of a portion of a driver circuit for use in a current drive mode of operation;

[0065] Figure 8 presents a series of graphs useful for understanding the benefits and capabilities of the drive circuits disclosed herein;

[0066] Fig. 9A yes Figure 2 Schematic diagram of the modified drive circuit;

[0067] Fig. 9B is corresponding to Figure 2 a schematic diagram of a modified drive circuit of but using current source control rather than voltage source control; and

[0068] Fig.10 is a schematic diagram of a host device according to one embodiment. DETAILED DESCRIPTION

[0069] Before introducing the embodiments, the operation of the LRA will be considered in more detail. As above, the LRA is just one convenient type of electromechanical load or electromechanical device that is of particular interest when considering haptic systems. It will be understood that the teachings herein are generally applicable to driving electromechanical loads, such as other types of actuators that can be used in haptic systems.

[0070] When the LRA is driven by a voltage across its two electrical terminals, a current flows through or is drawn by the voice coil (inductor), thereby generating an electromotive force (EMF) on the movable magnetic mass and thus controlling its motion. The movable magnetic mass is connected to a spring, which therefore also affects its motion. The moving magnetic mass in turn generates a back EMF (bemf) voltage proportional to its velocity reflected at the electrical terminals. The arrangement is similar to a driven (damped) resonator.

[0071] Based on this, it is helpful to think of the driving of the LRA in electrical terms. Figure 1 is a schematic diagram of an equivalent circuit 1 of a drive circuit driving an LRA under open loop control, along with graphs and equations that can be used to understand its operation.

[0072] Figure 1 The equivalent circuit 1 of EMBODIMENT 1 comprises an AC voltage source (voltage amplifier) ​​10 connected to an LRA (electromechanical) load 20, which models the drive circuit, and the LRA load 20 models the LRA. For simplicity, the LRA load 20 will be referred to herein as just LRA 20. The drive circuit 10 generates a reference voltage ref (drive signal) which appears across the LRA 20 and induces a load current iload to be drawn by the LRA 20.

[0073] The LRA 20 includes a coil impedance zcoil, which models the voice coil, and a mechanical impedance zmech, which models the movable mass and spring arrangement. The coil impedance zcoil is modeled as an inductance le in series with a resistance re. The mechanical impedance zmech appears in series with the coil impedance zcoil and is modeled as a parallel network of a capacitance cmes, an inductance lces, and a resistance res. The capacitance cmes models the magnetic mass, the inductance Ices models the spring, and the resistance res models the mechanical damping. A bemf voltage appears across the mechanical impedance zmech as indicated (recall that the bemf voltage is induced by the moving magnetic mass).

[0074] The user tactile experience is defined by sensing the motion of a moving mass, and in particular the force generated by the acceleration of the moving mass (recalling Newton's second law, F=ma). It is therefore desirable to control the acceleration of the moving mass or a proxy, such as the position or velocity of the moving mass (the acceleration can be controlled based on the position or velocity). It is particularly desirable to control the acceleration to produce one or more of the following: a) a sharp tactile effect (e.g., rapid acceleration and braking of a mass, such as to simulate a click or button press); b) a wide bandwidth effect (e.g., for audio-to-haptics or to replicate textures); and c) a consistent effect (e.g., from LRA to LRA or to changing environmental conditions). It is desirable to agile the onset of the LRA's response to a tactile input pulse and reduce ringing of the LRA (and, for example, a smartphone screen in the context of a surface audio / haptic application) after the tactile input pulse has ceased.

[0075] The bemf voltage is proportional to the velocity of the moving mass as mentioned above, however, Figure 1 The control performed by the driver circuit in this case controls the reference voltage ref, not the bemf voltage itself. This type of open-loop voltage drive produces Figure 1 The graph in Figure 2 indicates the highly resonant performance.

[0076] Specifically, the ref to bemf transfer function (bemfTF) of the driven LRA load is given by Figure 1The voltage divider setting defined by the equivalent circuits of the obvious zcoil and zmech. Similarly, the load current transfer function (iloadTF) is set by the series connection of zcoil and zmech. These relationships are expressed by the equations in Figure 1 where zmech is represented as zBemf and zcoil is represented as zCoil.

[0077] Since the mechanical system resonates at a high Q (quality factor) and the mechanical impedance is much smaller than the coil impedance (i.e., zmech >> zcoil), the ref to bemf transfer function bemfTF has a very narrow bandwidth. The velocity effectively follows zmech (represented as zBemf) away from resonance (where zbemf << zcoil), and such driving can only be used for simple vibration effects in practice. To generate a large acceleration, the vibration frequency needs to be close to the resonance frequency.

[0078] The inventors have considered adjusting the drive circuit 10 by adjusting the output impedance of the drive circuit 10 to achieve control of the LRA 20 and particularly the bemf voltage.

[0079] Figure 2 is a schematic diagram of equivalent circuit 2, which corresponds to equivalent circuit 1, except that the target output impedance 30 has been inserted between the AC voltage source (voltage amplifier) 10 and the LRA 20. The combination of the AC voltage source 10 and the target output impedance 30 is then referred to as the modified drive circuit 40, and the drive output signal of the modified drive circuit 40, i.e., the drive voltage drv (drive signal), is provided at the output node 42 (between node 42 and ground) located between the modified drive circuit 40 and the LRA load 20 to drive the LRA load 20 as indicated based on the reference signal ref. It should be noted that the target output impedance 30 is referred to as a "virtual" impedance in Figure 2 and is provided along the current path that carries the load current iload flowing through or drawn by the LRA 20 based on the drive voltage drv (drive output signal).

[0080] Figure 2 It is assumed in Figure 2, represented by some additional impedance (not shown) connected in series between the AC voltage source 10 and the target output impedance 30 , which may be taken into account when determining the desired target output impedance 30 .

[0081] The target output impedance 30 is presented in the equivalent circuit 2 in the form of an equivalent circuit including a series resistor ser_r, a series capacitor ser_c, a series inductor ser_l and a parallel impedance network connected in series. The parallel impedance network includes a parallel resistor par_r, a parallel capacitor par_c and a parallel inductor par_l connected in parallel.

[0082] Target output impedance 30 Ω Figure 2 , including all of these impedances as an example of how complex the target output impedance may be. However, the inventors have contemplated variations in which some of these impedances are actually or practically absent (ie, lacking or removed) to define a less complex target output impedance 30.

[0083] There are many variations of this type in FIG. 3A to FIG. 3E Each of the variations can be considered as Figure 2 The target output impedance is 30 Ω for a specific configuration.

[0084] Figure 3A 3 is a schematic diagram of an equivalent circuit of a target output impedance 30A as a variation of the target output impedance 30, wherein the target output impedance 30A includes only a series resistor ser_r. Figure 2 The target output impedance 30 in the example is replaced by (or configured to form) a target output impedance 30A, and the series resistor ser_r is assigned a value of -re (negative resistance), then Figure 2 It can be seen that the series resistance ser_r will then 'cancel' the series resistance re of the coil impedance zcoil (as if there was no impedance at all). How this negative resistance is achieved will be explained later.

[0085] At low frequencies (e.g., <1kHz), the inductance le of the coil impedance zcoil is negligible and is assumed to be absent. In this case, as from Figure 2As is apparent from FIG. 1 , the reference voltage ref will appear across the mechanical impedance zmech, causing the bemf voltage to follow the reference voltage ref. This enables the reference voltage ref to control the bemf voltage itself, and therefore the velocity of the magnetic mass of the LRA (and therefore its acceleration and the force or haptic effect generated by said acceleration). For example, the reference voltage ref may take the form of a haptic signal, with the modified drive circuit 40 having a target output impedance of 30A, thereby enabling wider bandwidth control of the velocity (or position or acceleration) of the LRA mass to produce interesting haptic effects.

[0086] Incidentally, in Figure 3A It should be noted that it may be desirable to assign a value of approximately (e.g., deviating by at most 5% or about 1%) -re to the series resistance ser_r. This arises from the following example: in order to achieve a damping factor zeta_lra of the LRA equal to 1 (i.e., in order for the LRA to be critically damped), it is determined that ser_r should be set to have a value of approximately 99% of -re. The skilled person will understand that in a given application, a value of ser_r that achieves critical damping may be found. Where the value -re is used later herein, it will be understood that this value may be adjusted in some arrangements to achieve critical damping. Critical damping is intended to agile the onset of tactile pulses in the LRA (driven by the reference signal ref) and reduce ringing of the LRA after the tactile pulses in the reference signal ref have ceased.

[0087] Figure 3B 3 is a schematic diagram of an equivalent circuit of a target output impedance 30B as a variation of the target output impedance 30, wherein the target output impedance 30B only includes a series resistor ser_r and a series inductor ser_l. Figure 2 The target output impedance 30 in FIG. 1 is replaced by (or configured to form) the target output impedance 30B, and the series resistor ser_r and the series inductor ser_l are assigned corresponding values ​​-re and -le (negative resistance and negative inductance), then Figure 2 As can be seen, the target output impedance 30B will then 'cancel out' the coil impedance zcoil, even if the inductance le cannot be ignored at low frequencies. Figure 2 It is obvious that the reference voltage ref will again appear across the mechanical impedance zmech, with the bemf voltage following the reference voltage ref (but within a larger bandwidth than with the target output impedance 30A).

[0088] Figure 3C30C is a schematic diagram of an equivalent circuit of a target output impedance 30C as a variation of the target output impedance 30 in which the series capacitor ser_c has been omitted. In this case, it can be understood that the type of impedances and their interconnections in the target output impedance 30C "reflect" the type and interconnections of the LRA 20 to a certain extent.

[0089] if Figure 2 30 is replaced with (or configured to form) a target output impedance 30C, and the series resistance ser_r and the series inductance ser_l are given respective values ​​-re and -le (negative resistance and negative inductance), then those components will again cancel out the coil impedance zcoil with respect to the target output impedance 30B. The parallel RLC sections (i.e., parallel resistance par_r, parallel capacitance par_c, and parallel inductance par_l) of the target output impedance 30C can then be used to cause the mechanical impedance zmech to appear electrically different from the AC voltage source 10, i.e., effectively synthesizing the desired LRA load.

[0090] Figure 3D 3 is a schematic diagram of an equivalent circuit of a target output impedance 30D as a variation of the target output impedance 30, wherein the target output impedance 30D only includes a series resistor ser_r and a series capacitor ser_c. Figure 2 The target output impedance 30 in is replaced by (or configured to form) the target output impedance 30D, and the series resistor ser_r is given a value of -re (negative resistance) as described above, then the series resistor ser_r will 'cancel out' the series resistance re of the coil impedance zcoil (as if there is no impedance). The series capacitance ser_c and inductance le of the coil impedance zcoil then effectively form an LC resonant tank in series with the mechanical impedance zmech, which can increase damping to stop the magnetic mass of the LRA faster.

[0091] Figure 3E is a schematic diagram of an equivalent circuit of a target output impedance 30E as a variation of the target output impedance 30, wherein the target output impedance 30E only includes Figure 3A In the arrangement, the position of the magnetic mass of the LRA is proportional to the reference voltage ref at frequencies below resonance, and its acceleration is proportional to the reference voltage ref at frequencies above resonance.

[0092] In this context, Figure 4is a schematic diagram of a drive circuit 40A for driving LRA 20 according to one embodiment. As will become apparent, drive circuit 40A implements multiple control loops.

[0093] The driver circuit 40A includes a functional block 50, a driver 60, and a controller 70. The controller 70 is optional - it may be provided separately from the driver circuit 40A (functional block 50 and driver 60) in some applications, for example. The combination of the functional block 50, the driver 60, and the controller 70 corresponds to the modified circuit 40 and thus outputs its drive output signal at the output node 42 to the LRA 20 for use with the LRA 20. Figure 2 For convenience, the driver circuit 40A is shown as connected at the output node 42 to drive the LRA 20, but it will be understood that the driver circuit 40A need not actually include the LRA 20 (the LRA 20 may be provided separately for connection to the driver circuit 40A).

[0094] Generally speaking, for convenience, digital signals will be denoted below using uppercase letters (eg, MON), and analog signals will be denoted using lowercase letters (eg, mon).

[0095] Functional block 50 is configured to generate a (digital) control signal CS from a (digital) reference signal RS and a (digital) monitoring signal MON (which - although not shown - may be generated from a corresponding analog monitoring signal mon). Reference signal RS is generated by controller 70 and is intended for controlling LRA 20. For example, reference signal RS may represent tactile pulses to be used to control LRA 20. Reference signal RS may indicate an expected mechanical property of LRA 20 (electromechanical load) (e.g., proportional, directly proportional, or having a predefined, defined or linear relationship with the expected mechanical property). In this sense, controller 70 and reference signal RS may be compared with drive circuit 10 and reference voltage ref, respectively.

[0096] The driver 60 is configured to convert the control signal CS into an (analog) drive output signal dos (voltage signal), which is output via the output node 42 to drive the LRA 20. The LRA 20 draws a load current iload due to the drive output signal dos. The load current iload is therefore a current that (flows) through the LRA 20. One or more of the reference signal RS (including any signal based on which the reference signal RS is generated), the control signal CS, and the drive output signal dos may be referred to as an actuation signal. Recall that the LRA 20 is an example of an electromechanical load or electromechanical device. The driver 60 may include a digital-to-analog converter (not shown) to convert the digital control signal CS into an analog control signal cs and an amplifier (also not shown) to amplify the analog control signal cs in order to generate an analog drive output signal dos.

[0097] The monitoring signal MON may include a current monitoring signal IMON indicating a load current iload flowing through or drawn by the LRA 20 (e.g., proportional, directly proportional, or having a predefined, defined, or linear relationship to the iload). The monitoring signal MON may (additionally or alternatively) include a voltage monitoring signal VMON indicating a voltage induced across the LRA 20 (e.g., proportional, directly proportional, or having a predefined, defined, or linear relationship to the voltage) due to the current flowing through the LRA 20 (effectively, the drive output signal dos, where the drive output signal dos is applied only across the LRA 20). Thus, the drive circuit 40A may include a monitoring circuit 80 to monitor the current flowing through the LRA 20 (and optionally also the voltage across the LRA) and generate the monitoring signal MON (or its analog equivalent mon).

[0098] It should be emphasized that the monitoring circuit 80 need not be part of the LRA 20 (e.g., housed within the LRA) and may in fact be considered separate from the LRA 20, such that the LRA 20 may be provided without any sensing technology (i.e., it may be a "sensorless" LRA). This will be discussed in conjunction with the following description of the monitoring circuit 80. Figure 5 Become more obvious.

[0099] As schematically indicated with respect to the controller 70, the controller 70 is configured to generate a reference signal RS based on a drive input signal DIS. The drive input signal DIS may be generated within the controller 70 or received from a separate system or controller (e.g., from an application processor). The drive input signal DIS may be generated within the controller 70 based on, for example, one or more received signals from a separate system or controller (e.g., from an application processor).

[0100] The controller 70 may be configured to receive the monitoring signal MON or a portion thereof and control one or more of its signals based on the monitoring signal MON or a portion thereof. For example, the controller 70 may be configured to receive the current monitoring signal IMON and / or the voltage monitoring signal VMON and control one or more of its generated signals based on the current monitoring signal IMON and / or the voltage monitoring signal VMON.

[0101] The controller 70 may be configured to generate a reference signal RS based on a current monitoring signal IMON and / or a voltage monitoring signal VMON. The current monitoring signal IMON and / or the voltage monitoring signal VMON may, for example, indicate the performance of the LRA 20, such as its mechanical performance. The current monitoring signal IMON and the voltage monitoring signal VMON may be used together to evaluate, for example, the beginning of the response of the LRA 20 to a tactile input pulse (expressed by the drive input signal DIS and / or the reference signal RS) or the degree of ringing of the LRA 20 after the tactile input pulse has ceased. The current monitoring signal IMON and the voltage monitoring signal VMON may be used together to evaluate, for example, the resonant frequency f0, the quality factor Q, the impedance and / or the operating state (including a fault state) of the LRA 20. The current monitoring signal IMON and the voltage monitoring signal VMON may, for example, indicate the effectiveness of the current (current or existing) configuration of the target output impedance 30 and indicate how the configuration should be changed to meet the performance target. The implementation of the target output impedance 30 in the drive circuit 40A is described in more detail below.

[0102] In this way, a first control loop can be formed in which the drive output signal dos is controlled based on the drive input signal DIS. In such a control loop, it can be appreciated that the monitoring signal MON (the current monitoring signal IMON and / or the voltage monitoring signal VMON) acts as a feedback signal for feedback control (by the controller 70) of the reference signal RS and therefore also of the control signal CS and the drive output signal dos. This feedback control can be used to keep the performance of the LRA 20 (as indicated by the current monitoring signal IMON and / or the voltage monitoring signal VMON, e.g., its mechanical performance) within performance limits.

[0103] The first control loop may also incorporate (by the controller 70) feed-forward control of the reference signal RS and therefore also the control signal CS and the drive output signal dos. There are a number of possibilities, for example, using high pass filtering to remove low frequency components that may lead to inefficient driving of the LRA 20, or using low pass filtering to deal with erroneous sounds that may be emitted by some real life mechanical integration or an audio to haptic analyzer that converts audio content into haptic content. These are, of course, just examples.

[0104] A second control loop may also be considered to exist, in which the drive output signal dos is controlled based on the monitoring signal MON (current monitoring signal IMON and / or voltage monitoring signal VMON). In such a control loop, it is understood that the monitoring signal MON (in particular, the current monitoring signal IMON) acts as a feedback signal for feedback control (by the functional block 50) of the control signal CS and therefore also of the drive output signal dos. The control performed by the functional block 50 will be described in more detail below.

[0105] A third control loop may also be considered to exist, in which the function of the functional block 50 is controlled based on the monitoring signal MON (current monitoring signal IMON and / or voltage monitoring signal VMON) (described below). In this control loop, it can be understood that the monitoring signal MON (particularly, the current monitoring signal IMON and the voltage monitoring signal VMON) acts as a feedback signal for feedback control (by the controller 70) of the configuration signal CONFIG supplied to the functional block 50 to define or influence or control its operation. As above, the control performed by the functional block 50 will be described in more detail below.

[0106] A fourth control loop may also be considered to exist, in which the function of the driver 60 is controlled based on the monitoring signal MON (current monitoring signal IMON and / or voltage monitoring signal VMON). In such a control loop, it is understood that the monitoring signal MON (particularly the voltage monitoring signal VMON) acts as a feedback signal for (by the driver 60) performing feedback control on the drive output signal dos, such as making the drive output signal dos have a defined or predefined (e.g., linear, proportional or directly proportional) relationship with the control signal CS. This control may, for example, be used to achieve a linear operation of the driver 60 (which may be considered as an amplifier).

[0107] It will be apparent that it may be desirable to operate the various control loops with different (relative) delays. More particularly, for one or more of the control loops, it may be desirable to have a low delay, e.g., so that analog operation is closely mimicked (across the bandwidth of interest - which may be, e.g., a haptic or audio bandwidth as mentioned later), while for one or more other of the control loops, operating with a higher delay may be acceptable (or desirable for power consumption and complexity considerations).

[0108] For example, the second control loop may have a lower latency than the first control loop and / or the third control loop. The fourth control loop may have a lower latency than the first control loop and / or the third control loop. The second control loop may have the same or substantially the same latency as the fourth control loop. The latency of a control loop may be defined by the sampling rate (update rate, response rate) of the corresponding digital signal of the control loop, such as in combination with Figure 5 (described below) will become more apparent. The term latency herein may therefore describe how quickly (eg, at what rate, speed, or frequency) a particular control loop responds to a disturbance or control input.

[0109] The above control loops may be referred to as (or considered to encompass) control paths or control systems or control networks. Each of the control loops may incorporate one or more of feedback control, feedforward control, and open-loop control.

[0110] In general, the functional block 50 controls the difference between the control signal CS and the reference signal RS to simulate the corresponding Figure 2 The target output impedance 30 of FIG. 1 is a target output impedance 30 of FIG. 1 (the impedance value of the target output impedance 30 may be set to configure the target output impedance 30 to be, for example, any one of the target output impedances 30A to 30E). For convenience, the simulated target output impedance will be simply referred to as the target output impedance 30.

[0111] Because function block 50 controls the difference between control signal CS and reference signal RS in the digital domain (i.e., digitally using digital signals and digital operations / calculations), the relationship between control signal CS and reference signal RS can be configured (e.g., over time) to define and / or adjust the configuration of target output impedance 30 (e.g., which of target output impedances 30A to 30E is being used). In this way, in the case of a haptic system, the response of LRA 20 to reference signal RS can be controlled, thereby enabling control of the haptic effect (expressed by reference signal RS).

[0112] The functional block 50 is configured to digitally determine the adjustment signal AS based on the monitoring signal MON (in particular, the current monitoring signal IMON), the AS indicating the voltage signal that will be induced by the load current iload across the target output impedance 30 of the driver circuit 30 (i.e., in the case where the load current will flow through the target output impedance 30). In fact, the functional block 50 is configured to digitally determine (e.g., calculate) the adjustment signal AS based on the load current iload. The driver 60 is then configured to generate the drive output signal dos based on the reference signal RS and the adjustment signal AS (or based on the control signal CS itself generated based on the reference signal RS and the adjustment signal AS) so that the drive output signal dos behaves as if the output impedance of the driver circuit has been adjusted to include the target output impedance 30.

[0113] In more detail, the functional block 50 is configured to control the relationship or difference between the control signal CS and the reference signal RS based on the monitoring signal MON (in particular, the current monitoring signal IMON). Specifically, the functional block 50 controls the relationship so that the drive output signal dos (when driving the LRA 20) has a target behavior in which the drive output signal dos behaves as if the output impedance of the drive circuit has been configured or adapted or adjusted to include (or simply includes) a target output impedance, such as the target output impedance 30 (for example, configured to form any of the variations 30A to 30E), relative to the desired analog drive output signal that is desired to be generated when the control signal CS is the reference signal RS (i.e., when CS=RS). It is desired to generate a desired analog drive output signal in the case where the driver 60 generates the drive output signal dos based on the reference signal RS without the adjustment signal AS (in fact, without control of the second control loop, which can be regarded as including the adjustment signal AS).

[0114] Thus, functional block 50 adjusts control signal CS relative to reference signal RS so that driver circuit 40A behaves as if its output impedance (measured at node 42) includes target output impedance 30 (when it does not, i.e., when CS=RS). For example, in the case of CS=RS, driver circuit 40A may be able to operate with zero output impedance (measured at node 42) due to operation of driver 60, in which case functional block 50 adjusts CS relative to RS based on IMON so that the output impedance of driver circuit 40A is substantially equal to the target output impedance.

[0115] In this sense, the functional block 50 mimics or emulates the presence of the target output impedance 30 by making adjustments (via the adjustment signal AS) in the signal path between the controller 70 and the driver 60 so that the output impedance of the driver circuit 40A appears to (and in fact does) include the target output impedance 30. The target output impedance 30 in these terms may be considered to be a "virtual" impedance as mentioned earlier, because it is not achieved by providing analog discrete passive impedance components, but rather by means of signal adjustments determined in the digital domain (i.e., made or determined digitally).

[0116] For example, the functional block 50 may be configured to receive and / or store one or more configuration values ​​defining a target output impedance and thus controlling how the control signal CS is generated based on the reference signal RS and the current monitoring signal IMON. The configuration values ​​may be based on a (digital) configuration signal CONFIG (e.g. Figure 4 ) is set by means of a third control loop.

[0117] Incidentally, as an alternative or in addition to the control performed by means of the third control loop, the (digital) configuration signal CONFIG may be controlled by a separate impedance control signal (not shown) received, for example, from a separate system. The configuration of the target output impedance may thus be varied with (or controlled or set by) the separate impedance control signal in this way.

[0118] Back to Figure 4 A useful example for understanding the "virtual" aspect of the target output impedance 30 is the case where the target output impedance 30 is configured to form a target output impedance 30A, wherein its resistance ser_r has a value -re (ie, a negative resistance) as mentioned earlier. Figure 2 , such a target output impedance 30A (negative resistance) can be expected to have a voltage rise (rather than a drop) across it in the direction from the driver circuit 10 to the LRA load 20, the voltage rise being defined by the product of the resistance value re and the current iload flowing through the LRA load 20 in that direction (recalling Ohm's law, V=IR).

[0119] Thus, in this example, functional block 50 emulates the presence of target output impedance 30A between controller 70 and driver 60 by adding an amount represented by adjustment signal AS (based on the product of resistance value re and load current iload flowing through or drawn by LRA load 20, as indicated by current monitor signal IMON) to reference signal RS to form control signal CS (i.e., CS=RS+AS) such that the output resistance of drive circuit 40A appears to (and does) include target output impedance 30A.

[0120] In this case, the adjustment signal AS can be considered as a function of iload*re or IMON*re. In this way, the functional block 50 enables a negative resistance to be implemented digitally. The CONFIG signal can, for example, simply provide the functional block 50 with a value -re (or re) to define the series resistance ser_r, and possibly other configuration values ​​that define the target output impedance 30 to have the form of (or be configured as) the target output impedance 30A (rather than, for example, the target output impedance 30C).

[0121] The drive output signal dos is a voltage signal that appears across LRA 20. The target behavior may then be defined by how the voltage level of the drive output signal dos changes when LRA 20 (or the voltage across LRA 20) is driven by a current flowing through LRA 20 (ie, load current iload).

[0122] Incidentally, in Figure 4In an embodiment, the control signal CS, the reference signal RS, the adjustment signal AS and the monitoring signal MON are presented as digital signals as a convenient implementation that enables the functional block 50 to be considered as a (completely) digital block. However, the control signal CS, the adjustment signal AS and the reference signal RS may, for example, be replaced by analog equivalent signals cs, as and rs, respectively. In this case, the functional block 50 may digitally (e.g., by calculation or using a lookup table) work out how to adjust the analog control signal cs (i.e., what the adjustment signal should be) relative to the analog reference signal rs to mimic or emulate the presence of the target output impedance 30. For example, the functional block 50 may digitally generate (e.g., by calculation or using a lookup table, followed by digital-to-analog conversion) a suitable analog adjustment signal, which will be added to the analog reference signal rs in the analog domain to generate the analog control signal cs. It will be appreciated that by digitally working out how to adjust the analog control signal cs relative to the analog reference signal rs, it is possible to achieve the target output impedance 30 (including in the form of a target output impedance 30A having a negative resistance) in an efficient and highly adaptable manner.

[0123] For convenience, examples using the digital control signal CS, the digital adjustment signal AS, the digital reference signal RS, and the digital monitoring signal MON will be presented ahead.

[0124] As mentioned earlier, there may be one or more simulated output impedances (e.g., discrete or parasitic components) in the driver circuit 40A. The target output impedance 30 may be configured to take this into account. For example, if there is a certain simulated (positive) resistance of magnitude R1 (not shown) in the output impedance of the driver circuit 40A, and it is desired that the output impedance of the driver circuit 40A have a total resistance of magnitude -R2 (negative resistance), then the target output impedance 30 (assuming Figure 3A Configuration) can be configured to take this into account by setting ser_r = -(R1 + R2), ie configured to compensate for (or allow for) the simulated impedance R1.

[0125] As another example, functional block 50 may be configured to control an analog variable impedance (discrete component—not shown) in the current path of load current iload, such as between output node 42 and driver 60, so that the output impedance of driver circuit 40A is partially controlled or adjusted with the variable impedance (actual discrete impedance component). Again, target output impedance 30 may be configured to take this into account, i.e., adjusted or configured to compensate for (or allow for) the variable impedance. For example, an impedance formed by a combination of the variable impedance and target output impedance 30 (or equivalent to the combination) may be controlled.

[0126] Figure 54 is a schematic diagram of a driving circuit 40B for driving the LRA 20 as a detailed exemplary implementation of the driving circuit 40A. Similar elements and signals are referred to by similar reference numerals and repeated descriptions are omitted. Functional block 50 is Figure 5 In the implementation of , it is called functional block 50A.

[0127] It will become apparent that in this detailed implementation, some digital signals have relatively high sampling (update) rates and other digital signals have relatively low sampling (update) rates, and this is indicated by the suffixes "(H)" and "(L)", respectively. In this way, some signals and corresponding control loops may be considered "fast" (or high bandwidth, or low latency), and some signals and corresponding control loops may be considered "slow" (or low bandwidth, or high latency), as mentioned earlier. Signals with low sampling rates may be considered to have the same sampling rate as each other, and signals with high sampling rates may similarly be considered to have the same sampling rate as each other, but this is not necessary. Moreover, the various sampling rates may depend on the application and vary, for example, over time.

[0128] Functional block 50A of driver circuit 40B includes current monitoring ADC 510, voltage monitoring ADC 520, current monitoring extractor 530, voltage monitoring extractor 540, adjustment signal (AS) determiner 550, adder 560, and limiter 570. Functional block 50A is a digital block (except for the analog front end portion of ADC 510 and 520) and can be implemented using "hard-wired" circuits, logic gates, and / or a processor executing a computer program. For example, in some arrangements, functional block 50A can be implemented as part of controller 70, which can be a processor or microprocessor such as a digital signal processor (DSP). Thus, functional block 50A is divided into Figure 5 The interconnected components in can be viewed as schematic and can be used to understand their functionality.

[0129] In some arrangements, the controller 70 may be considered as part of the driver circuit 40B, for example, provided as part of the same integrated circuit as the other elements of the driver circuit 40B. In other arrangements, the controller 70 may be considered as separate from the driver circuit 40B, for example, provided as an integrated circuit separate from the integrated circuits that include the other elements of the driver circuit 40B.

[0130] It is assumed here that the monitoring circuit 80 is configured to monitor the current flowing through the LRA 20 and output an analog current monitoring signal imon, and also monitor the voltage across the LRA 20 and output an analog voltage monitoring signal vmon. It is also emphasized that the monitoring circuit 80 can be separated from the LRA 20, wherein the LRA 20 is shown in this case as being connected across terminals 82 and 84 of the monitoring circuit 80 (the terminals 82 and 84 can be regarded as terminals of the drive circuit 40B). Therefore, the drive circuit 40B including the monitoring circuit 80 (but not the LRA 20) can be implemented as an integrated circuit, for example on an IC chip, wherein the terminals 82 and 84 are (external) terminals of the integrated circuit.

[0131] As an example, the monitoring circuit 80 may include a resistor (not shown) connected in series with the LRA 20, such as between nodes 42 and 82 (the known resistance of the resistor will be taken into account when evaluating the resistance re of the coil impedance zcoil), wherein the voltage across the resistor is proportional to the load current iload flowing through the LRA 20 and thus forms the current monitoring signal imon. The voltage monitoring signal vmon may be formed by the load voltage vload taken across the LRA 20 (e.g., across terminals 82 and 84). Of course, there are other ways to obtain the signals vmon and imon for the LRA 20.

[0132] The current monitoring ADC 510 is connected to receive the analog current monitoring signal imon and output the corresponding digital current monitoring signal IMON (H), i.e., with a high sampling rate. The current monitoring extractor 530 is connected to receive the current monitoring signal IMON (H) and output the corresponding digital current monitoring signal IMON (L), i.e., with a low sampling rate. The voltage monitoring ADC 520 is connected to receive the analog voltage monitoring signal vmon and output the corresponding digital voltage monitoring signal VMON (H), i.e., with a high sampling rate. The voltage monitoring extractor 540 is connected to receive the voltage monitoring signal VMON (H) and output the corresponding digital voltage monitoring signal VMON (L), i.e., with a low sampling rate. The extractor acts in this sense to reduce the sampling rate between its input signal and the output signal, for example, by outputting one input sample every several input samples or averaging a continuous sample group.

[0133] The controller 70 is connected to receive the signals IMON(L) and VMON(L), the AS determiner 550 is connected to receive the signal IMON(H), and the driver 60 is connected to receive one or both of the signals vmon and VMON(H). Assume that the controller includes an interpolator 710 that converts the digital reference signal RS(L) (i.e., at a low sampling rate) into a corresponding digital reference signal RS(H) at a high sampling rate. The interpolator functions in this sense to increase the sampling rate between its input signal and the output signal, thereby generating new samples by interpolation / estimation.

[0134] In summary, the functional block 50A of the driver circuit 40B is configured to determine, based on the monitoring signal MON and one or more configuration values ​​defining the target output impedance 30, an adjustment signal AS(H) to be applied to the reference signal RS(H) to form the control signal CS(H) and cause the drive output signal dos to have a target behavior when driving the LRA 20, and to generate the control signal CS(H) by applying the adjustment signal AS(H) to the reference signal RS(H). It should be noted that this forms part of a second control loop (which is fast, has low latency, uses a high sampling (update) rate digital signal) so that the drive output signal dos behaves (over a wide bandwidth) as if the target output impedance 30 had been implemented in analog form.

[0135] In detail, the AS determiner 550 is configured to generate an adjustment signal AS(H) based on the signal IMON(H) in a form to be added to the reference signal RS(H) to form the control signal CS(H). The adder 560 is configured to generate the control signal CS(H) by adding the adjustment signal AS(H) to the reference signal RS(H). The control signal CS(H) is thus generated to have a defined or predefined (e.g., substantially linear, proportional, or directly proportional) relationship with the sum of the adjustment signal AS(H) and the reference signal RS(H).

[0136] Effectively, the AS determiner 550 determines (e.g., by calculation or using a lookup table) the voltage that would be induced across the target output impedance 30 if the current flowing through the LRA 20 were to flow through the target output impedance 30, and generates the adjustment signal AS(H) to express this voltage, such that adding the adjustment signal AS(H) to the reference signal RS(H) produces the control signal CS(H). Thus, the adjustment signal AS(H) can be considered to be indicative of the load voltage vload that would be induced across the target output impedance 30 if the load current iload flowing through the LRA 20 were to flow through the target output impedance 30 (e.g., proportional, directly proportional, or having a predefined, defined, or linear relationship with said vload). In this way, the control signal CS(H), and therefore the drive output signal dos, will respond to the load current iload as if the output impedance of the drive circuit 40B had been configured to include the target output impedance 30.

[0137] A limiter 570 is used to limit (i.e., keep within limits) the value of the control signal CS(H), for example so that its value is within the linear operating range of the driver 60 (e.g., the DAC and / or analog amplifier of the driver 60). As part of a fourth control loop (which is fast similar to the second control loop), the driver 60 is configured to control the drive output signal dos so that its voltage level has a defined or predefined (e.g., substantially linear, proportional, or proportional) relationship with the control signal CS(H) by means of one or both of the signals VMON(H) and vmon as indicated. The limiter 570 is optional in some arrangements.

[0138] It should be noted that the controller 70 is connected to receive monitoring signals MON in the form of digital current monitoring signals IMON(L) and voltage monitoring signals VMON(L) (both having a low sampling rate). Thus, the first control loop generates a reference signal RS(L) based on the drive output signal DIS(L) as indicated, thereby acting as a relatively slow control loop. The interpolator 710 converts the reference signal RS(L) into a corresponding reference signal RS(H) for use in the second control loop and the fourth control loop, which are fast control loops as mentioned. In addition, the third control loop generates a configuration signal CONFIG(L) (i.e., having a low sampling rate) for use by the functional block 50A (in particular, the AS determiner 550) to define the target output impedance 30 (i.e., by means of one or more configuration values), thereby acting as a relatively slow control loop.

[0139] The first and third control loops may, for example, only need to respond to relatively slow (low frequency) disturbances, such as temperature changes of LRA 20. On the other hand, the second and fourth control loops may require very low latency to emulate or simulate analog performance (within a given bandwidth).

[0140] Looking further at the first control loop and the third control loop, it will be appreciated that the controller 70 has access to monitoring signals MON in the form of digital current monitoring signals IMON(L) and voltage monitoring signals VMON(L), as mentioned earlier. Based on these signals, the controller 70 may in some arrangements be configured to partially or completely determine or estimate the configuration of the LRA 20, for example, to determine (see Figure 2 ) impedance values ​​of some or all of re, le, cmes, lces, and res (or estimate their impedance values). Analysis of the digital current monitoring signal IMON(L) and the voltage monitoring signal VMON(L) may also enable determination or estimation of the resonant frequency f0 or the quality factor Q of the LRA 20.

[0141] This information can be used to define or update the configuration of the target output impedance 30 and / or control the parameters of the reference signal RS(L) via the CONFIG(L) signal. One example may be to determine or estimate the coil resistance re (see Figure 2 ) in order to set or update (e.g., improve) the value for the target output impedance 30 (e.g., Figure 3A Another example is to use an estimated or determined value of the resonant frequency f0 to control the reference signal RS(L) so that the LRA 20 is driven very efficiently in terms of power consumption (eg, at resonance) by the drive output signal dos.

[0142] Of course, some of this definition / update / control may be based on preset values ​​or input control signals (e.g., received from another system or user). The present disclosure will be understood accordingly. For example, the values ​​of the resonant frequency f0 and / or the quality factor Q of the LRA 20 may be preset or provided from an external system via a control signal.

[0143] Merely by way of example, a relatively high sampling (update) rate indicated by a suffix (H) may be equal to 768 kHz (768,000 samples / second), and a relatively low sampling (update) rate indicated by a suffix (L) may be equal to 48 kHz (48,000 samples / second). For example, signals RS(H), AS(H), IMON(H), VMON(H), and CS(H) may be 768 kHz digital signals, while signals RS(L), IMON(L), and VMON(L) may be 48 kHz digital signals. Signal CONFIG(L) may be a 48 kHz signal, or may have an even lower sampling rate (e.g., in the range of 1 kHz to 48 kHz, such as 3 kHz). Other sampling rates (see audio signals) of relatively low sampling (update) rates indicated by a suffix (L) may be 44.1 kHz, 88.2 kHz, 96 kHz, and 192 kHz (e.g., values ​​in the exemplary range of 10 kHz to 200 kHz). Of course, these are merely examples.

[0144] Thus, for example, the second control loop (and fourth control loop) may be 16 times faster (eg, between 4 and 100 times) than the first control loop, and 16 or 256 times faster (between 4 and 1000 times) than the third control loop. Of course, these are merely examples.

[0145] As above, the reference signal RS(L) may be used to express a haptic signal, which may have a bandwidth of up to 500 Hz or even up to 1 kHz. It should be noted that for use in audio applications, human hearing is generally accepted to be in the typical range of 20 Hz to 20 kHz - such a signal may be expressed by a suitable reference signal RS(L) having, for example, a sampling rate of 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz or 192 kHz. Again, these values ​​are examples.

[0146] Incidentally, the adder 560 and (optionally) the limiter 570 may be considered as part of the driver 60, such that the driver 60 receives the reference signal RS(H) and the adjustment signal AS(H) and controls the drive output signal dos based on those received signals.

[0147] Figure 6 is a schematic diagram of an AS determiner 550A as a detailed exemplary implementation of the AS determiner 550. Figure 5 Consistent with the AS determiner 550 of FIG. 5 , the AS determiner 550A is configured to generate an adjustment signal AS(H) at its output node 602 based on the current monitoring signal IMON(H) received at its input node 604. The adjustment signal AS(H) may be considered as an impedance realization signal.

[0148] In general, the AS determiner 550A includes a first low pass filter section 606 , a high pass filter section 608 , a computation portion 610 , and a second low pass filter section 612 connected in series between an input node 604 and an output node 602 .

[0149] The first low pass filter section 606 includes a pair of parallel paths, one of the outputs of which can be selected by a selector based on an enable (selection) signal low1En. One of those paths includes a low pass filter, so that the enable signal low1En effectively determines whether the output signal of the first low pass filter section 606 has been subjected to low pass filtering in the section 606.

[0150] Similarly, the high pass filter section 608 includes a pair of parallel paths, one of the outputs of which can be selected by a selector based on an enable (select) signal highEn. One of those paths includes a high pass filter, so that the enable signal highEn effectively determines whether the output signal of the high pass filter section 608 has been subjected to high pass filtering in the section 608.

[0151] Similarly, the second low-pass filter section 612 includes a pair of parallel paths, one of the outputs of which can be selected by a selector based on an enable (selection) signal low2En. One of those paths includes a low-pass filter, so that the enable signal low2En effectively determines whether the output signal of the second low-pass filter section 612 has been subjected to low-pass filtering in the section 612.

[0152] Therefore, high-pass filtering and low-pass filtering may be considered optional (and thus need not be provided), and may be employed in different ways in different applications.

[0153] The calculation section 610 includes a parallel RLC section 620 connected in parallel with a series RLC section 630. The parallel RLC section 620 includes a calculation block 622 that operates on the current monitoring signal IMON (H) to achieve the parallel connection of the parallel resistance par_r, the parallel capacitance par_c and the parallel inductance par_l of the target output impedance 30 based on the parameters or configuration values ​​a0, a1, a2, b0, b1, b2 as indicated. The series RLC section 630 includes calculation blocks 632, 634 and 636 connected together in parallel, which operate on the current monitoring signal IMON (H) to achieve the series resistance ser_r, the series capacitance ser_c and the series inductance ser_l of the target output impedance 30 based on the corresponding parameters or configuration values ​​ser_r, ser_c and ser_l as indicated.

[0154] The output of each of the calculation blocks 622, 632, 634, 636 is passed via a corresponding AND block together with the corresponding enable signals parEn, rEn, lEn and cEn, respectively, to an adder / subtractor 640, the output of which is passed to the second low-pass filter section 612. In this way, the contribution of the calculation blocks 622, 632, 634, 636 can be selectively included or removed from the signal received by the low-pass filter section 612 by means of the corresponding enable signals parEn, rEn, lEn and cEn. This, together with the control of the parameters or configuration values ​​mentioned above, has the following effect: the target output impedance 30 can be configured, for example, to take the target output impedance 30A to 30E (see FIG. 3A to FIG. 3E ) in any of the forms.

[0155] The outputs of the computation blocks 622, 632, 634, 636 may be referred to as adjustment sub-signals, each of which represents a corresponding portion of the target equivalent circuit that represents the target output impedance 30. The adjustment sub-signals may thus be combined to arrive at the adjustment signal AS(H). The computation blocks 622, 632, 634, 636 may, for example, perform a calculation or access a lookup table.

[0156] Figure 7 yes Figure 4 Schematic diagram of an exemplary implementation 50B of a functional block 50 for use in a current drive mode of operation. In this context, it should be understood that in conjunction with Figures 4 to 6 The operation described corresponds to the impedance drive mode of operation. Figure 5 and Figure 6 Coincidentally, the signals CS(H) and IMON(H) are forwarded here.

[0157] In the current drive mode of operation, the functional block 50 is configured to function in accordance with the exemplary implementation 50B, and in particular generates a control signal CS (H) as a result of subtracting (at the subtractor 702) the current monitoring signal IMON (H) acting as a feedback signal from the reference signal RS (H). This negative feedback operation enables the current flowing through the LRA 20 to be controlled based on the reference signal RS (H).

[0158] will understand, Figure 4 The functional block 50 may be configured to selectively operate in an impedance drive mode of operation (with Figure 5 and Figure 6 consistent) or current drive operation mode (with Figure 7 consistent) operation.

[0159] Figure 8A series of graphs A through D (labeled clockwise from top left) are presented that may be used to understand the benefits and capabilities of the drive circuits 40A, 40B disclosed herein.

[0160] These Bode plots compare the position, velocity, acceleration, and power transfer functions in various modes for driving an exemplary typical LRA 20 at a resonant frequency f0=50 Hz and a quality factor Q=3 using the drive circuits 40A, 40B.

[0161] Graph A considers driving LRA 20 without simulating the presence of target output impedance 30 or by simulating the presence of target output impedance 30 when configured to have zero impedance. This is equivalent to Figure 1 The LRA 20 is driven in unison. This form of driving provides relatively poor mechanical control of the LRA 20.

[0162] Graph B considers driving LRA 20 (in impedance drive mode) where the simulated target output impedance 30 is configured to be Figure 3A In the variation 30A, that is, it is configured as a negative impedance (negative resistance). This drive form exhibits a constant speed transfer function from 20 Hz to 200 Hz.

[0163] Graph C considers driving LRA 20 (in impedance drive mode) where the simulated target output impedance 30 is configured to be Figure 3E In the variation 30E, i.e., configured as a positive impedance (positive resistance), wherein the impedance (resistance) value is much greater (i.e., 10 times) than the impedance (resistance) value of the LRA 20. This drive form exhibits a constant position transfer function below resonance (from DC to 20 Hz) and a constant acceleration transfer function above resonance (from 200 Hz to 1 KHz) but at the expense of high impedance.

[0164] Graph D considers driving LRA 20, but using the same Figure 7 A current driven mode of operation that is consistent (i.e., without the presence of simulated target output impedance 30). This form of drive exhibits a constant position transfer function below resonance (from DC to 20 Hz) and a constant acceleration transfer function above resonance (from 200 Hz to 1 KHz) similar to Graph C but without the need for high impedance.

[0165] The acceleration waveform of a typical LRA 20 with low Q can be accurately controlled over the full tactile sensitivity range (DC to 500 Hz) using negative impedance around resonance (20 Hz to 200 Hz) (Graph B) and current drive above resonance (>200 Hz) (Graph D). The so-called "poor man's" current drive can be achieved by configuring the negative impedance circuit to have a large positive impedance (Graph C).

[0166] At this point, it should be noted that the drive circuit arrangement has so far been described based on a voltage source drive of the LRA 20 (electromechanical load), i.e., where the drive output signal dos is a voltage signal vload (and the reference signal RS is configured for voltage drive). This drive output signal dos induces a load current iload to be drawn by the LRA 20 (or to flow through the LRA). Given this form of drive, the load current iload is monitored (e.g., using the signal IMON) and used to determine the voltage to be induced across the target output impedance 30 in order to generate the adjustment signal AS. The driver 60 is configured to generate the drive output signal based on the reference signal RS and the adjustment signal AS, such that the drive output signal dos behaves as if the output impedance of the drive circuit has been adjusted to include the target output impedance. Fig. 9A yes Figure 2 is a schematic diagram of a modified drive circuit 40 as an indication of this voltage source control, and for completeness, the LRA 20 is shown connected to the modified drive circuit.

[0167] However, drive circuit arrangements are also envisaged based on current source drive of the LRA 20. It will be appreciated that (taking into account the principles of source conversion) it will be possible to actively control the load current iload (rather than the load voltage vload) to drive the LRA 20 by current source control in a manner equivalent to driving by voltage source control.

[0168] Fig. 9B is a schematic diagram of a modified drive circuit 40C, which is equivalent to Fig. 9A A modified drive circuit 40 but using current source control. Like elements are denoted by like reference numerals. Fig. 9B The voltage source 10 of FIG. 1 has been replaced by a current source 10C that provides a current reference signal Iref. In addition, instead of providing Fig. 9A The target output impedance (virtual impedance) 30 connected in series with the voltage source 10 is Fig. 9B A reconfiguration format is provided in which the series components (ser_r, ser_l, ser_c) are connected in series with the current source 10C and the parallel components (par_r, par_l, par_c) are connected in parallel with the current source 10C. The LRA 20 (separate from the modified drive circuits 40 and 40C) is connected in the same manner in both cases.

[0169] Therefore (due to Fig. 9B ), based on the current source drive of LRA 20 consistent with the drive circuit 40C, that is, where the drive output signal dos is the current signal iload (and the reference signal RS is configured for current drive), Figures 4 to 6The drive circuits 40A and 40B of can be converted into an equivalent drive circuit. This drive output signal dos includes the load voltage vload across the LRA 20. Considering this drive form, the load voltage vload can be monitored (e.g., using the signal VMON) and used to determine the current that will be induced to flow through the target output impedance in order to generate the adjustment signal AS (i.e., so that the adjustment signal AS represents a current rather than a voltage). The driver 60 (a current amplifier, specifically a high speed or wide bandwidth current amplifier) ​​can then be configured to generate the drive output (current) signal dos based on the (current-based) reference signal RS and the (current-based) adjustment signal AS, so that the drive output signal dos behaves as if the output impedance of the drive circuit has been adjusted to include the target output impedance.

[0170] Therefore, it can be considered and understood accordingly Figures 4 to 6 The description of applies mutatis mutandis to equivalent current source drive arrangements. That is, drive circuits 40A and 40B are to be understood as having current source drive equivalents to which the techniques described herein similarly apply.

[0171] For example, in the voltage source drive arrangement described earlier, the AS determiner 550 determines (e.g., by calculation or using a lookup table) the voltage that would be induced across the target output impedance 30 if the current flowing through the LRA 20 were to flow through the target output impedance 30. In the equivalent current source drive arrangement, the AS determiner 550 determines (e.g., by calculation or using a lookup table) the current that would be drawn by the target output impedance 30 given the voltage across the LRA 20. Similarly, the adjustment sub-signal is described in terms of voltage in the voltage source drive arrangement, but would be a current in the equivalent current source drive arrangement.

[0172] As another example, in the voltage source drive arrangement described earlier, the second control loop (achieving the target output impedance) uses the current monitoring signal IMON to adjust the voltage signal, and the fourth control loop (aimed at achieving linear operation of the driver 60) uses the voltage monitoring signal VMON to adjust the voltage signal. In the equivalent current source drive arrangement, the second control loop (achieving the target output impedance) uses the voltage monitoring signal VMON to adjust the current signal, and the fourth control loop (aimed at achieving linear operation of the driver 60) uses the current monitoring signal IMON to adjust the current signal. In practice, those skilled in the art will appreciate that the logic of the second and fourth control loops for the voltage source drive arrangement can be effectively swapped (with appropriate changes to the reference signal RS) to obtain a current source drive arrangement.

[0173] Fig.10 is a schematic diagram of a host device 1000, the host device 1000 includes driving circuits 40A and 40B (assuming that Figure 4 and Figure 5 The voltage source control version explained or as combined with Fig. 9B The host device 1000 may include a current source control version described above) and an LRA 20, wherein the driving circuit 40A or 40B is connected to drive the LRA 20. The host device 1000 may of course include other components (not shown) for controlling or operating together with the driving circuit, such as an application processor.

[0174] The skilled person will recognize that some aspects of the above-described apparatus (circuits) and methods may be embodied as, for example, processor control code on a non-volatile carrier medium such as a disk, CD-ROM or DVD-ROM, a programmed memory such as a read-only memory (firmware), or a data carrier such as an optical or electrical signal carrier.

[0175] For some applications, such aspects will be implemented on a DSP (digital signal processor), an ASIC (application specific integrated circuit), or an FPGA (field programmable gate array). Thus, the code may include conventional program code or microcode, or, for example, code for setting up or controlling an ASIC or FPGA. The code may also include code for dynamically configuring a reconfigurable device, such as a reprogrammable logic gate array. Similarly, the code may include code for a hardware description language, such as Verilog TM or VHDL. As the skilled person will appreciate, the code may be distributed among multiple coupled components that communicate with each other. Where appropriate, such aspects may also be implemented using code that runs on a field (re)programmable analog array or similar device to configure analog hardware.

[0176] Some embodiments of the present invention may be arranged as part of a haptic circuit (e.g., a haptic circuit that may be provided in host device 1000 as discussed above). Circuits or circuit systems according to embodiments of the present invention (such as drive circuits 40A or 40B) may be implemented (at least partially) as an integrated circuit (IC), for example, on an IC chip. One or more input or output transducers (such as LRA 20) may be connected to the integrated circuit when in use.

[0177] It should be noted that the above-mentioned embodiments illustrate rather than limit the present invention, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. The word "comprising" does not exclude the presence of elements or steps other than those listed in the claims, "a" or "an" does not exclude a plurality, and a single feature or other unit may perform the functions of several units recited in the claims. Any reference numerals or signs in the claims should not be interpreted so as to limit their scope.

[0178] The present disclosure extends to a set A of the following statements:

[0179] A1. A drive circuit for driving an electromechanical load with a drive output signal based on a digital reference signal at a first sampling rate, wherein the drive output signal induces a first electrical quantity at the electromechanical load, the drive circuit comprising:

[0180] a functional block configured to digitally determine an adjustment signal based on the first electrical quantity at a second sampling rate higher than the first sampling rate, the adjustment signal indicating a second electrical quantity to be induced at a target output impedance of the driver circuit due to the first electrical quantity; and

[0181] a driver configured to generate the drive output signal based on the reference signal and the adjustment signal so that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include the target output impedance,

[0182] Wherein the first electrical quantity is a current and the second electrical quantity is a voltage, or vice versa.

[0183] A2. A driving circuit according to statement A1, wherein:

[0184] The drive output signal is a voltage signal, the first electrical quantity is a current drawn by the electromechanical load, and the second electrical quantity is a voltage across the target output impedance; or

[0185] The drive output signal is a current signal, the first electrical quantity is a voltage across the electromechanical load, and the second electrical quantity is a current drawn by the target output impedance.

[0186] A3. A driver circuit according to statement A1 or A2, wherein the functional block is configured to digitally determine the adjustment signal based on a definition of the first electrical quantity and the target output impedance.

[0187] A4. A driver circuit according to statement A3, wherein the definition includes one or more configuration values.

[0188] A5. The drive circuit according to statement A4, comprising: a storage device, the storage device being used to store the one or more configuration values, wherein the impedance value of the target output impedance is maintained when the one or more configuration values ​​stored in the storage device are maintained.

[0189] A6. A drive circuit according to any one of statements A4 or A5, wherein:

[0190] A target equivalent circuit representing the target output impedance includes one or more impedance components and a circuit structure for connecting the one or more impedance components together; and

[0191] The one or more configuration values ​​define at least one of the impedance components and / or the circuit structure.

[0192] A7. A drive circuit according to statement A6, wherein:

[0193] The target equivalent circuit includes a plurality of impedance components connected together; and

[0194] The functional block is configured to:

[0195] determining a plurality of adjustment sub-signals, each adjustment sub-signal representing a corresponding portion of the target equivalent circuit and indicating a portion of the second electrical quantity that would be induced at the corresponding portion of the target equivalent circuit if the second electrical quantity is induced at the target equivalent circuit; and

[0196] determining the adjustment signal by combining the plurality of adjustment sub-signals,

[0197] and optionally wherein:

[0198] If the second electrical quantity is the voltage across the target output impedance, then the portion of the second electrical quantity is the voltage across the corresponding portion of the target equivalent circuit; and

[0199] If the second charge is the current drawn by the target output impedance, then the portion of the second charge is the current drawn by the corresponding portion of the target equivalent circuit.

[0200] A8. A driver circuit according to statement A6 or A7, wherein:

[0201] the one or more configuration values ​​define the target equivalent circuit to include at least one of a series resistor, a series capacitor, a series inductor, and a parallel impedance network, the parallel impedance network including at least two of a parallel resistor, a parallel capacitor, and a parallel inductor connected together in parallel, each of those resistors, capacitors, and inductors being the impedance component,

[0202] Optionally wherein those of the series resistor, the series capacitor, the series inductor and the parallel impedance network present in the target equivalent circuit are connected in series.

[0203] A9. A driver circuit according to statement A8, wherein the one or more configuration values ​​define the target equivalent circuit to optionally only include:

[0204] the series resistor, wherein the series resistor has a negative resistance;

[0205] the series resistor and the series inductor connected together in series, wherein the series resistor has a negative resistance and the series inductor has a negative inductance;

[0206] the series resistor and the series inductor connected together in series and connected to the parallel impedance network, wherein the series resistor has a negative resistance and the series inductor has a negative inductance, and wherein the parallel impedance network includes the parallel resistor, the parallel capacitor, and the parallel inductor connected together in parallel;

[0207] the series resistor and the series capacitor connected together in series, wherein the series resistor has a negative resistance and the series capacitor has a positive capacitance; or

[0208] The series resistor, wherein the series resistor has a positive resistance, and wherein the positive resistance is substantially greater than a resistance of the electromechanical load, or greater than a resistance of a resistor representing a mechanical impedance of the electromechanical load in an equivalent circuit of the electromechanical load.

[0209] A10. A driving circuit according to any one of the preceding A statements, comprising: a controller, the controller being configured to:

[0210] generating the reference signal based on a drive input signal and based on a current drawn by the electromechanical load and / or a voltage across the electromechanical load; and / or

[0211] controlling the definition of the target output impedance based on the current drawn by the electromechanical load and / or the voltage across the electromechanical load such that a performance, such as a mechanical performance, of the electromechanical load meets a performance target; and / or

[0212] controlling definition of the target output impedance based on the current drawn by the electromechanical load and / or the voltage across the electromechanical load such that the target output impedance cancels an impedance of at least one electrical component of the electromechanical load, optionally a coil such as a voice coil; and / or

[0213] The definition of the target output impedance is controlled based on an impedance control signal, such that the performance of the driving circuit varies with the impedance control signal.

[0214] A11. The drive circuit according to any one of the preceding statements A, wherein the driver is configured to generate the drive output signal such that the drive output signal has a predefined relationship with a sum of the adjustment signal and the reference signal.

[0215] A12. A driving circuit according to any one of the preceding A statements, wherein:

[0216] The functional block is configured to generate a control signal having a predefined relationship with a sum of the adjustment signal and the reference signal; and

[0217] The driver is configured to generate the drive output signal such that the drive output signal has a predefined relationship with the control signal.

[0218] A13. A driver circuit according to statement A12, wherein:

[0219] The drive circuit is capable of selectively operating in an impedance drive mode or a current drive mode;

[0220] generating the control signal based on the reference signal and the adjustment signal when the driving circuit is in the impedance driving mode so that the driving output signal behaves as if the output impedance of the driving circuit has been adjusted to include the target output impedance; and

[0221] In the current drive mode, the functional block is configured to generate the control signal according to a current control reference signal and a current drawn by the electromechanical load, and to adjust the control signal based on the current drawn by the electromechanical load so that the current drawn by the electromechanical load has a predefined relationship with the current control reference signal.

[0222] A14. A driver circuit according to statement A12 or A13, wherein:

[0223] At least one of the control signal and the adjustment signal is a digital signal;

[0224] The control signal and the adjustment signal are digital signals, and the function block is a digital function block; and / or

[0225] The driving output signal is an analog signal.

[0226] A15. A drive circuit according to any one of statements A12 to A14, wherein:

[0227] The control signal is a digital signal; and

[0228] The driver includes a digital-to-analog converter and an analog amplifier connected together to convert the control signal into an analog signal, and then amplify the analog signal to form the drive output signal.

[0229] A16. A driving circuit according to any one of the preceding statements A, comprising: a monitoring unit, which is configured to generate a current monitoring signal indicating a current drawn by the electromechanical load and / or a voltage monitoring signal indicating a voltage across the electromechanical load, wherein the functional block is configured to digitally determine the adjustment signal based on the current monitoring signal and / or the voltage monitoring signal.

[0230] A17. A driving circuit according to any one of the preceding A statements, wherein:

[0231] The reference signal is indicative of an expected mechanical performance of the electromechanical load; and / or

[0232] the behavior of the drive output signal as if the output impedance of the driver circuit had been adjusted to include the target output impedance is an expected behavior relative to an expected drive output signal expected to be generated by the driver based on the reference signal in the absence of the adjustment signal; and / or

[0233] The drive circuit comprises one or more simulated impedance components connected to contribute to the output impedance of the drive circuit; and / or

[0234] The target output impedance is configured to counteract the impedance of at least one electrical component of the electromechanical load, optionally a coil such as a voice coil; and / or

[0235] The electromechanical load is an electromechanical device, such as an actuator; and / or

[0236] The electromechanical load is a resonant electromechanical load, such as a linear resonant actuator, a loudspeaker or a microspeaker.

[0237] A18. A driving circuit according to any one of the preceding A statements, wherein:

[0238] The driver forms part of a first control loop operable to control the driver output signal based on the reference signal;

[0239] the driver and the functional block form part of a second control loop operable to control the drive output signal based on a current drawn by the electromechanical load and / or a voltage across the electromechanical load; and

[0240] The second control loop is configured to have lower latency than the first control loop.

[0241] A19. A drive circuit according to statement A18, wherein at least a portion of the first control loop and at least a portion of the second control loop are implemented as digital circuits, and wherein the delays of the first control loop and the second control loop are defined by sampling rates of corresponding digital signals of the first control loop and the second control loop.

[0242] A20. A driving circuit according to any one of the preceding statements A, comprising: an analog impedance, the analog impedance being configured to form a portion of the output impedance of the driving circuit,

[0243] Optionally wherein the simulated impedance is a controllable simulated impedance, and the functional block is configured to control the controllable simulated impedance to adjust the output impedance of the drive circuit.

[0244] A21. The driver circuit of statement A20, configured to control a definition of the target output impedance and / or an impedance of the simulated impedance to control the output impedance of the driver circuit.

[0245] A22. A driving circuit according to any of the preceding A statements, which is implemented as an integrated circuit, such as on an IC chip.

[0246] A23. An IC chip comprising a driving circuit according to any one of the preceding A statements.

[0247] A24. A control system comprising:

[0248] A driving circuit according to any one of the preceding statements A; and

[0249] The electromechanical load,

[0250] Wherein the electromechanical load is connected to be driven by the drive output signal.

[0251] A25. A haptic system comprising a control system as recited in statement A24, wherein the electromechanical load is a linear resonant actuator coupled to a physical structure or surface of the system to produce a haptic effect for a user.

[0252] A26. A host device, such as a portable electrical or electronic device, comprising a drive circuit according to any one of statements A1 to A22, or an IC chip as described in statement A23, or a control system as described in statement A24, or a tactile system as described in statement A25.

[0253] A27. A method performed by a driver circuit to drive an electromechanical load with a driver output signal based on a digital reference signal, wherein the driver output signal induces a first electrical quantity at the electromechanical load, the method comprising:

[0254] digitally determining an adjustment signal based on the first electrical charge at a second sampling rate higher than the first sampling rate, the adjustment signal indicating a second electrical charge to be induced at a target output impedance of the driver circuit due to the first electrical charge; and

[0255] generating the drive output signal based on the reference signal and the adjustment signal so that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include the target output impedance,

[0256] Wherein the first electrical quantity is a current and the second electrical quantity is a voltage, or vice versa.

[0257] The present disclosure extends to the following set B of statements:

[0258] B1. A drive circuit for driving an electromechanical load with a drive output signal, the drive circuit comprising:

[0259] a first control loop operable to control the driver output signal based on a driver input signal; and

[0260] a second control loop operable to control the driver output signal based on a current flowing through the electromechanical load and / or a voltage induced across the electromechanical load,

[0261] Wherein the second control loop is configured to have lower latency than the first control loop.

[0262] B2. A drive circuit according to statement B1, wherein the second control loop is configured to control the drive output signal to compensate for the impedance of the electromechanical load.

[0263] B3. A drive circuit according to statement B1 or B2, wherein the second control loop is configured to control the drive output signal so that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include a target output impedance.

[0264] B4. A drive circuit according to statement B3, wherein the drive output signal is a voltage signal, and the second control loop is configured to perform its control of the drive output signal based on a voltage signal to be induced by the current across the target output impedance,

[0265] Optionally wherein the second control loop is configured to determine an adjustment signal indicative of the voltage signal based on the current, and to control the drive output signal based on the adjustment signal.

[0266] B5. A drive circuit according to statement B3, wherein the drive output signal is a current signal, and the second control loop is configured to perform its control on the drive output signal based on the current signal of the current induced by the voltage to flow through the target output impedance,

[0267] Optionally wherein the second control loop is configured to determine an adjustment signal indicative of the current signal based on the voltage, and to control the drive output signal based on the adjustment signal.

[0268] B6. A drive circuit according to any one of the preceding statements B, comprising a third control loop, the third control loop being operable to:

[0269] determining one or more configuration values ​​for defining the target output impedance based on the current and / or the voltage; and

[0270] The determined configuration value is provided to the second control loop to define the target output impedance.

[0271] B7. A drive circuit according to statement B6, wherein the delay of the second control loop is lower than the delay of the third control loop.

[0272] B8. The drive circuit according to any one of the preceding statements B, wherein the first control loop is configured to perform feedback control on the electromechanical load based on the current and / or the voltage.

[0273] B9. A drive circuit according to any one of the preceding statements B, wherein the first control loop is configured to perform feed-forward control of the electromechanical load.

[0274] B10. The driving circuit according to any one of the preceding statements B, wherein the second control loop is a feedback control loop, and the current and / or the voltage are feedback signals in the second control loop.

[0275] B11. A drive circuit according to any one of the preceding B statements, wherein at least a portion of the first control loop and at least a portion of the second control loop are implemented as digital circuits, and wherein the delays of the first control loop and the second control loop are defined by sampling rates of corresponding digital signals of the first control loop and the second control loop.

[0276] B12. A driving circuit according to any one of the preceding statements B, comprising:

[0277] a monitoring unit configured to monitor the current and / or the voltage and generate a monitoring signal indicative of the current and / or the voltage;

[0278] a controller operable to generate a reference signal based on the drive input signal and the monitoring signal;

[0279] a functional block operable to generate an adjustment signal based on the monitoring signal; and

[0280] A driver is operable to generate the drive output signal based on the reference signal and the adjustment signal.

[0281] B13. A drive circuit according to statement B12, wherein:

[0282] the first control loop comprising a first signal path extending from the monitoring unit to the driver via the controller, the first signal path carrying the monitoring signal and the reference signal;

[0283] the second control loop comprising a second signal path extending from the monitoring unit to the driver via the functional block, the second signal path carrying the monitoring signal and the adjustment signal;

[0284] at least one signal carried by the first control loop and one or more signals carried by the second control loop are digital signals; and

[0285] The one or more digital signals carried by the second control loop have a higher sampling rate than the at least one digital signal carried by the first control loop.

[0286] B14. A drive circuit according to statement B13, wherein:

[0287] at least one signal carried by the first control loop between the monitoring unit and the controller and at least one signal carried by the first control loop between the controller and the driver are digital signals; and

[0288] The one or more digital signals carried by the second control loop have a higher sampling rate than the at least one digital signal carried by the first control loop between the monitoring unit and the controller and / or the at least one signal carried by the first control loop between the controller and the driver.

[0289] B15. A drive circuit according to any one of statements B12 to B14, wherein:

[0290] The functional block is operable to generate a control signal based on the adjustment signal and the reference signal; and

[0291] The driver is operable to generate the drive output signal based on the control signal.

[0292] B16. A driving circuit according to any one of the preceding B statements, wherein:

[0293] The reference signal and / or the drive input signal are indicative of an expected mechanical performance of the electromechanical load; and / or

[0294] The electromechanical load is an electromechanical device, such as an actuator; and / or

[0295] The electromechanical load is a resonant electromechanical load, such as a linear resonant actuator, a loudspeaker or a microspeaker.

[0296] B17. A driving circuit according to any of the preceding B statements, which is implemented as an integrated circuit, such as on an IC chip.

[0297] B18. An IC chip comprising a driving circuit according to any one of the preceding B statements.

[0298] B19. A control system comprising:

[0299] A driving circuit according to any one of the preceding statements B; and

[0300] The electromechanical load,

[0301] Wherein the electromechanical load is connected to be driven by the drive output signal.

[0302] B20. A haptic system comprising a control system according to statement B19, wherein the electromechanical load is a linear resonant actuator coupled to a physical structure or surface of the system to produce a haptic effect for a user.

[0303] B21. A host device, such as a portable electrical or electronic device, comprising a drive circuit according to any one of statements B1 to B17, or an IC chip as described in statement B18, or a control system as described in statement B19, or a tactile system as described in statement B20.

[0304] B22. A method for driving an electromechanical load using a drive output signal, the method comprising:

[0305] controlling the drive output signal based on a drive input signal through a first control loop; and

[0306] controlling the drive output signal based on a current flowing through the electromechanical load and / or a voltage induced across the electromechanical load via a second control loop,

[0307] Wherein the second control loop is configured to have lower latency than the first control loop.

[0308] The present disclosure extends to a set C of the following statements:

[0309] C1. A drive circuit for driving an electromechanical load with a drive output signal based on a reference signal, wherein the drive output signal induces a first electrical quantity at the electromechanical load, the drive circuit comprising:

[0310] a functional block configured to digitally determine an adjustment signal based on the first electrical quantity, the adjustment signal indicating a second electrical quantity to be induced at a target output impedance of the driver circuit due to the first electrical quantity; and

[0311] a driver configured to generate the drive output signal based on the reference signal and the adjustment signal so that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include the target output impedance,

[0312] in:

[0313] The drive output signal is a voltage signal, the first electrical quantity is a current drawn by the electromechanical load, and the second electrical quantity is a voltage across the target output impedance; or

[0314] The drive output signal is a current signal, the first electrical quantity is a voltage across the electromechanical load, and the second electrical quantity is a current drawn by the target output impedance.

[0315] C2. A drive circuit for driving an electromechanical load with a drive output signal based on a reference signal, the drive output signal being a voltage signal and causing current to be drawn by the electromechanical load, the drive circuit comprising:

[0316] a functional block configured to digitally determine an adjustment signal based on the current, the adjustment signal being indicative of a voltage signal that will be induced by the current across a target output impedance of the driver circuit; and

[0317] A driver is configured to generate the drive output signal based on the reference signal and the adjustment signal so that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include the target output impedance.

[0318] C3. A driving circuit for driving a linear resonant actuator, the driving circuit comprising:

[0319] a function block configured to generate a digital control signal from a digital reference signal and a monitoring signal intended for controlling the linear resonant actuator; and

[0320] a driver configured to convert the digital control signal into an analog drive signal to drive the linear resonant actuator,

[0321] in:

[0322] The monitoring signal is indicative of a current flowing through the linear resonant actuator and / or a voltage across the linear resonant actuator; and

[0323] The functional block is configured to control a difference between the digital control signal and the digital reference signal based on the monitoring signal so that the analog drive signal has a target behavior when driving the linear resonant actuator, in which the analog drive signal behaves as if the output impedance of the drive circuit has been adjusted to include a target output impedance relative to a desired analog drive signal that is desired to be generated when the digital control signal is used as the digital reference signal.

[0324] C4. A drive circuit for driving an electromechanical load with a drive output signal based on a reference signal, the drive circuit being configured to generate the drive output signal based on digital operations according to the reference signal and the electrical quantity induced at the electromechanical load, so that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include a target output impedance.

[0325] C5. A drive circuit for driving an electromechanical load with a drive output signal based on a reference signal, wherein the drive output signal induces a first electrical quantity at the electromechanical load, the drive circuit comprising:

[0326] a functional block configured to digitally determine an adjustment signal based on the first electrical quantity, the adjustment signal indicating a second electrical quantity to be induced at a target output impedance of the driver circuit due to the first electrical quantity; and

[0327] A driver is configured to generate the drive output signal based on the reference signal and the adjustment signal so that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include the target output impedance.

[0328] C6. A drive circuit for driving an electromechanical load with a drive output signal based on a reference signal, the drive circuit being configured to digitally control the drive output signal based on the reference signal so that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include a predefined or predetermined target output impedance.

[0329] C7. A drive circuit for driving an electromechanical load with a drive output signal based on a reference signal, the drive circuit being configured to digitally control the drive output signal based on the reference signal and the electrical quantity at the electromechanical load so that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include a predefined or predetermined target output impedance.

Claims

1. A drive circuit for driving an electromechanical load with a drive output signal based on a digital reference signal at a first sampling rate, wherein the drive output signal induces a first electrical quantity at the electromechanical load, the drive circuit comprising: a functional block configured to digitally determine an adjustment signal based on the first electrical quantity at a second sampling rate higher than the first sampling rate, the adjustment signal indicating a second electrical quantity to be induced at a target output impedance of the driver circuit due to the first electrical quantity; as well as a driver configured to generate the drive output signal based on the digital reference signal and the adjustment signal such that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include the target output impedance, Wherein the first electrical quantity is a current and the second electrical quantity is a voltage, or vice versa.

2. The driving circuit according to claim 1, wherein: The drive output signal is a voltage signal, the first electrical quantity is a current drawn by the electromechanical load, and the second electrical quantity is a voltage across the target output impedance; or The drive output signal is a current signal, the first electrical quantity is a voltage across the electromechanical load, and the second electrical quantity is a current drawn by the target output impedance. 3 . The driving circuit according to claim 1 , wherein the functional block is configured to digitally determine the adjustment signal based on a definition of the first electrical quantity and the target output impedance. The driver circuit according to claim 3 , wherein the definition comprises one or more configuration values.

5. The driving circuit according to claim 4, comprising: A storage device is used to store the one or more configuration values, wherein the impedance value of the target output impedance is maintained when the one or more configuration values ​​stored in the storage device are maintained.

6. The driving circuit according to claim 4, wherein: A target equivalent circuit representing the target output impedance includes one or more impedance components and a circuit structure for connecting the one or more impedance components together; and The one or more configuration values ​​define at least one of the impedance components and / or the circuit structure.

7. The driving circuit according to claim 6, wherein: The target equivalent circuit includes a plurality of impedance components connected together; and The functional block is configured to: determining a plurality of adjustment sub-signals, each adjustment sub-signal representing a corresponding portion of the target equivalent circuit and indicating a portion of the second electrical quantity, which will be induced at the corresponding portion of the target equivalent circuit if the second electrical quantity is induced at the target equivalent circuit; and The adjustment signal is determined by combining the plurality of adjustment sub-signals.

8. The driving circuit according to claim 6, wherein: The one or more configuration values ​​define the target equivalent circuit to include at least one of a series resistor, a series capacitor, a series inductor, and a parallel impedance network, the parallel impedance network including at least two of a parallel resistor, a parallel capacitor, and a parallel inductor connected together in parallel, each of those resistors, capacitors, and inductors being the impedance component.

9. The driving circuit according to claim 8, wherein the one or more configuration values ​​define the target equivalent circuit to include only: the series resistor, wherein the series resistor has a negative resistance; the series resistor and the series inductor connected together in series, wherein the series resistor has a negative resistance and the series inductor has a negative inductance; the series resistor and the series inductor connected together in series and connected to the parallel impedance network, wherein the series resistor has a negative resistance and the series inductor has a negative inductance, and wherein the parallel impedance network includes the parallel resistor, the parallel capacitor, and the parallel inductor connected together in parallel; the series resistor and the series capacitor connected together in series, wherein the series resistor has a negative resistance and the series capacitor has a positive capacitance; or The series resistor, wherein the series resistor has a positive resistance, and wherein the positive resistance is greater than a resistance of the electromechanical load, or greater than a resistance of a resistor representing a mechanical impedance of the electromechanical load in an electromechanical load equivalent circuit.

10. The driving circuit according to claim 1 or 2, comprising: A controller, the controller being configured to: generating the digital reference signal based on a drive input signal and based on a current drawn by the electromechanical load and / or a voltage across the electromechanical load; and / or controlling the definition of the target output impedance based on the current drawn by the electromechanical load and / or the voltage across the electromechanical load such that performance of the electromechanical load meets a performance target; and / or controlling definition of the target output impedance based on the current drawn by the electromechanical load and / or the voltage across the electromechanical load such that the target output impedance cancels an impedance of at least one electrical component of the electromechanical load; and / or The definition of the target output impedance is controlled based on an impedance control signal, such that the performance of the driving circuit varies with the impedance control signal. 11 . The driving circuit according to claim 1 , wherein the driver is configured to generate the driving output signal such that the driving output signal has a predefined relationship with a sum of the adjustment signal and the digital reference signal.

12. The driving circuit according to claim 1 or 2, wherein: The functional block is configured to generate a control signal having a predefined relationship with a sum of the adjustment signal and the digital reference signal; and The driver is configured to generate the drive output signal such that the drive output signal has a predefined relationship with the control signal.

13. The driving circuit according to claim 12, wherein: The drive circuit is capable of selectively operating in an impedance drive mode or a current drive mode; generating the control signal based on the digital reference signal and the adjustment signal when the driving circuit is in the impedance driving mode so that the driving output signal behaves as if the output impedance of the driving circuit has been adjusted to include the target output impedance; and In the current drive mode, the functional block is configured to generate the control signal according to a current control reference signal and a current drawn by the electromechanical load, and to adjust the control signal based on the current drawn by the electromechanical load so that the current drawn by the electromechanical load has a predefined relationship with the current control reference signal.

14. The driving circuit according to claim 12, wherein: At least one of the control signal and the adjustment signal is a digital signal; and / or The driving output signal is an analog signal.

15. The driving circuit according to claim 12, wherein: The control signal is a digital signal; and The driver includes a digital-to-analog converter and an analog amplifier connected together to convert the control signal into an analog signal, and then amplify the analog signal to form the drive output signal.

16. The driving circuit according to claim 1 or 2, comprising: a monitoring unit configured to generate a current monitoring signal indicative of a current drawn by the electromechanical load and / or a voltage monitoring signal indicative of a voltage across the electromechanical load, wherein the functional block is configured to digitally determine the adjustment signal based on the current monitoring signal and / or the voltage monitoring signal.

17. The driving circuit according to claim 1 or 2, wherein: The digital reference signal is indicative of an expected mechanical performance of the electromechanical load; and / or the behavior of the driver output signal as if the output impedance of the driver circuit had been adjusted to include the target output impedance is relative to an expected behavior of an expected driver output signal expected to be generated by the driver based on the digital reference signal in the absence of the adjustment signal; and / or The drive circuit comprises one or more simulated impedance components connected to contribute to the output impedance of the drive circuit; and / or The target output impedance is configured to offset the impedance of at least one electrical component of the electromechanical load; and / or The electromechanical load is an electromechanical device.

18. The driving circuit according to claim 1 or 2, wherein: the driver forming part of a first control loop operable to control the driver output signal based on the digital reference signal; the driver and the functional block forming part of a second control loop operable to control the drive output signal based on a current drawn by the electromechanical load and / or a voltage across the electromechanical load; and The second control loop is configured to have lower latency than the first control loop.

19. The drive circuit of claim 18, wherein at least a portion of the first control loop and at least a portion of the second control loop are implemented as digital circuits, and wherein the delays of the first control loop and the second control loop are defined by sampling rates of respective digital signals of the first control loop and the second control loop.

20. The driving circuit according to claim 1 or 2, comprising: A simulated impedance is configured to form a portion of the output impedance of the driver circuit. 21 . The driving circuit according to claim 20 , configured to control a definition of the target output impedance and / or an impedance of the simulated impedance to control the output impedance of the driving circuit.

22. The driving circuit according to claim 1 or 2, which is implemented as an integrated circuit.

23. The driving circuit according to claim 7, wherein: If the second electrical quantity is the voltage across the target output impedance, then the portion of the second electrical quantity is the voltage across the corresponding portion of the target equivalent circuit; and If the second charge is the current drawn by the target output impedance, then the portion of the second charge is the current drawn by the corresponding portion of the target equivalent circuit.

24. The driving circuit according to claim 8, wherein those of the series resistor, the series capacitor, the series inductor, and the parallel impedance network present in the target equivalent circuit are connected in series.

25. The driving circuit according to claim 10, wherein the controller is further configured to: Definition of the target output impedance is controlled based on the current drawn by the electromechanical load and / or the voltage across the electromechanical load such that a mechanical performance of the electromechanical load meets a performance target.

26. The driving circuit according to claim 10, wherein the controller is further configured to: Definition of the target output impedance is controlled based on the current drawn by the electromechanical load and / or the voltage across the electromechanical load such that the target output impedance cancels the impedance of the coil.

27. The drive circuit of claim 26, wherein the coil is a voice coil. 28 . The driving circuit according to claim 14 , wherein the control signal and the adjustment signal are digital signals, and the functional block is a digital functional block.

29. The driving circuit according to claim 17, wherein: The target output impedance is configured to cancel the impedance of the coil.

30. The drive circuit of claim 29, wherein the coil is a voice coil.

31. The drive circuit of claim 17, wherein the electromechanical device is an actuator.

32. The drive circuit of claim 17, wherein the electromechanical device is a resonant electromechanical load.

33. The drive circuit of claim 32, wherein the resonant electromechanical load is a linear resonant actuator or a loudspeaker.

34. The driving circuit of claim 20, wherein the simulated impedance is a controllable simulated impedance, and the functional block is configured to control the controllable simulated impedance to adjust the output impedance of the driving circuit.

35. The drive circuit of claim 22 implemented as an integrated circuit on an IC chip.

36. The drive circuit of claim 32, wherein the resonant electromechanical load is a microspeaker.

37. An IC chip comprising the driving circuit according to any one of claims 1 to 36.

38. A control system comprising: A drive circuit according to any one of claims 1 to 36; as well as The electromechanical load, Wherein the electromechanical load is connected to be driven by the drive output signal.

39. A haptic system comprising the control system of claim 38, wherein the electromechanical load is a linear resonant actuator coupled to a physical structure or surface of the haptic system to produce a haptic effect for a user.

40. A host device comprising the driving circuit according to any one of claims 1 to 36, or the IC chip according to claim 37, or the control system according to claim 38, or the haptic system according to claim 39.

41. The host device of claim 40, wherein the host device is a portable electrical or electronic device.

42. A method performed by a driver circuit for driving an electromechanical load with a driver output signal based on a digital reference signal at a first sampling rate, the driver output signal inducing a first electrical quantity at the electromechanical load, the method comprising: digitally determining an adjustment signal based on the first electrical quantity at a second sampling rate higher than the first sampling rate, the adjustment signal indicating a second electrical quantity to be induced at a target output impedance of the driver circuit due to the first electrical quantity; as well as generating the drive output signal based on the digital reference signal and the adjustment signal so that the drive output signal behaves as if the output impedance of the drive circuit has been adjusted to include the target output impedance, Wherein the first electrical quantity is a current and the second electrical quantity is a voltage, or vice versa.

Images