SOC Simulation Verification and Method for Establishing Verification Environment of SOC Simulation Verification Equipment

By porting the minimum system device module to the boot startup program and operating system in the SOC simulation verification device, and remotely connecting the network file system to load the verification program file, the problems of low testing efficiency and long loading time of verification program files in the existing technology are solved, and the efficiency of multi-user parallel verification and system-level combination verification is achieved.

CN113657068BActive Publication Date: 2025-06-27KYLAND TECH CO LTD
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Patent Information

Application Number
CN202010397156.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-05-12
Publication Date
2025-06-27
Estimated Expiration
2040-05-12

AI Technical Summary

Technical Problem

The existing SOC simulation verification technology requires exclusive hardware resources, low testing efficiency, and slow communication rate of simulation verification equipment, long loading time for verification program files, and cumbersome format conversion and restart processes.

Method used

Verification tests of other SOC device modules are realized by migrating the minimum system device module of the SOC in the simulation verification device to the boot startup program and the operating system, and remotely connecting the network file system to load the verification program file when the operating system starts.

Benefits of technology

It supports multi-user parallel verification, shortens verification testing time, improves verification testing efficiency, reduces hardware equipment costs, and supports system-level combined verification.

✦ Generated by Eureka AI based on patent content.

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Abstract

An embodiment of the present invention discloses a method for building a verification environment for SOC simulation verification and an SOC simulation verification device. The SOC simulation verification method includes: loading a bootloader; wherein, the bootloader has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device; loading an operating system; wherein, the operating system has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device; when starting the operating system through the bootloader, remotely connecting to a network file system through the operating system; when receiving at least one verification instruction for other device modules of the SOC except for the minimum system device modules, loading a verification program file matching the verification instruction from the network file system, and running the verification program file to perform verification tests on other device modules of the SOC, which can shorten the time for loading the verification program file, support multi-user parallel verification, improve the verification test efficiency, and support system-level combined verification.
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Description

Technical Field

[0001] The embodiments of the present invention relate to the technical field of SOC verification testing, and in particular, to a method for building a verification environment for SOC simulation verification and a simulation verification device of an SOC. Background Art

[0002] With the development of information technology and semiconductor technology, consumer electronic products are becoming increasingly miniaturized, with increasingly complex functions, more and more supported interfaces, and continuously decreasing power consumption. The main factor driving this change is the development of system-on-a-chip (SoC) technology. An SoC refers to integrating a complete system on a single chip. Current chip manufacturing technology is sufficient to integrate multiple processor cores, controllers, and acceleration engines, etc. on a chip the size of a fingernail, and the applications it supports are sufficient to compare with an ordinary personal computer. The many functions completed by the SoC result in a very complex internal structure of the chip, and the application software supporting the chip is also extremely complex. Effective verification methods are indispensable to address these challenges.

[0003] Simulation testing is an important part of SoC verification. In related technologies, an SOC can be simulated by a simulation verification device, and verification testing can be performed on the SOC in the simulation verification device. Among them, the simulation verification device can be a Palladium device. In related technologies, as Figure 1a shown, when performing verification testing on the SOC in the simulation verification device (Palladium device), the following methods can be adopted. One is that a simulator (Joint Test Action Group JTAG simulator) loads a verification program file that can run independently of the operating system into the simulation verification device through an I / O board, and the CPU on the simulation verification device directly runs the verification program file to implement the verification of the SOC; another method is that the simulation verification device performs verification testing by loading a verification program file that can run independently of the operating system in the background. However, the above two methods require exclusive use of all hardware resources, and only serial time-sharing verification can be performed in one set of environment. Users responsible for testing different modules need to queue up, and the testing efficiency is relatively low.

[0004] Moreover, the simulator needs to rely on the support of the I / O board, and the simulation rate of the simulation verification device itself is relatively low, resulting in a relatively low communication rate between the simulator and the simulation verification device, and a long time is required for loading the verification program file; and by the method of loading the verification program file in the background of the simulation verification device, the verification program file needs to be format-converted, and the simulation verification device needs to be restarted each time the verification program file is loaded, and the overall loading is cumbersome and takes even longer. Summary of the Invention

[0005] The embodiment of the present invention provides a method for building a verification environment of an SOC simulation verification and an SOC simulation verification device, which can shorten the time for loading verification program files, support multi-user parallel verification, effectively shorten the verification test time, improve the verification test efficiency, and support system-level combined verification.

[0006] In a first aspect, the embodiment of the present invention provides a method for SOC simulation verification of a system-on-chip, including:

[0007] The simulation verification device loads a bootloader; wherein, the bootloader has transplanted the driver of the minimum system device module of the SOC in the simulation verification device to drive the minimum system device module, so that the bootloader can be started normally;

[0008] The simulation verification device loads an operating system; wherein, the operating system has transplanted the driver of the minimum system device module of the SOC in the simulation verification device to drive the minimum system device module, so that the operating system can be started normally;

[0009] When the simulation verification device starts the operating system through the bootloader, it remotely connects to the network file system through the operating system;

[0010] When the simulation verification device receives at least one verification instruction for other device modules of the SOC except the minimum system device module, it loads a verification program file matching the verification instruction from the network file system, and runs the verification program file to operate on the other device modules of the SOC to complete the verification test of the other device modules of the SOC.

[0011] In a second aspect, the embodiment of the present invention further provides a method for building a verification environment of an SOC simulation verification device of a system-on-chip, including:

[0012] The simulation verification device loads a bootloader; wherein, the bootloader has transplanted the driver of the minimum system device module of the SOC in the simulation verification device to drive the minimum system device module, so that the bootloader can be started normally;

[0013] The simulation verification device loads an operating system; wherein, the operating system has transplanted the driver of the minimum system device module of the SOC in the simulation verification device to drive the minimum system device module, so that the operating system can be started normally;

[0014] When the simulation verification device starts the operating system through the bootloader, it remotely connects to the network file system through the operating system; wherein, the network file system includes verification program files for other device modules of the SOC except the minimum system device module.

[0015] In a third aspect, an embodiment of the present invention provides a simulation verification device for a System on Chip (SOC), including:

[0016] A first loading module, configured to load a boot program; wherein, the boot program has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules, so that the boot program can be started normally;

[0017] A second loading module, configured to load an operating system; the operating system has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules, so that the operating system can be started normally;

[0018] A connection module, configured to remotely connect to a network file system through the operating system when starting the operating system through the boot program;

[0019] A verification module, configured to, when receiving at least one verification instruction for other device modules of the SOC except the minimum system device modules, load a verification program file matching the verification instruction from the network file system, and run the verification program file to operate on the other device modules of the SOC to complete the verification test of the other device modules of the SOC.

[0020] In a fourth aspect, an embodiment of the present invention provides a device for building a simulation verification environment for a simulation verification device of a System on Chip (SOC), including:

[0021] A first loading module, configured to load a boot program; wherein, the boot program has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules, so that the boot program can be started normally;

[0022] A second loading module, configured to load an operating system; the operating system has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules, so that the operating system can be started normally;

[0023] A connection module, configured to remotely connect to a network file system through the operating system when starting the operating system through the boot program;

[0024] In a fifth aspect, an embodiment of the present invention provides a simulation verification device, including:

[0025] One or more processors;

[0026] A storage device, configured to store one or more programs,

[0027] When the one or more programs are executed by the one or more processors, the one or more processors implement a simulation verification method for a system on chip (SOC) provided by an embodiment of the present invention, or a method for building a verification environment for a simulation verification device of a system on chip (SOC) provided by an embodiment of the present invention.

[0028] In a sixth aspect, an embodiment of the present invention provides a computer-readable storage medium, on which a computer program is stored. When the program is executed by a processor, it implements a simulation verification method for a system on chip (SOC) provided by an embodiment of the present invention, or a method for building a verification environment for a simulation verification device of a system on chip (SOC) provided by an embodiment of the present invention.

[0029] In the embodiment of the present invention, by transplanting the minimum system device module of the SOC in the simulation verification device into the bootloader and the operating system, and transplanting the bootloader and the operating system into the simulation verification device. When the operating system starts, it can obtain a verification program file matching the verification instruction by remotely connecting to the network file system for verification testing, support multi-user parallel verification, effectively shorten the verification testing time, and improve the verification testing efficiency. By remotely connecting to the network file system and loading the verification program file from the network file system, there is no need for cumbersome steps, and the high bandwidth of the network greatly shortens the loading time of the verification program file, which can effectively improve the verification efficiency, and can support remote verification. Users do not have to be in the computer room, effectively reducing the labor intensity of the verification work; only one set of hardware environment can support multi-user parallel verification work, which can be time-shared and multiplexed, effectively saving the hardware device cost required for the parallel verification environment; by loading the operating system into the simulation verification device, the operating system can support a large number of open-source codes and can be directly used after simple transplantation, effectively reducing the development workload of the verification program file that can run independently of the operating system and completely relying on self-coding. And the operating system supports running different verification program files simultaneously, thus supporting system-level combined verification. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1a is a schematic diagram of verifying and testing the SOC in the simulation verification device in the prior art;

[0031] Figure 1b is a flowchart of a simulation verification method for a system on chip (SOC) provided by an embodiment of the present invention;

[0032] Figure 1c is a flowchart of successfully starting the Uboot system during the process of transplanting the Uboot system;

[0033] Figure 1d is a flowchart of successfully starting the LINUX kernel system in the simulation verification device during the process of transplanting and tailoring the LINUX kernel system;

[0034] Figure 1e It is a schematic diagram of multi - user parallel verification provided by an embodiment of the present invention;

[0035] Figure 2a It is a flowchart of a simulation verification method for a system - on - chip (SoC) provided by an embodiment of the present invention;

[0036] Figure 2b It is a flowchart of the Palladium device entering the Root login interface of the LINUX kernel system provided by an embodiment of the present invention;

[0037] Figure 3 It is a flowchart of a method for building a verification environment for a simulation verification device of a system - on - chip (SOC) provided by an embodiment of the present invention;

[0038] Figure 4 It is a structural block diagram of a simulation verification device for a system - on - chip (SOC) provided by an embodiment of the present invention;

[0039] Figure 5 It is a structural block diagram of a device for building a verification environment for a simulation verification device of a system - on - chip (SOC) provided by an embodiment of the present invention;

[0040] Figure 6 It is a schematic structural diagram of a simulation verification device provided by an embodiment of the present invention. Detailed implementation manners

[0041] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It can be understood that the specific embodiments described herein are only for explaining the present invention, rather than limiting the present invention. Additionally, it should be noted that for the sake of description, only parts related to the present invention rather than all structures are shown in the drawings.

[0042] Figure 1b It is a flowchart of a simulation verification method for a system - on - chip (SOC) provided by an embodiment of the present invention. The method can be executed by a simulation verification device for a system - on - chip (SOC). The device can be configured on a simulation verification device, and the method can be applied to a scenario where multiple users parallelly verify and test the SOC module on the simulation verification device.

[0043] As Figure 1b shown, the technical solutions provided by the embodiments of the present invention include:

[0044] S110: The simulation verification device loads a bootloader; wherein, the bootloader has transplanted the drivers of the minimum - system device modules of the SOC in the simulation verification device to drive the minimum - system device modules so that the bootloader can be started normally.

[0045] In an embodiment of the present invention, optionally, the simulation verification device may be a Palladium device. The Palladium device may be Palladium Z1. Among them, the Palladium device can correctly simulate digital logic, and can handle multiple clocks and asynchronous clocks. Compared with the traditional electronic design automation (EDA) circuit simulation, the operating speed of the Palladium device is about 100 kHz to 1000 kHz, which is 100 to 1000 times faster than the traditional EDA circuit simulation; compared with the traditional field-programmable gate array (FPGA)-based hardware accelerator, the Palladium device has a fast compilation speed, strong debugging ability, and supports multiple users. Among them, the bootloader may be a Uboot system, and the operating system may be an IINUX kernel system. Among them, the operating system is not limited to the LINUX operating system, and the bootloader is not limited to the Uboot system either.

[0046] In an embodiment of the present invention, optionally, the driver of the minimum system device module in the SOC of the simulation verification device may be transplanted into the bootloader to drive the minimum system device module in the SOC. When the bootloader starts up normally, it needs to rely on the minimum system device module in the SOC. Therefore, it is necessary to transplant the driver of the minimum system device module into the bootloader to drive the minimum system device module, so as to realize the normal startup of the bootloader. Among them, the minimum system device module may include a timer (TIMER), a universal asynchronous receiver / transmitter (UART), a serial peripheral interface (SPI) bus controller, a gigabit Ethernet controller (GMAC), a serial peripheral interface flash (SPI Falsh) model, a double data rate synchronous dynamic random access memory (DDR) model, an embedded multimedia card (EMMC) model, a central processing unit (CPU) (ck810) kernel, and a memory management unit (MMU). Among them, the DDR model may be a DDR3 model.

[0047] S120: The simulation verification device loads the operating system; wherein, the driver of the minimum system device module in the SOC of the simulation verification device is transplanted into the operating system to drive the minimum system device module, so that the operating system starts up normally.

[0048] In an embodiment of the present invention, the operating system can be transplanted and trimmed so that the transplanted and trimmed operating system can support the kernel configuration of a remote login (Telnet) server and a network file system, and the driver of the minimum system device module in the SOC of the simulation verification device is transplanted into the operating system to drive the minimum system device module in the SOC. When the operating system starts up normally, it needs to rely on the minimum system device module in the SOC. Therefore, it is necessary to transplant the driver of the minimum system device module into the operating system to drive the minimum system device module, so as to realize the normal startup of the operating system.

[0049] S130: When the simulation verification device starts the operating system through the bootloader, remotely connect to the network file system through the operating system.

[0050] In an embodiment of the present invention, specifically, initialize the minimum system device module on the simulation verification device to normally start the bootloader, and load the kernel file of the operating system through the bootloader to start the operating system. Among them, the network file system can be remotely connected through the Telnet protocol for remote login.

[0051] In an embodiment of the present invention, optionally, before remotely connecting to the network file system through the operating system, it further includes: registering device drivers for the minimum system device module and other SOC device modules in the simulation verification device through the operating system. Among them, when device drivers for the minimum system device module and other SOC device modules in the simulation verification device are registered through the operating system, the operating system can manage the minimum system device module and other SOC device modules respectively.

[0052] In an embodiment of the present invention, optionally, registering device drivers for the minimum system device module and other SOC device modules in the simulation verification device through the operating system includes: parsing the device tree file loaded by the bootloader through the operating system, creating the minimum system device module and other SOC device modules based on the device tree file, registering the created minimum system device module and other SOC device modules, and registering the drivers corresponding to the minimum system device module and other SOC device modules respectively.

[0053] Specifically, when the bootloader is the Uboot system and the operating system is the LINUX kernel system, the Uboot system loads the device tree file. After the LINUX kernel system starts, it loads the device tree file from the Uboot system, parses the device tree file, and creates the devices specified in the device tree file, which can be the minimum system device module and other SOC device modules. Then register the created devices in the device manager, search for the corresponding device drivers, and register the corresponding device drivers. Among them, all devices used in the operating system are mounted in the device manager. When a new device needs to be added, the new device needs to be registered in the device manager. After the new device and the corresponding device are registered, the operating system can manage the device through the device driver.

[0054] In an embodiment of the present invention, when the transplanted bootloader is the Uboot system, the process of successfully starting the Uboot system during the transplantation of the Uboot system can refer to Figure 1c , such asFigure 1c As shown in the figure, the process of successfully starting the Uboot system in the simulation verification device can be as follows: initialize the CPU core, initialize the MMU, initialize the timer TIMER, initialize the DDR3 model, initialize the SPI bus controller, initialize the SPI Flash model, initialize the UART, initialize the EMMC model, initialize the GMAC, and initialize the Uboot general components, and then enter the Uboot menu.

[0055] Among them, when the operating system is the LINUX kernel system, the process of successfully starting the LINUX kernel system in the simulation verification device during the process of porting and tailoring the LINUX kernel system can refer to Figure 1d As Figure 1d shown, the process of successfully starting the LINUX kernel system in the simulation verification device can be as follows: initialize the CPU (ck810) core, initialize the MMU, register the timer TIMER device driver, register the SPI bus controller device driver, register the SPI Flash model device driver, register the UART device driver, register the EMMC model device driver, register the GMAC device driver, and initialize and mount the network file system for the LINUX general components. Among them, the network file system can be built before porting and tailoring the operating system, and the network file system can store verification program files, etc.

[0056] S140: When the simulation verification device receives at least one verification instruction for other SOC device modules except the minimum system device module, load the verification program file matching the verification instruction from the network file system, and run the verification program file to operate on the other SOC device modules to complete the verification test of the other SOC device modules.

[0057] In an implementation manner of the embodiment of the present invention, optionally, when the simulation verification device receives at least one verification instruction for other SOC device modules except the minimum system device module, loading the verification program file matching the verification instruction from the network file system includes: when the simulation verification device receives at least one verification instruction for the registered other SOC device modules through the remote login daemon process, load the verification program file matching the verification instruction from the root file system of the network file system through the network file system NFS client.

[0058] Specifically, as Figure 1eAs shown, the user can remotely log in to the verification system in the simulation verification device through the remote login client in their own device, and input verification instructions for other SOC device modules except the minimum system device module. Among them, other SOC device modules have been registered in the operating system of the simulation verification device. Among them, multiple users can remotely log in to the verification system in the simulation verification device, and each user can input verification instructions for other SOC device modules. The verification instructions input by each user can be different. The simulation verification device receives at least one verification instruction for the registered other SOC device modules through the remote login Telnetd daemon process. The verification instruction can be passed to the operating system through a pseudo-terminal. The operating system sends a verification request matching the verification instruction to the compilation server through the NFS client. When the compilation server receives this request, it sends this request to the NFS server through the operating system. The NFS server parses this request, queries the verification program file matching this request from the root file system, and feeds back the verification file to the simulation verification device through the operating system and network of the compilation server, so that the simulation verification device runs the verification program file. Among them, the pseudo-terminal can be used for communication between the Telnetd daemon process and the operating system.

[0059] In the embodiment of the present invention, when the operating system loads the verification program file matching the verification instruction, it operates the verification program file to operate on other SOC device modules to complete the verification test of other SOC device modules. For example, when configuring the data of the SOC module in the simulation verification device, the configuration data can be read from the SOC module and compared with the actual configuration data to obtain the verification test result of the SOC module.

[0060] In the related art, when verifying the SOC in the simulation verification device (Palladium device), the verification of the SOC can adopt the following methods. One is that the emulator (Joint Test Action Group JTAG emulator) loads the verification program file into the simulation verification device through the I / O board, and the simulation verification device runs the verification program file to implement the verification of the SOC; another method is that the simulation verification device performs the verification test by loading the verification program file in the background. However, the above two methods require exclusive use of all hardware resources. Only serial time-sharing verification can be performed in one set of environment, and users responsible for testing different modules need to queue up, resulting in low test efficiency. In the embodiment of the present invention, the minimum system device module of the SOC in the simulation verification device is transplanted into the bootloader and the operating system, and the bootloader and the operating system are transplanted into the simulation verification device. After the operating system is started, it can obtain the verification program file matching the verification instruction through remote connection to the network file system for verification test, which can support parallel verification of multiple users and improve the verification test efficiency.

[0061] In the related art, the emulator needs to rely on the support of the I / O board, and the simulation rate of the simulation verification device itself is relatively low, resulting in a low communication rate between the emulator and the simulation verification device, and a long time is required to load the verification program file. Moreover, by the method of loading the verification program file in the background of the simulation verification device, the verification program file needs to be format-converted, and the simulation verification device needs to be restarted every time the verification program file is loaded, the overall loading is cumbersome and the loading time is longer. In addition, the simulation verification device is huge and requires constant-temperature working conditions, etc., and usually needs to be placed in a computer room. Due to the limitation of the cable length between the emulator and the I / O board, users usually need to perform verification and debugging in the computer room, and users need to endure the adverse working conditions such as huge noise and narrow space of the computer room equipment for a long time. In the embodiment of the present invention, by remotely connecting to the network file system and loading the verification program file from the network file system, there is no need for cumbersome steps, and the high bandwidth of the network greatly shortens the loading time of the verification program file, which can effectively improve the verification efficiency, and can support remote verification, so that users do not have to be in the computer room, effectively reducing the labor intensity of the verification work.

[0062] In the related art, in order to accelerate the verification speed, when parallel verification needs to be carried out, multiple sets of verification hardware environments need to be independently installed, and it is necessary to spend a large cost to purchase multiple sets of emulators and I / O boards, as well as a larger-capacity simulation verification device to support parallel verification. Among them, the current cost of purchasing an I / O board is about 50,000 US dollars, and the cost of a larger-capacity simulation verification device is at least in the millions of US dollars, and the overall cost is high. Moreover, the maximum number of multi-users for parallel verification tests is directly limited by the circuit logic simulation capacity of the simulation verification device. For example, a simulation verification device with a gate level of ten million can be distributed to at most 10 circuit logic simulations with a gate level of one million at the same time, and a simulation verification device with a gate level of one billion can be distributed to at most 10 circuit logic simulations with a gate level of ten million at the same time. In the embodiment of the present invention, by transplanting the minimum system device module of the SOC in the simulation verification device into the boot program and the operating system, and transplanting the boot program and the operating system into the simulation verification device; and when the operating system starts, the verification program file matching the verification instruction can be obtained by remotely connecting to the network file system for verification testing, which can support multi-user parallel verification, and only one set of hardware environment is required to support multi-user parallel verification work, and time-sharing multiplexing can be performed, which can effectively save the hardware device cost required for the parallel verification environment.

[0063] In the related art, for the method of verification using the above traditional method, since the simulation verification device does not have the support of the system software, it is difficult to find available open-source code. Developers need to develop a large number of verification programs by themselves, and more developers are required to participate in cooperation to complete. Moreover, the usually developed verification programs are independent unit test verification applets that need to be loaded and run one by one. It is difficult to perform combined verification in parallel between different functional modules, and it is only suitable for isolated unit-level test verification. The technical solution provided by the embodiment of the present invention effectively reduces the workload of self-coding of the verification program by loading the operating system into the simulation verification device. The operating system can support a large number of open-source codes and can be directly used after simple transplantation. Moreover, the operating system supports running different verification programs simultaneously, thereby supporting system-level combined verification.

[0064] Figure 2a It is a flowchart of a simulation verification method for a system-on-chip (SoC) provided by an embodiment of the present invention. In this embodiment, optionally, the simulation verification device is a Polladium device, the bootloader is a Uboot system, and the operating system is a LINUX kernel system. As Figure 2a shown, the technical solution provided by the embodiment of the present invention includes:

[0065] S210: Transplant the drivers of the minimum system device modules of the SOC in the Palladium simulation verification device into the Uboot system.

[0066] Among them, the minimum system device modules include a timer (TIMER), a UART, an SPI bus controller, a GMAC, a SPIFalsh model, a DDR model, an EMMC model, a CPU (ck810) kernel, and a memory management unit (MMU). Among them, the process of successfully starting the Uboot system during the transplantation of Uboot can refer to Figure 1b , and the detailed introduction can refer to the above embodiment.

[0067] S220: Build a remote network file system.

[0068] Among them, the network file system stores various files and data, including verification program files, etc. Among them, the network file system can be built in a remote login Telnet server.

[0069] S230: Transplant the drivers of the minimum system device modules of the SOC in the Palladium device into the LINUX kernel system, and transplant and trim the LINUX kernel system so that the LINUX kernel system supports the configuration items of the Telnet server and the network file system.

[0070] In the embodiments of the present invention, the LINUX kernel system can be transplanted and trimmed, and it is only necessary to support the Telnet server and the network file system. For other introductions, reference can be made to the above embodiments.

[0071] S240: Convert the generated Uboot system, device tree file, and the trimmed LINUX kernel system files into a text format recognizable by the Palladium device, and store them in the specified location of the SPI Flash model or the EMMC model. When the Palladium device starts, the stored files automatically run and enter the Root login interface of the LINUX kernel system.

[0072] In the embodiments of the present invention, optionally, the process for the Palladium device to enter the Root login interface of the LINUX kernel system can refer to Figure 2b , as Figure 2b shown, the process can be: the Uoot system starts, the Uboot loads the device tree file, the Uboot system loads the LINUX kernel system, the device drivers of the LINUX kernel system are registered, the general components of the LINUX system are initialized, the network file system is mounted, and the Root login interface is entered. Among them, the user can remotely access the Root login interface to log in to the authentication system. Among them, the registration of the device drivers of the LINUX kernel system can refer to the registration of the device drivers of the minimum system device module and other device modules of the SOC in the Palladium device. For details, refer to the introduction in the above embodiments.

[0073] S250: When the Palladium device receives at least one verification instruction for other device modules of the SOC except for the minimum system device module, load the verification program file matching the verification instruction from the network file system, and run the verification program file to operate on other device modules of the SOC to complete the verification test of other device modules of the SOC.

[0074] Among them, the introduction of S250 can refer to the above embodiments.

[0075] The technical solution provided by the embodiment of the present invention is to transplant the minimum system device module of the SOC in the Palladium device into the Uboot system and the LINUX kernel system, and transplant the Uboot system and the LINUX kernel system into the Palladium device. When the LINUX kernel system starts, it can obtain the verification program file matching the verification instruction by remotely connecting to the network file system for verification testing, which can support parallel verification of multiple users, effectively shorten the verification time, and improve the verification testing efficiency. By remotely connecting to the network file system and loading the verification program file from the network file system, there is no need for cumbersome steps, and the high bandwidth of the network greatly shortens the loading time of the verification program file, which can effectively improve the verification efficiency and support remote verification, so that users do not have to be in the computer room, effectively reducing the labor intensity of the verification work.

[0076] In the embodiment of the present invention, by transplanting the minimum system device module of the SOC in the Palladium device into the Uboot system and the LINUX kernel system, and transplanting the Uboot system and the LINUX kernel system into the Palladium device, when the LINUX kernel system starts, it can obtain the verification program file matching the verification instruction by remotely connecting to the network file system for verification testing. Only one set of hardware environment is required to support parallel verification work of multiple users, which can be time-division multiplexed, effectively saving the hardware device cost required for the parallel verification environment. By loading the LINUX kernel system into the Palladium device, the LINUX kernel system can support a large number of open-source codes and can be directly used after simple transplantation, effectively reducing the workload of self-coding of the verification program. Moreover, the LINUX kernel system supports running different verification test programs simultaneously, thus supporting system-level combined verification.

[0077] Figure 3 It is a flowchart of a method for building a verification environment of a simulation verification device for a system on chip (SOC) provided by an embodiment of the present invention. The method can be executed by a device for building a verification environment of a simulation verification device for a system on chip (SOC), and the device can be configured in the simulation verification device. As Figure 3 shown, the technical solution provided by the embodiment of the present invention includes:

[0078] S310: The simulation verification device loads the bootloader; wherein, the bootloader transplants the driver of the minimum system device module of the SOC in the simulation verification device to drive the minimum system device module so that the bootloader can start normally.

[0079] In an embodiment of the present invention, optionally, the simulation verification device may be a Palladium device. The bootloader may be a Uboot system, and the operating system may be an IINUX kernel system. Here, the operating system is not limited to the LINUX operating system, and the bootloader is not limited to the Uboot system either.

[0080] In an embodiment of the present invention, optionally, the driver of the minimum system device module in the SOC of the simulation verification device may be transplanted into the bootloader to drive the minimum system device module in the SOC. When the bootloader starts normally, it depends on the minimum system device module in the SOC. Therefore, the driver of the minimum system device module needs to be transplanted into the bootloader to drive the minimum system device module, so as to realize the normal start of the bootloader. Among them, the minimum system device module may include a timer TIMER, a universal asynchronous receiver / transmitter UART, a serial peripheral interface SPI bus controller, a gigabit Ethernet controller GMAC, a serial peripheral interface flash SPI Falsh model, a double data rate synchronous dynamic random access memory DDR model, an embedded multimedia controller EMMC model, a central processing unit CPU (ck810) kernel, and a memory management unit MMU. Among them, the DDR model may be a DDR3 model. S320: The simulation verification device loads the operating system; wherein, the driver of the minimum system device module in the SOC of the simulation verification device is transplanted into the operating system to drive the minimum system device module, so that the operating system starts normally.

[0081] S320: The simulation verification device loads the operating system; wherein, the driver of the minimum system device module in the SOC of the simulation verification device is transplanted into the operating system to drive the minimum system device module, so that the operating system starts normally.

[0082] In an embodiment of the present invention, the operating system may be transplanted and trimmed so that the transplanted and trimmed operating system can support the kernel configuration of a remote login (Telnet) server and a network file system, and the driver of the minimum system device module in the SOC of the simulation verification device is transplanted into the operating system to drive the minimum system device module in the SOC. When the operating system starts normally, it depends on the minimum system device module in the SOC. Therefore, the driver of the minimum system device module needs to be transplanted into the operating system to drive the minimum system device module, so as to realize the normal start of the operating system.

[0083] S330: When the simulation verification device starts the operating system through the bootloader, it remotely connects to the network file system through the operating system; wherein, the network file system includes verification program files of other device modules in the SOC except the minimum system device module.

[0084] In the embodiment of the present invention, specifically, the minimum system device module on the simulation verification device is initialized to normally start the bootloader, and the kernel file of the operating system is loaded through the bootloader to start the operating system. Among them, when the transplanted bootloader is the Uboot system, the process of successfully starting the Uboot system during the transplantation of Uboot can refer to Figure 1c , such as Figure 1c shown. The process of successfully starting the Uboot system in the simulation verification device can be: CPU core initialization, MMU initialization, timer TIMER initialization, DDR3 model initialization, SPI bus controller initialization, SPI Flash model initialization, UART initialization, EMMC model initialization, GMAC initialization, and Uboot general component initialization, and then enter the Uboot menu.

[0085] Among them, when the operating system is the LINUX kernel system, the process of successfully starting the LINUX kernel system in the simulation verification device during the transplantation and tailoring of the LINUX kernel system can refer to Figure 1d , such as Figure 1d shown. The process of successfully starting the LINUX kernel system in the simulation verification device can be: CPU (ck810) core initialization, MMU initialization, timer TIMER device driver registration, SPI bus controller device driver registration, SPI Flash model device driver registration, UART device driver registration, EMMC model device driver registration, GMAC device driver registration, and LINUX general component initialization and mounting of the network file system.

[0086] Among them, the network file system can be built before transplanting and tailoring the operating system. The network file system can store verification program files, etc. After remotely connecting to the network text system through the operating system, the verification environment is set up, and the SOC in the simulation verification device can be verified and tested.

[0087] In the embodiment of the present invention, the minimum system device module of the SOC in the simulation verification device is transplanted into the bootloader and the operating system, and the bootloader and the operating system are transplanted into the simulation verification device. When the operating system is started, the verification program file matching the verification instruction can be obtained by remotely connecting to the network file system for verification testing. It can support multi-user parallel verification simultaneously to improve the verification testing efficiency. Only one set of hardware environment is required to support multi-user parallel verification work. It can be time-division multiplexed, effectively saving the hardware device cost required for the parallel verification environment. It can support remote verification, effectively reducing the labor intensity of users. By loading the operating system into the simulation verification device, the operating system can support a large number of open-source codes and can be directly used after simple transplantation, effectively reducing the workload of self-coding of the verification testing program. And the operating system supports running different verification testing programs simultaneously, thus supporting system-level combined verification.

[0088] Figure 4 It is a structural block diagram of a system-on-chip (SOC) simulation verification device provided by an embodiment of the present invention, as Figure 4 shown. The device includes: a first loading module 410, a second loading module 420, a connection module 430, and a verification module 440.

[0089] Among them, the first loading module 410 is used to load the bootloader. Among them, the bootloader has transplanted the driver of the minimum system device module of the SOC in the simulation verification device to drive the minimum system device module, so that the bootloader can be started normally.

[0090] The second loading module 420 is used to load the operating system. The driver of the minimum system device module of the SOC in the simulation verification device has been transplanted into the operating system to drive the minimum system device module, so that the operating system can be started normally.

[0091] The connection module 430 is used to remotely connect to the network file system through the operating system when the operating system is started by the bootloader.

[0092] The verification module 440 is used to, when receiving at least one verification instruction for other device modules of the SOC except the minimum system device module, load the verification program file matching the verification instruction from the network file system, and run the verification program file to operate on other device modules of the SOC to complete the verification testing of other device modules of the SOC.

[0093] Optionally, the minimum system device module includes a timer, a universal asynchronous receiver-transmitter (UART), a serial peripheral interface (SPI) bus controller, a gigabit media access controller (GMAC), a serial peripheral interface flash (SPI Flash) model, a double data rate synchronous dynamic random access memory (DDR) model, and an embedded multimedia card (EMMC) model.

[0094] Optionally, the simulation verification device is a Palladium device, the operating system is a LINUX kernel system, and the bootloader is a Uboot system.

[0095] Optionally, the device further includes a bootloader startup module for initializing the minimum system device module on the simulation verification device to normally start the bootloader.

[0096] Optionally, booting into the operating system through the bootloader includes:

[0097] Loading the kernel file of the operating system through the bootloader to start the operating system on the simulation verification device.

[0098] Optionally, the device further includes a device driver registration module for registering device drivers for the minimum system device module and other SOC device modules in the simulation verification device through the operating system before remotely connecting to the network file system through the operating system;

[0099] A verification module 440, configured to, when receiving at least one verification instruction for an already registered other SOC device module through a remote login daemon, load a verification program file matching the verification instruction from a root file system in the network file system through a network file system client.

[0100] Optionally, the device driver registration module is configured to parse a device tree file loaded by the bootloader through the operating system, create a minimum system device module and other SOC device modules based on the device tree file, perform device registration on the created minimum system device module and other SOC device modules, and register the drivers corresponding to the minimum system device module and other SOC device modules respectively.

[0101] The above device can execute the method provided in any embodiment of the present invention, and has corresponding functional modules and beneficial effects for executing the method.

[0102] Figure 5 It is a structural block diagram of a device for building a simulation verification environment of a system on chip (SOC) provided by an embodiment of the present invention, as Figure 5As shown, the device includes: a first loading module 510, a second loading module 520, and a connection module 530.

[0103] The first loading module 510 is used to load the boot program; wherein, the boot program has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules, so that the boot program can be started normally.

[0104] The second loading module 520 is used to load the operating system; the operating system has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules, so that the operating system can be started normally.

[0105] The connection module 530 is used to remotely connect to the network file system through the operating system when starting the operating system through the boot program.

[0106] The above device can execute the method provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects for executing the method.

[0107] Figure 6 It is a schematic structural diagram of a simulation verification device provided by an embodiment of the present invention. As Figure 6 shown, the device includes:

[0108] One or more processors 610, Figure 6 Taking one processor 610 as an example;

[0109] A memory 620;

[0110] The device may further include: an input device 630 and an output device 640.

[0111] The processor 610, memory 620, input device 630, and output device 640 in the device may be connected through a bus or other means, Figure 6 Taking connection through a bus as an example.

[0112] The memory 620, as a non-transitory computer-readable storage medium, can be used to store software programs, computer-executable programs, and modules, such as the program instructions / modules corresponding to a method for simulating and verifying a system on a chip (SOC) in an embodiment of the present invention (for example, the first loading module 410, the second loading module 420, the connection module 430, and the verification module 440 shown in Figure 4 the figure), or the program instructions / modules corresponding to a method for building a verification environment for a simulation verification device of a system on a chip (SOC) in an embodiment of the present invention (for example, Figure 5The first loading module 510, the second loading module 520, and the connection module 530 shown). The processor 610 executes various functional applications and data processing of the computer device by running software programs, instructions, and modules stored in the memory 620, that is, implements a simulation verification method of a system on chip (SOC) in the above method embodiment, that is:

[0113] The simulation verification device loads the bootloader; wherein, the bootloader has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules, so that the bootloader can be started normally;

[0114] The simulation verification device loads the operating system; wherein, the operating system has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules, so that the operating system can be started normally;

[0115] When the simulation verification device starts the operating system through the bootloader, it remotely connects to the network file system through the operating system;

[0116] When the simulation verification device receives at least one verification instruction for other device modules of the SOC except the minimum system device module, it loads the verification program file matching the verification instruction from the network file system, and runs the verification program file to operate on the other device modules of the SOC to complete the verification test of the other device modules of the SOC.

[0117] Or implement a method for building a verification environment for a simulation verification device of a system on chip (SOC) provided in the above method embodiment, that is:

[0118] The simulation verification device loads the bootloader; wherein, the bootloader has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules, so that the bootloader can be started normally;

[0119] The simulation verification device loads the operating system; wherein, the operating system has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules, so that the operating system can be started normally;

[0120] When the simulation verification device starts the operating system through the bootloader, it remotely connects to the network file system through the operating system; wherein, the network file system includes verification program files for other device modules of the SOC except the minimum system device module.

[0121] The memory 620 may include a program storage area and a data storage area. The program storage area may store an operating system and application programs required for at least one function. The data storage area may store data created according to the use of the computer device and the like. In addition, the memory 620 may include a high-speed random access memory, and may also include a non-transitory memory, such as at least one magnetic disk storage device, a flash memory device, or other non-transitory solid-state storage devices. In some embodiments, the memory 620 may optionally include a memory remotely disposed relative to the processor 610, and these remote memories may be connected to the terminal device through a network. Examples of the above networks include, but are not limited to, the Internet, an enterprise intranet, a local area network, a mobile communication network, and combinations thereof.

[0122] The input device 630 may be used to receive input digital or character information, and generate key signal inputs related to user settings and function controls of the computer device. The output device 640 may include an output interface and the like.

[0123] Embodiments of the present invention provide a computer-readable storage medium, on which a computer program is stored. When the program is executed by a processor, it implements a method for simulating and verifying a system-on-chip (SOC) as provided in the embodiments of the present invention:

[0124] The simulation verification device loads a bootloader; wherein, the bootloader has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules, so that the bootloader can be started normally;

[0125] The simulation verification device loads an operating system; wherein, the operating system has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules, so that the operating system can be started normally;

[0126] When the simulation verification device starts the operating system through the bootloader, it remotely connects to a network file system through the operating system;

[0127] When the simulation verification device receives at least one verification instruction for other device modules of the SOC except the minimum system device modules, it loads a verification program file matching the verification instruction from the network file system, and runs the verification program file to operate on the other device modules of the SOC to complete the verification test of the other device modules of the SOC.

[0128] Or implement a method for building a verification environment for a simulation verification device of a system-on-chip (SOC) provided in the above method embodiments, that is:

[0129] The simulation verification device loads the bootloader; wherein, the bootloader has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules, so that the bootloader can be started normally;

[0130] The simulation verification device loads the operating system; wherein, the operating system has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules, so that the operating system can be started normally;

[0131] When the simulation verification device starts the operating system through the bootloader, it remotely connects to the network file system through the operating system; wherein, the network file system includes the verification program files of other device modules of the SOC except the minimum system device modules.

[0132] Any combination of one or more computer-readable media may be employed. A computer-readable medium may be either a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the computer-readable storage medium would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer-readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.

[0133] A computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, which carries computer-readable program code. Such a propagated data signal may take many forms, including - but not limited to - an electromagnetic signal, an optical signal, or any suitable combination of the foregoing. A computer-readable signal medium may also be any computer-readable medium that is not a computer-readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.

[0134] The program code contained on the computer-readable medium may be transmitted with any appropriate medium, including - but not limited to - wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

[0135] Computer program code for performing the operations of the present invention may be written in one or more programming languages or combinations thereof, including object-oriented programming languages such as Java, Smalltalk, C++, and also including conventional procedural programming languages such as the "C" language or similar programming languages. The program code may execute entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., through the Internet using an Internet service provider).

[0136] Note that the above is only the preferred embodiment of the present invention and the technical principles applied. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, re-adjustments, and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments. Without departing from the concept of the present invention, more other equivalent embodiments may be included, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A method for simulating and verifying a system on chip (SOC), characterized in that, Including: The simulation verification device loads the bootloader; wherein, the bootloader has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules so that the bootloader can be started normally; The simulation verification device loads the operating system; wherein, the operating system has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules so that the operating system can be started normally; When the simulation verification device starts the operating system through the bootloader, it remotely connects to the network file system through the operating system; When the simulation verification device receives at least one verification instruction for other device modules of the SOC except the minimum system device modules, it loads the verification program file matching the verification instruction from the network file system and runs the verification program file to operate on other device modules of the SOC to complete the verification test of other device modules of the SOC; Wherein, before remotely connecting to the network file system through the operating system, it further includes: Performing device driver registration on the minimum system device modules and other device modules of the SOC in the simulation verification device through the operating system; Wherein, when the simulation verification device receives at least one verification instruction for other device modules of the SOC except the minimum system device modules, loading the verification program file matching the verification instruction from the network file system includes: When the simulation verification device receives at least one verification instruction for the registered other device modules of the SOC through the remote login daemon process, it loads the verification program file matching the verification instruction from the root file system of the network file system through the NFS client of the network file system.

2. The method according to claim 1, wherein: The minimum system device modules include a timer, a universal asynchronous receiver / transmitter UART, a serial peripheral interface SPI bus controller, a gigabit Ethernet controller GMAC, a serial peripheral interface flash SPI Falsh model, a double data rate synchronous dynamic random access memory DDR model, and an embedded multimedia controller EMMC model.

3. The method according to claim 1, characterized in that, The simulation verification device is a Palladium device, the operating system is a LINUX kernel system, and the bootloader is a Uboot system.

4. The method according to claim 1, wherein The performing device driver registration on the minimum system device modules and other device modules of the SOC in the simulation verification device through the operating system includes: Parsing the device tree file loaded by the bootloader through the operating system, creating the minimum system device modules and other device modules of the SOC based on the device tree file, performing device registration on the created minimum system device modules and other device modules of the SOC, and registering the drivers corresponding to the minimum system device modules and other device modules of the SOC respectively.

5. A method for building a simulation verification environment of a System on Chip (SOC), characterized in that, Including: The simulation verification device loads the bootloader; wherein, the bootloader has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules, so that the bootloader can be started normally; The simulation verification device loads the operating system; wherein, the operating system has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules, so that the operating system can be started normally; When the simulation verification device starts the operating system through the bootloader, it remotely connects to the network file system through the operating system; wherein, the network file system includes verification program files of other device modules of the SOC except the minimum system device modules; Wherein, before remotely connecting to the network file system through the operating system, it further includes: The operating system performs device driver registration on the minimum system device modules and other device modules of the SOC in the simulation verification device; Wherein, after the simulation verification device remotely connects to the network file system through the operating system when starting the operating system through the bootloader, it includes: When the simulation verification device receives at least one verification instruction for the registered other device modules of the SOC except the minimum system device modules through the remote login daemon process, it loads the verification program file matching the verification instruction from the root file system of the network file system through the NFS client of the network file system.

6. An on-chip system SOC simulation and verification device, characterized in that, It includes: A first loading module for loading the bootloader; wherein, the bootloader has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules, so that the bootloader can be started normally; A second loading module for loading the operating system; the operating system has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules, so that the operating system can be started normally; A connection module for remotely connecting to the network file system through the operating system when starting the operating system through the bootloader; A verification module for, when receiving at least one verification instruction for other device modules of the SOC except the minimum system device modules, loading the verification program file matching the verification instruction from the network file system and running the verification program file to operate on the other device modules of the SOC to complete the verification test of the other device modules of the SOC; Wherein, the device further includes a device driver registration module for performing device driver registration on the minimum system device modules and other device modules of the SOC in the simulation verification device through the operating system before remotely connecting to the network file system through the operating system; Wherein, the verification module is specifically used for, when receiving at least one verification instruction for the registered other device modules of the SOC through the remote login daemon process, loading the verification program file matching the verification instruction from the root file system in the network file system through the network file system client.

7. An apparatus for building a simulation verification environment of a system-on-chip (SOC), characterized in that, It includes: A first loading module, configured to load a bootloader; wherein, the bootloader has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules, so that the bootloader can be started normally; A second loading module, configured to load an operating system; the operating system has transplanted the drivers of the minimum system device modules of the SOC in the simulation verification device to drive the minimum system device modules, so that the operating system can be started normally; A connection module, configured to remotely connect to a network file system through the operating system when starting the operating system through the bootloader; Wherein, before remotely connecting to the network file system through the operating system, it includes: Performing device driver registration on the minimum system device modules and other SOC device modules in the simulation verification device through the operating system; Wherein, after the simulation verification device remotely connects to the network file system through the operating system when starting the operating system through the bootloader, it includes: When the simulation verification device receives at least one verification instruction for the registered other SOC device modules through the remote login daemon, loading a verification program file matching the verification instruction from the root file system of the network file system through the NFS client of the network file system.

8. A simulation verification device, characterized in that, It includes: One or more processors; A storage device, configured to store one or more programs, When the one or more programs are executed by the one or more processors, the one or more processors implement a simulation verification method for a system on chip (SOC) according to any one of claims 1-4 or a method for building a verification environment for a simulation verification device of a system on chip (SOC) according to claim 5.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements a simulation verification method for a system on chip (SOC) according to any one of claims 1-4 or a method for building a verification environment for a simulation verification device of a system on chip (SOC) according to claim 5.

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