Power amplifier design method based on feasible region shrinkage Bayesian optimization

Abstract

The present invention discloses a power amplifier design method based on Bayesian optimization with feasible domain shrinkage. This method first determines the matching network target impedance based on load pull and source pull. It then determines the matching network structure and component parameter values ​​using the Chebyshev low-pass topology method. Initial values ​​are sampled using optimal Latin hypercube sampling to obtain an input sample set. Sample point evaluation is performed using a normalized weighted approach. A particle swarm algorithm is used to search for optimal hyperparameters. Based on a trained Gaussian process model, the acquisition function (UCB) is maximized within the feasible domain to obtain the next evaluation point. This method continuously iterates to achieve a broadband, high-efficiency power amplifier. This invention proposes, for the first time, a power amplifier design method based on Bayesian optimization with feasible domain shrinkage. By dynamically changing the parameter value β to shrink the feasible domain, this method achieves a balance between global and local optimization, accelerates convergence, and effectively guides power amplifier layout optimization, ultimately achieving power amplifier design.

Description

Technical Field

[0001] The present invention belongs to the field of machine learning and radio frequency power amplifier design, and specifically relates to a power amplifier design method based on feasible domain shrinkage Bayesian optimization. Background Art

[0002] Power amplifier design specifications, such as output power and efficiency, are mutually constrained. Meeting these requirements simultaneously requires complex topology design and precise parameter calculations. Even if the selected parameters meet "Pareto optimality," if the manufactured power amplifier does not match the analog design, the designer must repeat the entire design cycle. This makes the power amplifier design process very complex. The general steps include load and source pull, topology design, ensuring circuit stability, component parameter calculation, and circuit optimization. Circuit optimization is the most critical step, and an effective optimization method can significantly shorten circuit design time.

[0003] Power amplifier optimization involves matching the length and width of the microstrip lines in the network. This involves numerous parameters, creating a vast, high-dimensional parameter space. This presents two major challenges for the optimization problem: First, the unknown form of the objective function prevents designers from using gradient information. Second, the computational uncertainty of the objective function makes it difficult to accurately estimate its value. Most importantly, evaluating the objective function consumes significant time, money, and human resources during the design process. In other words, power amplifier optimization is essentially a costly, high-dimensional, black-box optimization problem. Finding the optimal solution in this high-dimensional space is a challenge, and embedded optimization tools in electronic design automation (EDA) tools often suffer from long optimization times, error reporting during optimization, and difficulty debugging the layout.

[0004] Bayesian optimization (BO) has garnered widespread attention in recent years as a powerful tool for optimizing black-box functions. It models the objective function using a probabilistic surrogate model and uses a sampling function to determine the next most promising parameter location. Compared to other global optimization algorithms, Bayesian optimization effectively leverages information provided by the optimization history, making the search more efficient and significantly improving convergence speed. In this context, applying Bayesian optimization to power amplifier design holds significant practical significance. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this paper proposes a power amplifier design method based on Bayesian optimization with feasible domain shrinkage. It also proposes a weighted exponential method for multi-objective optimization and Bayesian optimization with feasible domain shrinkage. This method establishes an effective evaluation of power amplifier parameter sample points and achieves rapid convergence of the optimization method. This method can be used not only for schematic optimization but also for layout simulation optimization.

[0006] The power amplifier design method based on feasible region shrinkage Bayesian optimization specifically includes the following steps:

[0007] Step 1: Determine the circuit structure and component parameters

[0008] First, the target impedance of the input and output matching networks, i.e., the load impedance and source impedance, is determined by load pulling and source pulling. Then, the order n of the input and output matching networks and the parameter values ​​of the matching network components are determined by table lookup using the Chebyshev low-pass topology method. Secondly, considering the stability of the overall circuit, a suitable LC stabilization network is added. Finally, considering the actual welding requirements of the power amplifier, microstrip lines are added at appropriate locations in the circuit and parameter values ​​are given. The parameter values ​​of the matching network components and the welding microstrip line are all initial values. The initial parameter point x0 = {W1, W2, ..., W i ,L1,L2,…,L i}, i is the number of adjustable microstrip lines.

[0009] Step 2: Obtain training sample set

[0010] The initial training sample set includes an initial training sample input set and an initial training sample output set. The specific steps include:

[0011] s2.1. Based on the initial parameter point x0 obtained in step 1, the optimal Latin hypercube sampling (OLHS) method is used to sample m times within the range of λ% around the initial parameter point to obtain the initial training sample input set X = {x1, x2, ..., x m}.

[0012] s2.2. Send the initial training sample input set X to the ADS simulation to obtain the output power y1 and power added efficiency y2. In order to effectively evaluate each input sample, establish the evaluation function y:

[0013]

[0014] y 1target and y 2target Represent the preset output power and power-added efficiency targets, respectively. Normalization eliminates dimension, and the exp function is introduced to smooth out any sharp differences. The m values ​​of the evaluation function y are obtained as the training sample output set.

[0015] Step 3: Train the Gaussian process model

[0016] Combine the data obtained in step 2 into the training sample set D(x,y). Select the kernel function k(x,x ′ ), based on the training sample set D(x,y), the particle swarm algorithm is used to optimize the logarithmic marginal likelihood function and search for the kernel function k(x,x ′), the optimal hyperparameters of the log-marginal likelihood function L(θ) are:

[0017]

[0018] Among them, L ii represents the lower triangular matrix in the Cholesky decomposition, i represents L ii , α represents the intermediate variable, and the superscript T represents the transpose.

[0019] Step 4: Get the next evaluation point

[0020] Select the maximum value in the training sample output set, let f + =y max , as the basis for judgment, the parameter space is divided into feasible and infeasible regions, and f + The surrounding 10% area is considered as the area where the next evaluation point is most likely to appear. Based on the Gaussian process model trained in step 3, the next evaluation point x is determined by maximizing the acquisition function UCB in this feasible domain. t =argmax UCB.

[0021] Step 5: Update the training set

[0022] Use the evaluation function y to evaluate the evaluation point x determined in step 4 t Evaluate and get the corresponding evaluation value y t , judge y t Whether the target value is reached, if y t If it is not reached, update the training set D t =D∪{x t ,y t}, and update the parameter β of the maximum acquisition function UCB at the same time, and then return to step 3. The update method of parameter β is:

[0023]

[0024] If y t When the target value is reached, the iteration ends and proceeds to step 6.

[0025] Step 6: Layout debugging

[0026] The schematic parameter x obtained in step 5 is t Perform layout simulation. If the layout simulation does not meet the requirements, the evaluation point x determined in step 4 will be t Consider it as the new initial parameter point x0 and go to step 2 until the layout simulation meets the requirements.

[0027] The present invention has the following beneficial effects:

[0028] 1. Through weighted processing, the performance of each sample point can be effectively evaluated, and the introduction of the exp function smoothes the multi-peak characteristics of the evaluation function space.

[0029] 2. By dynamically adjusting the value of β, the Bayesian optimization process becomes more flexible. When the iteration makes progress, the next optimization focuses on the local area. When there is no progress, the next optimization focuses on the global area. This not only avoids being trapped in a local optimal solution, but also improves the convergence speed of the optimization, effectively balancing exploration and exploitation.

[0030] 3. This method can not only be applied to schematic optimization, but also greatly supplements the layout debugging difficulties of current EDA tools. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 Design method flow chart for this exercise

[0032] Figure 2 : This is a graph showing the optimal load impedance changing with frequency in the embodiment;

[0033] Figure 3 The circuit structure and parameter settings in the embodiment;

[0034] Figure 4 The output power and efficiency curves of the multi-input sample point simulation in the embodiment;

[0035] Figure 5 Comparison of the feasible domain of the acquisition function UCB under different parameters β in this method;

[0036] Figure 6 A physical picture of the power amplifier prepared in the embodiment;

[0037] Figure 7 A comparison chart of the gain, output power, and power added efficiency of the broadband high-efficiency power amplifier in the embodiment with the measured results and the simulation results of the schematic diagram and layout; DETAILED DESCRIPTION

[0038] In order to make the advantages of the present invention more clear, the present invention is further explained below with reference to the accompanying drawings;

[0039] like Figure 1 As shown in FIG, the power amplifier design method based on feasible region shrinkage Bayesian optimization specifically includes the following steps:

[0040] Step 1: Determine the circuit structure and component parameters

[0041] Under the conditions of input frequency of 2-3GHz, bias conditions of Vgs = -2.7V, Vds = 28V, and input power of 30dBm, the load impedance is extracted by load pulling in Keysight's Advanced Design System (ADS) software, and the optimal load impedance change trajectory at each frequency point is plotted on the Smith chart. The results are as follows: Figure 2 As shown in the figure, the load impedance of 20+j6Ω at the center frequency of the trajectory of 2.5GHz is selected as the target impedance of the matching network. The source impedance is determined in a similar way to the load impedance, which is obtained by source pulling. After determining the load impedance and source impedance, the order of the input and output matching network is determined by the Chebyshev low-pass topology. After considering factors such as the stable network, bias and welding, the final amplifier circuit structure is as follows Figure 3 As shown, the initial parameter value is x0={W1,W2,…,W 10 ,L1,L2,…,L 10}, where {W1,W2,…,W 10}={1.86, 8.27, 1.86, 2.49, 4.65, 1.12, 1.05, 1.52, 2.5, 2.5}, {L1, L2,…,L 10}={6.83, 2.85, 11.8, 4.14, 6.05, 10, 4.85, 8.18, 3, 3}.

[0042] Step 2: Obtain training sample set

[0043] The initial training sample set includes an initial training sample input set and an initial training sample output set. The specific steps include:

[0044] s2.1. Based on the initial parameter point x0 obtained in step 1, the optimal Latin hypercube sampling method is used to sample 50 times within a 10% range around the initial parameter point x0 to determine the initial training sample input set X = {x1, x2, ..., x 50}.

[0045] s2.2, the initial training sample input set X is sent to ADS simulation, the output power y1 and power added efficiency y2 of the multi-sample point simulation are as follows Figure 4 As shown in the figure, the output power and power added efficiency target values ​​are set to 40dBm and 65% respectively, then y 1target =40,y 2target =65, the evaluation function y is:

[0046]

[0047] The 50 values ​​of the evaluation function y are used as the initial training sample output set, and together with the training sample set X, form the training sample D(x,y).

[0048] Step 3: Train the Gaussian process model

[0049] Choose the squared exponential covariance kernel function k SE (x, x′), according to the training sample set D(x, y) obtained in step 2, the particle swarm algorithm is used to optimize the logarithmic marginal likelihood function to search for the optimal hyperparameters of the kernel function. The logarithmic marginal likelihood function L(θ) is

[0050]

[0051] Among them, L ii represents the lower triangular matrix in the Cholesky decomposition, i represents L ii , α represents the intermediate variable, and the superscript T represents the transpose.

[0052] Step 4: Get the next evaluation point

[0053] Select the maximum value in the training sample output set, let f + =y max , as the basis for judgment, the parameter space is divided into feasible and infeasible regions, and f + The surrounding 10% area is considered as the area where the next evaluation point is most likely to appear. Based on the Gaussian process model trained in step 3, the next evaluation point x is determined by maximizing the acquisition function UCB in this feasible domain. t =argmax UCB.

[0054] Step 5: Update the training set

[0055] Use the evaluation function y to evaluate the evaluation point x determined in step 4 t Evaluate and get the corresponding evaluation value y t , judge y t Whether the target value is reached, if y t When the target value is reached, the iteration ends and goes to step 6; if y t If it is not reached, update the training set D t =D∪{x t ,y t}, and update the parameter β of the maximum acquisition function UCB at the same time, and then return to step 3. The update method of parameter β is:

[0056]

[0057] In order to effectively illustrate the division method of the feasible region, the one-dimensional feasible region division results obtained under different values ​​of the parameter β are given as follows: Figure 5 shown.

[0058] Step 6: Layout debugging

[0059] The schematic parameter x obtained in step 5 ist Perform layout simulation. If the layout simulation does not meet the requirements, the evaluation point x determined in step 4 will be t Consider it as the new initial parameter point x0 and go to step 2 until the layout simulation meets the requirements.

[0060] Figure 6 This is a physical picture of the power amplifier obtained in this embodiment. Figure 7 In the 2-3GHz frequency band, with an input power of 30dBm and bias conditions of Vgs = -2.7v and Vds = 28v, the measured gain, output power, and power added efficiency of the power amplifier circuit obtained in this embodiment are compared with the schematic and layout simulation results. The gain is greater than 10dB, the output power is 40.5-41.8dBm, and the power added efficiency is maintained at 65% to 70%. Figure 6 It can be seen that within the entire operating frequency band, the schematic optimization results and the layout optimization results are very close, indicating that the broadband and high-efficiency power amplifier design method based on feasible domain shrinkage is effective and feasible. The measurement results show that the method proposed in this paper is reliable.

Claims

1. A power amplifier design method based on feasible region shrinkage Bayesian optimization, characterized by: The method comprises the following steps: Step 1: Obtain training sample set The initial training sample set includes an initial training sample input set and an initial training sample output set. The specific steps include: s1.

1. Set the initial values ​​of the power amplifier matching network component parameters and the welding microstrip line parameter values ​​as the initial parameter point x0 = {W1, W2, ..., W i ,L1,L2,…,L i }, i is the number of adjustable microstrip lines; sampling m times within the range of λ% around the initial parameter point, the initial training sample input set X={x1,x2,...,x m }; s1.

2. Send the initial training sample input set X to the ADS simulation to obtain the output power y1 and power added efficiency y2, and establish the following evaluation function y: y 1target and y 2target represent the preset output power and power added efficiency target values ​​respectively; the obtained m evaluation function y values ​​are used as the training sample output set; Step 2: Train the Gaussian process model Combine the data obtained in step 1 into a training sample set D(x,y); select the kernel function k(x,x ′ ), based on the training sample set D(x,y), the particle swarm algorithm is used to optimize the logarithmic marginal likelihood function and search for the kernel function k(x,x ′ ), the optimal hyperparameters of the log-marginal likelihood function L(θ) are: Among them, L ii represents the lower triangular matrix in Cholesky decomposition, α represents the intermediate variable, and the superscript T represents the transpose; Step 3: Get the next evaluation point Select the maximum value in the training sample output set, let f + =y max , as the basis for judgment, the parameter space is divided into feasible and infeasible regions, and f + The surrounding 10% area is considered as the area where the next evaluation point is most likely to appear. Based on the Gaussian process model trained in step 2, the next evaluation point parameter x is determined by maximizing the acquisition function UCB in the feasible domain. t =argmax UCB; Step 4: Update the training set Use the evaluation function y to evaluate the evaluation point parameter x determined in step 3 t Evaluate and get the corresponding evaluation value y t , if y t If the target value is not reached, update the training set D t =D∪{x t ,y t }, and update the parameter β of the maximum acquisition function UCB at the same time, and then return to step 3; the update method of parameter β is: If y t When the target value is reached, the iteration ends and the optimization design of the power amplifier is completed.

2. The power amplifier design method based on feasible region shrinkage Bayesian optimization according to claim 1, characterized in that: The parameter x obtained after iterating step 4 t Perform layout simulation. If the layout simulation does not meet the requirements, the evaluation point parameter x determined in step 3 is set to t Treat it as the new initial parameter point x0 and return to step 1 until the layout simulation meets the requirements and the optimized design of the power amplifier is completed.

3. The power amplifier design method based on feasible region shrinkage Bayesian optimization according to claim 1, characterized in that: The sampling method in step 1 is optimal Latin hypercube sampling.

4. The power amplifier design method based on feasible region shrinkage Bayesian optimization according to claim 1, characterized in that: The squared exponential covariance kernel function is used in the training process of the Gaussian process model.

5. The power amplifier design method based on feasible region shrinkage Bayesian optimization according to claim 1, characterized in that: First, the target impedance of the input and output matching networks is determined by load pulling and source pulling. Then, the Chebyshev low-pass topology method is used to determine the order n of the input and output matching networks and the parameter values ​​of the matching network components by lookup table. Secondly, considering the stability of the overall circuit, a suitable LC stabilization network is added. Finally, considering the actual welding requirements of the power amplifier, microstrip lines are added at appropriate positions in the circuit to obtain the initial values ​​of the matching network component parameters of the power amplifier and the welding microstrip line parameters.

6. The power amplifier design method based on feasible region shrinkage Bayesian optimization according to claim 5, characterized in that: The transistor used is a 10W GaN HEMT transistor.

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