Energy-saving lighting lamp rectifier circuit and device
By using MOS tubes to replace rectifier diodes in fire emergency lighting fixtures, a high-efficiency rectifier circuit is formed, which solves the power loss and energy waste problems of the rectifier circuit, realizes non-polarity wiring and high-efficiency rectification, and meets the national standard temperature requirements.
Patent Information
- Application Number
- CN202210205413.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-03-04
- Publication Date
- 2025-09-26
- Estimated Expiration
- 2042-03-04
AI Technical Summary
The rectifier circuits of existing fire emergency lighting fixtures have problems of power loss and energy waste, especially under high power conditions, which makes it difficult to meet the national standard requirements for the temperature of heating elements, resulting in false power standards and energy waste.
By replacing the rectifier diode with a MOS tube, a high-efficiency rectifier circuit is formed by taking advantage of the fact that there is no conduction voltage drop between the source and drain when the MOS tube is turned on. The conduction and cutoff of the MOS tube are controlled by the gate control circuit to achieve non-polarity wiring.
It improves the rectification efficiency, reduces power loss and energy waste, meets the national standard for heating element temperature, expands the lamp bus voltage input range, and facilitates on-site construction wiring.
Smart Images
Figure CN114421790B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of circuit control, and in particular to an energy-saving lighting lamp rectifier circuit and device. Background Art
[0002] At present, the high-power bus-type fire emergency lighting on the market mainly uses a bridge stack composed of four shunt modules to achieve access rectification.
[0003] According to 6.17.6 of the national standard GB17945-2010, the maximum surface temperature of heat-generating components within fire emergency lighting fixtures should not exceed 90°C when operating at an ambient temperature of 25°C ± 3°C. This clearly defines the requirements for heat-generating components in fire emergency lighting fixtures, and the efficiency of lighting rectifier circuits is becoming increasingly important, especially in high-power bus-type fire emergency lighting products. However, similar products on the market generally address the issue of bridge rectifier heating exceeding 90°C by reducing overall system power. This results in the majority of high-power bus-type fire emergency lighting products on the market inflating power ratings and wasting energy.
[0004] In existing bridge rectifier circuits consisting of four shunt modules, a certain conduction voltage is required to turn on the rectifier diodes. This conduction voltage drop causes impedance and power consumption in the rectifier shunt modules, weakening the power supply to the back-end circuits. This is particularly severe when rectifying high-power and high-current outputs. Therefore, the development of a reliable energy-saving rectifier circuit for lighting lamps is an urgent problem for those skilled in the art. Summary of the Invention
[0005] The purpose of this application is to provide an energy-saving lighting lamp rectifier circuit and device. In this solution, the purpose of efficient rectification is achieved by using MOS tubes to replace rectifier diodes. When the MOS tube is turned on, there is no conduction voltage drop between the source and drain stages like that of the rectifier diode, which can effectively maintain the equal voltage effect of the source and drain stages, thereby achieving efficient rectification and realizing a non-polarity wiring method, which is convenient for on-site construction and wiring of lamps.
[0006] To solve the above technical problems, the present application provides an energy-saving lighting lamp rectifier circuit, comprising a power input module, a rectifier module and a power output module; the power input module is electrically connected to the rectifier module, and the rectifier module is electrically connected to the power output module;
[0007] The rectifier module includes a first rectifier drive module, a second rectifier drive module, a third rectifier drive module and a fourth rectifier drive module; the first rectifier drive module and the fourth rectifier drive module are used to form a half-wave rectifier voltage with positive upper and negative lower; the second rectifier drive module and the third rectifier drive module are used to form another half-wave rectifier voltage with positive upper and negative lower;
[0008] The first rectifier driving module includes a first PMOS transistor, the second rectifier driving module includes a second PMOS transistor, the third rectifier driving module includes a first NMOS transistor, and the fourth rectifier driving module includes a second NMOS transistor;
[0009] The drain of the first PMOS transistor is electrically connected to the power input module, the drain of the first NMOS transistor, and the gate of the second NMOS transistor respectively; the source of the first PMOS transistor is electrically connected to the source of the second PMOS transistor, the gate of the second PMOS transistor, and the power output module respectively; the gate of the first PMOS transistor is electrically connected to the power input module, the gate of the first NMOS transistor, and the drain of the second NMOS transistor respectively;
[0010] The drain of the second PMOS transistor is electrically connected to the power input module, the gate of the first NMOS transistor, and the drain of the second NMOS transistor respectively; the source of the second PMOS transistor is electrically connected to the source of the first PMOS transistor, the gate of the first PMOS transistor, and the power output module respectively; the gate of the second PMOS transistor is electrically connected to the power input module, the drain of the first NMOS transistor, and the gate of the second NMOS transistor respectively;
[0011] The drain of the first NMOS transistor is electrically connected to the power input module and the gate of the second NMOS transistor respectively; the gate of the first NMOS transistor is electrically connected to the power input module, the drain of the second NMOS transistor and the source of the first NMOS transistor respectively; the source of the first NMOS transistor is grounded;
[0012] The drain of the second NMOS transistor is electrically connected to the power input module and the gate of the first NMOS transistor respectively; the gate of the second NMOS transistor is electrically connected to the power input module, the drain of the first NMOS transistor and the source of the second NMOS transistor, and the source of the second NMOS transistor is grounded.
[0013] Preferably, the first rectifying and driving module includes a first shunt module, the second rectifying and driving module includes a second shunt module, the third rectifying and driving module includes a third shunt module, and the fourth rectifying and driving module includes a fourth shunt module;
[0014] A first end of the first shunt module is electrically connected to the drain of the first PMOS transistor, and a second end of the first shunt module is electrically connected to the source of the first PMOS transistor; a first end of the second shunt module is electrically connected to the drain of the second PMOS transistor, and a second end of the second shunt module is electrically connected to the source of the second PMOS transistor;
[0015] The first end of the third shunt module is electrically connected to the source of the first NMOS tube, and the second end of the third shunt module is electrically connected to the drain of the first NMOS tube; the first end of the fourth shunt module is electrically connected to the source of the second NMOS tube, and the second end of the fourth shunt module is electrically connected to the drain of the second NMOS tube.
[0016] Preferably, the first rectifier driving module includes a first clamping module, the second rectifier driving module includes a second clamping module, the third rectifier driving module includes a third clamping module, and the fourth rectifier driving module includes a fourth clamping module;
[0017] A first end of the first clamping module is electrically connected to the gate of the first PMOS transistor, and a second end of the first clamping module is electrically connected to the source of the first PMOS transistor; a first end of the second clamping module is electrically connected to the gate of the second PMOS transistor, and a second end of the second clamping module is electrically connected to the source of the second PMOS transistor;
[0018] A first end of the third clamping module is electrically connected to the source of the first NMOS transistor, and a second end of the third clamping module is electrically connected to the gate of the first NMOS transistor; a first end of the fourth clamping module is electrically connected to the source of the second NMOS transistor, and a second end of the fourth clamping module is electrically connected to the gate of the second NMOS transistor.
[0019] Preferably, the power input module includes a first wire and a second wire;
[0020] The first wire is electrically connected to the drain of the first PMOS transistor, the gate of the second PMOS transistor, the drain of the first NMOS transistor, and the gate of the second NMOS transistor respectively;
[0021] The second conductive line is electrically connected to the gate of the first PMOS transistor, the drain of the second PMOS transistor, the gate of the first NMOS transistor, and the drain of the second NMOS transistor respectively.
[0022] Preferably, the power output module includes a third wire and a fourth wire;
[0023] The third wire is electrically connected to the source of the first NMOS transistor and the source of the second NMOS transistor respectively;
[0024] The fourth wire is electrically connected to the source of the first NMOS transistor and the source of the second NMOS transistor respectively.
[0025] Preferably, the first shunt module includes a first diode, the second shunt module includes a second diode, the third shunt module includes a third diode, and the fourth shunt module includes a fourth diode;
[0026] The anode of the first diode is electrically connected to the drain of the first PMOS transistor, and the cathode of the first diode is electrically connected to the source of the first PMOS transistor; the anode of the second diode is electrically connected to the drain of the second PMOS transistor, and the cathode of the second diode is electrically connected to the source of the second PMOS transistor;
[0027] The anode of the third diode is electrically connected to the source of the first NMOS tube, and the cathode of the third diode is electrically connected to the drain of the first NMOS tube; the anode of the fourth diode is electrically connected to the source of the second NMOS tube, and the cathode of the fourth diode is electrically connected to the drain of the second NMOS tube.
[0028] Preferably, the first clamping module includes a fifth diode, the second clamping module includes a sixth diode, the third clamping module includes a seventh diode, and the fourth clamping module includes an eighth diode;
[0029] The anode of the fifth diode is electrically connected to the gate of the first PMOS transistor, and the cathode of the fifth diode is electrically connected to the source of the first PMOS transistor respectively; the anode of the sixth diode is electrically connected to the gate of the second PMOS transistor, and the cathode of the sixth diode is electrically connected to the source of the second PMOS transistor;
[0030] The anode of the seventh diode is electrically connected to the source of the first NMOS transistor, and the cathode of the seventh diode is electrically connected to the gate of the first NMOS transistor; the anode of the eighth diode is electrically connected to the source of the second NMOS transistor, and the cathode of the eighth diode is electrically connected to the gate of the second NMOS transistor.
[0031] Preferably, the first rectifier driving module further includes a first voltage divider module, which includes a first resistor and a second resistor; the third rectifier driving module further includes a second voltage divider module, which includes a third resistor and a fourth resistor;
[0032] The first end of the first resistor and the first end of the second resistor are electrically connected to the gate of the first PMOS transistor, the second end of the first resistor is electrically connected to the source of the first PMOS transistor, and the second end of the second resistor is electrically connected to the power input module;
[0033] The first end of the third resistor and the first end of the fourth resistor are electrically connected to the gate of the first NMOS transistor, the second end of the third resistor is electrically connected to the power input module, and the second end of the fourth resistor is grounded.
[0034] Preferably, the third rectifier driving module further includes a first capacitor;
[0035] A first end of the first capacitor is electrically connected to the gate of the first NMOS transistor, and a second end of the first capacitor is grounded.
[0036] In order to solve the above technical problems, the present application also provides an energy-saving lighting lamp rectifier device, including an energy-saving lighting lamp rectifier circuit as described in item.
[0037] A rectifier circuit for an energy-saving lighting lamp according to the present invention has the following beneficial effects. The rectifier circuit for an energy-saving lighting lamp disclosed in the present invention comprises: a power input module, a rectifier module, and a power output module; the rectifier module comprises a first rectifier drive module, a second rectifier drive module, a third rectifier drive module, and a fourth rectifier drive module; the first rectifier drive module and the fourth rectifier drive module are used to form a half-wave rectified voltage with positive voltage at the top and negative voltage at the bottom; the second rectifier drive module and the third rectifier drive module are used to form another half-wave rectified voltage with positive voltage at the top and negative voltage at the bottom; the first rectifier drive module comprises a first PMOS transistor, the second rectifier drive module comprises a second PMOS transistor, the third rectifier drive module comprises a first NMOS transistor, and the fourth rectifier drive module comprises a second NMOS transistor; the present application achieves efficient rectification by replacing the rectifier diode with a MOS transistor; when the MOS transistor is turned on, there is no conduction voltage drop between the source and drain as in the case of a rectifier diode, and the voltage equalization effect between the source and drain can be effectively maintained, thereby achieving efficient rectification. Therefore, the present invention can achieve equal voltage effects at the input and output ends of the power supply, improve rectification efficiency, and reduce power loss and electric energy waste. BRIEF DESCRIPTION OF THE DRAWINGS
[0038] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the present invention will be further described below with reference to the accompanying drawings and embodiments. The drawings described below are only some embodiments of the present invention. Those skilled in the art can also derive other drawings based on these drawings without inventive efforts.
[0039] Figure 1This is a principle block diagram of an energy-saving lighting lamp rectifier circuit according to a preferred embodiment of the present invention;
[0040] Figure 2 This is a principle block diagram of an energy-saving lighting lamp rectifier circuit according to another preferred embodiment of the present invention;
[0041] Figure 3 The diagram is a circuit diagram of an energy-saving lighting lamp rectifier circuit according to a preferred embodiment of the present invention. DETAILED DESCRIPTION
[0042] The core of the present invention is to provide an energy-saving lighting lamp rectifier circuit and device, which can effectively improve the rectification efficiency, reduce power loss and energy waste; realize non-polarity wiring mode, and facilitate on-site construction wiring of lamps.
[0043] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.
[0044] Example 1
[0045] Figure 1 This is a structural diagram of an energy-saving lighting lamp rectifier circuit provided in this application, including a power input module 1, a rectifier module 2 and a power output module 3; the power input module is electrically connected to the rectifier module, and the rectifier module is electrically connected to the power output module;
[0046] The rectifier module 2 includes a first rectifier drive module 21, a second rectifier drive module 22, a third rectifier drive module 23 and a fourth rectifier drive module 24; the first rectifier drive module 21 and the fourth rectifier drive module 24 are used to form a half-wave rectified voltage with positive upper and negative lower; the second rectifier drive module 22 and the third rectifier drive module 23 are used to form another half-wave rectified voltage with positive upper and negative lower;
[0047] The first rectifier driving module 21 includes a first PMOS transistor Q16, the second rectifier driving module 22 includes a second PMOS transistor Q15, the third rectifier driving module 23 includes a first NMOS transistor Q13, and the fourth rectifier driving module 24 includes a second NMOS transistor Q14;
[0048] The drain of the first PMOS transistor Q16 is electrically connected to the power input module 1, the drain of the first NMOS transistor Q13, and the gate of the first NMOS transistor Q14 respectively; the source of the first PMOS transistor Q16 is electrically connected to the source of the second PMOS transistor Q15, the gate of the second PMOS transistor Q15, and the power output module 3 respectively; the gate of the first PMOS transistor Q16 is electrically connected to the power input module 1, the gate of the first NMOS transistor Q13, and the drain of the second NMOS transistor Q14 respectively;
[0049] The drain of the second PMOS transistor Q15 is electrically connected to the power input module 1, the gate of the first NMOS transistor Q13, and the drain of the second NMOS transistor Q14 respectively; the source of the second PMOS transistor Q15 is electrically connected to the source of the first PMOS transistor Q16, the gate of the first PMOS transistor Q16, and the power output module 3 respectively; the gate of the second PMOS transistor Q15 is electrically connected to the power input module 1, the drain of the first NMOS transistor Q13, and the gate of the second NMOS transistor Q14 respectively;
[0050] The drain of the first NMOS transistor Q13 is electrically connected to the power input module 1 and the gate of the second NMOS transistor Q14 respectively; the gate of the first NMOS transistor Q13 is electrically connected to the power input module 1, the drain of the second NMOS transistor Q14 and the source of the first NMOS transistor Q13 respectively; the source of the first NMOS transistor Q13 is grounded;
[0051] The drain of the second NMOS transistor Q14 is electrically connected to the power input module 1 and the gate of the first NMOS transistor Q13 respectively; the gate of the second NMOS transistor Q14 is electrically connected to the power input module 1, the drain of the first NMOS transistor Q13 and the source of the second NMOS transistor Q14, and the source of the second NMOS transistor Q14 is grounded.
[0052] According to the existing national standard GB17945-2010, 6.17.6, fire emergency lighting fixtures must maintain a maximum surface temperature of internal heating components of 25°C ± 3°C, which clearly defines these components. The efficiency of rectifier circuits in lighting fixtures is gaining increasing attention, particularly in high-power bus-type fire emergency lighting products. However, existing products of this type often indirectly address the issue of heating exceeding 90°C in the bridge rectifier by reducing the overall power of the unit. This results in inflated power ratings and energy waste in most high-power bus-type fire emergency lighting products.
[0053] Therefore, the present invention provides an energy-saving lighting lamp rectifier circuit, which eliminates the voltage drop of the rectifier diode in the bridge stack while meeting the national standard, solves the power loss and energy waste caused by the conduction voltage drop of the rectifier diode in the bridge stack, improves the luminous efficiency of the lamp, expands the bus voltage input range of the lighting lamp, reduces the restrictions on the networking of the lighting system, and makes it more convenient to network the lamp in the emergency evacuation system.
[0054] The present invention achieves efficient rectification by replacing rectifier diodes with MOS transistors. When the MOS transistors are turned on, there is no conduction voltage drop between the source and drain, as occurs with rectifier diodes. This effectively maintains equal voltages between the source and drain, thus achieving efficient rectification. This application replaces the four rectifier diodes in a typical bridge rectifier with MOS transistors, supplemented by a gate control circuit to control the on and off states of the MOS transistors. This maintains the advantages of bridge rectification while improving rectification efficiency.
[0055] Specifically, when the power input module 1 is connected to the dedicated fire emergency evacuation bus 2, that is, the power input module 1 is connected to the first polarity connection mode, for example, when the first wire is connected to a positive voltage and the second wire is connected to a negative voltage, a negative voltage appears at the gate and source of the first PMOS transistor Q16, and a positive voltage appears at the gate and source of the second NMOS transistor Q14. According to the characteristics of MOS transistors, the first PMOS transistor Q16 and the second NMOS transistor Q14 are in a conductive state. At this time, the positive voltage is connected to the positive power supply terminal of the power output module 3 via the source of the conductive first PMOS transistor Q16, and the negative voltage is connected to the negative power supply terminal of the power output module 3 via the source of the conductive second NMOS transistor Q14. The second PMOS transistor Q15 and the first NMOS transistor Q13 are in a cut-off state because the voltage polarity of the gate and source electrodes does not meet the MOS transistor conduction condition. At this time, circuit rectification is completed, and the lamp realizes power supply to the back-end LED driver circuit and communication with the MCU control circuit due to the rectification circuit.
[0056] Specifically, by analogy, when the power input module 1 is connected to the second polarity connection mode, such as when the first wire is connected to a negative voltage and the second wire is connected to a positive voltage, a negative voltage appears at the gate and source of the second PMOS transistor Q15, and a positive voltage appears at the gate and source of the first NMOS transistor Q13. Based on the characteristics of the MOS transistors, the second PMOS transistor Q15 and the first NMOS transistor Q13 are in a conductive state. At this time, the positive voltage is connected to the positive power supply terminal of the power output module 3 via the source of the conductive second PMOS transistor Q15, and the negative voltage is connected to the negative power supply terminal of the power output module 3 via the source of the conductive second NMOS transistor Q13. The first PMOS transistor Q16 and the second NMOS transistor Q14 are in a cut-off state because the voltage polarity of the gate and source electrodes does not meet the MOS transistor conduction condition. At this time, the circuit rectification is completed. Therefore, in this embodiment, regardless of whether the input voltage is positive or reverse, the present application can complete the rectification, realizing a non-polarity connection mode for the lamp.
[0057] In summary, the present application provides an energy-saving lighting lamp rectifier circuit. In this solution, the energy-saving lighting lamp rectifier circuit includes a power input module 1, a rectifier module 2 and a power output module 3; the rectifier module 2 includes a first rectifier drive module 21, a second rectifier drive module 22, a third rectifier drive module 23 and a fourth rectifier drive module 24; the first rectifier drive module 21 and the fourth rectifier drive module 24 are used to form a half-wave rectifier voltage with positive upper and negative lower; the second rectifier drive module 22 and the third rectifier drive module 23 are used to form another half-wave rectifier voltage with positive upper and negative lower; the first rectifier drive module 21 and the fourth rectifier drive module 24 are used to form a half-wave rectifier voltage with positive upper and negative lower; The driving module 21 includes a first PMOS transistor Q16, the second rectifier driver module 22 includes a second PMOS transistor Q15, the third rectifier driver module 23 includes a first NMOS transistor Q13, and the fourth rectifier driver module 24 includes a second NMOS transistor Q14. When the first PMOS transistor Q16, the second PMOS transistor Q15, the first NMOS transistor Q13, and the second NMOS transistor Q14 are turned on, there is no conduction voltage drop, effective impedance, or power consumption between the source and drain terminals, as is the case with rectifier diodes. This enhances the power supply capability to the back-end circuits and ensures high-power, high-current rectifier output for devices. Therefore, the present invention can achieve equal voltages at the power input and output terminals, improve rectification efficiency, reduce power loss and energy waste, and implement a non-polarity wiring method, facilitating on-site wiring of the lamp.
[0058] Based on the above embodiment:
[0059] Please refer to Figure 2 , Figure 2 This is a structural diagram of an energy-saving lighting lamp rectifier circuit provided in this application.
[0060] As a preferred embodiment, the first rectifying and driving module 21 includes a first shunt module 211 , the second rectifying and driving module 22 includes a second shunt module 221 , the third rectifying and driving module 23 includes a third shunt module 231 , and the fourth rectifying and driving module 24 includes a fourth shunt module 241 ;
[0061] A first end of the first shunt module 211 is electrically connected to the drain of the first PMOS transistor Q16, and a second end of the first shunt module 211 is electrically connected to the source of the first PMOS transistor Q16; a first end of the second shunt module 221 is electrically connected to the drain of the second PMOS transistor Q15, and a second end of the second shunt module 221 is electrically connected to the source of the second PMOS transistor Q15;
[0062] The first end of the third shunt module 231 is electrically connected to the source of the first NMOS transistor Q13, and the second end of the third shunt module 231 is electrically connected to the drain of the first NMOS transistor Q13; the first end of the fourth shunt module 241 is electrically connected to the source of the second NMOS transistor Q14, and the second end of the fourth shunt module 241 is electrically connected to the drain of the second NMOS transistor Q14.
[0063] Specifically, in this embodiment, when the first PMOS transistor Q16, the second PMOS transistor Q15, the first NMOS transistor Q13, and the second NMOS transistor Q14 are conducting, the first shunt module 211 is used to shunt the current in the first PMOS transistor Q16 that has not yet been fully conducted, the second shunt module 221 is used to shunt the current in the second PMOS transistor Q15 that has not yet been fully conducted, the third shunt module is used to shunt the current in the first NMOS transistor Q13 that has not yet been fully conducted, and the fourth shunt module is used to shunt the current in the second NMOS transistor Q14 that has not yet been fully conducted.
[0064] As a preferred embodiment, the first rectifier driving module 21 includes a first clamping module 212 , the second rectifier driving module 22 includes a second clamping module 222 , the third rectifier driving module 23 includes a third clamping module 232 , and the fourth rectifier driving module 24 includes a fourth clamping module 242 ;
[0065] A first end of the first clamping module 212 is electrically connected to the gate of the first PMOS transistor Q16, and a second end of the first clamping module 212 is electrically connected to the source of the first PMOS transistor Q16; a first end of the second clamping module 222 is electrically connected to the gate of the second PMOS transistor Q15, and a second end of the second clamping module 222 is electrically connected to the source of the second PMOS transistor Q15;
[0066] A first end of the third clamping module 232 is electrically connected to the source of the first NMOS transistor Q13, and a second end of the third clamping module 232 is electrically connected to the gate of the first NMOS transistor Q13. A first end of the fourth clamping module 242 is electrically connected to the source of the second NMOS transistor Q14, and a second end of the fourth clamping module 242 is electrically connected to the gate of the second NMOS transistor Q14.
[0067] Specifically, in this embodiment, when the first PMOS transistor Q16, the second PMOS transistor Q15, the first NMOS transistor Q13, and the second NMOS transistor Q14 are turned on, the first clamping module 212 is used to clamp the voltage between the first PMOS transistor Q16 and the source to prevent the voltage from being too high and breaking down the PN junction between the first and source electrodes, thereby causing failure of the first PMOS transistor Q16. The second clamping module 222 is used to clamp the voltage between the second PMOS transistor Q15 and the source to prevent the voltage from being too high and breaking down the PN junction between the first and source electrodes, thereby causing failure of the second PMOS transistor Q15. The third clamping module 232 is used to clamp the voltage between the first NMOS transistor Q13 and the source to prevent the voltage from being too high and breaking down the PN junction between the first and source electrodes, thereby causing failure of the first NMOS transistor Q13. The fourth clamping module 242 is used to clamp the voltage between the second NMOS transistor Q14 and the source to prevent the voltage from being too high and breaking down the PN junction between the first and source electrodes, thereby causing failure of the second NMOS transistor Q14.
[0068] As a preferred embodiment, the power input module 1 includes a first wire 11 and a second wire 12;
[0069] The first wire 11 is electrically connected to the drain of the first PMOS transistor Q16, the gate of the second PMOS transistor Q15, the drain of the first NMOS transistor Q13, and the gate of the second NMOS transistor Q14 respectively;
[0070] The second wire 12 is electrically connected to the gate of the first PMOS transistor Q16 , the drain of the second PMOS transistor Q15 , the gate of the first NMOS transistor Q13 , and the drain of the second NMOS transistor Q14 , respectively.
[0071] Specifically, when the energy-saving lighting lamp rectifier circuit of the present invention is applied to a high-power energy-saving fire emergency lighting lamp, the first wire 11 and the second wire 12 are used to connect two bus lines of the fire emergency lighting and the evacuation indication system respectively.
[0072] As a preferred embodiment, the power output module 3 includes a third wire 31 and a fourth wire 32;
[0073] The third wire 31 is electrically connected to the source of the first PMOS transistor Q16 and the source of the second PMOS transistor Q15 respectively;
[0074] The fourth wire 32 is electrically connected to the source of the first NMOS transistor Q13 and the source of the second NMOS transistor Q14 respectively.
[0075] Specifically, the third wire 31 serves as the positive pole of the rectified output power supply, is connected to the LED drive circuit and MCU control circuit of the subsequent stage of the lamp and provides a power supply voltage; the fourth wire 32 serves as the negative pole of the rectified output power supply, is connected to the "ground" of the LED drive circuit and MCU control circuit of the subsequent stage of the lamp and provides a "ground" loop.
[0076] Based on the above embodiment:
[0077] Please refer to Figure 3 , Figure 3 This is a circuit diagram of an energy-saving lighting lamp rectifier circuit provided in this application.
[0078] As a preferred embodiment, the first shunt module 211 includes a first diode D4, the second shunt module 221 includes a second diode D7, the third shunt module 231 includes a third diode D8, and the fourth shunt module 241 includes a fourth diode D9;
[0079] The anode of the first diode D4 is electrically connected to the drain of the first PMOS transistor Q16, and the cathode of the first diode D4 is electrically connected to the source of the first PMOS transistor Q16; the anode of the second diode D7 is electrically connected to the drain of the second PMOS transistor Q15, and the cathode of the second diode D7 is electrically connected to the source of the second PMOS transistor Q15;
[0080] The anode of the third diode D8 is electrically connected to the source of the first NMOS transistor Q13, and the cathode of the third diode D8 is electrically connected to the drain of the first NMOS transistor Q13; the anode of the fourth diode D9 is electrically connected to the source of the second NMOS transistor Q14, and the cathode of the fourth diode D9 is electrically connected to the drain of the second NMOS transistor Q14.
[0081] Specifically, the first diode D4 , the second diode D7 , the third diode D8 and the fourth diode D9 are all rectifier diodes, used to shunt the current in the MOS tube that has not yet been fully turned on.
[0082] Preferably, the first clamping module 212 includes a fifth diode ZD4, the second clamping module 222 includes a sixth diode ZD5, the third clamping module 232 includes a seventh diode ZD6, and the fourth clamping module 242 includes an eighth diode ZD7;
[0083] The anode of the fifth diode ZD4 is electrically connected to the gate of the first PMOS transistor Q16, and the cathode of the fifth diode ZD4 is electrically connected to the source of the first PMOS transistor Q16; the anode of the sixth diode ZD5 is electrically connected to the gate of the second PMOS transistor Q15, and the cathode of the sixth diode ZD5 is electrically connected to the source of the second PMOS transistor Q15;
[0084] An anode of the seventh diode ZD6 is electrically connected to the source of the first NMOS transistor Q13, and a cathode of the seventh diode ZD6 is electrically connected to the gate of the second PMOS transistor Q13. An anode of the eighth diode ZD7 is electrically connected to the source of the second NMOS transistor Q14, and a cathode of the eighth diode ZD7 is electrically connected to the gate of the second NMOS transistor Q14.
[0085] Specifically, the fifth diode ZD4, the sixth diode ZD5, the seventh diode ZD6 and the eighth diode ZD7 are voltage stabilizing diodes, which are used to clamp the voltages at the MOSFET and source terminals to prevent excessive voltage from breaking through the PN junction between the MOSFET and source terminals, leading to MOSFET failure.
[0086] As a preferred embodiment, the first rectifier driving module 21 further includes a first voltage divider module 213, the first voltage divider module 213 includes a first resistor R74 and a second resistor R75; the third rectifier driving module 23 further includes a second voltage divider module 233, the second voltage divider module 233 includes a third resistor R78 and a fourth resistor R79; the second rectifier driving module 22 further includes a third voltage divider module 223, the third voltage divider module 223 includes a fifth resistor R76 and a sixth resistor R77, and the fourth rectifier driving module 24 includes a fourth voltage divider module 224 including a seventh resistor R80 and an eighth resistor R81;
[0087] A first end of the first resistor R74 and a first end of the second resistor R75 are electrically connected to the gate of the first PMOS transistor Q16, a second end of the first resistor R74 is electrically connected to the source of the first PMOS transistor Q16, and a second end of the second resistor R75 is electrically connected to the power input module 1;
[0088] A first end of the third resistor R78 and a first end of the fourth resistor R79 are electrically connected to the gate of the first NMOS transistor Q13 , a second end of the third resistor R78 is electrically connected to the power input module 1 , and a second end of the fourth resistor R79 is grounded.
[0089] A first end of the fifth resistor R76 and a first end of the sixth resistor R77 are electrically connected to the gate of the second PMOS transistor Q15 , a second end of the fifth resistor R76 is electrically connected to the source of the second PMOS transistor Q15 , and a second end of the sixth resistor R77 is electrically connected to the power input module 1 ;
[0090] A first end of the seventh resistor R80 and a first end of the eighth resistor R81 are electrically connected to the gate of the second NMOS transistor Q14 , a second end of the seventh resistor R80 is electrically connected to the power input module 1 , and a second end of the eighth resistor R81 is grounded.
[0091] Specifically, resistors R74 and R75, resistors R76 and R77, resistors R78 and R79, and resistors R80 and R81 connected in series form four groups of voltage transformer circuits to provide bias voltages to the gates and sources of the corresponding four MOS tubes.
[0092] Preferably, the third rectifier driving module 23 further includes a first capacitor C27;
[0093] A first end of the first capacitor C27 is electrically connected to the gate of the first NMOS transistor Q13 , and a second end of the first capacitor C27 is grounded.
[0094] Preferably, the fourth rectifying and driving module 24 further includes a second capacitor C28;
[0095] A first end of the second capacitor C28 is electrically connected to the gate of the second NMOS transistor Q14 , and a second end of the second capacitor C28 is grounded.
[0096] Specifically, the non-polarized capacitors C27 and C28 are used to maintain the voltage drop between the gate and source of the corresponding MOS transistor.
[0097] In summary, from the electrical characteristics of the MOS tube, it can be seen that the drain and source of the MOS tube are in a cut-off state under normal conditions. When a reverse voltage is applied between the gate and source of the PMOS tube, or a forward voltage is applied between the gate and source of the NMOS tube, the drain and source of the MOS tube will be transformed into a conducting state, and the voltage drop between the drain and source of the MOS tube in the conducting state is almost zero. In this rectifier circuit, since the voltage drop between the drain and source of the MOS tube in the conducting state is zero, the MOS tube does not suffer from power loss and device heating caused by voltage drop. Therefore, the present application realizes a non-polarity wiring method for the power input port of the lamp, which is convenient for technicians to perform lamp wiring operations; after the lamp power line is connected, the MOS tube rectifier is turned on and the voltage drop is zero, which is beneficial to the stable power supply of the back-end LED drive circuit and the communication of the MCU control circuit, and reduces the power loss of the lighting fixture.
[0098] The present application also provides an energy-saving lighting lamp rectifier device, which includes the energy-saving lighting lamp rectifier circuit described above.
[0099] For an introduction to an energy-saving lighting lamp rectifier device in a charging pile provided in this application, please refer to the above embodiment, and this application will not go into details here.
[0100] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Reference can be made to the common and similar parts between the various embodiments. For the devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple, and the relevant parts can be referred to the method description.
[0101] It should also be noted that, in this specification, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus comprising the element.
[0102] The above description of the disclosed embodiments is intended to enable one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not limited to the embodiments shown herein but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. An energy-saving lighting lamp rectifier circuit, characterized in that: include: A power input module, a rectifier module, and a power output module; the power input module is electrically connected to the rectifier module, and the rectifier module is electrically connected to the power output module; The rectifier module includes a first rectifier drive module, a second rectifier drive module, a third rectifier drive module and a fourth rectifier drive module; the first rectifier drive module and the fourth rectifier drive module are used to form a half-wave rectifier voltage with positive upper and negative lower; the second rectifier drive module and the third rectifier drive module are used to form another half-wave rectifier voltage with positive upper and negative lower; The first rectifier driving module includes a first PMOS transistor, the second rectifier driving module includes a second PMOS transistor, the third rectifier driving module includes a first NMOS transistor, and the fourth rectifier driving module includes a second NMOS transistor; The drain of the first PMOS transistor is electrically connected to the power input module, the drain of the first NMOS transistor, and the gate of the second NMOS transistor respectively; the source of the first PMOS transistor is electrically connected to the source of the second PMOS transistor, the gate of the second PMOS transistor, and the power output module respectively; the gate of the first PMOS transistor is electrically connected to the power input module, the gate of the first NMOS transistor, and the drain of the second NMOS transistor respectively; The drain of the second PMOS transistor is electrically connected to the power input module, the gate of the first NMOS transistor, and the drain of the second NMOS transistor respectively; the source of the second PMOS transistor is electrically connected to the source of the first PMOS transistor, the gate of the first PMOS transistor, and the power output module respectively; the gate of the second PMOS transistor is electrically connected to the power input module, the drain of the first NMOS transistor, and the gate of the second NMOS transistor respectively; The drain of the first NMOS transistor is electrically connected to the power input module and the gate of the second NMOS transistor respectively; the gate of the first NMOS transistor is electrically connected to the power input module, the drain of the second NMOS transistor and the source of the first NMOS transistor respectively; the source of the first NMOS transistor is grounded; The drain of the second NMOS transistor is electrically connected to the power input module and the gate of the first NMOS transistor respectively; the gate of the second NMOS transistor is electrically connected to the power input module, the drain of the first NMOS transistor and the source of the second NMOS transistor, and the source of the second NMOS transistor is grounded.
2. The energy-saving lighting lamp rectifier circuit according to claim 1, characterized in that: The first rectifier driving module includes a first shunt module, the second rectifier driving module includes a second shunt module, the third rectifier driving module includes a third shunt module, and the fourth rectifier driving module includes a fourth shunt module; A first end of the first shunt module is electrically connected to the drain of the first PMOS transistor, and a second end of the first shunt module is electrically connected to the source of the first PMOS transistor; a first end of the second shunt module is electrically connected to the drain of the second PMOS transistor, and a second end of the second shunt module is electrically connected to the source of the second PMOS transistor; The first end of the third shunt module is electrically connected to the source of the first NMOS tube, and the second end of the third shunt module is electrically connected to the drain of the first NMOS tube; the first end of the fourth shunt module is electrically connected to the source of the second NMOS tube, and the second end of the fourth shunt module is electrically connected to the drain of the second NMOS tube.
3. An energy-saving lighting lamp rectifier circuit according to claim 1 or 2, characterized in that: The first rectifier driving module includes a first clamping module, the second rectifier driving module includes a second clamping module, the third rectifier driving module includes a third clamping module, and the fourth rectifier driving module includes a fourth clamping module; A first end of the first clamping module is electrically connected to the gate of the first PMOS transistor, and a second end of the first clamping module is electrically connected to the source of the first PMOS transistor; a first end of the second clamping module is electrically connected to the gate of the second PMOS transistor, and a second end of the second clamping module is electrically connected to the source of the second PMOS transistor; A first end of the third clamping module is electrically connected to the source of the first NMOS transistor, and a second end of the third clamping module is electrically connected to the gate of the first NMOS transistor; a first end of the fourth clamping module is electrically connected to the source of the second NMOS transistor, and a second end of the fourth clamping module is electrically connected to the gate of the second NMOS transistor.
4. The energy-saving lighting lamp rectifier circuit according to claim 1, characterized in that: The power input module includes a first wire and a second wire; The first wire is electrically connected to the drain of the first PMOS transistor, the gate of the second PMOS transistor, the drain of the first NMOS transistor, and the gate of the second NMOS transistor respectively; The second conductive line is electrically connected to the gate of the first PMOS transistor, the drain of the second PMOS transistor, the gate of the first NMOS transistor, and the drain of the second NMOS transistor respectively.
5. The energy-saving lighting lamp rectifier circuit according to claim 1, characterized in that: The power output module includes a third wire and a fourth wire; The third wire is electrically connected to the source of the first PMOS transistor and the source of the second PMOS transistor respectively; The fourth wire is electrically connected to the source of the first NMOS transistor and the source of the second NMOS transistor respectively.
6. The energy-saving lighting lamp rectifier circuit according to claim 2, characterized in that: The first shunt module includes a first diode, the second shunt module includes a second diode, the third shunt module includes a third diode, and the fourth shunt module includes a fourth diode; The anode of the first diode is electrically connected to the drain of the first PMOS transistor, and the cathode of the first diode is electrically connected to the source of the first PMOS transistor; the anode of the second diode is electrically connected to the drain of the second PMOS transistor, and the cathode of the second diode is electrically connected to the source of the second PMOS transistor; The anode of the third diode is electrically connected to the source of the first NMOS tube, and the cathode of the third diode is electrically connected to the drain of the first NMOS tube; the anode of the fourth diode is electrically connected to the source of the second NMOS tube, and the cathode of the fourth diode is electrically connected to the drain of the second NMOS tube.
7. The energy-saving lighting lamp rectifier circuit according to claim 3, characterized in that: The first clamping module includes a fifth diode, the second clamping module includes a sixth diode, the third clamping module includes a seventh diode, and the fourth clamping module includes an eighth diode; The anode of the fifth diode is electrically connected to the gate of the first PMOS transistor, and the cathode of the fifth diode is electrically connected to the source of the first PMOS transistor respectively; the anode of the sixth diode is electrically connected to the gate of the second PMOS transistor, and the cathode of the sixth diode is electrically connected to the source of the second PMOS transistor; The anode of the seventh diode is electrically connected to the source of the first NMOS transistor, and the cathode of the seventh diode is electrically connected to the gate of the first NMOS transistor; the anode of the eighth diode is electrically connected to the source of the second NMOS transistor, and the cathode of the eighth diode is electrically connected to the gate of the second NMOS transistor.
8. The energy-saving lighting lamp rectifier circuit according to claim 7, characterized in that: The first rectifier driving module further includes a first voltage divider module, which includes a first resistor and a second resistor; the third rectifier driving module further includes a second voltage divider module, which includes a third resistor and a fourth resistor; The first end of the first resistor and the first end of the second resistor are electrically connected to the gate of the first PMOS transistor, the second end of the first resistor is electrically connected to the source of the first PMOS transistor, and the second end of the second resistor is electrically connected to the power input module; The first end of the third resistor and the first end of the fourth resistor are electrically connected to the gate of the first NMOS transistor, the second end of the third resistor is electrically connected to the power input module, and the second end of the fourth resistor is grounded.
9. The energy-saving lighting lamp rectifier circuit according to claim 8, characterized in that: The third rectifier driving module further includes a first capacitor; A first end of the first capacitor is electrically connected to the gate of the first NMOS transistor, and a second end of the first capacitor is grounded.
10. An energy-saving lighting lamp rectifier, characterized in that: The invention comprises an energy-saving lighting lamp rectifier circuit as described in any one of claims 1 to 9.
Citation Information
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