A Cascode Amplifier Based on SiGe-BiCMOS Process

Abstract

The present invention proposes a common-source common-base amplifier based on SiGe-BiCMOS process, including an input matching unit, a first-stage differential common-source common-base unit, a second-stage differential common-source common-base unit, a third-stage differential common-source common-base unit, a fourth-stage differential common-source common-base unit, and an output impedance matching unit; compared with a low-noise amplifier with a four-stage single-ended structure, it has better anti-noise capability and can obtain higher gain at a lower frequency; compared with a low-noise amplifier with a five-stage differential structure, it has stronger stability. The present invention adopts MOS transistors at the input stage, which obtains a lower noise coefficient at a higher frequency compared with HBT transistors; the input stage adopts a composite transistor structure to improve the power gain of the circuit; the common-source common-base structure adopted by the present invention reduces the Miller effect of the device and effectively expands the working frequency band.

Description

Technical Field

[0001] The invention belongs to the technical field of wireless communication, and in particular relates to a cascode amplifier based on SiGe-BiCMOS technology. Background Art

[0002] As early as 1957, Dr. H. Kroemer had proposed the concept of heterojunction bipolar transistors, but the SiGe HBTBiCMOS process appeared later. Due to the limitation of SiGe mask growth, the first HBT did not officially appear until 1987. In 1990, the performance of HBT had surpassed that of Si BJT, with a peak f T Reaching 75GHz, twice that of Si BJT. In 1994, SiGeHBT process was officially put into commercial production. Soon, SiGe HBT BiCMOS technology, which integrates SiGe HBT technology and CMOS technology, appeared in 1995. Since then, SiGe HBT BiCMOS technology has developed rapidly, and its performance has been comparable to the best ILI-V compounds of the same generation. The third generation of SiGe technology added pnp transistors, f T / f max Reached 80 / 120GHz, while the fourth generation SiGeHBT's f T / f max Reaching 375 / 210GHz, this expands the application of SiGe HBT BiCMOS technology from various analog RF applications to microwave and millimeter wave fields. SiGe BiCMOS has high performance similar to that of III-V compounds, while also having the advantages of high integration, large output and low cost, making it possible to integrate digital, analog, RF, microwave and millimeter wave modules into a system-level chip design. Based on the above advantages, SiGeHBT BiCMOS technology can provide the required high-performance, high-stability, small size, light weight and low-cost transceivers for the next generation of ground and space communications, microwave and millimeter wave applications.

[0003] The low noise amplifier LNA is an important module in the receiving link of the wireless communication system. It amplifies the signal level without deteriorating the signal-to-noise ratio of the input signal. LNA is the first-stage amplification module in the receiving link. From the noise formula of the cascade system, it can be seen that the noise factor of LNA is directly added to the total noise factor of the system. In order to reduce the total noise factor of the system, the noise of LNA should be as low as possible. Gain is also an important performance indicator of LNA. LNA should provide as much bandwidth as possible without reducing the signal-to-noise ratio and ensure the linearity requirements. LNA needs to amplify large signals without introducing distortion, so linearity is another important performance indicator of LNA. The design of LNA must meet the gain, linearity and noise requirements while being within the specified minimum power consumption range. Passive filters are usually added between LNA and antenna for filtering, and the back end is usually connected to a load with a specific impedance, so LNA is required to meet input and output matching conditions.

[0004] Bipolar LNA is the earliest LNA implemented in integrated circuits. HBT transistors have been widely used in RF integrated circuits, especially RF front-ends, due to their high power density, high gain, low phase noise, good linearity, and single-power supply operation. However, the noise coefficient of HBT transistors increases rapidly with the increase of operating frequency, while the noise coefficient of MOS transistors increases more slowly with the increase of operating frequency. Therefore, HBT transistors are not suitable for application scenarios with strict requirements on noise coefficient. In recent years, SiGe BiCMOS technology has allowed HBT transistors and CMOS transistors to be integrated on a single chip. Summary of the invention

[0005] In view of the above defects and needs of the prior art, the present invention proposes a common-source common-base amplifier based on SiGe-BiCMOS process, which comprises an input matching unit, an output impedance matching unit, and first-stage, second-stage, third-stage, and fourth-stage differential common-source common-base units; compared with a low-noise amplifier with a four-stage single-ended structure, the present invention has better anti-noise capability, and obtains higher gain at lower frequencies and lower noise coefficient at higher frequencies; compared with a low-noise amplifier with a five-stage differential structure, the present invention has stronger stability; based on the SiGe BiCMOS process which is different from the current general-purpose GaAs and CMOS processes, the SiGe BiCMOS product has lower power consumption, smaller volume and higher integration, and can be integrated with other circuits. At the same time, the development of the SiGe BiCMOS process also makes the implementation of such a circuit more feasible and the circuit cost lower.

[0006] The specific implementation contents of the present invention are as follows:

[0007] The present invention proposes a common-source cascode amplifier based on SiGe-BiCMOS process, comprising a four-stage differential amplifier structure cascade, an input matching unit, a first-stage differential common-source cascode unit, a second-stage differential common-source cascode unit, a third-stage differential common-source cascode unit, a fourth-stage differential common-source cascode unit, and an output impedance matching unit, which are connected in sequence;

[0008] The first-stage differential cascode unit, the second-stage differential cascode unit, the third-stage differential cascode unit, and the fourth-stage differential cascode unit structures all include an input matching network and a differential amplifier circuit; the differential amplifier circuit is provided with an HBT transistor and a MOS transistor based on a SiGe-BiCMOS process;

[0009] The input matching network of the first-stage differential common-source common-base unit is connected to the input matching short line and the differential amplifier circuit of the first-stage differential common-source common-base unit; the first-stage differential common-source common-base unit, the second-stage differential common-source common-base unit, the third-stage differential common-source common-base unit, and the fourth-stage differential common-source common-base unit are connected by the differential amplifier circuit of the previous stage and the input matching unit of the differential amplifier unit of the next stage; the differential amplifier circuit of the fourth-stage differential common-source common-base unit is connected to the output impedance matching unit.

[0010] In order to better implement the present invention, further, the differential amplifier circuit of the first-stage differential common-source common-base unit includes HBT transistor B1b, HBT transistor B2b, MOS transistor M1b, MOS transistor M2b, MOS transistor M3b, MOS transistor M4b, MOS transistor M5b, MOS transistor M6b, capacitor C1b, capacitor C2b, capacitor C3b, capacitor C5b, capacitor C7b, capacitor C8b, resistor R1b, resistor R2b, resistor R3b, resistor R4b, resistor R5b, resistor R6b, resistor R7b, resistor R8b, resistor R9b, resistor R10b, resistor R11b, transmission load TL1b, transmission load TL2b;

[0011] The emitter of the HBT transistor B1b is connected to the drain of the MOS transistor M1b, the base is connected to the grounded capacitor C1b, and the collector is connected to the grounded capacitor C7b;

[0012] The emitter of the HBT transistor B2b is connected to the drain of the MOS transistor M4b, the base is connected to the grounded capacitor C2b, and the collector is connected to the capacitor C8b;

[0013] The source of the MOS transistor M1b is connected to the source of the MOS transistor M4b, and the gate is connected to the source of the MOS transistor M2b;

[0014] The drain of the MOS transistor M2b is connected to the resistor R3b, and the gate is connected to the input matching unit;

[0015] The gate of the MOS transistor M3b is connected to the gate of the MOS transistor M1b through the resistor R5b, the drain is connected to the gate of the MOS transistor M2b, and the source is grounded;

[0016] The gate of the MOS transistor M4b is connected to the source of the MOS transistor M5b;

[0017] The drain of the MOS transistor M5b is connected to the resistor R7b, and the gate is connected to the input matching unit;

[0018] The gate of the MOS transistor M6b is connected to the gate of the MOS transistor M4b through the resistor R9b, the drain is connected to the gate of the MOS transistor M5b, and the source is grounded;

[0019] One end of the resistor R1b is connected to the base of the HBT transistor B1b, and the other end is connected to the power supply;

[0020] One end of the resistor R2b is connected to the base of the HBT transistor B2b, and the other end is connected to the power supply;

[0021] One end of the transmission load TL1b is connected to the collector of the HBT transistor B1b, and the other end is connected to the power supply;

[0022] One end of the transmission load TL2b is connected to the collector of the HBT transistor B2b, and the other end is connected to the power supply;

[0023] One end of the resistor R6b is connected to the drain of the MOS tube M3b, and the other end is connected to the power supply;

[0024] One end of the resistor R4b is connected to the source of the MOS tube M2b, and the other end is connected to the ground;

[0025] One end of the resistor R10b is connected to the drain of the MOS tube M6b, and the other end is connected to the power supply;

[0026] One end of the resistor R8b is connected to the source of the MOS tube M5b, and the other end is connected to the ground;

[0027] One end of the resistor R11b is connected between the source of the MOS transistor M1b and the source of the MOS transistor M4b, and the other end is connected to the ground;

[0028] One end of the capacitor C3b is connected between the gate of the MOS tube M3b and the resistor R5b, and the other end is grounded;

[0029] One end of the capacitor C5b is connected between the gate of the MOS tube M6b and the resistor R9b, and the other end is grounded.

[0030] In order to better implement the present invention, further, the input matching unit of the first-stage differential common-source common-base unit includes a transmission line TL5b, a transmission line TL6b, a capacitor C4b, and a capacitor C6b; the input matching short line includes an input matching short line TL3b and an input matching short line TL4b;

[0031] One end of the transmission line TL6b is connected to the input matching short line TL4b, and the other end is connected to the capacitor C6b; the other end of the capacitor C6b is connected to the gate of the MOS transistor M5b of the first-stage differential common-source common-base unit;

[0032] One end of the input matching short line TL5b is connected to the input matching short line TL3b, and the other end is connected to the capacitor C4b; the other end of the capacitor C4b is connected to the gate of the MOS transistor M2b of the first-stage differential common-source common-base unit.

[0033] In order to better implement the present invention, further, the structures of the input matching unit and the differential amplifier circuit of the second-stage differential cascode unit are consistent with the corresponding structures of the input matching unit and the differential amplifier circuit of the first-stage differential cascode unit;

[0034] The capacitor C7b of the first-stage differential cascode unit is connected to the input matching short line TL3b of the input matching unit of the second-stage differential cascode unit;

[0035] The capacitor C8b of the first-stage differential cascode unit is connected to the input matching short line TL4b of the input matching unit of the second-stage differential cascode unit;

[0036] The capacitor C7b and the capacitor C8b of the second-stage differential cascode unit are respectively connected to the input matching unit of the third-stage differential cascode unit.

[0037] In order to better implement the present invention, further, the structure of the input matching unit and the differential amplifier circuit of the third-stage differential cascode unit corresponds to the structure of the input matching unit and the differential amplifier circuit of the first-stage differential cascode unit and the second-stage differential cascode unit;

[0038] The capacitor C7b of the second-stage differential cascode unit is connected to the input matching short line TL3b of the input matching unit of the third-stage differential cascode unit;

[0039] The capacitor C8b of the second-stage differential cascode unit is connected to the input matching short line TL4b of the input matching unit of the third-stage differential cascode unit;

[0040] The capacitor C7b and the capacitor C8b of the third-stage differential cascode unit are respectively connected to the input matching unit of the fourth-stage differential cascode unit.

[0041] In order to better implement the present invention, further, the structures of the input matching unit and the differential amplifier circuit of the fourth differential amplifier unit correspond to the structures of the input matching unit and the differential amplifier circuit of the first-stage differential cascode unit, the second-stage differential cascode unit, and the third-stage differential cascode unit;

[0042] The capacitor C7b of the third-stage differential cascode unit is connected to the input matching short line TL3b of the input matching unit of the fourth-stage differential cascode unit;

[0043] The capacitor C8b of the third-stage differential cascode unit is connected to the input matching short line TL4b of the input matching unit of the fourth-stage differential cascode unit;

[0044] The capacitor C7b and the capacitor C8b of the fourth-stage differential cascode unit are two output terminals of the low-noise broadband differential amplifier based on the SiGe-BiCMOS process and are respectively connected to the output impedance matching unit.

[0045] In order to better implement the present invention, further, the output impedance matching unit includes a capacitor C9b and a capacitor C10b;

[0046] One end of the capacitor C9b is connected to the RF output signal OUT1b+, and the other end is connected to the ground;

[0047] One end of the capacitor C10b is connected to the RF output signal OUT1b-, and the other end is connected to the ground.

[0048] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0049] (1) The common source and common base structure provided by the present invention reduces the Miller effect of the device and effectively expands the operating frequency band;

[0050] (2) The present invention improves the power gain of the circuit by adopting a composite transistor structure at the input stage;

[0051] (3) The present invention achieves a lower noise figure at a higher frequency by using MOS transistors at the input stage compared to HBT transistors;

[0052] (4) The present invention is based on the SiGe BiCMOS process. The SiGe heterojunction bipolar transistor uses band engineering to significantly improve the performance of the Si bipolar junction transistor while maintaining full compatibility with the commonly used Si complementary metal oxide semiconductor process, thus giving rise to bipolar complementary metal oxide semiconductor technology. Ge has a smaller band gap than Si, and SiGe alloys can be generated by doping Ge into a neutral Si base. For every 10% of Ge doped into Si, the band gap decreases by approximately 75meV. SiGeHBT has greatly improved performance compared to traditional Si BJTs;

[0053] (5) The present invention is based on the SiGe BiCMOS process which is different from the currently used GaAs and CMOS processes. The product of the present invention using the SiGe BiCMOS process has lower power consumption, smaller size and higher integration, and can be integrated with other circuits. At the same time, the development of the SiGe BiCMOS process also makes the realization of such circuits more feasible and the circuit cost lower;

[0054] (6) Compared with the low-noise amplifier with a four-stage single-ended structure, the present invention has better anti-noise capability and can obtain higher gain at a lower frequency;

[0055] (7) Compared with the low-noise amplifier with a five-level differential structure, the present invention has stronger stability. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] Figure 1 This is the schematic diagram of the traditional differential amplifier circuit;

[0057] Figure 2 This is a schematic diagram of a low-noise broadband differential amplifier circuit based on SiGe-BiCMOS technology proposed by the present invention;

[0058] Figure 3 A schematic diagram comparing the noise coefficients of the differential amplifier of the present invention and the traditional differential amplifier. DETAILED DESCRIPTION

[0059] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. It should be understood that the described embodiments are only part of the embodiments of the present invention, not all of the embodiments, and therefore should not be regarded as limiting the scope of protection. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technical personnel in this field without making creative work are within the scope of protection of the present invention.

[0060] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "disposed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0061] Embodiment 1:

[0062] This embodiment proposes a common-source cascode amplifier based on SiGe-BiCMOS process, such as Figure 2 As shown, it includes a four-stage differential amplifier structure cascade, an input matching unit, a first-stage differential common-source common-base unit, a second-stage differential common-source common-base unit, a third-stage differential common-source common-base unit, a fourth-stage differential common-source common-base unit, and an output impedance matching unit connected in sequence;

[0063] The first-stage differential cascode unit, the second-stage differential cascode unit, the third-stage differential cascode unit, and the fourth-stage differential cascode unit structures all include an input matching network and a differential amplifier circuit; the differential amplifier circuit is provided with an HBT transistor and a MOS transistor based on a SiGe-BiCMOS process;

[0064] The input matching network of the first-stage differential common-source common-base unit is connected to the input matching short line and the differential amplifier circuit of the first-stage differential common-source common-base unit; the first-stage differential common-source common-base unit, the second-stage differential common-source common-base unit, the third-stage differential common-source common-base unit, and the fourth-stage differential common-source common-base unit are connected by the differential amplifier circuit of the previous stage and the input matching unit of the differential amplifier unit of the next stage; the differential amplifier circuit of the fourth-stage differential common-source common-base unit is connected to the output impedance matching unit.

[0065] Embodiment 2:

[0066] This embodiment is based on the above embodiment 1. Figure 2As shown, in order to better implement the present invention, further, the differential amplifier circuit of the first-stage differential common-source common-base unit includes HBT transistor B1b, HBT transistor B2b, MOS transistor M1b, MOS transistor M2b, MOS transistor M3b, MOS transistor M4b, MOS transistor M5b, MOS transistor M6b, capacitor C1b, capacitor C2b, capacitor C3b, capacitor C5b, capacitor C7b, capacitor C8b, resistor R1b, resistor R2b, resistor R3b, resistor R4b, resistor R5b, resistor R6b, resistor R7b, resistor R8b, resistor R9b, resistor R10b, resistor R11b, transmission load TL1b, transmission load TL2b;

[0067] The emitter of the HBT transistor B1b is connected to the drain of the MOS transistor M1b, the base of the HBT transistor B1b is connected to the first end of the capacitor C1b and the first end of the resistor R1b, the collector of the HBT transistor B1b is connected to the first end of the transmission load TL1b and the first end of the capacitor C7b, the emitter of the HBT transistor B2b is connected to the drain of the MOS transistor M4b, the base of the HBT transistor B2b is connected to the first end of the capacitor C2b and the first end of the resistor R2b, the collector of the HBT transistor B2b is connected to the first end of the transmission load TL2b and the first end of the capacitor C8b The first end of the MOS transistor M1b is connected to the first end of the MOS transistor M2b, the first end of the resistor R4b, and the first end of the resistor R5b. The second end of the resistor R4b is connected to the first end of the MOS transistor M3b. The second end of the resistor R5b is connected to the first end of the MOS transistor M3b. , the first end of the capacitor C3b is connected together, the second end of the capacitor C3b is connected to the ground, the source of the MOS transistor M3b is connected to the ground, the drain of the MOS transistor M3b is connected to the input matching unit of the first-stage differential common-source common-base unit, the first end of the resistor R6b and the gate of the MOS transistor M2b, the drain of the MOS transistor M2b is connected to the first end of the resistor R6b, the second end of the resistor R6b and the second end of the resistor R3b are connected to the power supply VCC1b, the gate of the MOS transistor M3b is connected to the source of the MOS transistor M5b, the first end of the resistor R8b, and the first end of the resistor R9b The first and second ends of the MOS transistor M6b and the second and third ends of the MOS transistor M5b are connected together, the second end of the resistor R8b is connected to the ground, the second end of the resistor R9b is connected to the gate of the MOS transistor M6b and the first end of the capacitor C5b, the second end of the capacitor C5b is connected to the ground, the source of the MOS transistor M6b is connected to the ground, the drain of the MOS transistor M6b is connected to the input matching unit of the first-stage differential common-source common-base unit, the first end of the resistor R10b and the gate of the MOS transistor M5b, the drain of the MOS transistor M5b is connected to the first end of the resistor R7b, and the second end of the resistor R7b and the second end of the resistor R10b are connected to the power supply VCC1b.

[0068] The second end of the capacitor C7b is connected to the input matching short line of the second stage differential amplifier circuit;

[0069] The second end of the capacitor C8b is connected to the input matching short line of the second stage differential amplifier circuit.

[0070] Further, the input matching unit of the first-stage differential common-source common-base unit includes a transmission line TL5b, a transmission line TL6b, a capacitor C4b, and a capacitor C6b; the input matching short line includes an input matching short line TL3b and an input matching short line TL4b;

[0071] The first end of the transmission line TL6b is connected to the first end of the input matching short line TL4b, and the second end of the transmission line TL6b is connected to the first end of the capacitor C6b; the second end of the capacitor C6b is connected to the gate of the MOS transistor M5b of the first-stage differential common-source common-base unit, and the second end of the input matching short line TL4b is connected to the input signal IN1b-; the first end of the transmission line TL5b is connected to the first end of the input matching short line TL3b, and the second end of the transmission line TL5b is connected to the first end of the capacitor C4b; the second end of the capacitor C4b is connected to the gate of the MOS transistor M2b of the first-stage differential common-source common-base unit, and the second end of the input matching short line TL3b is connected to the input signal IN1b+.

[0072] Working principle: Figure 1 FIG. 1 is a schematic diagram of a conventional differential amplifier circuit. The present embodiment is improved on the basis of the conventional differential amplifier by providing a MOS transistor M2b, a MOS transistor M3b, a MOS transistor M5b, a MOS transistor M6b, a capacitor C3b, a capacitor C5b, a resistor R3b, a resistor R4b, a resistor R5b, a resistor R6b, a resistor R7b, a resistor R8b, a resistor R9b, and a resistor R10b on the basis of the conventional differential amplifier.

[0073] Since the second-stage differential cascode unit, the third-stage differential cascode unit, and the fourth-stage differential cascode unit have the same structure as the first-stage differential cascode unit, and their functions are to amplify the signal from the previous unit circuit, the first-stage differential cascode unit is taken as an example to illustrate the working principle of the circuit:

[0074] The first-stage differential cascode unit comprises an input matching unit and a differential amplifier circuit, wherein the differential amplifier circuit plays an amplifying role. In the differential amplifier circuit, HBT transistor B1b, HBT transistor B2b, MOS transistor M1b, MOS transistor M2b, MOS transistor M4b, and MOS transistor M5b constitute the core of the differential amplifier circuit. A composite transistor formed by MOS transistor M1b and MOS transistor M2b and a composite transistor formed by MOS transistor M4b and MOS transistor M5b together form a differential input pair, which filters the common mode signal, thereby reducing the noise in the circuit. The differential input pair amplifies the input radio frequency signals of the two transistors. The differential amplifier unit realizes the functions of filtering noise and amplifying the input radio frequency signal. MOS transistor M3b acts as a mirror transistor to provide bias for MOS transistor M1b. MOS transistor M6b acts as a mirror transistor to provide bias for MOS transistor M5b. HBT transistor B1b and MOS transistor M1b constitute a common source and common base structure. HBT transistor B2b and MOS transistor M4b constitute a common source and common base structure. The common source and common base structure reduces the Miller effect of the device, thereby making it easier to achieve broadband operation of the amplifier. The subsequent second-stage differential cascode unit, the third-stage differential cascode unit, and the fourth-stage differential cascode unit sequentially amplify the output signal of the previous stage, thereby achieving low-noise amplification.

[0075] like Figure 3 The figure shows a comparison diagram of the noise coefficient of the present invention and the conventional differential amplifier. ○ is the relationship curve between the noise coefficient of the conventional differential amplifier and the frequency, and △ is the relationship curve between the noise coefficient of the present invention and the frequency. Figure 3 It can be seen that the common-source common-base amplifier based on SiGe-BiCMOS process provided by the present invention can not only achieve normal operation in a wide frequency band compared with the traditional differential amplifier, but also obtain a better noise coefficient in the high frequency band due to the use of MOS transistors, thereby obtaining a better noise coefficient curve compared with the traditional differential amplifier.

[0076] The other parts of this embodiment are the same as those of the above-mentioned embodiment 1, and thus will not be described in detail.

[0077] Embodiment 3:

[0078] This embodiment is based on any one of the above embodiments 1-2. Figure 2 As shown, the structures of the first-level differential commutation unit, the second-level differential commutation unit, the third-level differential commutation unit, and the fourth-level differential commutation unit are consistent;

[0079] The structures of the input matching unit and the differential amplifier circuit of the second-stage differential cascode unit are consistent with the corresponding structures of the input matching unit and the differential amplifier circuit of the first-stage differential cascode unit;

[0080] The second end of the capacitor C7b of the first-stage differential cascode unit is connected to the input matching short line TL3b of the input matching unit of the second-stage differential cascode unit;

[0081] The second end of the capacitor C8b of the first-stage differential cascode unit is connected to the input matching short line TL4b of the input matching unit of the second-stage differential cascode unit;

[0082] The second end of the capacitor C7b and the second end of the capacitor C8b of the second-stage differential cascode unit are respectively connected to the input matching unit of the third-stage differential cascode unit.

[0083] The structures of the input matching unit and the differential amplifier circuit of the third-stage differential cascode unit are consistent with those of the input matching unit and the differential amplifier circuit of the first-stage differential cascode unit and the second-stage differential cascode unit;

[0084] The second end of the capacitor C7b of the second-stage differential cascode unit is connected to the input matching short line TL3b of the input matching unit of the third-stage differential cascode unit;

[0085] The second end of the capacitor C8b of the second-stage differential cascode unit is connected to the input matching short line TL4b of the input matching unit of the third-stage differential cascode unit;

[0086] The second end of the capacitor C7b and the second end of the capacitor C8b of the third-stage differential cascode unit are respectively connected to the input matching unit of the fourth-stage differential cascode unit.

[0087] Further, the structures of the input matching unit and the differential amplifier circuit of the fourth differential amplifier unit correspond to and are consistent with the structures of the input matching unit and the differential amplifier circuit of the first-stage differential cascode unit, the second-stage differential cascode unit, and the third-stage differential cascode unit;

[0088] The second end of the capacitor C7b of the third-stage differential cascode unit is connected to the input matching short line TL3b of the input matching unit of the fourth-stage differential cascode unit;

[0089] The second end of the capacitor C8b of the third-stage differential cascode unit is connected to the input matching short line TL4b of the input matching unit of the fourth-stage differential cascode unit;

[0090] The second end of the capacitor C7b and the second end of the capacitor C8b of the fourth-stage differential cascode unit are two output ends of the low-noise broadband differential amplifier based on the SiGe-BiCMOS process and are respectively connected to the output impedance matching unit.

[0091] The other parts of this embodiment are the same as any of the above embodiments 1-2, so they are not repeated here.

[0092] Embodiment 4:

[0093] In this embodiment, based on any one of the above embodiments 1-3, in order to better implement the present invention, further, the output impedance matching unit includes a capacitor C9b and a capacitor C10b;

[0094] A first end of capacitor C9b is connected to the RF output signal OUT1b+ and the second end of capacitor C7b of the fourth-level differential common-source common-base unit, and a second end of capacitor C9b is connected to ground; a first end of capacitor C10b is connected to the RF output signal OUT1b- and the second end of capacitor C8b of the fourth-level differential common-source common-base unit, and a second end of capacitor C10b is connected to ground.

[0095] The other parts of this embodiment are the same as any one of the above embodiments 1-3, so they are not repeated here.

[0096] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any form. Any simple modification or equivalent change made to the above embodiment based on the technical essence of the present invention shall fall within the protection scope of the present invention.

Claims

1. A cascode amplifier based on SiGe-BiCMOS process, characterized in that: It includes an input matching unit, a first-stage differential common-source common-base unit, a second-stage differential common-source common-base unit, a third-stage differential common-source common-base unit, a fourth-stage differential common-source common-base unit, and an output impedance matching unit, which are sequentially connected using a four-stage differential amplification structure; The first-stage differential cascode unit, the second-stage differential cascode unit, the third-stage differential cascode unit, and the fourth-stage differential cascode unit structures all include an input matching network and a differential amplifier circuit; the differential amplifier circuit is provided with an HBT transistor and a MOS transistor based on a SiGe-BiCMOS process; The input matching network of the first-stage differential cascode unit is connected to the input matching short line and the differential amplifier circuit of the first-stage differential cascode unit; the first-stage differential cascode unit, the second-stage differential cascode unit, the third-stage differential cascode unit, and the fourth-stage differential cascode unit are connected by the differential amplifier circuit of the previous stage and the input matching unit of the next stage differential amplifier unit; the differential amplifier circuit of the fourth-stage differential cascode unit is connected to the output impedance matching unit; The differential amplifier circuit of the first-stage differential common-source common-base unit includes an HBT transistor B1b, an HBT transistor B2b, a MOS transistor M1b, a MOS transistor M2b, a MOS transistor M3b, a MOS transistor M4b, a MOS transistor M5b, a MOS transistor M6b, a capacitor C1b, a capacitor C2b, a capacitor C3b, a capacitor C5b, a capacitor C7b, a capacitor C8b, a resistor R1b, a resistor R2b, a resistor R3b, a resistor R4b, a resistor R5b, a resistor R6b, a resistor R7b, a resistor R8b, a resistor R9b, a resistor R10b, a resistor R11b, a transmission load TL1b, and a transmission load TL2b; The emitter of the HBT transistor B1b is connected to the drain of the MOS transistor M1b, the base is connected to the grounded capacitor C1b, and the collector is connected to the grounded capacitor C7b; The emitter of the HBT transistor B2b is connected to the drain of the MOS transistor M4b, the base is connected to the grounded capacitor C2b, and the collector is connected to the capacitor C8b; The source of the MOS transistor M1b is connected to the source of the MOS transistor M4b, and the gate is connected to the source of the MOS transistor M2b; The drain of the MOS transistor M2b is connected to the resistor R3b, and the gate is connected to the input matching unit; The gate of the MOS transistor M3b is connected to the gate of the MOS transistor M1b through the resistor R5b, the drain is connected to the gate of the MOS transistor M2b, and the source is grounded; The gate of the MOS transistor M4b is connected to the source of the MOS transistor M5b; The drain of the MOS transistor M5b is connected to the resistor R7b, and the gate is connected to the input matching unit; The gate of the MOS transistor M6b is connected to the gate of the MOS transistor M4b through the resistor R9b, the drain is connected to the gate of the MOS transistor M5b, and the source is grounded; One end of the resistor R1b is connected to the base of the HBT transistor B1b, and the other end is connected to the power supply; One end of the resistor R2b is connected to the base of the HBT transistor B2b, and the other end is connected to the power supply; One end of the transmission load TL1b is connected to the collector of the HBT transistor B1b, and the other end is connected to the power supply; One end of the transmission load TL2b is connected to the collector of the HBT transistor B2b, and the other end is connected to the power supply; One end of the resistor R6b is connected to the drain of the MOS tube M3b, and the other end is connected to the power supply; One end of the resistor R4b is connected to the source of the MOS tube M2b, and the other end is connected to the ground; One end of the resistor R10b is connected to the drain of the MOS tube M6b, and the other end is connected to the power supply; One end of the resistor R8b is connected to the source of the MOS tube M5b, and the other end is connected to the ground; One end of the resistor R11b is connected between the source of the MOS transistor M1b and the source of the MOS transistor M4b, and the other end is connected to the ground; One end of the capacitor C3b is connected between the gate of the MOS tube M3b and the resistor R5b, and the other end is grounded; One end of the capacitor C5b is connected between the gate of the MOS tube M6b and the resistor R9b, and the other end is grounded.

2. A cascode amplifier based on SiGe-BiCMOS process as claimed in claim 1, characterized in that: The input matching unit of the first-stage differential common-source common-base unit includes a transmission line TL5b, a transmission line TL6b, a capacitor C4b, and a capacitor C6b; the input matching short line includes an input matching short line TL3b and an input matching short line TL4b; One end of the transmission line TL6b is connected to the input matching short line TL4b, and the other end is connected to the capacitor C6b; the other end of the capacitor C6b is connected to the gate of the MOS transistor M5b of the first-stage differential common-source common-base unit; One end of the input matching short line TL5b is connected to the input matching short line TL3b, and the other end is connected to the capacitor C4b; the other end of the capacitor C4b is connected to the gate of the MOS transistor M2b of the first-stage differential common-source common-base unit.

3. The cascode amplifier based on SiGe-BiCMOS process as claimed in claim 2, characterized in that: The structures of the input matching unit and the differential amplifier circuit of the second-stage differential cascode unit are consistent with the corresponding structures of the input matching unit and the differential amplifier circuit of the first-stage differential cascode unit; The capacitor C7b of the first-stage differential cascode unit is connected to the input matching short line TL3b of the input matching unit of the second-stage differential cascode unit; The capacitor C8b of the first-stage differential cascode unit is connected to the input matching short line TL4b of the input matching unit of the second-stage differential cascode unit; The capacitor C7b and the capacitor C8b of the second-stage differential cascode unit are respectively connected to the input matching unit of the third-stage differential cascode unit.

4. The cascode amplifier based on SiGe-BiCMOS process as claimed in claim 3, characterized in that: The structures of the input matching unit and the differential amplifier circuit of the third-stage differential cascode unit are consistent with those of the input matching unit and the differential amplifier circuit of the first-stage differential cascode unit and the second-stage differential cascode unit; The capacitor C7b of the second-stage differential cascode unit is connected to the input matching short line TL3b of the input matching unit of the third-stage differential cascode unit; The capacitor C8b of the second-stage differential cascode unit is connected to the input matching short line TL4b of the input matching unit of the third-stage differential cascode unit; The capacitor C7b and the capacitor C8b of the third-stage differential cascode unit are respectively connected to the input matching unit of the fourth-stage differential cascode unit.

5. The cascode amplifier based on SiGe-BiCMOS process as claimed in claim 4, characterized in that: The structures of the input matching unit and the differential amplifier circuit of the fourth-stage differential cascode unit are consistent with those of the input matching unit and the differential amplifier circuit of the first-stage differential cascode unit, the second-stage differential cascode unit, and the third-stage differential cascode unit; The capacitor C7b of the third-stage differential cascode unit is connected to the input matching short line TL3b of the input matching unit of the fourth-stage differential cascode unit; The capacitor C8b of the third-stage differential cascode unit is connected to the input matching short line TL4b of the input matching unit of the fourth-stage differential cascode unit; The capacitor C7b and the capacitor C8b of the fourth-stage differential cascode unit are two output terminals of the low-noise broadband differential amplifier based on the SiGe-BiCMOS process and are respectively connected to the output impedance matching unit.

6. The cascode amplifier based on SiGe-BiCMOS process as claimed in claim 5, characterized in that: The output impedance matching unit includes a capacitor C9b and a capacitor C10b; One end of the capacitor C9b is connected to the RF output signal OUT1b+, and the other end is connected to the ground; One end of the capacitor C10b is connected to the RF output signal OUT1b-, and the other end is connected to the ground.

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