A polarization-enhanced ferroelectric synapse device and a preparation method thereof

Abstract

The application discloses a polarization-enhanced ferroelectric synapse device and a preparation method thereof. The polarization-enhanced ferroelectric synapse device comprises a substrate, a two-dimensional ferroelectric film formed on the substrate as a channel, a source electrode and a drain electrode formed on both sides of the two-dimensional ferroelectric film, a ferroelectric gate dielectric layer which is a hafnium-based ferroelectric film and is formed on the device, and a gate electrode formed on the ferroelectric gate dielectric layer and located above the channel. When a positive voltage is applied to the gate electrode, the hafnium-based ferroelectric film is subjected to polarization reversal, and the resistance of the device becomes small. At this time, the polarization intensity only depends on the hafnium-based ferroelectric film. When the positive voltage is continuously applied, the hafnium-based ferroelectric film and the two-dimensional ferroelectric film are both subjected to polarization reversal, the resistance of the device becomes minimum, the polarization intensity becomes maximum, and the effects of polarization enhancement and increase of the resistance state regulation range are realized.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, in particular to a polarization enhanced ferroelectric synapse device and a preparation method thereof. BACKGROUND

[0002] Ferroelectric synapse transistor is usually composed of a stack structure of a channel, a ferroelectric layer and a gate, and the resistance state of the device is changed by the polarization reversal of the ferroelectric layer under the excitation of voltage, so as to realize the weight modulation function in the neural synapse. Developing high-performance ferroelectric synapse transistor is of great significance for building neuromorphic computing system and realizing the function of integration of calculation and storage.

[0003] Traditional ferroelectric materials such as Pb(Zr,Ti)O3 usually have a small energy band, so a thick size is needed to reduce the leakage current of the device, which is very unfavorable for the size reduction of the device. Moreover, due to the presence of Pb and other environmentally unfriendly components in these materials and the low CMOS process compatibility, it is urgent to develop new ferroelectric materials. Hafnium-based doped high-K dielectric material, as a CMOS process compatible material system of atomic layer deposition, can exhibit excellent ferroelectric performance at a thickness of 10 nm, and has great potential for application in the next generation of ferroelectric devices.

[0004] Although the neural synapse transistor based on hafnium-based ferroelectric material can exhibit excellent resistance regulation characteristics, the range of weight regulation needs to be further increased to cope with more complex computing requirements, which requires the development of ferroelectric materials with greater residual polarization strength in terms of material process. Although a certain degree of performance improvement can be achieved through process optimization of hafnium-based ferroelectric materials, the effect is limited. Two-dimensional ferroelectric semiconductor materials such as α-In2Se3 provide a new way for the polarization enhancement of devices, which can achieve the effect of "1+1>2" through the combination with hafnium-based ferroelectric layer, and has great advantages in the performance enhancement of new ferroelectric neural synapse devices. SUMMARY

[0005] The present application discloses a polarization enhanced ferroelectric synapse device, comprising: a substrate; a two-dimensional ferroelectric film formed on the substrate as a channel; a source electrode and a drain electrode formed on both sides of the two-dimensional ferroelectric film; a ferroelectric gate dielectric layer which is a hafnium-based ferroelectric film formed on the device; and a gate electrode formed on the ferroelectric gate dielectric layer and located above the channel. When a positive voltage is applied to the gate electrode, the hafnium-based ferroelectric film undergoes polarization reversal, and the resistance of the device becomes smaller. At this time, the polarization strength depends only on the hafnium-based ferroelectric film. When the positive voltage continues to be applied, the hafnium-based ferroelectric film and the two-dimensional ferroelectric film both undergo polarization reversal, the resistance of the device becomes the smallest, the polarization strength becomes the largest, and the effects of polarization enhancement and increase of resistance state regulation range are realized.

[0006] In the polarisation-enhanced ferroelectric neurosynaptic device, preferably, the two-dimensional ferroelectric thin film is alpha-In2Se3 or SnTe.

[0007] In the polarisation-enhanced ferroelectric neurosynaptic device, preferably, the hafnium-based ferroelectric thin film is Hf 0.5 Zr 0.5 O2, HfAlO x , HfLaO x , HfSiO x .

[0008] In the polarisation-enhanced ferroelectric neurosynaptic device, preferably, the two-dimensional ferroelectric thin film has a thickness of 1-10 nm, a length of 6-20 mu m, and a width of 1-10 mu m.

[0009] In the polarisation-enhanced ferroelectric neurosynaptic device, preferably, the substrate is a silicon oxide wafer, a low-doped silicon wafer, or glass.

[0010] The application further discloses a preparation method of the polarisation-enhanced ferroelectric neurosynaptic device, which comprises the following steps: forming a two-dimensional ferroelectric thin film as a channel on a substrate; forming source and drain electrodes on both sides of the two-dimensional ferroelectric thin film; forming a hafnium-based ferroelectric thin film as a ferroelectric gate dielectric layer on the above device and performing annealing in a nitrogen atmosphere; forming a gate electrode above the channel on the ferroelectric gate dielectric layer; applying a positive voltage to the gate electrode, so that the hafnium-based ferroelectric thin film is polarised and flipped, and the resistance of the device is reduced; at this time, the polarisation intensity depends only on the hafnium-based ferroelectric thin film; continuing to apply the positive voltage, so that the hafnium-based ferroelectric thin film and the two-dimensional ferroelectric thin film are both polarised and flipped, the resistance of the device is reduced to the minimum, the polarisation intensity is maximised, the effects of polarisation enhancement and increase of the resistance state control range are achieved.

[0011] In the preparation method of the polarisation-enhanced ferroelectric neurosynaptic device, preferably, the two-dimensional ferroelectric thin film is alpha-In2Se3 or SnTe.

[0012] In the preparation method of the polarisation-enhanced ferroelectric neurosynaptic device, preferably, the hafnium-based ferroelectric thin film is Hf 0.5 Zr 0.5 O2, HfAlO x , HfLaO x , HfSiO x .

[0013] In the preparation method of the polarisation-enhanced ferroelectric neurosynaptic device, preferably, the two-dimensional ferroelectric thin film has a thickness of 1-10 nm, a length of 6-20 mu m, and a width of 1-10 mu m.

[0014] Preferably, in the preparation method of the polarization-enhanced ferroelectric neurosynaptic device, the annealing temperature is 400-600 DEG C, and the annealing time is 0.5-6h.

[0015] Advantages:

[0016] (1) Breaking the traditional working mode, using the storage and calculation integrated advantage of the ferroelectric neurosynaptic device, realizing the rapid processing and in-situ storage of information, greatly reducing the power consumption of the system and improving the processing efficiency of the system.

[0017] (2) The hafnium-based ferroelectric material prepared by atomic layer deposition is used instead of the traditional ferroelectric material, which not only has perfect CMOS process compatibility, but also has excellent size miniaturization, and can work at 10nm thickness, providing a strong guarantee for the development of new ferroelectric devices.

[0018] (3) The polarization performance of the device is enhanced by coupling the two-dimensional ferroelectric semiconductor channel with the hafnium-based ferroelectric layer, which can greatly improve the performance of the device and lay an important foundation for increasing the weight modulation range of the neurosynaptic device. BRIEF DESCRIPTION OF DRAWINGS

[0019] Figure 1 is a flow chart of the preparation method of the polarization-enhanced ferroelectric neurosynaptic device.

[0020] Figures 2 to 5 is a structure schematic diagram of each stage of the preparation method of the polarization-enhanced ferroelectric neurosynaptic device.

[0021] Figure 6 is a schematic diagram of the operation principle of the polarization-enhanced ferroelectric neurosynaptic device. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical scheme and advantages of the present application clearer, the technical scheme in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. It should be understood that the specific embodiments described herein are only used to explain the present application, and are not used to limit the present application. The described embodiments are only some of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.

[0023] In the description of the present application, it should be noted that the terms "upper", "lower", "vertical", "horizontal" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance.

[0024] In addition, many specific details of the present application are described below, such as the structure, materials, dimensions, processing and techniques of the device, in order to more clearly understand the present application. But as the skilled in the art can understand, the present application can be implemented without these specific details. Unless specifically indicated below, each part in the device can be composed of materials known to those skilled in the art, or materials with similar functions developed in the future can be used.

[0025] Figure 1 is a flowchart of a preparation method of a polarization-enhanced ferroelectric neuromorphic device. As shown in Figure 1 , the preparation method of the polarization-enhanced ferroelectric neuromorphic device comprises the following steps:

[0026] In step S1, a silicon wafer substrate 100 with a 300 nm thick silicon oxide 101 is prepared for preparing a polarization-enhanced ferroelectric neuromorphic transistor. The thickness of the silicon oxide can also be 200 nm, 100 nm. The substrate can also be a low-doped silicon wafer, a glass, etc. non-conductive substrate.

[0027] In step S2, a 1 nm to 10 nm thick α-In2Se3 two-dimensional ferroelectric film 102 is prepared on the substrate as a channel by a mechanical exfoliation method, as shown in Figure 2 The two-dimensional ferroelectric film can also be a two-dimensional ferroelectric material such as SnTe; the length is preferably 6 μm to 20 μm; the width is preferably 1 μm to 10 μm.

[0028] In step S3, a source electrode 103 and a drain electrode 104 with a thickness of 30 nm to 100 nm are prepared on both sides of the channel 102 by photolithography and physical vapor deposition, as shown in Figure 3 The electrode material is Pt, Pd, Au, Al, etc.

[0029] In step S4, a 5 nm to 20 nm thick Hf 0.5 Zr 0.5 O2 film is deposited on the above device as a ferroelectric gate dielectric layer 105 by atomic layer deposition, as shown in Figure 4Then, the tube furnace is used to anneal at 400-600℃ for 0.5-6h in nitrogen. The ferroelectric gate dielectric layer material can also be HfAlO x , HfLaO x , HfSiO x and other hafnium-based ferroelectric films.

[0030] In step S5, the gate electrode 106 is prepared on the ferroelectric gate dielectric layer by photolithography and physical vapor deposition, and the gate electrode 106 is located above the channel 102, that is, the projection of the gate electrode in the horizontal plane overlaps with the projection of the channel in the horizontal plane, as shown in Figure 5 The material of the gate electrode can be Pt, Pd, Au, Al, etc., and the thickness is preferably 30-100nm.

[0031] As shown in Figure 5 , the polarization-enhanced ferroelectric synapse device of the application comprises: a substrate; a two-dimensional ferroelectric film 102 formed on the substrate as a channel; a source electrode 103 and a drain electrode 104 formed on both sides of the two-dimensional ferroelectric film 102; a ferroelectric gate dielectric layer 105, which is a hafnium-based ferroelectric film, formed on the above device; and a gate electrode 106 formed on the ferroelectric gate dielectric layer 105 and located above the channel 102.

[0032] As shown in Figure 6 , a positive voltage is applied to the gate electrode 106, the hafnium-based ferroelectric film 104 undergoes polarization reversal, and the device resistance becomes smaller, at this time the polarization strength depends only on the hafnium-based ferroelectric film 104; continue to apply a positive voltage, the hafnium-based ferroelectric film 104 and the two-dimensional ferroelectric film 102 both undergo polarization reversal, the resistance of the device becomes the smallest, the polarization strength becomes the maximum, realizing the effects of polarization enhancement and increasing the resistance state control range, laying the foundation for flexible neuromorphic computing.

[0033] The above is only a specific embodiment of the application, but the protection scope of the application is not limited thereto, any changes or replacements within the technical range disclosed by the application can be easily thought by those skilled in the art, which should be covered within the protection scope of the application.

Claims

1. A polarization-enhanced ferroelectric synapse device, comprising: a substrate; a two-dimensional ferroelectric film formed on the substrate as a channel; a source electrode and a drain electrode formed on both sides of the two-dimensional ferroelectric film; a ferroelectric gate dielectric layer formed on the device, which is a hafnium-based ferroelectric film; and a gate electrode formed on the ferroelectric gate dielectric layer and above the channel.

2. The polarization-enhanced ferroelectric synapse device of claim 1, wherein the two-dimensional ferroelectric film is one of or a combination of α-In2Se3 and SnTe.

3. The polarization-enhanced ferroelectric synapse device of claim 1, wherein the hafnium-based ferroelectric film is a hafnium oxide film.

4. The polarization-enhanced ferroelectric synapse device of claim 1, wherein the two-dimensional ferroelectric film has a thickness of 1 nm to 10 nm, a length of 6 μm to 20 μm, and a width of 1 μm to 10 μm.

5. The polarization-enhanced ferroelectric synapse device of claim 1, wherein the substrate is a silicon oxide wafer, a low-doped silicon wafer, or glass.

6. A method for preparing a polarization-enhanced ferroelectric synapse device, comprising the following steps: forming a two-dimensional ferroelectric film on a substrate as a channel; forming a source electrode and a drain electrode on both sides of the two-dimensional ferroelectric film; forming a hafnium-based ferroelectric film on the device as a ferroelectric gate dielectric layer, and performing annealing in a nitrogen atmosphere; forming a gate electrode on the ferroelectric gate dielectric layer and above the channel; and applying a forward voltage to the gate electrode, so that the hafnium-based ferroelectric film undergoes a polarization switching, the resistance of the device decreases, and the polarization strength depends only on the hafnium-based ferroelectric film; and continuing to apply the forward voltage, so that the hafnium-based ferroelectric film and the two-dimensional ferroelectric film both undergo polarization switching, the resistance of the device becomes minimum, the polarization strength becomes maximum, and the effects of polarization enhancement and an increased resistance state regulation range are achieved.

7. The method for preparing the polarization-enhanced ferroelectric synapse device of claim 6, wherein the two-dimensional ferroelectric film is one of or a combination of α-In2Se3 and SnTe.

8. The method for preparing the polarization-enhanced ferroelectric synapse device of claim 6, wherein the hafnium-based ferroelectric film is a hafnium oxide film.

9. The method for preparing the polarization-enhanced ferroelectric synapse device of claim 6, wherein the two-dimensional ferroelectric film has a thickness of 1 nm to 10 nm, a length of 6 μm to 20 μm, and a width of 1 μm to 10 μm.

10. The method for preparing the polarization-enhanced ferroelectric synapse device of claim 6, wherein the annealing temperature is 400°C to 600°C, and the annealing time is 0.5 h to 6 h. ​ The hafnium-based ferroelectric thin film is Hf 0.5 Zr 0.5 O2, HfAlO x , HfLaO x , HfSiO x one or a combination thereof. ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ The hafnium-based ferroelectric thin film is Hf 0.5 Zr 0.5 O2, HfAlO x , HfLaO x , HfSiO x one or a combination thereof. ​ ​ ​ ​

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