Low power consumption mixer-first wideband receiver front-end module

Abstract

The application discloses a low-power-consumption mixing-priority type wideband receiver front-end module, which is based on a mixing-priority architecture, does not need to use an external matching network, realizes impedance matching from an antenna to a receiver front end, realizes high-Q band-pass filtering characteristics, and comprises a third harmonic mixer, a 12-stage ring voltage-controlled oscillator and a TIA transimpedance operational amplifier.The third harmonic mixer is connected with the 12-stage ring voltage-controlled oscillator and the TIA transimpedance operational amplifier.The 12-stage ring voltage-controlled oscillator provides a required local oscillator signal for the third harmonic mixer.The third harmonic mixer is used for down-converting an RF radio frequency signal into a zero intermediate frequency signal by using a third harmonic component of the local oscillator.The TIA transimpedance operational amplifier is used for effectively amplifying and filtering a zero intermediate frequency signal down-converted by the third harmonic mixer and then outputting the zero intermediate frequency signal.The application has lower power consumption than a conventional wideband receiver.

Description

Technical Field

[0001] This invention relates to the field of radio frequency receiver technology, and in particular to a low-power mixer-priority broadband receiver front-end module. Background Technology

[0002] With the rapid development and innovation of wireless interconnect chips, various wireless devices are widely used in fields such as industrial inspection, smart homes, and biomedicine. To adapt to the application needs of various fields, the development of mobile terminals is gradually trending towards multi-functionality and integration. However, since different applications follow different communication standards, wireless communication systems often need to support multiple frequency bands for transmission and reception and effectively suppress out-of-band interference. This makes the design of broadband anti-blocking RF receivers a research hotspot.

[0003] Narrowband RF receivers typically utilize external RF filters with a fixed center frequency to prevent large out-of-band signals from disrupting the desired signal. This necessitates multiple front-ends to cover the extensive frequency bands served by modern wireless devices. While wideband RF receivers no longer require a fixed RF filter, eliminating it introduces gain compression and reciprocal mixing issues.

[0004] Due to the elimination of off-chip RF filters, any out-of-band interference signals will be down-converted along with the desired signal. When the interference signal mixes with LO phase noise, it will generate additional noise in the receiving channel proportional to the amplitude of the interference signal. Therefore, it is necessary for the broadband receiver front-end to have filtering characteristics with an adjustable center frequency across the entire spectrum, which has become a focus of academic attention.

[0005] A mixer-priority receiver using the N-Path architecture can achieve this bandpass filtering characteristic with an adjustable center frequency across the entire spectrum. However, since the RF signal on the antenna directly enters the mixer, the mixer needs to have a large-size switching transistor in order to meet the overall matching requirements. This results in the clock module and drive buffer of the N-Path architecture consuming a lot of power across the entire frequency band.

[0006] In summary, in order to solve the high power consumption problem of existing broadband mixer-priority receivers, there is an urgent need for a new mixer-priority receiver front-end architecture that can achieve lower power consumption than traditional structures while meeting the requirements of linearity, noise figure, and S11. Summary of the Invention

[0007] The purpose of this invention is to address the technical deficiencies in the existing technology by providing a low-power mixer-priority broadband receiver front-end module that achieves lower power consumption than traditional broadband receivers while ensuring the required out-of-band linearity, noise figure, gain, and S11 of a broadband receiver.

[0008] The technical solution adopted to achieve the purpose of this invention is:

[0009] A low-power mixer-priority broadband receiver front-end module, based on a mixer-priority architecture, achieves impedance matching from the antenna to the receiver front-end without the need for an external matching network, realizing high-Q bandpass filtering characteristics. It includes a third harmonic mixer, a 12-stage ring voltage-controlled oscillator (VCO), and a transimpedance amplifier (TIA). The third harmonic mixer is connected to the VCO and TIA. The VCO provides the required local oscillator signal to the third harmonic mixer. The third harmonic mixer uses the third harmonic component of the local oscillator to downconvert the RF signal to a zero-IF signal. The TIA amplifies and filters the downconverted zero-IF signal before outputting it.

[0010] The low-power mixer-priority broadband receiver front-end module of this invention is a mixer-priority broadband receiver front-end that uses a third harmonic mixer. Based on the mixer-priority architecture, it retains the characteristics of high linearity, high dynamic range, simple structure, and small area of ​​the traditional mixer-priority structure. It combines a large-size switching transistor and a low-input TIA to achieve 50-ohm matching across the entire frequency band, and the current-mode transmission and impedance matching between the mixer and the TIA result in a good noise figure for the system. While achieving the out-of-band linearity, noise figure, gain, S11, and bandwidth required for a broadband receiver, it has lower power consumption than traditional broadband receivers. Attached Figure Description

[0011] Figure 1 This is a schematic diagram of the low-power mixing-priority broadband receiver front-end module of the present invention.

[0012] Figure 2 This is a schematic diagram of a broadband mixer-first receiver architecture in the existing technology.

[0013] Figure 3 This is a schematic diagram of the 12-stage RVCO structure of the present invention.

[0014] Figure 4 This is a schematic diagram of the TIA transimpedance operational amplifier in the receiver front end of the present invention.

[0015] Figure 5 This is a demonstration of the receiver DSB noise figure of the present invention.

[0016] Figure 6 This is a demonstration of the conversion gain of the receiver of the present invention.

[0017] Figure 7 This is a schematic diagram of the third harmonic passive mixer structure of the present invention. Detailed Implementation

[0018] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0019] like Figure 1 As shown, the low-power mixer-priority broadband receiver front-end module of this embodiment of the invention, based on a mixer-priority architecture, can achieve impedance matching from the antenna to the receiver front-end without the need for an external matching network, thus achieving high-Q bandpass filtering characteristics. It includes a third harmonic mixer, a 12-stage ring voltage-controlled oscillator, and a TIA transimpedance operational amplifier. The third harmonic mixer is connected to the 12-stage ring voltage-controlled oscillator and the TIA transimpedance operational amplifier. The 12-stage ring voltage-controlled oscillator provides the required local oscillator signal to the third harmonic mixer. The third harmonic mixer is used to down-convert the RF signal to a zero intermediate frequency (IF) signal using the third harmonic component of the local oscillator. The TIA transimpedance operational amplifier is used to effectively amplify and filter the zero IF signal down-converted by the third harmonic mixer before outputting it.

[0020] During operation, the RF signal received from the antenna first passes through a third harmonic mixer. The third harmonic passive mixer uses the third harmonic component of the local oscillator to downconvert the RF signal to a zero intermediate frequency (IF) signal. The zero IF signal downconverted by the third harmonic mixer is then effectively amplified and filtered by the TIA transimpedance operational amplifier. Finally, out-of-band interference suppression, downconversion mixing, baseband amplification and filtering of the RF signal are completed, realizing the conversion and processing of the RF signal to the baseband signal.

[0021] Since the noise from the first-stage passive mixer is directly added to the entire system, the noise in subsequent stages is significantly reduced under inter-stage matching conditions. To minimize the system's noise figure, low impedance matching for current-mode transfer is implemented between the third harmonic mixer and the TIA operational amplifier. The simplified front-end structure also improves system linearity. The low TIA input impedance, combined with the large-size switching transistors of the passive mixer, achieves 50-ohm impedance matching across the entire 0.5GHz-2GHz frequency band.

[0022] The third harmonic mixer employs a passive architecture and is directly connected to the antenna. Preferably, the third harmonic mixer consists of an NMOS switch and a capacitor. The RF input signal is multiplied by the Fourier expansion of the local oscillator signal driving the switch. The product-to-sum relationship is used to mathematically transform the signal's frequency. The resulting signal is accumulated on the capacitor, and the summation on the capacitor yields the output signal V. out+ -V out-In other words, this third harmonic mixer down-converts the RF signal entering the mixer from the antenna with the third harmonic term of the local oscillator signal, thus greatly reducing the power consumption of the clock module.

[0023] The structure of a third harmonic mixer is as follows: Figure 7 As shown, this third harmonic mixer consists of NMOS switches and capacitors. Due to the input impedance characteristics of the mixer's N-path structure, out-of-band interference signals are effectively suppressed at the RF input. Then, the in-band RF signal is multiplied by the Fourier expansion of the local oscillator signal driving the switches. Using the product-to-sum relationship, the signal undergoes frequency transformation. The resulting signal is accumulated on the capacitor and summed, ultimately eliminating the fundamental component in the output signal while retaining the third harmonic component of the local oscillator signal. For details, see [link to documentation]. Figure 7 As shown, the third harmonic mixer consists of two differential pairs composed of two differential current paths I+ and I-, where the I+ path is formed by P <1> P <3> , <p5>The three driven first MOSFETs are combined, and the I-path is composed of P <2> P <4> P <6> It consists of three second MOS transistors driven by it.

[0024] Among them, the drains of the three first MOS transistors are connected together to serve as the signal input terminal to receive V. RF The signal is output by connecting the sources of the three first MOS transistors together. OUT+ Signal; the drains of three second MOSFETs are connected in series to serve as the signal input terminal to receive V. RF The signal is output by connecting the sources of three second MOSFETs together. OUT— Signal; a capacitor C is connected to the source of each of the three first MOSFETs and the source of each of the three second MOSFETs. L One end of the capacitor C L The other end is grounded.

[0025] Drive signal P <1> P <2> P <3> P <4> P <5> P <6> The gates of the MOSFETs are connected sequentially, each 60° out of phase, with a duty cycle of 1 / 6. The two differential pairs suppress even-order harmonics after downconversion. Each differential pair combines signals from three paths with its own mixer operating with a 360° / 3 phase difference, so that the 3*(2n-1)th harmonic components of the three paths are in the same direction in the baseband while other harmonic components are out of phase in the baseband, thus canceling each other out.

[0026] Below, we will intuitively explain the above interpretation from a mathematical perspective and give the output expression of the third harmonic mixer.

[0027] First, consider a square wave signal with a duty cycle of 1 / 6, and write its Fourier expansion as follows:

[0028]

[0029] Among them, a n and b n Ω represents the coefficients of the Fourier expansion. Ω is the angular frequency of the square wave.

[0030] When further studying the I+ path, the switching signals P1(t), P3(t), and P5(t) can be written as follows:

[0031]

[0032]

[0033]

[0034] Where n1≠3K, n2≠6K, K∈Z.

[0035] When the input signal is VRF(t), the output signal VOUT(t) can be given by the following formula:

[0036]

[0037] Assuming the RF input signal is a sinusoidal signal, the above derivation shows that the cosine term of the LO function does not provide a 6n-3 (n∈Z) harmonic term. The final result is equivalent to mixing the 6n-3 harmonic term of the sin function in the LO signal with the RF input signal. Then, the low-pass node formed by the mixer's switching resistor and load capacitor filters out the summation term in the product-difference of the sin function, retaining the subtraction term. Therefore, the overall behavior is down-conversion.

[0038] In the above derivation, the 6n-3rd harmonic term of the LO function is retained, while the remaining terms disappear. Using the Fourier coefficients, b3 = (2 / 3π), thus the conversion gain is (2 / π), the same as that of a traditional downconversion mixer. Furthermore, for zero-IF mixing, compared to the orthogonal structure, there are no more even-order harmonic terms of the RF signal in the S11 result, which significantly enhances out-of-band rejection. While the LO-RF leakage phenomenon is relatively severe in mixer-priority receivers, the better frequency selection characteristics of 3rd harmonic mixing filter out a large number of harmonic terms leaking from the LO to the RF end. Therefore, 3rd harmonic mixing is a very meaningful application in mixer-priority receivers.

[0039] Figure 2 This invention presents a broadband mixer-first receiver architecture based on existing technology. It replaces the traditional quadrature passive mixer with a third harmonic passive mixer, achieving low power consumption for the entire receiver. The third harmonic passive mixer mixes the third harmonic component of the local oscillator with the RF signal, achieving the same mixing effect as a conventional differential mixer. However, it allows the clock module to operate at one-third of the RF frequency. Since the clock module is the most power-consuming module in a broadband mixer-first receiver, this architecture significantly reduces the system's power consumption.

[0040] like Figure 3 As shown, the 12-stage ring voltage-controlled oscillator uses 12 stages of inverters connected in a ring. The output signal PHI after oscillation is taken after each stage of inverter. <1> PHQ <1> PHI <2> PHQ <2> ... PHI <6> PHQ <6> Each stage has a 30° phase difference and a half-duty cycle. These 12-phase outputs are combined and passed through NOR gates. The NOR gates adjust the half-duty cycle to one-sixth, and finally, the output signal PI is obtained after passing through a drive buffer. <1> PQ <1> PI <2> PQ <2> ..., PI <6> PQ <6> Meanwhile, an injection-locked structure was added to the oscillator loop to reduce phase noise across the entire frequency band; finally, the 12-stage ring voltage-controlled oscillator provides a six-phase square wave signal with a duty cycle of one-sixth for the third harmonic passive mixer of the I / Q path.

[0041] The TIA transimpedance operational amplifier consists of a simple inverter-based amplifier, providing the required voltage gain and 10MHz signal bandwidth for the entire system, while also offering low input impedance and low-pass filtering characteristics. Specifically, as shown... Figure 4 As shown, the TIA transimpedance operational amplifier is a transimpedance operational amplifier with a self-biased current-multiplexed inverter structure, consisting of a differential amplifier and a feedback resistor R. F Feedback capacitor C F Composition. This differential amplifier utilizes the stacking of PMOS and NMOS to achieve a small input impedance and a large voltage gain, R F The feedback resistor allows for current-to-voltage gain conversion, providing lower input impedance. The large-size MOS device increases current throughput, reduces input reference noise, and lowers the noise figure. The feedback resistor also provides a self-biasing voltage for the TIA transimpedance operational amplifier, eliminating the need for additional voltage bias. To avoid quiescent operating point instability caused by common-mode interference, a common-mode feedback circuit is added at the output. This stabilizes the common-mode level primarily through negative feedback in the output loop. The overall circuit is as follows: Figure 4 As shown.

[0042] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. It will be apparent to those skilled in the art that the present invention is not limited to the details of the above exemplary embodiments, and that the present invention can be implemented in other specific forms without departing from the spirit or basic features of the present invention.

[0043] Therefore, the embodiments should be regarded as exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, it is intended that all variations falling within the meaning and scope of the equivalents of the claims be included within the invention.

[0044] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A low-power mixer-priority broadband receiver front-end module, characterized in that, Based on a mixer-first architecture, impedance matching from the antenna to the receiver front end is achieved without the need for an external matching network, realizing high-Q bandpass filtering characteristics. It includes a third harmonic mixer, a 12-stage ring voltage-controlled oscillator, and a TIA transimpedance operational amplifier. The third harmonic mixer is connected to the 12-stage ring voltage-controlled oscillator and the TIA transimpedance operational amplifier. The 12-stage ring voltage-controlled oscillator provides the required local oscillator signal to the third harmonic mixer. The third harmonic mixer is used to downconvert the RF signal to a zero intermediate frequency (IF) signal using the third harmonic component of the local oscillator. The TIA transimpedance operational amplifier is used to amplify and filter the zero IF signal downconverted by the third harmonic mixer before outputting it. The third harmonic mixer adopts a passive architecture and is directly connected to the antenna. It down-converts the third harmonic term of the RF signal and the local oscillator signal entering the mixer from the antenna. The down-conversion process involves multiplying the RF input signal by the Fourier expansion of the local oscillator signal of the mixer's driving switch, mathematically transforming the signal using the product-to-sum relationship, accumulating the resulting signals on a capacitor, and summing them on the capacitor to obtain the output signals Vout+ and Vout-. The third harmonic mixer includes two differential pairs formed by two differential current paths I+ and I-. The I+ path is driven by the driving signal P. <1> P <3> P <5> The drive consists of three first MOS transistors, and the I-path is driven by the drive signal P. <2> P <4> P <6> It consists of three second MOS transistors driven by P; <1> P <2> P <3> P <4> P <5> P <6> The phases are 60° apart, with a duty cycle of 1 / 6. The two differential pairs suppress even-order harmonics after down-conversion. Each differential pair combines signals from three paths with its respective mixer operating with a 360° / 3 phase difference, ensuring the 3*(2n-1)th harmonic components of the three paths are in the same direction in the baseband, while other harmonic components are out of phase and cancel each other out. The drains of the three first MOSFETs are connected together as the signal input to receive the VRF signal, and the sources are connected together as the signal output to output the VOUT+ signal. The drains of the three second MOSFETs are connected together as the signal input to receive the VRF signal, and the sources are connected together as the signal output to output the VOUT- signal. Each of the sources of the three first MOSFETs and the three second MOSFETs is connected to one end of a capacitor CL, with the other end of CL grounded. The 12-stage ring voltage-controlled oscillator uses a 12-stage ring of inverters, with the output signal PHI taken after each inverter stage. <1> PHQ <1> PHI <2> PHQ <2> ... PHI <6> PHQ <6> Each stage has a 30° phase difference and a half-duty cycle. The 12-phase output is combined and passed through an NOR gate circuit; the NOR gate circuit adjusts the half-duty cycle to one-sixth, and finally, the output signal PI is obtained through a drive buffer. <1> PQ <1> PI <2> PQ <2> ..., PI <6> PQ <6> Meanwhile, an injection-locked structure is added to the oscillator loop to reduce phase noise across the entire frequency band; finally, the 12-stage ring voltage-controlled oscillator provides a six-phase square wave signal with a duty cycle of one-sixth for the third harmonic passive mixer of the I / Q path.

2. The low-power mixer-priority broadband receiver front-end module according to claim 1, characterized in that, The TIA transimpedance operational amplifier provides the voltage gain and 10MHz signal bandwidth required by the entire system. It is a transimpedance operational amplifier with a self-biased current multiplexed inverter structure.

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