A method for selective low-temperature annealing of solar cell electrodes

Abstract

The present invention belongs to the technical field of solar cells, specifically to a method for selective low-temperature annealing of solar cell electrodes. The method comprises performing periodic rapid temperature-increasing pulse annealing on a metal electrode and its contact interface with a semiconductor under nitrogen protection, wherein the duty ratio of the electrically controlled pulses within each cycle is 1:5, the annealing temperature within each cycle does not exceed 200°C, the heating time within each cycle does not exceed 1 minute, and the heating rate within each cycle does not exceed 5°C / s. Subsequently, the contact resistance between the metal electrode and the semiconductor is measured. The present invention effectively solves the problem of ohmic contact between the metal electrodes of a solar cell and with the semiconductor material, while controlling the depth and range of heat application, avoiding damage to high-temperature-sensitive materials such as the organic material bonding layer in the cell. This method improves cell performance while addressing cell yield issues. The method is applicable to most devices requiring low-temperature annealing.

Description

Technical Field

[0001] The invention belongs to the technical field of solar cells, and in particular relates to a method for selective low-temperature annealing of solar cell electrodes. Background Art

[0002] The energy from solar radiation is the main source of energy for humans in space. Therefore, in major aerospace projects such as space station construction, lunar exploration, and Beidou global network, each aerospace project cannot do without high-efficiency solar cells as an energy guarantee.

[0003] In the current manufacturing process of some solar cells, rapid heating annealing and high-temperature annealing are often used to reduce the contact resistance between the metal electrode and the semiconductor interface of the solar cell. For example, for high-efficiency silicon solar cells, the existing technology proposes the use of high-temperature annealing (650°C-850°C). However, existing annealing methods are not suitable for solar cells containing polymer materials. Therefore, a new technical solution is urgently needed to solve the above problems. Summary of the Invention

[0004] The purpose of the present invention is to address the deficiencies of the prior art and provide a method for selective low-temperature annealing of solar cell electrodes, which effectively solves the problem of ohmic contact between metal electrodes and with semiconductor materials, while controlling the depth and range of heat action, avoiding damage to the organic material bonding layer in the cell, and significantly improving cell performance.

[0005] In order to achieve the above object, the present invention adopts the following technical solutions:

[0006] A method for selective low-temperature annealing of a solar cell electrode, wherein the solar cell has a metal electrode and comprises at least one of the following: (i) a polymer adhesive layer for bonding a cell device to a substrate; (ii) a polymer substrate; and (iii) a solar cell light absorbing material that is difficult to withstand temperatures above 200°C.

[0007] The annealing method comprises the following steps:

[0008] S1. Under nitrogen protection, perform periodic rapid temperature rise pulse annealing on the metal electrode and its contact interface with the semiconductor, wherein the duty ratio of the electrically controlled pulse in each cycle is 1:5, the annealing temperature in each cycle does not exceed 200°C, the heating time in each cycle does not exceed 1 minute, and the heating rate in each cycle does not exceed 5°C / s;

[0009] S2. Test the contact resistance between the metal electrode and the semiconductor. If the contact resistance does not meet the preset requirements, adjust the number of cycles, heating time, and heating rate in step S1.

[0010] As an improvement of the annealing method of the present invention, the solar cell is a silicon-based III-V group four-terminal tandem solar cell, a HIT tandem solar cell or a polymer-based flexible solar cell.

[0011] As an improvement to the annealing method of the present invention, in step S1, a silicon-based III-V tandem solar cell is first prepared. Then, under nitrogen protection, the metal electrode and semiconductor interface of the cell, as well as the metal electrode itself, are subjected to periodic rapid temperature increase pulse annealing. This controls the heat transfer and depth range during the annealing process, achieving a locally selective annealing effect.

[0012] As an improvement to the annealing method of the present invention, the steps of preparing the silicon-based III-V group tandem solar cell include:

[0013] Grow a GaInP / GaAs double-junction epitaxial layer, prepare a back electrode and a back anti-reflection film, and obtain a GaInP / GaAs double-junction cell structure on a gallium arsenide substrate;

[0014] The battery is transferred to a glass substrate through polymer bonding, and the original GaAs substrate of the battery is etched away to prepare the top electrode of the battery.

[0015] As an improvement to the annealing method of the present invention, in step S1, the heating time in each cycle is 1s to 10s, 10s to 20s, 20s to 30s, 30s to 40s or 40s to 50s.

[0016] As an improvement to the annealing method of the present invention, in step S1, the heating rate in each cycle is 0.1°C / s to 0.5°C / s, 0.5°C / s to 1°C / s, 1°C / s to 1.5°C / s, 1.5°C / s to 2°C / s, 2°C / s to 2.5°C / s, 2.5°C / s to 3°C / s, 3°C / s to 3.5°C / s, 3.5°C / s to 4°C / s, 4°C / s to 4.5°C / s or 4.5°C / s to 5°C / s.

[0017] As an improvement to the annealing method of the present invention, in step S1, the starting heating temperature in each cycle is 50°C to 70°C, 70°C to 90°C, 90°C to 110°C, 110°C to 130°C, 130°C to 150°C, 150°C to 170°C or 170°C to 190°C.

[0018] As an improvement to the annealing method of the present invention, in step S1, the number of cycles of rapid temperature rise pulse annealing is at least 2 to 5, 5 to 8, 8 to 10, 10 to 12, 12 to 15, 15 to 18, 18 to 20, 20 to 25 or 25 to 30.

[0019] As an improvement to the annealing method of the present invention, in step S1, the penetration depth of the heating heat into the metal electrode is controlled to be 1 μm-6 μm.

[0020] As an improvement to the annealing method of the present invention, in step S1, a rapid annealing device with a halogen lamp is used to heat the metal electrode; in step S2, a circular transmission line model is used to test the contact resistance between the metal electrode and the semiconductor surface.

[0021] The beneficial effects of the present invention are as follows: 1) The present invention proposes a selective low-temperature annealing method that effectively reduces the contact resistance between the electrodes of a solar cell and the semiconductor material, while causing no damage to the epoxy bonding layer of the cell; 2) The low-temperature, pulsed, rapid local annealing technology of the present invention can achieve selective local annealing of the electrodes of photovoltaic devices, including silicon-based III-V tandem solar cells, thereby improving the adhesion of the electrodes. At the same time, the selective low-temperature annealing method minimizes damage to the bonding layer, polymer substrate, and organic photovoltaic materials. The method can be applied to polymer-bonded silicon-based III-V tandem solar cells, various flexible solar cells formed on polymer substrates, other photovoltaic devices that are not suitable for high-temperature annealing, and most devices that require low-temperature annealing. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 The figure is a flow chart of the process for preparing silicon-based III-V tandem solar cells according to the present invention.

[0023] Figure 2 FIG. 1 is a process temperature curve diagram of low-temperature pulse rapid annealing according to one embodiment of the present invention.

[0024] Figure 3 This is a graph showing the effects of different annealing cycles on the contact resistance between the electrode and the semiconductor surface according to one embodiment of the present invention.

[0025] Figure 4 These are electroluminescence images of a cell before and after annealing according to one embodiment of the present invention.

[0026] Figure 5 This is a diagram showing changes in the IV characteristic curve of a battery before and after the annealing process according to one embodiment of the present invention. DETAILED DESCRIPTION

[0027] If certain words are used in the specification and claims to refer to specific components, those skilled in the art should understand that manufacturers may use different terms to refer to the same component. This specification and claims do not use differences in name as a way to distinguish components, but rather use differences in the functions of the components as the criteria for distinction. For example, the term "including" mentioned throughout the specification and claims is an open-ended term and should be interpreted as "including but not limited to". "Approximately" means that within an acceptable error range, those skilled in the art can solve technical problems within a certain error range and basically achieve technical effects.

[0028] In the description of the present invention, it should be understood that the terms "up", "down", "front", "back", "left", "right", etc., indicating directions or positional relationships, are based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as a limitation on the present invention.

[0029] In the present invention, unless otherwise expressly specified or limited, the terms "mounted," "connected," "connect," "fixed," etc. should be understood broadly. For example, they may refer to fixed, detachable, or integral connections; mechanical or electrical connections; direct or indirect connections through an intermediary; or internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0030] The inventors discovered that among solar cells, commercial 4-junction and 5-junction III-V solar cells, such as GaInP / Ga(In)As / Ge triple-junction solar cells, can achieve a photoelectric conversion efficiency of over 32%, but their cost is high and the cell structure and process are more complex. Silicon solar cells have a photoelectric efficiency of 26.7% and are low in cost. Replacing Ge cells with silicon cells to form silicon-based III-V tandem cells have the advantages of high efficiency and low cost.

[0031] However, during the cell preparation process, the inventors discovered that silicon-based III-V tandem cells, which may contain polymer materials or use crystalline silicon heterojunction (HIT) or polymer flexible substrates, cannot withstand annealing temperatures above 200°C, otherwise electrode contact reliability and cell performance will be compromised. In other words, whether it is Si solar cells, thin-film solar cells, or tandem solar cells, annealing temperatures exceeding 200°C will irreversibly affect the physicochemical properties, composition, and electrical performance of the organic materials contained in the cell. For example, it can change the physicochemical properties of the epoxy resin layer in the cell, reducing the performance of the III-V solar cell. This can damage the performance of different types of cells, including silicon-based III-V tandem cells with organic bonding, silicon heterojunction cells (HIT cells), and polymer-based flexible solar cells.

[0032] Through extensive experiments, the inventors discovered that in the processing of III-V solar cells, failure to perform annealing or inadequate annealing can severely impact cell performance. Existing III-V solar cells and crystalline silicon cells are often annealed at temperatures exceeding 250°C, which fails to overcome or avoid damage to the organic material bonding layer within the cell. Therefore, a novel annealing method is needed to address this issue.

[0033] A method for selective low-temperature annealing of solar cell electrodes, wherein the solar cell has metal electrodes and comprises at least one of the following: (i) a polymer adhesive layer bonding the cell device to a substrate; (ii) a polymer substrate; and (iii) a solar cell light absorbing material that is difficult to withstand temperatures above 200°C. The annealing method comprises the following steps:

[0034] S1. Under nitrogen protection, perform periodic rapid temperature rise pulse annealing on the metal electrode and its contact interface with the semiconductor, wherein the duty ratio of the electrically controlled pulse in each cycle is 1:5, the annealing temperature in each cycle does not exceed 200°C, the heating time in each cycle does not exceed 1 minute, and the heating rate in each cycle does not exceed 5°C / s;

[0035] S2. Test the contact resistance between the metal electrode and the semiconductor. If the contact resistance does not meet the preset requirements, adjust the number of cycles, heating time, and heating rate in step S1.

[0036] Preferably, the solar cell is a silicon-based III-V four-terminal tandem solar cell, a HIT tandem solar cell or a polymer-based flexible solar cell.

[0037] Preferably, in step S1, a silicon-based III-V group tandem solar cell is first prepared, and then the contact interface between the metal electrode and the semiconductor of the cell and the metal electrode are subjected to periodic rapid temperature increase pulse annealing treatment under nitrogen protection.

[0038] Preferably, the preparation steps of silicon-based III-V group tandem solar cells include:

[0039] Grow a GaInP / GaAs double-junction epitaxial layer, prepare a back electrode and a back anti-reflection film, and obtain a GaInP / GaAs double-junction cell structure on a gallium arsenide substrate;

[0040] The battery is transferred to a glass substrate through polymer bonding, and the original GaAs substrate of the battery is etched away to prepare the top electrode of the battery.

[0041] Preferably, in step S1, the heating time in each cycle is 1s to 10s, 10s to 20s, 20s to 30s, 30s to 40s or 40s to 50s.

[0042] Preferably, in step S1, the heating rate in each cycle is 0.1°C / s to 0.5°C / s, 0.5°C / s to 1°C / s, 1°C / s to 1.5°C / s, 1.5°C / s to 2°C / s, 2°C / s to 2.5°C / s, 2.5°C / s to 3°C / s, 3°C / s to 3.5°C / s, 3.5°C / s to 4°C / s, 4°C / s to 4.5°C / s or 4.5°C / s to 5°C / s.

[0043] Preferably, in step S1, the initial heating temperature in each cycle is 50°C to 70°C, 70°C to 90°C, 90°C to 110°C, 110°C to 130°C, 130°C to 150°C, 150°C to 170°C or 170°C to 190°C.

[0044] Preferably, in step S1, the number of cycles of rapid temperature rise pulse annealing is at least 2-5, 5-8, 8-10, 10-12, 12-15, 15-18, 18-20, 20-25 or 25-30.

[0045] Preferably, in step S1, the penetration depth of the heating heat into the metal electrode is controlled to be 1 μm-6 μm.

[0046] Preferably, in step S1, a rapid annealing device with a halogen lamp is used to heat the metal electrode; in step S2, a circular transmission line model is used to test the contact resistance between the metal electrode and the semiconductor surface.

[0047] The following is combined with Figures 1 to 5 The present invention is further described in detail with reference to the accompanying drawings and specific examples, but is not intended to limit the present invention.

[0048] Among them, the present invention proposes a selective low-temperature electrode annealing scheme for silicon-based III-V group four-terminal tandem solar cells. The specific technical scheme is as follows:

[0049] First, a GaInP / GaAs double-junction epitaxial layer is grown inversely on a 4-inch GaAs substrate using metal-organic vapor phase epitaxy (MOVPE). A backside metal gate electrode is then formed on the GaAs film using evaporation, and annealed at 350°C for 30 minutes using conventional sintering to enhance the bottom electrode's strength and reduce contact interface resistance. An optical anti-reflection layer is then deposited on the backside of the cell to enhance light transmittance. This results in a GaInP / GaAs double-junction cell structure on a GaAs substrate.

[0050] Second, the prepared GaInP / GaAs double-junction cell is bonded to a glass substrate using a polymer adhesive, and the original GaAs substrate is removed using a wet etching process, thereby transferring the GaInP / GaAs double-junction cell structure to the glass substrate.

[0051] Third, the gate electrode pattern is photolithographically developed on the surface of the GaInP / GaAs double-junction cell on the glass substrate, and the top gate electrode is evaporated using an electron beam evaporation process.

[0052] Specifically, Figure 1 The fabrication process for silicon-based III-V quad-terminal tandem solar cells is described. First, a GaInP / GaAs double-junction cell epitaxial layer is inversely grown on a 4-inch GaAs substrate using metal-organic vapor phase epitaxy (MOVPE). A gate electrode pattern is then formed on the epitaxial layer using a photolithography-development process. A multilayer metal grid line is deposited as the back electrode using electron beam evaporation. The electrode is then cured by conventional sintering and annealing in a 350°C annealing furnace for 30 minutes. Subsequently, an optical anti-reflection layer is deposited on the surface to enhance light transmittance. A highly transparent commercial epoxy resin (epo-tek 301) is evenly applied to a glass substrate as an intermediate adhesive layer using a spin coating process. The prepared GaInP / GaAs double-junction cell is aligned and bonded to the glass substrate with the adhesive layer using an alignment bonder. This results in the silicon-based III-V quad-terminal tandem solar cell bonding the semi-transparent III-V top cell to the transparent substrate via the intermediate adhesive layer. The cell is then cured by heating at 100°C for 1 hour. The original GaAs substrate is then removed using a wet etching process. This transfers the GaInP / GaAs double-junction cell structure to a glass substrate. The gate electrode pattern is then photolithographically developed on the surface of the GaInP / GaAs double-junction cell on the glass substrate, and the top gate electrode is deposited using electron beam evaporation.

[0053] Fourth, a selective low-temperature annealing technique is used to reduce the contact resistance between the top gate electrode and the battery surface, while improving the electrode adhesion. The top electrode is annealed using a selective low-temperature annealing method. The annealing temperature used in the present invention is less than or approximately equal to 200°C, and the maximum temperature duration is less than or equal to 50 seconds, 40 seconds, 30 seconds, 20 seconds or 10 seconds. First, rapid temperature rise pulse annealing. The heating rate is less than or equal to 5°C / s, 4°C / s, 3°C / s, 2°C / s, 1°C / s or 0.5°C / s. Through rapid heating and short-pulse thermal radiation, the heat only penetrates the thickness of the top metal electrode, and the electrode and its contact interface with the battery are locally annealed. The depth of heat action is in the range of 1μm-6μm. Secondly, the heat radiated each time is limited. To improve electrode adhesion and ohmic contact, multiple cycles are required. The number of pulse cycles is 2, 3, 5, 8, 10, 15, 20, 25 or 30 cycles, so that the heat pulses are continuously accumulated to achieve the final annealing effect.

[0054] In addition, the present invention uses a rapid annealing (AS-One 100) device with a halogen lamp for annealing. During the annealing process, the III-V battery is placed on a platform with the top metal electrode facing the heating lamp. Based on the poor heat resistance of the polymer, the temperature curve and heating duration of the rapid annealing process are optimized to anneal the metal grid electrode without damaging the polymer bonding layer. Using a slow heating rate of 0.5°C / s can avoid the delamination problem caused by the mismatch of the thermal expansion coefficients of the polymer and the III-V material. Since the polymer adhesive material will denature at temperatures above 200°C, which will cause the III-V battery to peel off, the low-temperature selective annealing process we use is characterized by rapid heating and short-pulse thermal radiation, that is, the maximum annealing temperature is not higher than 200°C, the heating rate is 0.5°C / s, the maximum temperature duration is 10s, the duty cycle is 1:5, and then it is cooled naturally. In addition, in order to compensate for the problem of insufficient energy applied to the electrode due to low temperature and short-time heating, the present invention adopts multi-cycle pulse annealing, and the process temperature curve is as follows: Figure 2 The number of pulse cycles is 2, 3, 5, 8, 10, 15, 20, 25 or 30 cycles.

[0055] Afterwards, the CTLM (Circular Transmission Line Model) was used to test the contact resistance between the electrode and the semiconductor surface. Figure 3 The effects of different annealing cycles on contact resistance are given. After 10 cycles of annealing, the contact resistance increases from 1.1×10 -6 Ω·cm 2 Reduced to 2.0×10 -7 Ω·cm 2, which has met the requirements for contact resistance of III-V photovoltaic cell electrodes. Continuing to increase the annealing cycle has no significant contribution to the reduction of contact resistance.

[0056] Figure 4 The electroluminescence (EL) images of the cells before annealing (part a in the figure), after 10 cycles of annealing (part b in the figure), and after 30 cycles of annealing (part c in the figure) are compared under the condition that other annealing process parameters remain unchanged as mentioned above. Figure 4 The dark area of ​​the EL image on the battery surface in (a) is large. This is because the untreated top electrode will lead to a locally high contact resistance. The space charge layer near the semiconductor surface hinders the transmission of electrons. The low-temperature selective local annealing method proposed in this invention is used. The annealing temperature is lower than 200℃, the heating rate is 0.5℃ / s, the maximum temperature duration is 10s, and the duty cycle is 1:5. After 10 annealing cycles, the dark area of ​​the luminous area in the image is significantly reduced, indicating that accelerating metal diffusion by thermal annealing can effectively solve the problem of low-quality metal electrode contact in the device. Figure 3 The results given are consistent.

[0057] Meanwhile, a fast annealing with short annealing duration and selective heating from the top side of the device is employed for top electrode optimization to minimize the impact of annealing on the polymer adhesion layer. Figure 5 The changes of the IV characteristic curve of the battery after the above annealing process are given. Figure 5 The lower left curve in the figure corresponds to an unannealed cell. Its IV curve exhibits deformation near the maximum power point, severely reducing the fill factor (FF) and, consequently, the cell efficiency. After 10 annealing cycles, the FF jumps from 61.32% to 77.70%, due to a reduction in contact resistance as confirmed by CTLM measurements. This improvement results in a 4% absolute efficiency increase. After deposition of an anti-reflection coating, the cell efficiency is further increased to 22.30% (test conditions: AM0 spectrum, 25°C ± 2°C).

[0058] Compared to the prior art, the present invention utilizes a selective low-temperature annealing method to effectively control the input and range of thermal energy during the annealing process, achieving selective local annealing of electrodes of photovoltaic devices, including silicon-based III-V tandem solar cells, thereby improving the adhesion of the electrodes and the ohmic contact properties of the semiconductor surface. Simultaneously, the selective low-temperature annealing method minimizes damage to the adhesive layer, polymer substrate, and organic photovoltaic materials, and is compatible with the evaporation process used to manufacture metal electrodes. This method is applicable to polymer-bonded silicon-based III-V tandem solar cells, various flexible solar cells formed on polymer substrates, and other photovoltaic devices that are not suitable for high-temperature annealing. This method can be used for most devices requiring low-temperature annealing.

[0059] It can be seen that in the present invention, epoxy resin is used to transfer the GaInP / GaAs double-junction battery to a glass substrate, wet chemical etching is used to remove the original gallium arsenide substrate, and then a selective low-temperature annealing process is used to treat the surface electrode. First, the surface of the battery sample is facing the halogen lamp in the annealing furnace so that the thermal radiation directly acts on the top electrode of the battery. Afterwards, the maximum temperature of the annealing process is not higher than 200°C, and pulse rapid annealing is used, with each pulse heating time not exceeding 1 minute. Through pulse cycle rapid annealing, it is ensured that there is enough heat in each pulse to act on the metal electrode, and there is no time to conduct to the interior of the battery, that is, only the electrode thickness range and its contact interface with the battery are selectively annealed locally. At the same time, nitrogen is flushed into the annealing process to protect the top electrode from oxidation on the one hand; on the other hand, it takes away excess heat so that it will not continue to accumulate and be transmitted to the interior of the battery. This annealing process is also compatible with the evaporation process for manufacturing metal electrodes.

[0060] Obviously, the electrode optimization treatment is carried out through pulse annealing with short cycles and RTP annealing with selective heating from the top side of the device, ensuring that sufficient energy or heat in each cycle only penetrates the thickness of the top metal electrode to anneal the electrode and its contact interface with the battery; at the same time, the heat is not fully absorbed and conducted inside the battery, but is dissipated through the flow of nitrogen, thereby achieving the effect of local selective annealing.

[0061] Based on the disclosure and teachings of the above description, those skilled in the art will be able to make changes and modifications to the above embodiments. Therefore, the present invention is not limited to the above specific embodiments. Any obvious improvements, substitutions, or modifications made by those skilled in the art based on the present invention fall within the scope of protection of the present invention. In addition, although certain specific terms are used in this description, these terms are only for convenience of description and do not constitute any limitation to the present invention.

Claims

1. A method for selective low-temperature annealing of solar cell electrodes, characterized in that: The solar cell has a metal electrode and includes at least one of the following: (i) a polymer adhesive layer for bonding the cell device to a substrate; (ii) a polymer substrate; (iii) a solar cell light absorbing material that is difficult to withstand high temperatures above 200°C; The annealing method comprises the following steps: S1. Under nitrogen protection, performing periodic rapid temperature rise pulse annealing on the metal electrode and its contact interface with the semiconductor, wherein the number of cycles of the rapid temperature rise pulse annealing is at least 2-5, 5-8, 8-10, 10-12, 12-15, 15-18, 18-20, 20-25 or 25-30, the starting heating temperature in each cycle is 50°C-70°C, 70°C-90°C, 90°C-110°C, 110°C-130°C, 130°C-150°C, 150°C-170°C or 170°C-190°C, the duty cycle of the electrically controlled pulse in each cycle is 1:5, the annealing temperature in each cycle does not exceed 200°C, the heating time in each cycle does not exceed 1 minute, the heating rate in each cycle is not greater than 5°C / s, and the penetration depth of the heating heat into the metal electrode is controlled to be 1μm-6μm; S2. Test the contact resistance between the metal electrode and the semiconductor. If the contact resistance does not meet the preset requirements, adjust the number of cycles, heating time, and heating rate in step S1.

2. The method for selective low-temperature annealing of solar cell electrodes according to claim 1, wherein: The solar cell is a silicon-based III-V group four-terminal tandem solar cell, a HIT tandem solar cell or a polymer-based flexible solar cell.

3. The method for selective low-temperature annealing of solar cell electrodes according to claim 1 or 2, characterized in that: In step S1, a silicon-based III-V group tandem solar cell is first prepared, and then the contact interface between the metal electrode and the semiconductor of the cell and the metal electrode are subjected to periodic rapid temperature increase pulse annealing under nitrogen protection, thereby controlling the heat transfer and the depth range of action during the annealing process and achieving the effect of local selective annealing.

4. The method for selective low-temperature annealing of solar cell electrodes according to claim 3, wherein: The preparation steps of the silicon-based III-V group tandem solar cell include: Grow a GaInP / GaAs double-junction epitaxial layer, prepare a back electrode and a back anti-reflection film, and obtain a GaInP / GaAs double-junction cell structure on a gallium arsenide substrate; The battery is transferred to a glass substrate through polymer bonding, and the original GaAs substrate of the battery is etched away to prepare the top electrode of the battery.

5. The method for selective low-temperature annealing of solar cell electrodes according to claim 1, wherein: In step S1, the heating time in each cycle is 1s to 10s, 10s to 20s, 20s to 30s, 30s to 40s, or 40s to 50s.

6. The method for selective low-temperature annealing of solar cell electrodes according to claim 1, wherein: In step S1, the heating rate in each cycle is 0.1℃ / s~0.5℃ / s, 0.5℃ / s~1℃ / s, 1℃ / s~1.5℃ / s, 1.5℃ / s~2℃ / s, 2℃ / s~2.5℃ / s, 2.5℃ / s~3℃ / s, 3℃ / s~3.5℃ / s, 3.5℃ / s~4℃ / s, 4℃ / s~4.5℃ / s or 4.5℃ / s~5℃ / s.

7. The method for selective low-temperature annealing of solar cell electrodes according to claim 1, wherein: In step S1, a rapid annealing device with a halogen lamp is used to heat the metal electrode; in step S2, a circular transmission line model is used to test the contact resistance between the metal electrode and the semiconductor surface.

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