Detection and efficient protection method of dc fault arc under power electronic interference condition

Abstract

The application discloses a kind of DC fault arc precision detection and efficient protection method under power electronic interference, based on system output current signal, the frequency information of the signal short-time Fourier transform is made variance processing to obtain first characteristic quantity, the common frequency band of fault arc is obtained by combining evidence classifier and with normal waveform sampling comparison, whether there is fault arc existence is judged from this, similarly, the difference frequency band of fault arc is obtained by evidence classifier, the topological structure and control strategy of fault arc difference frequency band identification device can be reached, and the purpose of efficient protection is further achieved.The application can significantly improve the effect of DC fault arc precision detection and efficient protection.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of electrical fault detection, and particularly relates to a method for precise detection and efficient protection of DC fault arcs under power electronic interference. BACKGROUND

[0002] Global energy crisis and climate warming are increasingly serious, making new green renewable energy such as photovoltaic, wind power, fuel cell, etc. more and more widely used. New infrastructure facilities such as charging piles, energy storage, distributed photovoltaic integrated stations are rapidly emerging. In recent years, with the high proportion and large-scale access of renewable energy and the wide application of power electronic equipment, power faults occur more and more frequently. For example, once a fault arc occurs in a photovoltaic system, it is more dangerous than an AC fault arc without zero-crossing point. If no protective measures are taken for the fault arc in the photovoltaic system in time, it will cause great damage to photovoltaic components and power transmission lines, even cause fire, resulting in serious economic losses and safety problems such as personnel casualties. The inability to accurately diagnose and identify fault arcs has become the main reason restricting the accurate monitoring and prevention of electrical fires, seriously threatening the safety of power supply and use.

[0003] Taking an inverter as an example, the inverter has multiple different topologies and control strategies. Different inverters such as single-stage transformerless photovoltaic inverters, photovoltaic inverters with power frequency transformers, multi-stage photovoltaic inverters with high-frequency transformers, etc. have different effects on the time-frequency characteristics of fault arcs, and the ways of dealing with fault arcs are also different. Taking the number of inverter output connection ports as an example, under the same fault arc parameters, the time-frequency analysis of fault arc current under the interference of three-phase and single-phase inverters based on short-time Fourier decomposition method is carried out, and it is found that the fault arc frequency domain feature amplitude under the interference of single-phase inverter is smaller. Comparing the interference conditions of single-phase bipolar and single-phase monopolar inverters, it is found that the fault arc noise under the interference of bipolar is weaker, and the corresponding feature amplitude is smaller. Therefore, different inverter interference factors will affect the characteristics of fault arcs. The existing methods do not consider the interference under these factors, and the test is made in a limited scenario, which may cause the existing detection method to fail. In addition, the existing detection method cannot realize customized protection after detecting the fault arc. For example, under the interference condition of three-phase inverter, if the fault arc cannot be positioned, and only the single-phase inverter shutdown protection method is adopted to protect the fault arc, it will cause the other two non-fault phases to stop working, causing excessive protection and unnecessary power loss. Therefore, there is an urgent need for a method for precise detection and efficient protection of DC fault arcs under power electronic interference.

[0004] The current common fault arc analysis methods include time domain analysis, frequency domain analysis, time-frequency analysis and the like.

[0005] The time domain analysis method is affected by the load type, and it is difficult to find the common characteristics of the fault arcs of different loads, and it is more difficult to distinguish and extract some similar arc interference signals. The frequency domain analysis method is usually established on the basis of the Fourier transform, but the Fourier transform is a whole transform for stationary signals, and cannot effectively capture the time-varying characteristics of the fault arc signals, and cannot accurately obtain different frequency components at different times.

[0006] The methods for analyzing the fault arc by using time-frequency analysis mainly include short-time Fourier transform and wavelet transform. Although the wavelet transform has adaptive time-frequency resolution and can better observe the signals, a large amount of calculation also limits its application in real-time detection of the fault arc. Moreover, the existing technology does not discuss the interference of many factors such as different topological structures and control strategies, but only makes tests in limited situations, and does not have the concept of customized protection. Therefore, the application proposes to use the short-time Fourier transform for detecting the fault arc of the power electronic device, which is a convenient, effective and very reliable method, and the system output current state can be accurately, reliably and quickly identified, so as to realize the functional requirements of the fault arc detection device installed on the DC side of the system. SUMMARY

[0007] The purpose of the application is to provide a DC fault arc accurate detection and efficient protection method under power electronic interference, which solves the problems that the existing fault arc analysis method cannot realize real-time detection due to a large amount of calculation, the existing detection method fails due to the time-varying fault arc characteristics caused by various power electronic interference factors, and the existing detection method cannot effectively realize efficient protection.

[0008] The technical solution adopted by the application is that the DC fault arc accurate detection and efficient protection method under power electronic interference is implemented according to the following steps:

[0009] Step 1, sampling the output current signal of the power electronic system point by point to obtain a current signal;

[0010] Step 2, applying short-time Fourier transform to obtain a first characteristic quantity;

[0011] Step 3, obtaining a common frequency band of the fault arc;

[0012] Step 4, combining the first characteristic quantity and the common frequency band to detect whether there is a fault arc in the circuit;

[0013] Step 5, after the occurrence of the fault arc, combining the first characteristic quantity and the difference frequency band to identify the type of the power electronic interference factor, determine the position of the fault, and realize efficient prevention and treatment of the fault arc.

[0014] The application is also characterized in that,

[0015] Step 1 is implemented according to the following steps:

[0016] The system output current signal under power electronic interference is sampled point by point according to the sampling frequency f s to obtain the current signal x i , i∈N + , which represents the analysis period number, and N sampling points are obtained. When N reaches the requirement of the analysis period, go to Step 2 for arc fault feature analysis.

[0017] The value range of the sampling point number N in Step 1 is 1000-12000.

[0018] Step 2 is implemented according to the following steps:

[0019] According to the requirements of specific applications, determine the window function w(m) and the selected time point m, and divide the entire time domain into countless small processes of equal length, i.e. windowing, each process is approximately stationary, and then perform Fourier transform to know what frequency appears at which time point, i.e. short-time Fourier transform,

[0020] The short-time Fourier transform is defined as:

[0021]

[0022] Among them, x(m) is the input signal, w(m) is the window signal, w(m) is inverted in time and has an offset of n samples, X(n,w) is a two-dimensional signal of time n and frequency w, m is the selected time point, the time domain and frequency domain of the signal are related through X(n,w), and the time-frequency diagram of the input signal is defined as S(n,w) = |X(n,w)| 2 , which is the first feature quantity obtained.

[0023] Step 3 is implemented according to the following steps:

[0024] For any power electronic interference factor, the first feature quantity obtained in Step 2 is differentiated by frequency, and the frequency band corresponding to the minimum difference value is taken as the candidate common frequency band. It is judged whether the short-time Fourier feature value corresponding to the frequency is a local maximum value. If not, the frequency band is taken as the common frequency band.

[0025] Step 4 is implemented according to the following steps:

[0026] The running state of the current system is judged by using the evidence classifier, the evidence classifier checks the input signal, i.e., the first characteristic quantity, and outputs the possibility of a certain specific result, i.e., the possibility of a fault arc, on the basis of a given attribute, i.e., a common frequency band, to classify the data into fault arc generation and non-fault arc generation, and whether the fault arc exists is judged in combination with the multi-cycle state output, and if it occurs, it is turned to step 5, and if it does not occur, it is turned to step 1.

[0027] Step 5 is specifically implemented according to the following steps:

[0028] The maximum value of the difference value of step 3 is taken, and the frequency band corresponding to the maximum value is taken as the difference frequency band, the evidence classifier checks on the basis of a given attribute, i.e., the difference frequency band, and outputs the possibility of a certain specific result, classifies the data, i.e., the obtained first characteristic quantity, identifies the power electronic interference factor type (such as single-phase / three-phase output connection mode, single-pole / dual-pole topology structure, PQ / PI control strategy), and thus efficiently governs the fault arc.

[0029] The beneficial effects of the present application are that the DC fault arc detection and efficient protection method under power electronic interference conditions is aimed at fault arcs under different topology structures and control strategies, existing methods do not consider interference under these factors, and are tested under limited scenarios, and there is no concept of customized protection, the present application solves the arc detection problem of different topology structures and control strategies in the system, through the study of the influence of the system on the fault arc, it is beneficial to prevent the misoperation of the circuit breaker, significantly improves the safety of arc detection, and through short-time Fourier transform, the commonness and difference of the fault arc characteristic quantity under different topology structures and control strategies are compared, the safety problem of the circuit breaker opening under different topology structures is enhanced, and the efficient protection purpose is achieved, which can significantly improve the effect of accurate detection and efficient protection of DC fault arc. BRIEF DESCRIPTION OF DRAWINGS

[0030] Figure 1 The flowchart of the DC fault arc detection and efficient protection method under power electronic interference conditions of the present application;

[0031] Figure 2a The single-phase inverter simulation structure diagram in the photovoltaic model of the present application;

[0032] Figure 2b The three-phase inverter simulation structure diagram in the photovoltaic model of the present application;

[0033] Figure 3a The short-time Fourier transform fault arc model simulation result of Cassie brought into the single-phase and three-phase inverter structure is compared with the normal condition;

[0034] Figure 3bShort-time Fourier transform arc fault model for bringing U-I noise into single-phase and three-phase inverter structure;

[0035] Figure 3c Short-time Fourier transform arc fault model for bringing pink noise into single-phase and three-phase inverter structure;

[0036] Figure 4a Arc experiment schematic diagram for adopting UL1699B standard;

[0037] Figure 4b Current data of three-phase inverter collected through experiment;

[0038] Figure 4c Comparison of short-time Fourier transform experimental results of three-phase noise data and simulation results of short-time Fourier transform arc fault model in three-phase inverter structure. DETAILED DESCRIPTION

[0039] The present application will be described in detail below in combination with the drawings and specific embodiments.

[0040] The method for detecting and efficiently protecting direct-current arc under power electronic interference conditions according to the present application has a flow chart as shown in Figure 1 The method is implemented according to the following steps.

[0041] Step 1: Point-by-point sampling of system output current signal under power electronic interference to obtain current signal;

[0042] Step 1 is implemented according to the following steps.

[0043] The system output current signal under power electronic interference is point-by-point sampled at a sampling frequency f s to obtain current signal x i , i∈N + , where i represents the analysis period number, and N sampling points are obtained. When N reaches the requirement of the analysis period, go to Step 2 for arc fault feature analysis.

[0044] The value range of the sampling point number N in Step 1 is 1000-12000.

[0045] Step 2: Application of short-time Fourier transform to obtain first characteristic quantity;

[0046] Step 2 is implemented according to the following steps.

[0047] According to the needs of specific applications, determine the window function w(m) (such as Hanning window, rectangular window, etc.) and the selected time point m, for non-stationary signal, Fourier transform can not well reflect the change of its frequency with time. Because in the application of Fourier transform, each frequency component calculated is the corresponding whole time axis, which makes the time information of the original signal lost, can not analyze the change of frequency with time, and can not locate the mutation occurred at a time. In order to make up for the deficiency of Fourier transform, the whole time domain is divided into countless small processes with equal length, that is, windowing, each process is approximately stationary, and then Fourier transform is carried out, that is, short-time Fourier transform, short-time Fourier transform is defined as:

[0048]

[0049] Wherein, x(m) is the input signal, w(m) is the window signal, w(m) is reversed in time and has an offset of n samples, X(n,w) is the two-dimensional signal of time n and frequency w, m is the selected time point, the time domain and frequency domain of the signal are related, the time-frequency domain analysis of the signal is carried out through X(n,w), and the time-frequency diagram of the input signal is defined as S(n,w) = |X(n,w)| 2 That is, the first characteristic quantity obtained.

[0050] Step 3, obtaining the common frequency band of the fault arc;

[0051] Step 3 is implemented according to the following steps:

[0052] For any power electronic interference factor, the first characteristic quantity obtained in step 2 is subtracted by frequency, and the frequency band corresponding to the minimum difference value is taken as the candidate common frequency band. It is judged whether the short-time Fourier characteristic value corresponding to the frequency is a local maximum value. If not, the frequency band is taken as the common frequency band. For different topological structures, different inverters such as single-stage transformerless photovoltaic inverter, photovoltaic inverter with power frequency transformer structure, multi-stage photovoltaic inverter with high-frequency transformer structure, etc. There are many different photovoltaic grid-connected inverter structures such as centralized type, cascade type, module integrated type and multi-cascade type, and different interference factors of different manufacturers have different effects on the time-frequency characteristics of the fault arc, and the way to deal with the fault arc is also different.

[0053] Step 4, comparing the first characteristic quantity with the common frequency band to detect whether there is a fault arc in the circuit;

[0054] Step 4 is implemented according to the following steps:

[0055] The running state of the current system is judged by using an evidence classifier, the evidence classifier checks the input signal, i.e., the first characteristic quantity, and outputs the possibility of a specific result, i.e., the possibility of a fault arc, on the basis of a given attribute, i.e., a common frequency band, to classify the data into fault arc generation and non-fault arc generation, and the existence of a fault arc is outputted by combining the multi-cycle state (a single cycle has contingency, and the classifier is used to judge multiple cycles), and if the fault arc occurs, the process goes to step 5, and if the fault arc does not occur, the process goes to step 1.

[0056] Step 5: After the fault arc occurs, the power electronic interference factor type is identified by combining the first characteristic quantity and the difference frequency band, the type and position of the fault occurrence are determined, and efficient prevention and treatment of the fault arc are realized.

[0057] Step 5 is implemented according to the following steps:

[0058] The maximum value of the difference value in step 3 is taken, and the frequency band corresponding to the maximum value is taken as the difference frequency band (the current signals of different power electronic device topologies will have differences, and the difference frequency band is used to distinguish which topology), the evidence classifier checks a given attribute, i.e., the difference frequency band, and outputs the possibility of a specific result, and the data, i.e., the obtained first characteristic quantity, is classified to identify the power electronic interference factor type (such as single-phase / three-phase output connection mode, single-pole / dual-pole topology structure, PQ / PI control strategy), and efficiently govern the fault arc.

[0059] In the present application, the classifier can be selected from: a decision tree classifier, a selection tree classifier, and an evidence classifier.

[0060] For fault arc waveforms of different topologies and control strategies, the similar frequency bands obtained by the evidence classifier are compared with normal waveform samples, and the frequency bands similar to the fault arc waveforms caused by noise interference are excluded, the common frequency bands obtained by the method can be used to judge the existence of the fault arc. The difference frequency bands obtained by the evidence classifier are analyzed to analyze the differences of the fault arc under the influence of different topologies and control strategies, the difference frequency bands obtained by the method can be used to determine the type of the fault arc, and corresponding protection measures are taken in time, and to some extent, the position of the fault arc occurrence can be determined for detection and repair, and efficient prevention and treatment are finally realized.

[0061] Embodiment 1

[0062] Step 1: The power electronic system output current signal is sampled at a sampling frequency f s The current signal x i (i∈N + ) is obtained, which represents the analysis period number, and N sampling points are obtained, and when N reaches the requirement of the analysis period, the process goes to step 2) for fault arc characteristic analysis.

[0063] Step 2, according to the requirements of specific applications, determine the appropriate window function w(m) (such as Hanning window, rectangular window, etc.) and the selected time point m, apply short-time Fourier transform to obtain the first characteristic quantity.

[0064] Step 3, through the evidence classifier, obtain the similar frequency bands of the fault arc waveforms of different topological structures and control strategies, compare with the normal waveform samples to exclude the noise interference, and finally obtain the common frequency bands of the fault arc.

[0065] Step 4, take the common frequency bands of the fault arc of the power electronic equipment under different topological structures and control strategies, compare the first characteristic quantity with the frequency band to detect whether there is a fault arc in the circuit.

[0066] Step 5, through the evidence classifier, obtain the difference frequency bands of the fault arc waveforms of different topological structures and control strategies, combine the first characteristic quantity with the difference frequency bands after the occurrence of the fault arc, identify the type of power electronic interference factors, determine the type and position of the fault, and according to different topological structures and control strategies, adopt corresponding protection measures to realize efficient prevention and treatment of the fault arc.

[0067] Embodiment 2

[0068] The method for detecting and efficiently preventing the DC fault arc under the power electronic interference condition, the flow chart is as shown in the figure, and the specific implementation is as follows: Figure 1

[0069] Step 1, sample the output current signal of the power electronic system point by point to obtain the current signal;

[0070] Step 1 is implemented according to the following steps:

[0071] The system output current signal under the power electronic interference is sampled point by point according to the sampling frequency f s , and the current signal x i is obtained, i∈N + represents the analysis period number, and N sampling points are obtained. When N reaches the requirement of the analysis period, go to step 2 for fault arc characteristic analysis.

[0072] The value range of the sampling point number N in step 1 is 1000-12000.

[0073] Step 2, apply short-time Fourier transform to obtain the first characteristic quantity;

[0074] Step 2 is implemented according to the following steps:

[0075] ​According to the needs of specific applications, determine the window function w(m) (such as Hanning window, rectangular window, etc.) and the selected time point m, for non-stationary signal, Fourier transform can not well reflect the change of its frequency with time. Because in the application of Fourier transform, each frequency component calculated is the corresponding whole time axis, which makes the time information of the original signal lost, can not analyze the change of frequency with time, and can not locate the mutation occurred at a time. In order to make up for the deficiency of Fourier transform, the whole time domain is divided into countless small processes with equal length, that is, windowing, each process is approximately stationary, and then Fourier transform is carried out, that is, short-time Fourier transform,

[0076] Short-time Fourier transform is defined as:

[0077]

[0078] Wherein, x(m) is the input signal, w(m) is the window signal, w(m) is reversed in time and has an offset of n samples, X(n,w) is the two-dimensional signal of time n and frequency w, m is the selected time point, the time domain and frequency domain of the signal are connected, the time-frequency domain analysis of the signal is carried out through X(n,w), and the time-frequency diagram of the input signal is defined as S(n,w) = |X(n,w)| 2 That is, the first characteristic quantity is obtained.

[0079] Step 3, obtaining the common frequency band of fault arc;

[0080] Step 4, comparing whether there is fault arc in the first characteristic quantity and the common frequency band detection circuit;

[0081] Step 4 is implemented according to the following steps:

[0082] The running state of the current system is judged by using the evidence classifier. The evidence classifier classifies the data by checking the input signal, that is, the first characteristic quantity, and outputting the possibility of a certain result, that is, the possibility of fault arc, on the basis of a given attribute, that is, the common frequency band. The data is divided into fault arc and no fault arc. Combined with the multi-cycle state (single cycle has contingency, and the classifier is used to judge multiple cycles), whether the fault arc exists is output, and if it occurs, it is turned to step 5, and if it does not occur, it is turned to step 1.

[0083] Step 5, after the occurrence of fault arc, combined with the first characteristic quantity and the difference frequency band, the power electronic interference factor type is identified, the type and position of fault occurrence are determined, and the efficient prevention and treatment of fault arc is realized.

[0084] Step 5 is implemented according to the following steps:

[0085] The maximum value of the difference value of step 3 is taken, and the frequency band corresponding to the maximum value is taken as the difference frequency band (the current signals of different power electronic device topologies will have differences, and the difference frequency bands can distinguish which topology they are), and the evidence classifier classifies the data, that is, the obtained first feature quantity, by checking the possibility of outputting a certain specific result on the basis of a given attribute, that is, the difference frequency band, to identify the power electronic interference factor type (such as single-phase / three-phase output connection mode, single-pole / dual-pole topology, PQ / PI control strategy), and to efficiently manage the fault arc.

[0086] According to different topologies and control strategies (for example, an inverter has many different topologies and control strategies, such as a single-stage transformerless photovoltaic inverter, a photovoltaic inverter with a power frequency transformer structure, a multi-stage photovoltaic inverter with a high-frequency transformer structure, etc., and there are many different photovoltaic grid-connected inverter structures such as centralized, cascade, module integrated, and multi-cascade, and different manufacturers interfere with each other, and have different effects on the time-frequency characteristics of the fault arc, and the way of processing the fault arc will also be different), efficient management of the fault arc is realized.

[0087] The most direct and essential arc isolation method for processing the arc is to open the circuit: to disconnect the circuit. The details of arc opening of different types of power electronic devices and even different manufacturers are different, and the method of arc opening is described in the product description of each device, which is not the focus of the present application. Because the arc opening operations of different devices are different, and there are many types of power electronic devices, disconnecting the main power supply is the most direct method when a fault arc occurs, but it will inevitably have a huge impact on people's life and work. One of the meanings of the present application is to quickly help people locate which specific power electronic device has a fault, and then to perform the fastest repair on the smallest local circuit (for example, a fault arc occurs in one phase of a three-phase motor. The current method is to disconnect the entire three-phase power supply, but the efficiency is reflected in that the phase that produces the fault arc can be found and disconnected, and the operation of the motor is affected to the smallest extent). And early warning (the final output of the method shown in the present application is which specific power electronic device produces a fault arc in the circuit, and there are many specific early warning methods that can be customized according to requirements. The most direct example is to output the name and location of the faulty device to the display screen)

[0088] Embodiment 3

[0089] The method of the present application applied to an actual system is described, taking the influence of different inverter topologies on the time-frequency characteristics of the fault arc as an example, as shown in Figure 2a , Figure 2b , which is a simulation operation environment of the method of the present application in an actual inverter system, as shown inFigure 3a , Figure 3b , Figure 3c The time-frequency analysis is performed on three arc current waveforms, and the results of three-phase and single-phase inverter topologies are compared. As can be seen from the figure, the eigenvalues of the single-phase inverter topology fault current and the eigenvalues of the STFT of the three-phase inverter topology fault current are different. Compared with single-phase, the characteristic quantity of three-phase arc current is larger, and the noise is more obvious. An experimental platform is built to obtain experimental data and compare with simulation data. The arc occurrence device used in this experiment adopts UL1699B standard, and its schematic diagram is shown in Figure 4a To analyze the experimental results more intuitively, MATLAB is used to make signal waveform diagram, Figure 4b The current data of three-phase inverter collected by experiment can be seen that the current decreases at 1.2s, and arc occurs at this time, which is consistent with all simulation trends. And the short-time Fourier transform results of three-phase simulation arc current are compared with the results obtained by three-phase experiment, as shown in Figure 4c The simulation data is correct.

[0090] This method aims at fault arc under different topology structures and control strategies, solves the arc detection problem of different topology structures and control strategies in the system, and through the study of the influence of the system on the fault arc, it is beneficial to prevent the misoperation of circuit breaker, significantly improves the safety of arc detection, and through short-time Fourier transform, compares the commonness and difference of fault arc characteristic quantity under different topology structures and control strategies, enhances the safety problem of circuit breaker opening under different topology structures, and then achieves the purpose of efficient protection, which can significantly improve the effect of accurate detection and efficient protection of DC fault arc.

Claims

1. A method for detecting and efficiently protecting against DC fault arcs under power electronic interference conditions, characterized in that, Specifically, the following steps are implemented: Step 1, point-by-point sampling of the power electronic system output current signal to obtain a current signal; Step 2, applying short-time Fourier transform to obtain a first characteristic quantity; The step 2 is implemented according to the following steps: The window function is determined according to the requirements of the specific application and the selected time point m, the entire time domain is decomposed into an infinite number of equal length small processes, that is, windowing, each process is approximately stationary, and then Fourier transform is performed to know what frequency appears at which time point, that is, short-time Fourier transform, The short-time Fourier transform is defined as: wherein is the input signal, is the window signal, is the inverse in time and has an offset of n samples, is the two-dimensional signal of time n and frequency w, m is the selected time point, the time and frequency domains of the signal are linked by the time-frequency domain analysis of the signal, the time-frequency diagram of the input signal is defined as i.e. the first feature quantity obtained; Step 3, obtaining a common frequency band of the arc fault; The step 3 is implemented according to the following steps: For any power electronic interference factor, the first characteristic quantity obtained in the step 2 is differentiated by frequency, and the frequency band corresponding to the minimum difference value is taken as a candidate common frequency band, and it is judged whether the short-time Fourier characteristic value corresponding to the frequency band is a local maximum value, if not, the frequency band is taken as a common frequency band; Step 4, comparing the first characteristic quantity with the common frequency band to detect whether there is an arc fault in the circuit; The step 4 is implemented according to the following steps: The running state of the current system is judged by using an evidence classifier, the evidence classifier checks the input signal, i.e., the first characteristic quantity, and outputs the possibility of a certain specific result, i.e., the possibility of an arc fault, on the basis of a given attribute, i.e., the common frequency band, to classify the data, and the data is divided into an arc fault and no arc fault, and the multi-cycle state output is combined to judge whether the arc fault exists, if it occurs, it is transferred to step 5, if it does not occur, it is transferred to step 1; Step 5, after the arc fault occurs, the first characteristic quantity and the difference frequency band are combined to identify the type of power electronic interference factor, determine the type and position of the fault, and realize efficient prevention and treatment of the arc fault; The step 5 is implemented according to the following steps: The maximum value of the difference value in step 3 is taken, and the frequency band corresponding to the maximum value is taken as a difference frequency band, the evidence classifier checks a given attribute, i.e., the difference frequency band, and outputs the possibility of a certain specific result, classifies the data, i.e., the obtained first characteristic quantity, identifies the type of power electronic interference factor, and efficiently governs the arc fault.

2. The method of claim 1, wherein the method further comprises: The step 1 is implemented according to the following steps: The system output current signal under power electronic interference is sampled point by point according to a sampling frequency to obtain a current signal , indicates the analysis period number to obtain sampling points, and when the requirement of the analysis period is reached, the process goes to step 2 for arc fault feature analysis.

3. The method of claim 2, wherein the method further comprises: The sampling point number N in the step 1 is in the range of 1000-12000.

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