LED epitaxial structure and preparation method thereof

CN117558845BActive Publication Date: 2026-11-03XIAMEN CHANGELIGHT CO LTD
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Patent Information

Application Number
CN202311840853.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-12-29
Publication Date
2026-11-03
Estimated Expiration
2043-12-29

AI Technical Summary

Technical Problem

GaN-based LEDs have low hole injection efficiency, resulting in low photoelectric conversion efficiency, and severe electron leakage, which affects internal quantum efficiency.

Method used

A novel LED epitaxial structure is designed by setting a quantum well structure with a tunnel junction in series in the active layer and constructing a secondary electric field within the tunnel junction. The polarization or free electric field is used to improve the recombination efficiency of electrons and holes and avoid the diffusion of P-type dopants.

Benefits of technology

It improves hole injection efficiency, enhances the reuse of electrons and holes, improves photoelectric performance, and simplifies the preparation process.

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Abstract

The application provides an LED epitaxial structure and a preparation method thereof. The active layer is provided with a plurality of quantum well structures connected in series through a tunnel junction. The tunnel junction comprises a P-type high-doped semiconductor layer, an intermediate layer and an N-type high-doped semiconductor layer stacked in a first direction. The P-type high-doped semiconductor layer and the N-type high-doped semiconductor layer serve as a body of the tunnel junction, and the intermediate layer is used for constructing a secondary electric field in the tunnel junction. When an electron from the N-type semiconductor layer enters the active layer to recombine with a hole, the electron is gradually transferred to a subsequent quantum well structure in the first direction under the action of a strong built-in electric field of the tunnel junction, so that the electron and the hole are repeatedly used, and secondary radiation recombination occurs. The plurality of quantum well structures connected in series through the tunnel junction can repeatedly use the electron and the hole to generate more photons.
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Description

Technical Field

[0001] This invention relates to the field of light-emitting diodes, and more particularly to an LED epitaxial structure and its fabrication method. Background Technology

[0002] Currently, GaN-based LED light-emitting materials are finding increasing applications in displays, lighting, biotechnology, sensors, and other fields due to their large bandgap, high breakdown electric field, and high electron saturation mobility. The main challenge facing GaN-based LEDs is their low hole injection efficiency, which leads to low photoelectric conversion efficiency. This low hole injection efficiency also exacerbates electron leakage and, more fundamentally, causes a significant decline in internal quantum efficiency, thus limiting the photoelectric performance of GaN-based LEDs. Therefore, improving hole injection efficiency is crucial for enhancing the photoelectric performance of GaN-based LEDs.

[0003] Currently available methods mainly include adjusting the thickness of the active region quantum barrier to reduce the hole transport path and achieve a uniform distribution of hole concentration; increasing the hole injection concentration by designing the composition of materials in P-type GaN; and increasing the conductivity of the P-electrode contact layer.

[0004] The aforementioned methods have been proven through extensive research to improve hole injection efficiency to some extent. However, due to the complexity of the epitaxial growth process and the small compositional differences between each layer, it is difficult to precisely control the composition. For example, if the quantum barrier is too thick, it will cause stress mismatch, enhance the material's polarization electric field, and reduce hole injection efficiency; if it is too thin, the binding force on electrons and holes will be insufficient, which will also affect the internal quantum efficiency. Furthermore, the activation ability of Mg in AlN is very poor, and precisely controlling the Al composition is also a major challenge.

[0005] In view of this, the inventors have specifically designed an LED epitaxial structure and its preparation method, which leads to this invention. Summary of the Invention

[0006] The purpose of this invention is to provide an LED epitaxial structure and its preparation method to solve the problem of low hole injection efficiency in LED chips.

[0007] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0008] An LED epitaxial structure, comprising:

[0009] A substrate and an N-type semiconductor layer, an active layer, and a P-type semiconductor layer sequentially stacked on the surface of the substrate; wherein, the active layer includes a plurality of quantum well structures connected in series through a tunneling junction, the tunneling junction includes a P-type highly doped semiconductor layer, an intermediate layer, and an N-type highly doped semiconductor layer sequentially stacked along a first direction, the P-type highly doped semiconductor layer and the N-type highly doped semiconductor layer serving as the body for forming the tunneling junction, and the intermediate layer being used to construct a secondary electric field within the tunneling junction; the first direction is perpendicular to the substrate and extends from the substrate to the N-type semiconductor layer.

[0010] Preferably, the intermediate layer is stress mismatched with the P-type highly doped semiconductor layer and / or the N-type highly doped semiconductor layer to construct the secondary electric field, and the secondary electric field includes a polarization electric field.

[0011] Furthermore, if the LED epitaxial structure is used as the epitaxial structure of a GaN-based light-emitting diode, then:

[0012] The N-type semiconductor layer includes an N-type doped GaN layer, the P-type semiconductor layer includes a P-type doped GaN layer, the quantum well structure includes a GaN / InGaN quantum well periodic structure, the P-type highly doped semiconductor layer includes a P-type highly doped GaN layer, the N-type highly doped semiconductor layer includes an N-type highly doped GaN layer, and the intermediate layer includes an AlInGaN layer with a gradient of Al and In composition.

[0013] Preferably, the secondary electric field constructed by the intermediate layer includes a free electric field.

[0014] Furthermore, the intermediate layer includes a second P-type semiconductor layer, a stress buffer layer, and a second N-type semiconductor layer stacked sequentially along the first direction; the stress buffer layer is used to separate the second P-type semiconductor layer and the second N-type semiconductor layer to avoid the second P-type semiconductor layer and the second N-type semiconductor layer forming a PN junction.

[0015] Furthermore, if the epitaxial structure serves as the epitaxial structure of a GaN-based light-emitting diode, then:

[0016] The N-type semiconductor layer includes an N-type doped GaN layer, the P-type semiconductor layer includes a P-type doped GaN layer, the quantum well structure includes a GaN / InGaN quantum well periodic structure, the P-type highly doped semiconductor layer includes a P-type highly doped GaN layer, and the N-type highly doped semiconductor layer includes an N-type highly doped GaN layer.

[0017] Furthermore, in the intermediate layer: the second P-type semiconductor layer includes a P-type InGaN layer, the second N-type semiconductor layer includes an N-type AlGaN layer or an N-type GaN layer; and the stress buffer layer includes an AlInGaN layer.

[0018] Furthermore, the AlInGaN layer is formed by gradually increasing the amount of In to obtain the stress buffer layer.

[0019] Preferably, the doping concentration of the N-type highly doped semiconductor layer is not less than the doping concentration of the P-type highly doped semiconductor layer.

[0020] This invention also provides a method for preparing an LED epitaxial structure, comprising:

[0021] Provide a substrate;

[0022] An N-type semiconductor layer, an active layer, and a P-type semiconductor layer are sequentially grown on the surface of the substrate. The active layer includes a plurality of quantum well structures connected in series via a tunneling junction. The tunneling junction includes a P-type highly doped semiconductor layer, an intermediate layer, and an N-type highly doped semiconductor layer stacked sequentially along a first direction. The P-type highly doped semiconductor layer and the N-type highly doped semiconductor layer serve as the body for forming the tunneling junction, and the intermediate layer is used to construct a secondary electric field within the tunneling junction. The first direction is perpendicular to the substrate and extends from the substrate towards the N-type semiconductor layer.

[0023] Preferably, the intermediate layer is stress mismatched with the P-type highly doped semiconductor layer and / or the N-type highly doped semiconductor layer to construct the secondary electric field, and the secondary electric field includes a polarization electric field.

[0024] Furthermore, if the LED epitaxial structure is used as the epitaxial structure of a GaN-based light-emitting diode, then:

[0025] The N-type semiconductor layer includes an N-type doped GaN layer, the P-type semiconductor layer includes a P-type doped GaN layer, the quantum well structure includes a GaN / InGaN quantum well periodic structure, the P-type highly doped semiconductor layer includes a P-type highly doped GaN layer, the N-type highly doped semiconductor layer includes an N-type highly doped GaN layer, and the intermediate layer includes an AlInGaN layer with a gradient of Al and In composition.

[0026] Preferably, the secondary electric field constructed by the intermediate layer includes a free electric field, then: the intermediate layer includes a second P-type semiconductor layer, a stress buffer layer and a second N-type semiconductor layer stacked sequentially along the first direction; the stress buffer layer is used to separate the second P-type semiconductor layer and the second N-type semiconductor layer to avoid the second P-type semiconductor layer and the second N-type semiconductor layer forming a PN junction.

[0027] Furthermore, if the epitaxial structure is used as the epitaxial structure of a GaN-based light-emitting diode, then: the N-type semiconductor layer includes an N-type doped GaN layer, the P-type semiconductor layer includes a P-type doped GaN layer, the quantum well structure includes a GaN / InGaN quantum well periodic structure, the P-type highly doped semiconductor layer includes a P-type highly doped GaN layer, and the N-type highly doped semiconductor layer includes an N-type highly doped GaN layer; and in the intermediate layer: the second P-type semiconductor layer includes a P-type InGaN layer, the second N-type semiconductor layer includes an N-type AlGaN layer or an N-type GaN layer; and the stress buffer layer includes an AlInGaN layer.

[0028] As can be seen from the above technical solution, the LED epitaxial structure provided by the present invention includes a plurality of quantum well structures connected in series through a tunneling junction in the active layer. The tunneling junction includes a P-type highly doped semiconductor layer, an intermediate layer, and an N-type highly doped semiconductor layer stacked sequentially along a first direction. The P-type and N-type highly doped semiconductor layers serve as the body for forming the tunneling junction, and the intermediate layer is used to construct a secondary electric field within the tunneling junction. Based on this, when electrons enter the active layer from the N-type semiconductor layer and recombine with holes, under the action of the strong built-in electric field of the tunneling junction, the electrons gradually transfer along the first direction to the subsequent quantum well structures, realizing the reuse of electrons and holes and causing secondary radiative recombination. In this way, multiple quantum well structures connected in series through the tunneling junction can realize the reuse of electrons and holes multiple times to generate more photons.

[0029] Secondly, by setting the doping concentration of the N-type highly doped semiconductor layer to be no less than that of the P-type highly doped semiconductor layer, the diffusion of P-type dopants (such as Mg) is avoided while ensuring the compensation effect of P-type dopants, thereby maximizing the radiative recombination of electrons and holes.

[0030] Then, in one technical solution of the present invention, the intermediate layer and the P-type highly doped semiconductor layer and / or the N-type highly doped semiconductor layer are stress mismatched to construct the secondary electric field, and the secondary electric field includes a polarization electric field; based on this, the electric field in the tunnel junction is further enhanced by the polarization electric field, thereby increasing the tunneling probability of the charge carriers.

[0031] Furthermore, in another technical solution of the present invention, the secondary electric field constructed by the intermediate layer includes a free electric field. Further, the intermediate layer includes a second P-type semiconductor layer, a stress buffer layer, and a second N-type semiconductor layer stacked sequentially along the first direction; the stress buffer layer is used to separate the second P-type semiconductor layer and the second N-type semiconductor layer to prevent the second P-type semiconductor layer and the second N-type semiconductor layer from forming a PN junction. Based on this, a free electric field in the same direction as the tunneling junction is constructed by the second P-type semiconductor layer and the second N-type semiconductor layer, enhancing the electric field in the tunneling junction, thereby increasing the tunneling probability of charge carriers.

[0032] The present invention also provides a method for preparing an LED epitaxial structure, which achieves the above-mentioned technical effects while being simple to operate and easy to implement. Attached Figure Description

[0033] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0034] Figure 1 These are schematic diagrams of the LED epitaxial structures provided in Embodiments 1 and 2 of the present invention.

[0035] Figure 2 These are schematic diagrams of the quantum well structures provided in Embodiments 1 and 2 of the present invention;

[0036] Figure 3 These are schematic diagrams of the tunnel junctions provided in Embodiments 1 and 2 of the present invention.

[0037] Figure 4 This is a schematic diagram of the intermediate layer provided in Embodiment 2 of the present invention;

[0038] Figure 5 This is a schematic diagram of the growth control method for the intermediate layer provided in Embodiment 2 of the present invention;

[0039] Explanation of symbols in the diagram:

[0040] 1. Substrate

[0041] 2. Buffer layer

[0042] 3. N-type semiconductor layer;

[0043] 4. Quantum well structure;

[0044] 5. Tunneling knot;

[0045] 6. P-type semiconductor layer;

[0046] 41. GaN quantum barrier layer; 42. InGaN quantum well layer;

[0047] 51. P-type highly doped semiconductor layer; 52. Intermediate layer; 53. N-type highly doped semiconductor layer;

[0048] 52.1 Second P-type semiconductor layer, 52.2 Stress buffer layer, 52.3 Second N-type semiconductor layer. Detailed Implementation

[0049] To make the content of this invention clearer, the following description, in conjunction with the accompanying drawings, further illustrates the invention. This invention is not limited to this specific embodiment. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without inventive effort are within the scope of protection of this invention.

[0050] Example 1

[0051] like Figure 1 , Figure 3 As shown, an LED epitaxial structure includes:

[0052] The substrate 1 and an N-type semiconductor layer 3, an active layer, and a P-type semiconductor layer 6 are sequentially stacked on the surface of the substrate 1. The active layer includes a plurality of quantum well structures 4 connected in series through a tunnel junction 5. The tunnel junction 5 includes a P-type highly doped semiconductor layer 51, an intermediate layer 52, and an N-type highly doped semiconductor layer 53 stacked sequentially along a first direction. The P-type highly doped semiconductor layer 51 and the N-type highly doped semiconductor layer 53 serve as the body for forming the tunnel junction 5, and the intermediate layer 52 is used to construct a secondary electric field within the tunnel junction 5. The first direction is perpendicular to the substrate 1 and points from the substrate 1 to the N-type semiconductor layer 3.

[0053] It is worth mentioning that the type of substrate 1 is not limited in this embodiment. For example, substrate 1 includes any one of sapphire, silicon carbide, silicon, gallium nitride, and aluminum nitride. In addition, the types of N-type semiconductor layer 3 and P-type semiconductor layer 6 are also not limited. For example, N-type semiconductor layer 3 can be, but is not limited to, gallium nitride layer, and correspondingly, P-type semiconductor layer 6 can be, but is not limited to, gallium nitride layer.

[0054] In addition, a buffer layer 2 is provided between the substrate 1 and the N-type semiconductor layer 3.

[0055] Furthermore, based on the above embodiments of the present invention, the stress mismatch between the intermediate layer 52 and the P-type highly doped semiconductor layer 51 and / or the N-type highly doped semiconductor layer 53 is used to construct the secondary electric field, and the secondary electric field includes a polarization electric field.

[0056] Furthermore, based on the above embodiments of the present invention, if the LED epitaxial structure is used as the epitaxial structure of a GaN-based light-emitting diode, then:

[0057] The N-type semiconductor layer 3 includes an N-type doped GaN layer, the P-type semiconductor layer 6 includes a P-type doped GaN layer, the quantum well structure 4 includes a GaN / InGaN quantum well periodic structure, the P-type highly doped semiconductor layer 51 includes a P-type highly doped GaN layer, the N-type highly doped semiconductor layer 53 includes an N-type highly doped GaN layer, and the intermediate layer 52 includes AlInGaN with a gradient of Al and In composition.

[0058] Furthermore, based on the above embodiments of the present invention, the doping concentration of the N-type highly doped semiconductor layer 53 is not less than the doping concentration of the P-type highly doped semiconductor layer 51.

[0059] This invention also provides a method for fabricating an LED epitaxial structure, wherein the LED epitaxial structure serves as the epitaxial structure of a GaN-based light-emitting diode. The equipment used is MOCVD, with trimethyl / ethylgallium™Ga / TEGa, trimethylaluminum™Al, and ammonia (NH3) as the Ga source, Al source, and nitrogen source, respectively, and N2 as the carrier gas. The N-type and P-type doping sources are silane (SiH4) and magnesium pyrocene (CP2Mg), respectively. The method includes:

[0060] S01, Provide a substrate 1;

[0061] Substrate 1 includes, but is not limited to, sapphire substrate 1.

[0062] S02, A buffer layer 2 and an N-type semiconductor layer 3 are grown on the surface of the substrate 1; In one embodiment of the present invention, the N-type semiconductor layer 3 includes an N-type doped GaN layer, which is not limited in the present invention;

[0063] Specifically, in this step, the substrate 1 is placed in the MOCVD reaction chamber and hydrogenated for about 5 minutes with high-purity hydrogen gas at a temperature of about 1100°C. Then, the temperature is lowered to about 950°C to 970°C and Al source and nitrogen source are introduced to grow an undoped AlN buffer layer 2 with a thickness of about 10nm to 20nm.

[0064] Next, the Al source was turned off, and silane was introduced to grow a GaN layer with a thickness of approximately 1.3 μm to 1.8 μm and Si doped (i.e., an N-type doped GaN layer), with a doping concentration of 1-10 × 10⁻⁶. 18 cm -3 The N-type semiconductor layer 3 is formed.

[0065] S03, Growth of an active layer; wherein the active layer includes a plurality of quantum well structures 4 connected in series through a tunnel junction 5, the tunnel junction 5 includes a P-type highly doped semiconductor layer 51, an intermediate layer 52 and an N-type highly doped semiconductor layer 53 stacked sequentially along a first direction, the P-type highly doped semiconductor layer 51 and the N-type highly doped semiconductor layer 53 serving as the body for forming the tunnel junction 5, and the intermediate layer 52 being used to construct a secondary electric field within the tunnel junction 5;

[0066] Furthermore, based on the above embodiments of the present invention, the quantum well structure 4 includes a GaN / InGaN quantum well periodic structure, the P-type highly doped semiconductor layer 51 includes a P-type highly doped GaN layer, the N-type highly doped semiconductor layer 53 includes an N-type highly doped GaN layer, and the intermediate layer 52 includes an AlInGaN layer with a gradient of Al and In composition.

[0067] Specifically, in this step:

[0068] First, the temperature is lowered to 800–950°C, and a Ga source is introduced to grow a GaN quantum barrier layer 41 with a thickness of 7 nm–16 nm. Then, an In source is introduced to grow an InGaN quantum well layer 42 with a thickness of 1 nm–5 nm. Finally, the above cycle is repeated, with a growth period of N, where N is 6–15, to form a GaN / InGaN quantum well periodic structure, thus obtaining the desired result. Figure 2 The quantum well structure shown is 4.

[0069] Then, a 20–50 nm thick layer is grown with a Mg doping concentration of 1–5 × 10⁻⁶. 19 cm -3 A highly doped p-type GaN layer is grown to obtain the highly doped p-type semiconductor layer 51; next, an undoped AlInGaN layer is grown by gradient growth of Al and In compositions, with a thickness of about 10-15 nm, to obtain the intermediate layer 52; finally, a Si doping concentration of 1-3*10 nm with a thickness of 10-40 nm is grown. 20 cm -3 An N-type highly doped GaN layer is formed to obtain the N-type highly doped semiconductor layer 53. The P-type highly doped semiconductor layer 51, the intermediate layer 52, and the N-type highly doped semiconductor layer 53 constitute the tunnel junction 5. Further, the doping concentration of the N-type highly doped semiconductor layer 53 is not less than the doping concentration of the P-type highly doped semiconductor layer 51.

[0070] Finally, the above cycle is repeated, with a growth cycle of N, where N is 1 to 20, to form several quantum well structures 4 connected in series through tunnel junction 5, ultimately obtaining the active layer.

[0071] S04, Fabricate P-type semiconductor layer 6;

[0072] In this step, the temperature is adjusted to 900-1000℃, and a TMGa source, a nitrogen source, and magnesia-diocene are introduced to grow a p-type GaN layer with a thickness of 10-50 nm and a doping concentration of 1*10⁻⁶. 19 cm -3 Up to 5*10 19 cm -3 The P-type semiconductor layer 6 is then annealed at 850-900°C for 20-30 minutes under an N2 atmosphere to form the final layer.

[0073] As can be seen from the above technical solution, the LED epitaxial structure provided by the present invention includes a plurality of quantum well structures 4 connected in series through a tunnel junction 5 in the active layer. The tunnel junction 5 includes a P-type highly doped semiconductor layer 51, an intermediate layer 52, and an N-type highly doped semiconductor layer 53 stacked sequentially along a first direction. The P-type highly doped semiconductor layer 51 and the N-type highly doped semiconductor layer 53 serve as the body for forming the tunnel junction 5, and the intermediate layer 52 is used to construct a secondary electric field within the tunnel junction 5. Based on this, when electrons enter the active layer from the N-type semiconductor layer 3 and recombine with holes, under the action of the strong built-in electric field of the tunnel junction 5, the electrons gradually transfer along the first direction to the subsequent quantum well structures 4, realizing the reuse of electrons and holes and causing secondary radiative recombination. In this way, the multiple quantum well structures 4 connected in series through the tunnel junction 5 can realize the reuse of electrons and holes multiple times to generate more photons.

[0074] Secondly, by setting the doping concentration of the N-type highly doped semiconductor layer 53 to be no less than the doping concentration of the P-type highly doped semiconductor layer 51, the diffusion of P-type dopants (such as Mg) is avoided while ensuring the compensation effect of P-type dopants, thereby maximizing the radiative recombination of electrons and holes.

[0075] The present invention also provides a method for preparing an LED epitaxial structure, which achieves the above-mentioned technical effects while being simple to operate and easy to implement.

[0076] Example 2

[0077] like Figure 1 , 3 As shown, an LED epitaxial structure includes:

[0078] The substrate 1 and an N-type semiconductor layer 3, an active layer, and a P-type semiconductor layer 6 are sequentially stacked on the surface of the substrate 1. The active layer includes a plurality of quantum well structures 4 connected in series through a tunnel junction 5. The tunnel junction 5 includes a P-type highly doped semiconductor layer 51, an intermediate layer 52, and an N-type highly doped semiconductor layer 53 stacked sequentially along a first direction. The P-type highly doped semiconductor layer 51 and the N-type highly doped semiconductor layer 53 serve as the body for forming the tunnel junction 5, and the intermediate layer 52 is used to construct a secondary electric field within the tunnel junction 5. The first direction is perpendicular to the substrate 1 and points from the substrate 1 to the N-type semiconductor layer 3.

[0079] It is worth mentioning that the type of substrate 1 is not limited in this embodiment. For example, substrate 1 includes any one of sapphire, silicon carbide, silicon, gallium nitride, and aluminum nitride. In addition, the types of N-type semiconductor layer 3 and P-type semiconductor layer 6 are also not limited. For example, N-type semiconductor layer 3 can be, but is not limited to, gallium nitride layer, and correspondingly, P-type semiconductor layer 6 can be, but is not limited to, gallium nitride layer.

[0080] Furthermore, based on the above embodiments of the present invention, the secondary electric field constructed by the intermediate layer 52 includes a free electric field.

[0081] Furthermore, based on the above embodiments of the present invention, such as Figure 4 As shown, the intermediate layer 52 includes a second P-type semiconductor layer 52.1, a stress buffer layer 52.2, and a second N-type semiconductor layer 52.3 stacked sequentially along the first direction; the stress buffer layer 52.2 is used to separate the second P-type semiconductor layer 52.1 and the second N-type semiconductor layer 52.3 to prevent the second P-type semiconductor layer 52.1 and the second N-type semiconductor layer 52.3 from forming a PN junction.

[0082] Furthermore, based on the above embodiments of the present invention, if the epitaxial structure serves as the epitaxial structure of a GaN-based light-emitting diode, then:

[0083] The N-type semiconductor layer 3 includes an N-type doped GaN layer, the P-type semiconductor layer 6 includes a P-type doped GaN layer, the quantum well structure 4 includes a GaN / InGaN quantum well periodic structure, the P-type highly doped semiconductor layer 51 includes a P-type highly doped GaN layer, and the N-type highly doped semiconductor layer 53 includes an N-type highly doped GaN layer.

[0084] Further, in the intermediate layer 52: the second P-type semiconductor layer 52.1 includes a P-type InGaN layer, the second N-type semiconductor layer 52.3 includes an N-type doped AlGaN layer or an N-type GaN layer; the stress buffer layer 52.2 includes an AlInGaN layer.

[0085] Furthermore, the AlInGaN layer is formed by gradually increasing the In content to obtain the stress buffer layer 52.2.

[0086] Furthermore, based on the above embodiments of the present invention, the doping concentration of the N-type highly doped semiconductor layer 53 is not less than the doping concentration of the P-type highly doped semiconductor layer 51.

[0087] This invention also provides a method for fabricating an LED epitaxial structure, wherein the LED epitaxial structure serves as the epitaxial structure of a GaN-based light-emitting diode. The equipment used is MOCVD, with trimethyl / ethylgallium™Ga / TEGa, trimethylaluminum™Al, and ammonia (NH3) as the Ga source, Al source, and nitrogen source, respectively, and N2 as the carrier gas. The N-type and P-type doping sources are silane (SiH4) and magnesium pyrocene (CP2Mg), respectively. The method includes:

[0088] S01, Provide a substrate 1;

[0089] Substrate 1 includes, but is not limited to, sapphire substrate 1.

[0090] S02, A buffer layer 2 and an N-type semiconductor layer 3 are grown on the surface of the substrate 1; In one embodiment of the present invention, the N-type semiconductor layer 3 includes an N-type doped GaN layer, which is not limited in the present invention;

[0091] Specifically, in this step, the substrate 1 is placed in the MOCVD reaction chamber and hydrogenated for about 5 minutes with high-purity hydrogen gas at a temperature of about 1100°C. Then, the temperature is lowered to about 950°C to 970°C and Al source and nitrogen source are introduced to grow an undoped AlN buffer layer 2 with a thickness of about 10nm to 20nm.

[0092] Next, the Al source was turned off, and silane was introduced to grow a GaN layer with a thickness of approximately 1.3 μm to 1.8 μm and Si doped (i.e., an N-type doped GaN layer), with a doping concentration of 1-10 × 10⁻⁶. 18 cm -3 The N-type semiconductor layer 3 is formed.

[0093] S03, Growth of an active layer; wherein the active layer includes a plurality of quantum well structures 4 connected in series through a tunnel junction 5, the tunnel junction 5 includes a P-type highly doped semiconductor layer 51, an intermediate layer 52 and an N-type highly doped semiconductor layer 53 stacked sequentially along a first direction, the P-type highly doped semiconductor layer 51 and the N-type highly doped semiconductor layer 53 serving as the body for forming the tunnel junction 5, and the intermediate layer 52 being used to construct a secondary electric field within the tunnel junction 5;

[0094] Furthermore, based on the above embodiments of the present invention, the quantum well structure 4 includes a GaN / InGaN quantum well periodic structure, the P-type highly doped semiconductor layer 51 includes a P-type highly doped GaN layer, and the N-type highly doped semiconductor layer 53 includes an N-type highly doped GaN layer.

[0095] Further, in the intermediate layer 52: the second P-type semiconductor layer 52.1 includes a P-type InGaN layer, the second N-type semiconductor layer 52.3 includes an N-type AlGaN layer or an N-type GaN layer; the stress buffer layer 52.2 includes an AlInGaN layer.

[0096] Furthermore, the AlInGaN layer is formed by gradually increasing the In content to obtain the stress buffer layer 52.2.

[0097] Specifically, in this step:

[0098] First, the temperature is lowered to 800–950°C, and a Ga source is introduced to grow a GaN quantum barrier layer 41 with a thickness of 7 nm–16 nm. Then, an In source is introduced to grow an InGaN quantum well layer 42 with a thickness of 1 nm–5 nm. Finally, the above cycle is repeated, with a growth period of N, where N is 6–15, to form a GaN / InGaN quantum well periodic structure, thus obtaining the desired result. Figure 2 The quantum well structure shown is 4.

[0099] Then, grow a 20–50 nm thick layer with a Mg doping concentration of 1–5 × 10⁻⁶. 19 cm -3 A highly doped P-type GaN layer is grown to obtain the highly doped P-type semiconductor layer 51; then, a P-type InGaN / AlInGaN / N-type AlGaN (GaN) stack is grown with a stack thickness of 15-30 nm to obtain the intermediate layer 52; finally, a 10-40 nm thick Si doping concentration of 1-3*10⁻⁶ is grown. 20 cm -3 An N-type highly doped GaN layer is formed to obtain the N-type highly doped semiconductor layer 53. The P-type highly doped semiconductor layer 51, the intermediate layer 52, and the N-type highly doped semiconductor layer 53 constitute the tunnel junction 5. Further, the doping concentration of the N-type highly doped semiconductor layer 53 is not less than the doping concentration of the P-type highly doped semiconductor layer 51.

[0100] Finally, the above cycle is repeated, with a growth cycle of N, where N is 1 to 20, to form several quantum well structures 4 connected in series through tunnel junction 5, and finally the active layer is obtained.

[0101] Furthermore, based on the above embodiments of the present invention, such as Figure 5As shown, the P-type InGaN / AlInGaN / N-type AlGaN (GaN) stack can be achieved through the following growth control method:

[0102] First, during time t0, In source, Ga source, Cp2Mg and NH3 are introduced to grow a thickness of 5-10 nm, with a Mg doping concentration of 1-5*10. 19 cm -3 The process begins with growing P-type InGaN. Next, during time t1, Cp2Mg is turned off, and an Al source is introduced, gradually increasing the amount of In source introduced to grow a 5-10 nm thick AlInGaN layer (preferably, an undoped AlInGaN layer). It should be noted that the gradual introduction of the In source serves two purposes: firstly, it utilizes the surfactant effect of In to improve the crystal quality of the material, and secondly, it ensures lattice matching with the subsequent InGaN. Then, during time t2, the In source is turned off, and SiH4 is introduced to grow a 5-10 nm thick N-type AlGaN with a doping concentration of 1-3 × 10⁻⁶. 20 cm -3 .

[0103] S04, Fabricate P-type semiconductor layer 6;

[0104] In this step, the temperature is adjusted to 900-1000℃, and a TMGa source, a nitrogen source, and magnesia-diocene are introduced to grow a p-type GaN layer with a thickness of 10-50 nm and a doping concentration of 1*10⁻⁶. 19 cm -3 Up to 5*10 19 cm -3 The P-type semiconductor layer 6 is then annealed at 850-900°C for 20-30 minutes under an N2 atmosphere to form the final layer.

[0105] As can be seen from the above technical solution, the LED epitaxial structure provided by the present invention includes a plurality of quantum well structures 4 connected in series through a tunnel junction 5 in the active layer. The tunnel junction 5 includes a P-type highly doped semiconductor layer 51, an intermediate layer 52, and an N-type highly doped semiconductor layer 53 stacked sequentially along a first direction. The P-type highly doped semiconductor layer 51 and the N-type highly doped semiconductor layer 53 serve as the body for forming the tunnel junction 5, and the intermediate layer 52 is used to construct a secondary electric field within the tunnel junction 5. Based on this, when electrons enter the active layer from the N-type semiconductor layer 3 and recombine with holes, under the action of the strong built-in electric field of the tunnel junction 5, the electrons gradually transfer along the first direction to the subsequent quantum well structures 4, realizing the reuse of electrons and holes and causing secondary radiative recombination. In this way, the multiple quantum well structures 4 connected in series through the tunnel junction 5 can realize the reuse of electrons and holes multiple times to generate more photons.

[0106] Secondly, by setting the doping concentration of the N-type highly doped semiconductor layer 53 to be no less than the doping concentration of the P-type highly doped semiconductor layer 51, the diffusion of P-type dopants (such as Mg) is avoided while ensuring the compensation effect of P-type dopants, thereby maximizing the radiative recombination of electrons and holes.

[0107] Furthermore, in another technical solution of the present invention, the secondary electric field constructed by the intermediate layer 52 includes a free electric field. Further, the intermediate layer 52 includes a second P-type semiconductor layer 52.1, a stress buffer layer 52.2, and a second N-type semiconductor layer 52.3 stacked sequentially along the first direction; the stress buffer layer 52.2 is used to separate the second P-type semiconductor layer 52.1 and the second N-type semiconductor layer 52.3 to prevent the second P-type semiconductor layer 52.1 and the second N-type semiconductor layer 52.3 from forming a PN junction. Based on this, a free electric field in the same direction as the tunnel junction 5 is constructed through the second P-type semiconductor layer 52.1 and the second N-type semiconductor layer 52.3, enhancing the electric field in the tunnel junction 5, thereby increasing the tunneling probability of charge carriers.

[0108] The present invention also provides a method for preparing an LED epitaxial structure, which achieves the above-mentioned technical effects while being simple to operate and easy to implement.

[0109] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0110] It should also be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that an article or apparatus comprising a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or apparatus that includes the aforementioned element.

[0111] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An LED epitaxial structure, characterized in that, include: A substrate and an N-type semiconductor layer, an active layer, and a P-type semiconductor layer sequentially stacked on the surface of the substrate; wherein, the active layer includes a plurality of quantum well structures connected in series through a tunneling junction, and the tunneling junction includes a P-type highly doped semiconductor layer, an intermediate layer, and an N-type highly doped semiconductor layer sequentially stacked along a first direction, wherein the P-type highly doped semiconductor layer and the N-type highly doped semiconductor layer serve as the body for forming the tunneling junction, and the intermediate layer is used to construct a secondary electric field within the tunneling junction; the first direction is perpendicular to the substrate and points from the substrate to the N-type semiconductor layer; The secondary electric field constructed by the intermediate layer includes a free electric field; the intermediate layer includes a second P-type semiconductor layer, a stress buffer layer and a second N-type semiconductor layer stacked sequentially along the first direction; the stress buffer layer is used to separate the second P-type semiconductor layer and the second N-type semiconductor layer to avoid the second P-type semiconductor layer and the second N-type semiconductor layer from forming a PN junction.

2. The LED epitaxial structure according to claim 1, characterized in that, The stress mismatch between the intermediate layer and the P-type highly doped semiconductor layer and / or the N-type highly doped semiconductor layer forms the secondary electric field, and the secondary electric field includes a polarization electric field.

3. The LED epitaxial structure according to claim 2, characterized in that, If the LED epitaxial structure is used as the epitaxial structure of a GaN-based light-emitting diode, then: The N-type semiconductor layer includes an N-type doped GaN layer, the P-type semiconductor layer includes a P-type doped GaN layer, the quantum well structure includes a GaN / InGaN quantum well periodic structure, the P-type highly doped semiconductor layer includes a P-type highly doped GaN layer, the N-type highly doped semiconductor layer includes an N-type highly doped GaN layer, and the intermediate layer includes an AlInGaN layer with a gradient of Al and In composition.

4. The LED epitaxial structure according to claim 1, characterized in that, If the epitaxial structure is used as the epitaxial structure of a GaN-based light-emitting diode, then: The N-type semiconductor layer includes an N-type doped GaN layer, the P-type semiconductor layer includes a P-type doped GaN layer, the quantum well structure includes a GaN / InGaN quantum well periodic structure, the P-type highly doped semiconductor layer includes a P-type highly doped GaN layer, and the N-type highly doped semiconductor layer includes an N-type highly doped GaN layer.

5. The LED epitaxial structure according to claim 4, characterized in that, In the intermediate layer: the second P-type semiconductor layer includes a P-type InGaN layer, the second N-type semiconductor layer includes an N-type AlGaN layer or an N-type GaN layer; the stress buffer layer includes an AlInGaN layer.

6. The LED epitaxial structure according to claim 5, characterized in that, The stress buffer layer is obtained by forming the AlInGaN layer by gradually increasing the In content.

7. The LED epitaxial structure according to any one of claims 1 to 5, characterized in that, The doping concentration of the N-type highly doped semiconductor layer is not less than the doping concentration of the P-type highly doped semiconductor layer.

8. A method for fabricating an LED epitaxial structure, characterized in that, include: Provide a substrate; An N-type semiconductor layer, an active layer, and a P-type semiconductor layer are sequentially grown on the surface of the substrate. The active layer includes a plurality of quantum well structures connected in series via a tunneling junction. The tunneling junction includes a P-type highly doped semiconductor layer, an intermediate layer, and an N-type highly doped semiconductor layer stacked sequentially along a first direction. The P-type highly doped semiconductor layer and the N-type highly doped semiconductor layer serve as the body for forming the tunneling junction, and the intermediate layer is used to construct a secondary electric field within the tunneling junction. The first direction is perpendicular to the substrate and points from the substrate toward the N-type semiconductor layer; The secondary electric field constructed by the intermediate layer includes a free electric field. The intermediate layer includes a second P-type semiconductor layer, a stress buffer layer, and a second N-type semiconductor layer stacked sequentially along the first direction. The stress buffer layer is used to separate the second P-type semiconductor layer and the second N-type semiconductor layer to avoid the second P-type semiconductor layer and the second N-type semiconductor layer from forming a PN junction.

9. The method for preparing an LED epitaxial structure according to claim 8, characterized in that, The stress mismatch between the intermediate layer and the P-type highly doped semiconductor layer and / or the N-type highly doped semiconductor layer forms the secondary electric field, and the secondary electric field includes a polarization electric field.

10. The method for preparing an LED epitaxial structure according to claim 9, characterized in that, If the LED epitaxial structure is used as the epitaxial structure of a GaN-based light-emitting diode, then: The N-type semiconductor layer includes an N-type doped GaN layer, the P-type semiconductor layer includes a P-type doped GaN layer, the quantum well structure includes a GaN / InGaN quantum well periodic structure, the P-type highly doped semiconductor layer includes a P-type highly doped GaN layer, the N-type highly doped semiconductor layer includes an N-type highly doped GaN layer, and the intermediate layer includes an AlInGaN layer with a gradient of Al and In composition.

11. The method for preparing an LED epitaxial structure according to claim 8, characterized in that, If the epitaxial structure is used as the epitaxial structure of a GaN-based light-emitting diode, then: The N-type semiconductor layer includes an N-type doped GaN layer, the P-type semiconductor layer includes a P-type doped GaN layer, the quantum well structure includes a GaN / InGaN quantum well periodic structure, the P-type highly doped semiconductor layer includes a P-type highly doped GaN layer, and the N-type highly doped semiconductor layer includes an N-type highly doped GaN layer; and in the intermediate layer: the second P-type semiconductor layer includes a P-type InGaN layer, the second N-type semiconductor layer includes an N-type AlGaN layer or an N-type GaN layer; the stress buffer layer includes an AlInGaN layer.

Citation Information

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