A circuit of a voltage-controlled oscillator with high integration and high power supply rejection ratio

Abstract

The present invention discloses a highly integrated, high-power-supply-rejection-ratio (PSRR) voltage-controlled oscillator circuit. The circuit comprises a bias circuit unit, a ring oscillator circuit unit, and a shaping circuit unit. The bias circuit unit generates a bias voltage Vctrl_out and sufficient load capacity for the ring oscillator circuit unit based on an input control voltage Vctrl. The ring oscillator circuit unit generates an oscillation waveform of a corresponding frequency under the control of the bias voltage Vctrl_out. The shaping circuit unit converts the oscillation waveform into a square wave output. This invention has the advantages of a simpler structure, higher integration, and better performance.

Description

Technical Field

[0001] The present invention mainly relates to the technical field of integrated circuits, and in particular to a circuit of a voltage-controlled oscillator with high integration and high power supply rejection ratio. Background Art

[0002] Phase-locked loops (PLLs) are currently the most common clock source. With the increasing frequency of SoCs (systems on a chip) and the precision of ADCs (analog-to-digital converters), the requirements for clock sources are becoming increasingly stringent. SoCs and ADCs are typically mixed-signal systems, and their power supply noise is relatively high. Therefore, improving the PLL's power supply rejection ratio (PSRR) and minimizing the impact of power supply noise on the output clock are key to optimizing PLL noise performance.

[0003] As a core module in a phase-locked loop (PLL), the noise performance of the voltage-controlled oscillator (VCO) significantly impacts the noise performance of the output clock. Currently, ring VCOs are widely used in PLLs due to their ease of integration and ability to generate multiphase clocks compared to LC VCOs. However, their noise performance and power consumption still require further optimization. In particular, ring VCOs have poor power supply rejection, significantly impacting their noise performance due to external power supply noise.

[0004] Most practitioners typically use an LDO (Low Dropout Regulator) to power the VCO. This produces a voltage output that is unaffected by the external power supply voltage, significantly reducing the VCO's susceptibility to power supply noise. However, this approach requires an LDO with a high power supply rejection ratio, significantly increasing area and power consumption.

[0005] Some practitioners have proposed using an op amp to buffer the VCO control voltage, reducing the impact of power supply noise on the control voltage and thus reducing the VCO output noise. However, this approach also requires a high-gain op amp, which significantly increases area and power consumption.

[0006] In other words, low power consumption and high integration are also the goals pursued by current high-performance VCOs. Therefore, how to improve the power supply rejection ratio while reducing power consumption and area is currently a technical difficulty in this field. Summary of the Invention

[0007] The technical problem to be solved by the present invention is: in response to the technical problems existing in the prior art, the present invention provides a circuit of a voltage-controlled oscillator with high integration and high power supply rejection ratio, which has a simpler structure, higher integration and better performance.

[0008] In order to solve the above technical problems, the present invention adopts the following technical solutions:

[0009] A highly integrated, high-power-supply-rejection-ratio voltage-controlled oscillator circuit comprises a bias circuit unit, a ring oscillation circuit unit, and a shaping circuit unit. The bias circuit unit is configured to generate a bias voltage Vctrl_out and sufficient load capacity for the ring oscillation circuit unit based on an input control voltage Vctrl; the ring oscillation circuit unit is configured to generate an oscillation waveform of a corresponding frequency under the control of the bias voltage Vctrl_out; and the shaping circuit unit is configured to convert the oscillation waveform into a square wave output.

[0010] As a further improvement to the circuit of the present invention: the ring oscillation circuit unit adopts a four-stage differential structure delay unit, and is connected end to end.

[0011] As a further improvement to the circuit of the present invention: in the four-stage differential structure of the four-stage differential delay unit, the three-stage unit is connected in positive and negative phases, and the one-stage unit is connected in positive and positive phases, so that the phase shift of the ring oscillation circuit, which is independent of frequency, reaches 180 degrees.

[0012] As a further improvement to the circuit of the present invention: the ring oscillation circuit unit includes a differential structure delay unit structure, and the internal power supply voltage of the differential structure delay unit is provided by Vctrl_out; M301 and M302, M303 and M304 in the differential structure delay unit respectively constitute a first inverter and a second inverter, while M305 and M306 constitute a pair of cross-coupled transistor circuits for forming positive feedback; the input signals VIN and VIP of the differential structure delay unit respectively drive the first inverter and the second inverter, and when the input signal is reversed, after a delay time, the outputs VOP and VON will be reversed.

[0013] As a further improvement of the circuit of the present invention: the length of the delay time is jointly determined by the voltage Vctrl_out, the first inverter, the second inverter and the cross-coupled transistor circuit.

[0014] As a further improvement of the circuit of the present invention: the bias circuit unit operates in a voltage domain of a high voltage HV, and the ring oscillation circuit unit and the shaping circuit unit operate in a voltage domain of a low voltage LV.

[0015] As a further improvement to the circuit of the present invention: the first current mirror in the bias circuit unit is used to mirror the current I0 output by the bandgap reference current source; the current mirror unit includes MOS transistors M501, M502, M505 and M511, M512, M513, all of which are N-type MOS transistors; the transistor M503 in the current mirror unit acts as a source follower, and the control voltage Vctrl outputs the Vctrl_out voltage after passing through M503 to provide power to the ring oscillation circuit unit and control its oscillation frequency; the gate voltage of the transistor M504 in the current mirror unit is provided by the clamping circuit, and the transistors M508, M509, and M510 inside the clamping circuit are diode-connected MOS transistors to provide a suitable bias voltage for the gate of the transistor M504. When the power supply voltage HV changes, the gate voltage of the transistor M504 remains unchanged; the current mirror is used to provide a suitable bias current for the clamping circuit.

[0016] As a further improvement to the circuit of the present invention: the NMOS transistors M701, M702, M706, and M707 in the shaping circuit unit are respectively amplifying pairs of transistors, and the PMOS transistors M703, M704, M708, and M709 respectively constitute a second current mirror as a load. The enable signal EN controls the on and off of the shaping circuit unit through M700 and M706; the above-mentioned MOS transistors constitute a differential amplifier structure with two second current mirrors as loads, amplifying the input differential signals VOP and VON that are not full-scale, thereby achieving full-scale output of the two differential signals; and providing a larger load driving capability through two stages of inverters.

[0017] Compared with the prior art, the advantages of the present invention are:

[0018] 1. The highly integrated, high power supply rejection ratio voltage-controlled oscillator circuit of the present invention has a simpler structure, higher integration, and better performance. Compared with previous solutions for reducing power supply noise, the bias circuit of the present invention can achieve a high power supply rejection ratio by utilizing a bias generation module and M504 and M503 transistors. It is simple and reliable, and has very low area and power consumption costs.

[0019] 2. The circuit of the voltage-controlled oscillator with high integration and high power supply rejection ratio of the present invention adopts the structure of a differential amplifier to realize the shaping and amplification of differential small signals to single-ended full-amplitude signals, thereby reducing the influence of power supply noise on the signal.

[0020] 3. In the highly integrated, high power supply rejection ratio voltage-controlled oscillator circuit of the present invention, the bias circuit module utilizes a bias generation module and an NMOS transistor M504 to reduce the impact of noise on the power supply HV on Vctrl_out. The bias generation module is used to generate a bias voltage Vbn for M504 that is independent of the power supply, thereby having a very high power supply rejection ratio.

[0021] 4. The circuit of the voltage-controlled oscillator with high integration and high power supply rejection ratio of the present invention converts the differential output signal of the ring oscillation circuit into a single-ended one and amplifies it in the shaping circuit module, amplifies the signal amplitude from Vctrl_out to the full-swing output, and at the same time increases its load driving capability. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a schematic diagram of the structural principle of the VCO in the present invention.

[0023] Figure 2 It is a schematic diagram of the structural principle of a ring oscillation circuit unit in a specific application example of the present invention.

[0024] Figure 3 It is a structural schematic diagram of a ring oscillation circuit unit using a delay unit in a specific application example of the present invention.

[0025] Figure 4 It is a schematic diagram of the structural principle of the bias circuit unit in a specific application example of the present invention.

[0026] Figure 5 It is a structural schematic diagram of an embodiment of a bias circuit unit in a specific application example of the present invention.

[0027] Figure 6 It is a connection diagram of a ring oscillation circuit unit and a shaping circuit unit in a specific application example of the present invention.

[0028] Figure 7 It is a structural schematic diagram of a shaping circuit unit in a specific application example of the present invention. DETAILED DESCRIPTION

[0029] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0030] In the description of the present invention, it should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention.

[0031] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature identified as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "plurality" means two or more, unless otherwise specifically defined.

[0032] In the present invention, unless otherwise expressly specified or limited, terms such as "assemble," "connect," "connect," and "fix" should be understood in a broad sense. For example, they may refer to fixed connection, detachable connection, or integration; mechanical connection or electrical connection; direct connection or indirect connection through an intermediate medium; and internal communication between two components or interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0033] like Figure 1 and Figure 6 As shown, a highly integrated, high-PSRR voltage-controlled oscillator circuit of the present invention includes a bias circuit unit 101, a ring oscillator circuit unit 102, and a shaping circuit unit 103. The bias circuit unit 101 generates a bias voltage Vctrl_out and sufficient load capacity for the ring oscillator circuit unit 102 based on the input control voltage Vctrl. Under the control of the bias voltage Vctrl_out, the ring oscillator circuit unit 102 generates an oscillation waveform of a corresponding frequency. The shaping circuit unit 103 converts this oscillation waveform into a square wave for output.

[0034] In specific application examples, in order to make the VCO have better common mode noise and power supply noise suppression, and better anti-interference ability, such as Figure 2 As shown, the ring oscillator circuit unit 102 adopts a four-stage differential structure delay unit, which is connected end to end.

[0035] Because the number of inversions in the differential unit must be an odd number for the circuit to oscillate, the four-stage differential structure of the present invention, in which the three-stage units are connected in positive and negative phases and the first-stage units are connected in positive and positive phases, enables the ring oscillator circuit to achieve a frequency-independent phase shift of 180 degrees. It should be noted that the number of stages in the ring oscillator circuit can be determined based on various requirements; four stages are used here for ease of description.

[0036] As a preferred embodiment, Figure 3As shown, the present invention further includes a structure of a differential structure delay unit, wherein the internal power supply voltage of the differential structure delay unit is provided by Vctrl_out. M301 and M302, M303 and M304 in the differential structure delay unit respectively constitute a first inverter 301 and a second inverter 302, while M305 and M306 constitute a pair of cross-coupled transistor circuits 303, which are used to form positive feedback to reduce the circuit's fall time and improve the noise performance of the oscillation circuit. For the differential structure delay unit, the input signals VIN and VIP drive the first inverter 301 and the second inverter 302 respectively. When the input signal is reversed, after a delay time, the outputs VOP and VON will reverse.

[0037] Furthermore, the length of the delay time is determined by the voltage Vctrl_out, the first inverter 301 , the second inverter 302 and the cross-coupled transistor circuit 303 .

[0038] In specific application examples, such as Figure 5 As shown, the first current mirror 501 in the bias circuit unit 101 is used to mirror the current I0 output by the bandgap reference current source. Specifically, the current mirror unit 501 includes MOS transistors M501, M502, M505 and M511, M512, and M513, all of which are N-type MOS transistors. Due to the different width-to-length ratios of M505, M512, and M502, M513 compared to M501 and M511, currents several times I0 can be generated at the drains of M502 and M505, respectively. Transistor M503 acts as a source follower. After the control voltage Vctrl passes through M503, it outputs the Vctrl_out voltage to provide power to the ring oscillation circuit unit 102 and control its oscillation frequency. The gate voltage of M504 is provided by clamp circuit 502. Transistors M508, M509, and M510 within clamp circuit 502 are diode-connected MOS transistors, providing a suitable bias voltage for the gate of M504. When the power supply voltage HV changes, the gate voltage of M504 remains unchanged, thereby ensuring a high power supply rejection ratio. The current mirror 503 is used to provide a suitable bias current for clamp circuit 502.

[0039] Combine Figure 5As can be seen, the principle of the clamp circuit 502 is to generate Vbn by using current flowing through M508 / M509 / M510. In other embodiments, other methods can be used to replace M508 / M509 / M510 according to actual needs, such as using a resistor, several PMOS transistors in series, several NMOS transistors in series, etc., or superimposing a voltage on Vctrl_out to generate Vbn. Similarly, the current mirror 503 can also be replaced by other methods, such as a cascode current mirror, and all of the above are within the scope of protection of the present invention.

[0040] In specific application examples, such as Figure 4 As shown, this is also an example of a bias circuit unit 101, wherein M401 / M402 is used to provide current to M403. A common source and common gate current mirror can be used to replace M401 / M402, or a resistor can be connected between the source terminal of M403 and the ground to replace M401 / M402.

[0041] In specific application examples, such as Figure 7 As shown, NMOS transistors M701, M702, M706, and M707 in the shaping circuit unit 103 serve as amplifier pairs. PMOS transistors M703, M704, M708, and M709 form a second current mirror as a load. Enable signal EN, passing through M700 and M706, controls the on / off switching of the shaping circuit unit 103. These MOS transistors form a differential amplifier structure with two second current mirrors as loads. They amplify input differential signals VOP and VON (i.e., the output differential signals of the ring oscillator circuit) that are not at full swing (LV), achieving full swing output for both differential signals. Finally, they pass through two stages of inverters to provide a high load driving capability.

[0042] The above are merely preferred embodiments of the present invention. The scope of protection of the present invention is not limited to the above embodiments. All technical solutions based on the principles of the present invention are within the scope of protection of the present invention. It should be noted that for those skilled in the art, various improvements and modifications that do not depart from the principles of the present invention should be considered within the scope of protection of the present invention.

Claims

1. A circuit of a voltage-controlled oscillator with high integration and high power supply rejection ratio, characterized in that: The device comprises a bias circuit unit, a ring oscillation circuit unit and a shaping circuit unit. The bias circuit unit is used to generate a bias voltage Vctrl_out and sufficient load capacity for the ring oscillation circuit unit according to the input control voltage Vctrl; the ring oscillation circuit unit is used to generate an oscillation waveform of a corresponding frequency under the control of the bias voltage Vctrl_out; and the shaping circuit unit is used to convert the oscillation waveform into a square wave output; The first current mirror unit in the bias circuit unit is used to mirror the current I0 output by the bandgap reference current source; the first current mirror unit includes a current mirror composed of MOS transistors M501, M502, M505 and M511, M512, and M513, all of which are N-type MOS transistors; the first current mirror unit also includes a transistor M503, which serves as a source follower. After the control voltage Vctrl passes through the transistor M503, it outputs a Vctrl_out voltage to provide power to the ring oscillation circuit unit and control its oscillation frequency; the first current mirror unit also includes a transistor M504, the gate voltage of the transistor M504 will be provided by the clamping circuit. The transistors M508, M509, and M510 in the clamping circuit are diode-connected MOS transistors to provide a suitable bias voltage for the gate of the transistor M504. When the power supply voltage HV changes, the gate voltage of the transistor M504 remains unchanged; the current mirror is used to provide a suitable bias current for the clamping circuit; The gate of transistor M504 is connected to a current mirror circuit formed by transistors M506 and M507 and to a clamp circuit. Transistor M504 also has one end connected to a power supply voltage HV and the other end connected to transistor M503. The current mirror circuit formed by transistors M506 and M507 and the clamp circuit maintain the gate voltage of transistor M504 constant, thereby stabilizing the output of transistor M503. The NMOS transistors M701, M702, M706, and M707 in the shaping circuit unit serve as amplifying pairs, respectively. The PMOS transistors M703, M704, M708, and M709 form a second current mirror as a load. The enable signal EN controls the on / off of the shaping circuit unit through M700 and M705, respectively. The MOS transistors constitute a differential amplifier structure with two second current mirrors as loads, amplifying input differential signals VOP and VON that are not full-scale, achieving full-scale output of the two differential signals. A two-stage inverter provides a greater load driving capability. M700-704 and the two-stage inverter serve as one shaping circuit to shape the output of VOP in the differential signal, and M705-709 and the two-stage inverter serve as the other shaping circuit to shape the other differential signal, VON.

2. The circuit of a voltage-controlled oscillator with high integration and high power supply rejection ratio according to claim 1, characterized in that: The ring oscillation circuit unit adopts a four-stage differential structure delay unit, and is connected end to end.

3. The circuit of a voltage-controlled oscillator with high integration and high power supply rejection ratio according to claim 2, characterized in that: In the four-stage differential structure of the four-stage differential delay unit, the third-stage unit is connected in positive and negative phases, and the first-stage unit is connected in positive and positive phases, so that the frequency-independent phase shift of the ring oscillation circuit reaches 180 degrees; the first to third stages are connected in positive and negative phases, and the positive output end of the previous stage unit is connected to the negative input end of the next stage unit; the third and fourth stages are connected in positive and positive phases, and the positive output end of the third stage unit is connected to the negative input end of the fourth stage unit.

4. The circuit of a voltage-controlled oscillator with high integration and high power supply rejection ratio according to claim 2, characterized in that: The ring oscillator circuit unit includes a differential structure delay unit structure, the internal power supply voltage of the differential structure delay unit is provided by Vctrl_out; M301 and M302, M303 and M304 in the differential structure delay unit respectively constitute a first inverter and a second inverter, while M305 and M306 constitute a pair of cross-coupled transistor circuits for forming positive feedback; the input signals VIN and VIP of the differential structure delay unit respectively drive the first inverter and the second inverter. When the input signal is reversed, after a delay time, the outputs VOP and VON will be reversed after passing through the cross-coupled transistor circuit.

5. The circuit of a voltage-controlled oscillator with high integration density and high power supply rejection ratio according to claim 4, characterized in that: The length of the delay time is determined by the voltage Vctrl_out, the first inverter, the second inverter, and the cross-coupled transistor circuit.

6. The circuit of a voltage-controlled oscillator with high integration density and high power supply rejection ratio according to any one of claims 1 to 5, characterized in that: The bias circuit unit operates in a voltage domain of a high voltage HV, and the ring oscillation circuit unit and the shaping circuit unit operate in a voltage domain of a low voltage LV.

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