Germanium on insulator short-wave infrared image sensor and manufacturing method thereof

Abstract

The present application belongs to the field of semiconductor process technology, and discloses a germanium on insulator short-wave infrared image sensor and a manufacturing method thereof, wherein the image sensor comprises: a readout circuit, a passivation layer, an N-type electrode and a P-type electrode, and a second silicon substrate, a thermal oxide layer, an aluminum oxide layer, a P-type heavily doped germanium layer, an intrinsic germanium sensing layer, a P-type charge layer, an intrinsic germanium quantum well layer, an intrinsic germanium layer and an N-type heavily doped germanium layer stacked in sequence, and a plurality of rectangular grooves of the same shape and distributed at preset intervals; the length of the P-type charge layer is less than the preset interval, and the number is greater than 0 and less than the number of rectangular grooves minus 1; the N-type electrode passes through the passivation layer to connect the P-type heavily doped germanium layer; the P-type electrode passes through the passivation layer to connect the N-type heavily doped germanium layer; each N-type electrode and each P-type electrode are connected to the readout circuit. The present application can process strong light signals and weak light signals at the same time, expands the dynamic response range of the image sensor, and enables it to adapt to a wider range of application scenarios.

Description

Technical Field

[0001] The present application relates to the field of semiconductor process technology, and in particular to a germanium on insulator short-wave infrared image sensor and a manufacturing method thereof. Background Art

[0002] Short-wave infrared photodetectors have broad application prospects and important research value. Compared with mainstream III-V short-wave infrared photoelectric materials, germanium materials have significant advantages such as silicon-based epitaxy (large size, 8 inches, or even 12 inches), high compatibility with CMOS process production lines, and excellent photoelectric response in the short-wave infrared band. It is considered to be one of the important technical solutions for large-scale production of short-wave infrared image sensors. In order to further improve the performance of germanium short-wave infrared photodetectors, researchers have proposed a germanium-on-insulator (GOI) structure, which aims to improve key performance indicators such as dark current, responsiveness, and quantum efficiency of the device. According to the type of device structure, photodetectors are usually divided into photodiodes and avalanche photodiodes.

[0003] Compared with ordinary photodiodes, avalanche photodiodes have higher sensitivity and are suitable for applications in extremely low light conditions; although ordinary photodiodes are not as sensitive as avalanche photodiodes, they are usually more stable and reliable and have a wider range of applications. Conventional image sensors only contain one type of photodiode (only one of the photodiodes or avalanche photodiodes), which to a certain extent limits the application scenarios of image sensors. Summary of the invention

[0004] The present application provides a germanium on insulator short-wave infrared image sensor and a manufacturing method thereof, which can process strong light signals and weak light signals at the same time, expand the dynamic response range of the image sensor, and enable it to adapt to a wider range of application scenarios.

[0005] In a first aspect, an embodiment of the present application provides a germanium on insulator short-wave infrared image sensor, comprising:

[0006] A readout circuit, a passivation layer, an N-type electrode and a P-type electrode, and a second silicon substrate, a thermal oxide layer, an aluminum oxide layer, a P-type heavily doped germanium layer, an intrinsic germanium sensing layer, a P-type charge layer, an intrinsic germanium quantum well layer, an intrinsic germanium layer and an N-type heavily doped germanium layer stacked in sequence, and a plurality of rectangular grooves of the same shape and distributed at preset intervals;

[0007] The rectangular groove runs through the N-type heavily doped germanium layer, the intrinsic germanium layer, the intrinsic germanium quantum well layer and the intrinsic germanium sensing layer; the passivation layer is superimposed on the N-type heavily doped germanium layer and the inner wall of each rectangular groove;

[0008] The length of the P-type charge layer is less than the preset interval, and the number is greater than 0 and less than the number of rectangular grooves minus 1;

[0009] The N-type electrode is arranged at the bottom of the rectangular groove, passing through the passivation layer to connect to the P-type heavily doped germanium layer; the P-type electrode passes through the passivation layer to connect to the N-type heavily doped germanium layer; each N-type electrode and each P-type electrode are connected to the readout circuit.

[0010] Furthermore, the thickness of the intrinsic germanium quantum well layer is in the range of 0.1-3 um.

[0011] Furthermore, the number of periods of the intrinsic germanium quantum well layer is 10-300, and the thickness of a single period is greater than 15 nm.

[0012] Furthermore, the thickness of the barrier layer of the intrinsic germanium quantum well layer is greater than or equal to 10 nm, and the thickness of the potential well layer is in the range of 5-30 nm.

[0013] Furthermore, the P-type charge layer is a P-type germanium charge layer or a P-type germanium silicon charge layer.

[0014] Furthermore, the thickness of the intrinsic germanium layer is in the range of 100-500 nm.

[0015] Furthermore, the thermal oxide layer is a silicon oxide layer.

[0016] Furthermore, the thickness of the intrinsic germanium sensing layer is in the range of 500-1400 nm.

[0017] Furthermore, the intrinsic germanium quantum well layer is an intrinsic germanium silicon quantum well layer.

[0018] In a second aspect, an embodiment of the present application provides a method for manufacturing a germanium on insulator short-wave infrared image sensor, comprising:

[0019] Providing a first silicon substrate, and sequentially stacking an intrinsic germanium buffer layer, an intrinsic germanium layer, an intrinsic germanium quantum well layer, a P-type charge layer, an intrinsic germanium sensing layer, a P-type heavily doped germanium layer and an aluminum oxide layer on the first silicon substrate to obtain a donor substrate;

[0020] Providing a second silicon substrate, and stacking a thermal oxide layer on the second silicon substrate to obtain an acceptor substrate;

[0021] bonding the donor substrate and the acceptor substrate wafers; and removing the first silicon substrate;

[0022] Ion implantation is performed on the intrinsic germanium buffer layer to form an N-type heavily doped germanium layer, thereby obtaining a sensor wafer;

[0023] A plurality of rectangular grooves of the same length and distributed at preset intervals are arranged on the sensor wafer; the rectangular grooves penetrate the N-type heavily doped germanium layer, the intrinsic germanium layer, the intrinsic germanium quantum well layer and the intrinsic germanium sensing layer;

[0024] The length of the P-type charge layer is less than the preset interval, and the number is greater than 0 and less than the number of rectangular grooves minus 1;

[0025] forming a passivation layer on the N-type heavily doped germanium layer and the inner wall of each rectangular groove;

[0026] An N-type electrode and a P-type electrode are provided, and the N-type electrode and the P-type electrode are connected to a readout circuit.

[0027] Furthermore, the method also includes: after connecting the readout circuit, removing a preset proportion or all of the second silicon substrate.

[0028] Furthermore, the thickness of the intrinsic germanium buffer layer is in the range of 100-500 nm.

[0029] Furthermore, the step of removing the first silicon substrate includes:

[0030] The first silicon substrate is removed by mechanical polishing or dry etching.

[0031] Furthermore, the method further comprises: after removing the first silicon substrate, performing chemical mechanical polishing on the intrinsic germanium buffer layer.

[0032] Furthermore, the steps of setting the rectangular groove include:

[0033] The sensor wafer is subjected to wet etching or dry etching to form rectangular grooves.

[0034] In summary, compared with the prior art, the technical solution provided in the embodiment of the present application has at least the following beneficial effects:

[0035] A germanium on insulator short-wave infrared image sensor provided by an embodiment of the present application can integrate an ordinary germanium PIN photodiode and a germanium avalanche photodiode on the same substrate at the same time through the design of a P-type charge layer; specifically, because the length of the P-type charge layer of the present application is less than the preset interval, and the number is less than the number of rectangular grooves minus 1, that is, not all the table structures between any two rectangular grooves have a P-type charge layer; when there is a P-type charge layer in the table structure, the table structure is an avalanche photodiode region; conversely, if there is no P-type charge layer in the table structure, it is a PIN photodiode region; the present application utilizes the PIN photodiode region to ensure the strong light signal detection and wide spectrum response of the image sensor, and utilizes the avalanche photodiode region to significantly improve the image sensor's detection capability of weak light signals, that is, the image sensor of the present application can process strong light signals and weak light signals at the same time, expands the dynamic response range of the image sensor, and enables it to adapt to a wider range of application scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 A structural diagram of a germanium-on-insulator short-wave infrared image sensor provided as an exemplary embodiment of the present application.

[0037] Figure 2 A flow chart of a method for manufacturing a germanium-on-insulator short-wave infrared image sensor provided in one embodiment of the present application.

[0038] Figure 3 A schematic diagram of a donor substrate and a receiver substrate wafer bonding step provided for one embodiment of the present application.

[0039] Figure 4 A schematic diagram of a sensor wafer after removing the first silicon substrate and performing ion implantation provided in an embodiment of the present application.

[0040] Figure 5 A schematic diagram of the structure of a sensor wafer after a rectangular groove is set according to an embodiment of the present application.

[0041] Figure 6 A schematic diagram of the structure of a sensor wafer after a passivation layer is stacked provided in one embodiment of the present application.

[0042] Description of reference numerals:

[0043] 001, first silicon substrate; 002, intrinsic germanium buffer layer; 101, second silicon substrate; 102, thermal oxide layer; 103, aluminum oxide layer; 104, P-type heavily doped germanium layer; 105, intrinsic germanium sensing layer; 106, P-type charge layer; 107, intrinsic germanium quantum well layer; 108, intrinsic germanium layer; 109, N-type heavily doped germanium layer; 201, passivation layer; 202, N-type electrode; 203, P-type electrode; 204, readout circuit. DETAILED DESCRIPTION

[0044] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.

[0045] Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making any creative work shall fall within the scope of protection of this application.

[0046] See also Figure 1 The embodiment of the present application provides a germanium on insulator short-wave infrared image sensor, including: a readout circuit 204, a passivation layer 201, an N-type electrode 202 and a P-type electrode 203, and a second silicon substrate 101, a thermal oxide layer 102, an aluminum oxide layer 103, a P-type heavily doped germanium layer 104, an intrinsic germanium sensing layer 105, a P-type charge layer 106, an intrinsic germanium quantum well layer 107, an intrinsic germanium layer 108 and an N-type heavily doped germanium layer 109 stacked in sequence, and a plurality of rectangular grooves of the same shape and distributed at preset intervals.

[0047] The thermal oxide layer 102 is a silicon oxide layer (SiO2 layer).

[0048] The rectangular grooves penetrate the N-type heavily doped germanium layer 109 , the intrinsic germanium layer 108 , the intrinsic germanium quantum well layer 107 and the intrinsic germanium sensing layer 105 ; the passivation layer 201 is superimposed on the N-type heavily doped germanium layer 109 and the inner walls of each rectangular groove.

[0049] The thickness of the intrinsic germanium layer 108 is in the range of 100-500nm; the thickness of the intrinsic germanium sensing layer 105 is in the range of 500-1400nm. The intrinsic germanium quantum well layer 107 can also be an intrinsic germanium silicon quantum well layer, the thickness of the intrinsic germanium quantum well layer 107 or the intrinsic germanium silicon quantum well layer is in the range of 0.1-3um, the number of periods is 10-300, the thickness of a single period is greater than 15nm, the thickness of the barrier layer is greater than or equal to 10nm, and the thickness of the potential well layer is in the range of 5-30nm.

[0050] The length of the P-type charge layer 106 is smaller than the preset interval, and the number is greater than 0 and smaller than the number of the rectangular grooves minus 1.

[0051] The P-type charge layer 106 is a P-type germanium charge layer or a P-type germanium silicon charge layer.

[0052] Specifically, Figure 1 As shown, the rectangular groove penetrates the N-type heavily doped germanium layer 109, the intrinsic germanium layer 108, the intrinsic germanium quantum well layer 107 and the intrinsic germanium sensor layer 105, and part of the P-type heavily doped germanium layer 104 (that is, the P-type heavily doped germanium layer 104 is exposed), and a mesa structure consisting of the P-type heavily doped germanium layer 104, the intrinsic germanium sensor layer 105, the intrinsic germanium quantum well layer 107, the intrinsic germanium layer 108 and the N-type heavily doped germanium layer 109 is formed between two adjacent rectangular grooves.

[0053] The reason why the number of P-type charge layers 106 is greater than 0 and less than the number of rectangular grooves minus 1 is that two adjacent rectangular grooves can form a mesa structure. Therefore, the number of rectangular grooves minus 1 can also be considered as the number of mesa structures. The number of P-type charge layers 106 is greater than 0 and less than the number of mesa structures, that is, not all mesa structures have P-type charge layers 106.

[0054] If a P-type charge layer 106 exists in a mesa structure, the mesa structure is an avalanche photodiode region; otherwise, if there is no P-type charge layer 106 in the mesa structure, the mesa structure is a PIN photodiode region.

[0055] Assuming that there are a total of N+1 rectangular grooves, N mesa structures are formed, wherein the N mesa structures include a first number of PIN photodiode regions and a second number of avalanche photodiode regions, wherein the first number and the second number are not 0, and the first number and the second number may be equal or unequal, but it can be determined that the first number + the second number = N, wherein only the second number of avalanche photodiode regions have a P-type charge layer 106, that is, the number of the P-type charge layer 106 is equal to the second number.

[0056] In fact, the length of the mesa structure is the predetermined interval minus the width of the rectangular groove, so the P-type charge layer 106 is actually greater than 0 and smaller than the length of the mesa structure.

[0057] Depend on Figure 1 As shown in the cross-sectional schematic diagram, the P-type charge layer 106 in the avalanche photodiode region does not completely cover the intrinsic germanium sensing layer 105 , and the uncovered area is covered by the intrinsic germanium quantum well layer 107 on the P-type charge layer 106 .

[0058] The N-type electrode 202 is disposed at the bottom of the rectangular groove, passing through the passivation layer 201 to connect to the P-type heavily doped germanium layer 104 ; the P-type electrode 203 passes through the passivation layer 201 to connect to the N-type heavily doped germanium layer 109 .

[0059] Each N-type electrode 202 and each P-type electrode 203 is connected to the readout circuit 204. Specifically, the P-type electrode 203 is provided on the mesa structure, and is connected to the N-type heavily doped germanium layer 109 through the passivation layer 201. Each mesa structure corresponds to a P-type electrode 203, and each rectangular groove corresponds to an N-type electrode 202. In specific applications, the connection of different electrodes can be flexibly adjusted according to actual needs, thereby realizing the switching of two working modes of the image sensor. For example, the GOI avalanche photodiode area is enabled when high sensitivity is required, and the ordinary PIN photodiode area is used when a wide spectrum response is required.

[0060] The above-mentioned embodiment provides a germanium on insulator short-wave infrared image sensor, which can integrate ordinary germanium PIN photodiodes and germanium avalanche photodiodes on the same substrate at the same time through the design of the P-type charge layer 106; specifically, because the length of the P-type charge layer 106 of the present application is less than the preset interval, and the number is greater than 0 and less than the number of rectangular grooves minus 1, that is, not all mesa structures between any two rectangular grooves have the P-type charge layer 106.

[0061] When there is a P-type charge layer 106 in the table structure, the table structure is an avalanche photodiode region; conversely, if there is no P-type charge layer 106 in the table structure, it is a PIN photodiode region; the present application utilizes the PIN photodiode region to ensure the strong light signal detection and wide spectrum response of the image sensor, and utilizes the avalanche photodiode region to significantly improve the image sensor's detection capability for weak light signals, that is, the image sensor of the present application can process strong light signals and weak light signals at the same time, expanding the dynamic response range of the image sensor, so that it can adapt to a wider range of application scenarios. At the same time, it saves space and reduces the volume of the entire imaging chip, which is conducive to realizing a miniaturized and highly integrated short-wave infrared imaging system.

[0062] It is understandable that when integrating PIN photodiodes and avalanche photodiodes, since conventional PIN photodiodes include vertically stacked P-type contact regions, I absorption regions, and N-type contact regions, while avalanche photodiodes include P-type contact regions, I absorption regions, P-type charge regions, I avalanche regions, and N-type contact regions, the stacking structures of the two devices are different, so there are challenges in terms of material types and doping compatibility in each functional area.

[0063] In addition, in the manufacturing process of integrated devices, it is necessary to strictly control doping, thickness of each functional area, photolithography process, etching process and protection structure, so as to avoid affecting one device during the manufacturing process of another device, thereby increasing the complexity of the manufacturing process and manufacturing cost; in addition, it is also necessary to take into account the performance of ordinary PIN photodiodes and avalanche photodiodes at the same time to ensure that both devices can achieve the expected performance, further increasing the difficulty of integrated design.

[0064] The above embodiment forms two diode regions on the germanium platform (P-type heavily doped germanium layer 104) on the insulator, which ensures that the formed PIN photodiode and avalanche photodiode have relatively excellent electrical characteristics, and also ensures that the ordinary PIN photodiode and avalanche photodiode can share the P-type contact region (P-type heavily doped germanium layer 104), I absorption region (intrinsic germanium quantum well layer 107) and N-type contact region (N-type heavily doped germanium layer 109). Since germanium has excellent photoelectric response in the short-wave infrared band, the compatibility problem of material types and doping is solved, the manufacturing integration process steps are reduced, and the difficulty of the integrated manufacturing process and the manufacturing process cost are reduced. Although the avalanche photodiode also includes the I avalanche region composed of the intrinsic germanium quantum well layer 107, since the I avalanche region uses germanium materials, this material system is still an absorption layer for the ordinary PIN photodiode, but an avalanche region for the avalanche photodiode. This special structure cleverly solves the compatibility and differences of various functional areas between ordinary PIN photodiodes and avalanche photodiodes, that is, ordinary PIN photodiodes do not require avalanche regions and charge regions, while avalanche photodiodes require avalanche regions and charge regions.

[0065] See also Figure 2 Another embodiment of the present application provides a method for manufacturing a germanium on insulator short-wave infrared image sensor, which may specifically include the following steps:

[0066] Step S1, providing a first silicon substrate 001, and sequentially stacking an intrinsic germanium buffer layer 002, an intrinsic germanium layer 108, an intrinsic germanium quantum well layer 107, a P-type charge layer 106, an intrinsic germanium sensing layer 105, a P-type heavily doped germanium layer 104 and an aluminum oxide layer 103 on the first silicon substrate 001 to obtain a donor substrate.

[0067] See also Figure 3 , wherein the thickness of the intrinsic germanium buffer layer 002 is in the range of 100-500 nm, the thickness of the intrinsic germanium layer 108 is in the range of 100-500 nm, and the thickness of the intrinsic germanium sensing layer 105 is in the range of 500-1400 nm.

[0068] The intrinsic germanium quantum well layer 107 can also be an intrinsic germanium silicon quantum well layer. The thickness range of the intrinsic germanium quantum well layer 107 or the intrinsic germanium silicon quantum well layer is 0.1-3um, the number of periods is 10-300, the thickness of a single period is greater than 15nm, the thickness of the barrier layer is greater than or equal to 10nm, and the thickness range of the potential well layer is 5-30nm.

[0069] Furthermore, the first silicon substrate 001 may also be replaced by a germanium wafer.

[0070] Step S2, providing a second silicon substrate 101, and stacking a thermal oxide layer 102 on the second silicon substrate 101 to obtain an acceptor substrate.

[0071] The thermal oxide layer 102 is a silicon oxide layer (SiO2 layer).

[0072] Step S3, bonding the donor substrate and the acceptor substrate wafer; and removing the first silicon substrate 001.

[0073] Specifically, the first silicon substrate 001 may be removed by mechanical polishing or dry etching.

[0074] Step S4, ion implantation is performed on the intrinsic germanium buffer layer 002 to form an N-type heavily doped germanium layer 109, thereby obtaining a sensor wafer.

[0075] See also Figure 4 The thickness range of the N-type heavily doped germanium layer 109 is consistent with that of the intrinsic germanium buffer layer 002 .

[0076] Step S5 , setting a plurality of rectangular grooves of the same length and distributed at preset intervals on the sensor wafer; the rectangular grooves penetrate the N-type heavily doped germanium layer 109 , the intrinsic germanium layer 108 , the intrinsic germanium quantum well layer 107 and the intrinsic germanium sensing layer 105 .

[0077] The length of the P-type charge layer 106 is smaller than the preset interval, and the number is greater than 0 and smaller than the number of the rectangular grooves minus 1.

[0078] Specifically, each rectangular groove can be formed by wet etching or dry etching the sensor wafer.

[0079] See also Figure 5 , the rectangular grooves need to avoid the P-type charge layer 106 when being set, that is, the P-type charge layer 106 is located in the middle position of two adjacent rectangular grooves, which is also the reason for limiting the length of the P-type charge layer 106; secondly, the number of P-type charge layers 106 is greater than 0 and less than the number of rectangular grooves minus 1. It can be understood that when superimposing the P-type charge layers 106, the present application needs to keep the distance between at least two P-type charge layers 106 greater than the preset interval + the width of the rectangular groove × 2, that is, two rectangular grooves distributed at a preset interval can be set between the two P-type charge layers 106, and at least one mesa structure formed by two adjacent rectangular grooves must be reserved without the P-type charge layer 106 to form a PIN-type photodiode area to ensure that the image sensor integrates two photodiodes at the same time.

[0080] Step S6 , forming a passivation layer 201 on the N-type heavily doped germanium layer 109 and the inner walls of each rectangular groove.

[0081] Specifically, see Figure 6 , the passivation layer 201 uniformly covers each mesa structure.

[0082] In step S7 , an N-type electrode 202 and a P-type electrode 203 are provided, and the N-type electrode 202 and the P-type electrode 203 are connected to a readout circuit 204 .

[0083] Specifically, see Figure 1 The readout circuit 204 and the GOI short-wave infrared focal plane array chip can be connected to each other by In bump bonding or Cu bump bonding using flip-chip technology.

[0084] Furthermore, after the readout circuit 204 is connected, a preset proportion or all of the second silicon substrate 101 may be removed.

[0085] The above embodiment provides a method for manufacturing a germanium on insulator short-wave infrared image sensor. Through the design of the P-type charge layer 106, ordinary germanium PIN photodiodes and germanium avalanche photodiodes can be integrated on the same substrate at the same time; specifically, because the length of the P-type charge layer 106 of the present application is less than the preset interval, and the number is greater than 0 and less than the number of rectangular grooves minus 1, when the P-type charge layer 106 exists in the table structure, the table structure is an avalanche photodiode region; conversely, if there is no P-type charge layer 106 in the table structure, it is a PIN photodiode region; the present application utilizes the PIN photodiode region to ensure the strong light signal detection and wide spectrum response of the image sensor, and utilizes the avalanche photodiode region to significantly improve the detection capability of the image sensor for weak light signals, that is, the image sensor obtained by the manufacturing method of the above embodiment can process strong light signals and weak light signals at the same time, expands the dynamic response range of the image sensor, and enables it to adapt to a wider range of application scenarios.

[0086] In some embodiments, the method further comprises:

[0087] After the first silicon substrate 001 is removed, the intrinsic germanium buffer layer 002 is subjected to chemical mechanical polishing.

[0088] Among them, chemical mechanical polishing, referred to as CMP, is a key process for achieving global flatness of the wafer. It removes excess material on the wafer surface through the synergistic effect of chemical corrosion and mechanical grinding to achieve nanoscale flatness. Chemical corrosion can be achieved using TMAH (tetramethylammonium hydroxide).

[0089] The present application performs chemical mechanical polishing on the intrinsic germanium buffer layer 002 in order to remove the intrinsic germanium buffer layer 002 with a high defect density, thereby providing a good foundation for subsequent ion implantation operations and coverage operations of the passivation layer 201 .

[0090] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0091] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A germanium on insulator short-wave infrared image sensor, characterized in that: include: A readout circuit, a passivation layer, an N-type electrode and a P-type electrode, and a second silicon substrate, a thermal oxide layer, an aluminum oxide layer, a P-type heavily doped germanium layer, an intrinsic germanium sensing layer, a P-type charge layer, an intrinsic germanium quantum well layer, an intrinsic germanium layer and an N-type heavily doped germanium layer stacked in sequence, and a plurality of rectangular grooves of the same shape and distributed at preset intervals; The rectangular groove penetrates the N-type heavily doped germanium layer, the intrinsic germanium layer, the intrinsic germanium quantum well layer and the intrinsic germanium sensing layer; the passivation layer is superimposed on the N-type heavily doped germanium layer and the inner wall of each of the rectangular grooves; The length of the P-type charge layer is less than the preset interval, and the number is greater than 0 and less than the number of the rectangular grooves minus 1; The N-type electrode is disposed at the bottom of the rectangular groove, passing through the passivation layer to connect to the P-type heavily doped germanium layer; the P-type electrode passes through the passivation layer to connect to the N-type heavily doped germanium layer; Each of the N-type electrodes and each of the P-type electrodes is connected to a readout circuit.

2. The germanium on insulator shortwave infrared image sensor according to claim 1, characterized in that: The thickness of the intrinsic germanium quantum well layer is in the range of 0.1-3 um.

3. The germanium on insulator shortwave infrared image sensor according to claim 2, characterized in that: The number of periods of the intrinsic germanium quantum well layer is 10-300, and the thickness of a single period is greater than 15 nm.

4. The germanium on insulator shortwave infrared image sensor according to claim 3, characterized in that: The thickness of the barrier layer of the intrinsic germanium quantum well layer is greater than or equal to 10 nm, and the thickness of the potential well layer ranges from 5 to 30 nm.

5. The germanium on insulator shortwave infrared image sensor according to claim 1, characterized in that: The P-type charge layer is a P-type germanium charge layer or a P-type germanium silicon charge layer.

6. The germanium on insulator shortwave infrared image sensor according to claim 1, characterized in that: The thickness of the intrinsic germanium layer is in the range of 100-500 nm.

7. The germanium on insulator shortwave infrared image sensor according to claim 1, characterized in that: The thermal oxide layer is a silicon oxide layer.

8. The germanium on insulator shortwave infrared image sensor according to claim 1, characterized in that: The thickness of the intrinsic germanium sensing layer is in the range of 500-1400 nm.

9. The germanium on insulator shortwave infrared image sensor according to claim 1, characterized in that: The intrinsic germanium quantum well layer is an intrinsic germanium silicon quantum well layer.

10. A method for manufacturing a germanium on insulator short-wave infrared image sensor, characterized in that: include: Providing a first silicon substrate, and sequentially stacking an intrinsic germanium buffer layer, an intrinsic germanium layer, an intrinsic germanium quantum well layer, a P-type charge layer, an intrinsic germanium sensing layer, a P-type heavily doped germanium layer and an aluminum oxide layer on the first silicon substrate to obtain a donor substrate; Providing a second silicon substrate, and stacking a thermal oxide layer on the second silicon substrate to obtain an acceptor substrate; Wafer bonding the donor substrate and the acceptor substrate; and removing the first silicon substrate; Performing ion implantation on the intrinsic germanium buffer layer to form an N-type heavily doped germanium layer to obtain a sensor wafer; A plurality of rectangular grooves having the same length and distributed at preset intervals are arranged on the sensor wafer; the rectangular grooves penetrate the N-type heavily doped germanium layer, the intrinsic germanium layer, the intrinsic germanium quantum well layer and the intrinsic germanium sensing layer; The length of the P-type charge layer is less than the preset interval, and the number is greater than 0 and less than the number of the rectangular grooves minus 1; forming a passivation layer on the N-type heavily doped germanium layer and the inner wall of each of the rectangular grooves; An N-type electrode and a P-type electrode are provided, and the N-type electrode and the P-type electrode are connected to a readout circuit.

11. The method for manufacturing a germanium on insulator short-wave infrared image sensor according to claim 10, characterized in that: Also includes: After the readout circuit is connected, a preset proportion or all of the second silicon substrate is removed.

12. The method for manufacturing a germanium on insulator short-wave infrared image sensor according to claim 10, characterized in that: The thickness of the intrinsic germanium buffer layer is in the range of 100-500 nm.

13. The method for manufacturing a germanium on insulator short-wave infrared image sensor according to claim 10, characterized in that: The step of removing the first silicon substrate comprises: The first silicon substrate is removed by mechanical polishing or dry etching.

14. The method for manufacturing a germanium on insulator short-wave infrared image sensor according to claim 10, characterized in that: Also includes: After removing the first silicon substrate, the intrinsic germanium buffer layer is subjected to chemical mechanical polishing.

15. The method for manufacturing a germanium on insulator short-wave infrared image sensor according to claim 10, characterized in that: The steps of setting the rectangular groove include: The sensor wafer is subjected to wet etching or dry etching to form the rectangular grooves.

Images