Automatic fault detection and repair integrated circuit design method based on neural network

Abstract

The invention discloses an automatic fault detection and repair integrated circuit design method based on a neural network. The method comprises the following steps: S1, obtaining and preprocessing operation data of an integrated circuit; s2, analyzing the preprocessed data by using a trained neural network model, and dynamically optimizing the model through an adaptive weight pruning algorithm; s3, inputting circuit operation data in real time, automatically identifying fault types and positions, and storing fault information; s4, starting an automatic repair mechanism based on the stored fault information, and generating a repair strategy through a multi-target collaborative optimization algorithm; s5, logic reconstruction is executed according to the repair strategy, a redundant circuit and parameter adjustment are started, and a repair path is optimized through deep reinforcement learning; s6, after repairing is completed, the neural network model is used for detecting and verifying the repairing effect again; and S7, after the repair verification is passed, updating the fault historical database. According to the invention, the automation level of fault detection and repair of the integrated circuit is improved, and the reliability and efficiency of the system are enhanced.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit design and maintenance, and in particular to a neural network-based automatic fault detection and repair integrated circuit design method. Background Art

[0002] In the process of modern integrated circuit design and manufacturing, integrated circuits (ICs) have become the core components of various electronic devices. Their performance and reliability directly affect the operating stability and life of the entire system. However, as the integration of integrated circuits continues to increase, the complexity of circuits is increasing, and the detection and repair of circuit faults has become an extremely challenging task. How to efficiently and accurately detect faults in complex circuit structures and automatically repair them is a key issue that needs to be urgently addressed in the current field of integrated circuit design and maintenance.

[0003] Existing integrated circuit fault detection methods mainly rely on test vectors or rule sets to detect faults in circuits. Although these methods perform well in some simple circuits, they often show the following deficiencies when dealing with complex and large-scale integrated circuits:

[0004] The first is that traditional fault detection methods are highly dependent on rules and test vectors; these methods usually require a large number of test vectors and detection rules to be defined in advance in order to effectively find faults in the circuit. However, as the scale and complexity of circuits increase, building and maintaining these test vectors and rules becomes extremely difficult and time-consuming. In addition, these methods lack the ability to respond to new fault types or changes in circuit structure, resulting in limited flexibility and accuracy in detection.

[0005] Second, existing fault repair methods mainly rely on manual intervention or semi-automated repair processes; this repair process is not only time-consuming and labor-intensive, but also prone to errors. The manual repair process requires engineers to have rich experience and expertise, but even so, it is difficult to completely avoid errors when faced with complex circuit structures. At the same time, manual repair is difficult to respond to circuit failures in real time, especially in systems that require high reliability and high availability. The efficiency and effect of manual repair often cannot meet actual needs.

[0006] Third, some current automated repair methods have shown certain limitations when dealing with multi-fault scenarios in complex circuits; in existing technologies, the identification and repair of multiple faults are usually performed separately, resulting in the inability to dynamically adjust and optimize the repair process, thereby reducing the effectiveness of the repair and the overall reliability of the system. In this case, the integrated circuit may encounter problems such as failure to completely repair faults during operation, the introduction of new faults during the repair process, and ultimately lead to unstable system operation.

[0007] Therefore, how to provide an automatic fault detection and repair integrated circuit design method based on a neural network is a problem that technical personnel in this field urgently need to solve. Summary of the invention

[0008] One object of the present invention is to propose a method for designing integrated circuits for automatic fault detection and repair based on a neural network. The present invention realizes intelligent detection and automatic repair of integrated circuit faults by introducing a neural network model, combining an adaptive weight pruning algorithm, a multi-objective collaborative optimization algorithm, and deep reinforcement learning technology. The method can analyze circuit operation data in real time, automatically identify the type and location of the fault, and generate an optimized repair strategy, thereby efficiently repairing the fault. Compared with traditional methods that rely on rules and test vectors, the present invention has the advantages of high automation, high detection accuracy, high repair efficiency, and strong adaptability, and can significantly improve the stability and reliability of the integrated circuit system.

[0009] According to an embodiment of the present invention, a method for designing an integrated circuit for automatic fault detection and repair based on a neural network comprises the following steps:

[0010] S1. Obtaining operation data of the integrated circuit and preprocessing the operation data;

[0011] S2. Analyze the preprocessed data using a trained neural network model, wherein the neural network model is dynamically optimized through an adaptive weight pruning algorithm to remove redundant neurons;

[0012] S3, inputting the circuit operation data acquired in real time into the optimized neural network model, automatically identifying the fault type and its location in the circuit through the signal output by the model, and storing the fault information;

[0013] S4. Based on the stored fault information, the automatic repair mechanism is started, and a multi-objective collaborative optimization algorithm is used to generate a repair strategy by comprehensively considering the repair time, resource utilization and repair success rate;

[0014] S5. Perform repair operations on the integrated circuit according to the generated repair strategy, wherein the repair operations include logic reconstruction, enabling redundant circuits, and adjusting circuit parameters. At the same time, the repair path is dynamically adjusted through a repair path optimization algorithm based on deep reinforcement learning to optimize the order and parameters of the repair operations.

[0015] S6. After the repair operation is completed, the repaired circuit is re-tested using the neural network model to verify the repair effect;

[0016] S7. After the repair verification is passed, the repair results and related information are updated to the fault history database.

[0017] Optionally, the S2 specifically includes:

[0018] S21, perform feature vector X=[x1,x2,,x n ], the feature vector X is composed of the normalized input data, and each feature x i A specific parameter that indicates the operating status of an integrated circuit;

[0019] S22, input the feature vector X into the trained neural network model. The neural network model consists of multiple layers, including an input layer, several hidden layers and an output layer. Each neuron in the hidden layer is activated by an activation function Perform nonlinear transformations;

[0020] S23, dynamically optimizing the neural network model, adjusting the network weight matrix W by an adaptive weight pruning algorithm, wherein the adaptive weight pruning algorithm removes weights whose absolute values ​​are lower than a threshold value ∈ in the weight matrix according to the feature importance of the current running data;

[0021] S24, update the adjusted weight matrix W, using the back propagation algorithm according to the loss function By minimizing the loss function, the weight matrix W is iteratively updated until the loss function converges to a predetermined threshold, where Y is the true label, is the model output;

[0022] S25. Apply the final optimized weight matrix W' to the neural network model.

[0023] Optionally, the S23 specifically includes:

[0024] S231, calculate each weight w based on the feature importance of the current running data ij Contribution to the loss function L and weight w ij The relationship between is weighted:

[0025]

[0026] Among them, G ij is the weighted gradient value, reflecting the weight w ij Importance in fault detection, p k represents the probability distribution of the kth feature, is the loss function L for the weight w ij The conventional gradient of represents the influence of the weight on the final fault detection result, K is the total number of features, which represents the number of all circuit parameters involved in the detection;

[0027] S232, based on the weighted gradient value G ij , determine the weight w ijTo improve the effectiveness of pruning, an improved threshold function is used:

[0028]

[0029] Among them, η is the pruning sensitivity factor, which reflects the model's ability to adjust the sensitivity of low weights in different fault detection scenarios, and σ w is the standard deviation of the weights;

[0030] S233, generating an adjusted weight matrix W', optimizing the complexity of the neural network model by removing low-importance weights and retaining high-influence weights;

[0031] S234, further optimize the retained weights, combine local search and global optimization strategies, iteratively update the weights based on the weight matrix W', and finally make the loss function L converge to the adaptive threshold.

[0032] Optionally, S4 specifically includes:

[0033] S41. Based on the fault information, define a multi-objective optimization function F(x), which comprehensively considers the repair time T(x), resource utilization R(x), repair success rate S(x), and circuit complexity change C(x):

[0034]

[0035] Among them, α, β, γ and δ are the weight coefficients of repair time, resource utilization, repair success rate and circuit complexity change, respectively. T(x) represents the time required for repair, R(x) represents the amount of resources used in the repair process, S(x) represents the repair success rate, and ΔC(x) represents the change in circuit complexity after repair, which is used to measure the impact of the repair operation on the circuit structure.

[0036] S42, taking the optimization function F(x) as the objective function, evaluating and ranking the candidate solutions of multiple repair strategies through a multi-objective collaborative optimization algorithm, and selecting the repair strategy with the best optimization result as the implementation plan;

[0037] S43, in the selected optimal repair strategy, specifically planning the steps of the repair operation, including logic reconstruction, enabling redundant circuits and adjusting circuit parameters, and adjusting the logic structure and parameter configuration of the corresponding circuit module according to the type and location of the fault;

[0038] S44, real-time monitoring and dynamic adjustment of the repair strategy. During the repair process, if a new fault or abnormal change in the circuit state is detected, the parameters α, β, γ and δ in the optimization function F(x) are updated in real time, the repair strategy is re-evaluated, and the repair steps are adjusted in a timely manner;

[0039] S45, applying the repair operation to the integrated circuit, and performing logic reconstruction, redundant circuit enabling, and circuit parameter adjustment operations.

[0040] Optionally, the S42 specifically includes:

[0041] S421, using the multi-objective collaborative optimization algorithm, evaluate multiple candidate solutions for the repair strategy, use the improved Pareto frontier optimization algorithm, define the fuzzy decision domain P d (x) = {x|μ(F(x))≥θ}, where μ(F(x)) is a fuzzy membership function used to evaluate the satisfaction of the multi-objective optimization function F(x), and θ is the satisfaction threshold;

[0042] S422, in the fuzzy decision domain P d In (x), a nonlinear dynamic weight adjustment mechanism is introduced and the logarithmic decay function is used to adjust the values ​​of the weight coefficients α, β, γ, and δ in the objective function, so that the optimization process can adaptively respond to changes in fault scenarios:

[0043]

[0044] Among them, α(t) is the dynamic weight at time t, α0 is the initial weight, λ is the adjustment factor, f(t) is the fault influencing factor, α, β, γ and δ are the weight coefficients of repair time, resource utilization, repair success rate and circuit complexity change respectively;

[0045] S423, selecting a repair strategy suitable for the current circuit operation state in the fuzzy decision domain, comprehensively considering the balance between the repair success rate S(x) and the repair time T(x), and determining a repair plan for implementation;

[0046] S424: Apply the selected repair solution to the actual fault repair operation.

[0047] Optionally, the S5 specifically includes:

[0048] S51, according to the generated repair strategy, first perform the logic reconstruction operation and define the logic reconstruction matrix L r , used to represent the adjustment process of the logic unit in the circuit, the matrix L r Each element l ij Represents the connection status between the i-th logic unit and the j-th logic unit. After the logic reconstruction, the matrix is ​​updated to L' r =L r M, where M is a logic adjustment matrix used to achieve logic reconstruction of the fault location;

[0049] S52: After the logic reconstruction, enable the redundant circuit, activate the redundant circuit unit, and define the redundant circuit activation vector Ra , where each element r i Indicates the rth i The activation status of a redundant unit. The activation conditions are:

[0050]

[0051] Among them, E(f i ) represents the severity of the fault covered by the i-th redundant unit, and τ is the activation threshold;

[0052] S53, adjusting circuit parameters, defining a nonlinear adaptive parameter adjustment function P(x), where x is the characteristic vector of the current circuit state, and the goal of parameter adjustment is to minimize the circuit failure risk and maintain the stability of the system:

[0053]

[0054] Where P'(x) is the adjusted circuit parameter, η is the learning rate, and controls the sensitivity of parameter adjustment. is the gradient of the loss function C(x) with respect to the parameter, indicating the impact of parameter changes on circuit performance, and λ1 is the gradient normalization factor;

[0055] S54, after completing logic reconstruction, redundant circuit activation and parameter adjustment, dynamically adjust the repair path through a repair path optimization algorithm based on deep reinforcement learning;

[0056] S55. Apply the finalized repair path and operation to the integrated circuit, perform logic reconstruction, redundant circuit enabling and parameter adjustment operations, and conduct preliminary verification of the repair effect.

[0057] Optionally, the S54 specifically includes:

[0058] S541, initializing the repair path strategy, setting the initial path to π0, the path strategy consists of an initial path set and the confidence distribution of each path, and the initial confidence is set to a uniform distribution;

[0059] S542. During the repair process, collect environmental feedback R(t) in real time, where the environmental feedback includes the execution results of the repair steps, resource consumption, and repair success rate parameters. The feedback value R(t) is calculated by the following weighted nonlinear combination formula:

[0060]

[0061] Among them, S(t) is the repair success rate at time t, which measures the effectiveness of the current repair operation. refis the reference success rate, which is the expected effect benchmark of the repair operation. γ1 is the smoothing factor, which is used to control the sensitivity of the success rate to feedback. C(t) is the repair cost, which represents the resource consumption and time consumption at time t. δ1 is the cost adjustment coefficient, which is used to dynamically adjust the sensitivity of feedback. α1 and β1 are weight coefficients, which respectively adjust the influence of the repair effect and cost in the feedback.

[0062] S543. Based on the collected environmental feedback R(t) and the confidence of the path selection, the path selection strategy is updated, and the path update formula based on generalized entropy optimization is used:

[0063]

[0064] Among them, π t is the path selection strategy at time t, which represents the selection probability distribution of the current repair step. α2 is the generalized entropy parameter used to adjust the sensitivity of the path selection strategy. i represents the probability of selecting the i-th path in the current strategy, β2 is the path update rate, which controls the adjustment amplitude of the path selection strategy, and R(t) is the immediate reward of environmental feedback, which is used to measure the effectiveness of the current strategy;

[0065] S544: Introduce a dynamic strategy correction mechanism. When a significant strategy deviation is detected during the path selection process or the repair effect does not meet the expected standard, the path selection strategy is corrected through a nonlinear dynamic adjustment formula:

[0066]

[0067] Among them, λ2 is the correction rate factor, which controls the speed and amplitude of path strategy adjustment, ΔR(t) is the change in environmental feedback at time t, which is used to dynamically adjust the response speed of path selection strategy, and δ2 is the adjustment factor, which is used to control the smoothness of the adjustment process;

[0068] S545. After each path update, the execution result of the repair path is evaluated and the repair effect is fed back to the neural network.

[0069] The beneficial effects of the present invention are:

[0070] (1) The present invention can automatically extract features from the operating data of the integrated circuit by introducing a neural network model, thereby realizing accurate identification of the fault type and location. Compared with the traditional method that relies on rules and test vectors, the neural network model can dynamically learn and adapt to new faults, thereby improving the accuracy and flexibility of detection. In addition, the multi-objective collaborative optimization algorithm in the repair process can comprehensively consider factors such as repair time, resource utilization, and repair success rate, realize the dynamic generation and optimization of repair strategies, and thus improve the effectiveness of repair.

[0071] (2) The present invention uses a deep reinforcement learning algorithm in the fault repair process, which can dynamically adjust the repair path in real time. This method ensures the stability and functional integrity of the integrated circuit after the fault is repaired through multiple repair operations such as logic reconstruction, redundant circuit activation and parameter adjustment. Compared with traditional repair methods that rely on manual intervention, the present invention greatly reduces manual participation and improves the efficiency and accuracy of repair.

[0072] (3) The present invention ensures that the system can automatically detect and repair faults during operation by monitoring the operating status of the circuit in real time and dynamically adjusting the neural network model and repair strategy based on the current fault characteristics. This real-time technical means significantly reduces downtime and improves the working efficiency of the integrated circuit system. At the same time, the repair results are stored in the fault history database, which can be used to optimize the neural network model and repair strategy in the future to further improve the adaptability and reliability of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0073] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0074] Figure 1 A flowchart of a method for designing an integrated circuit for automatic fault detection and repair based on a neural network proposed by the present invention;

[0075] Figure 2 The present invention provides a flowchart of integrated circuit fault repair operations in a neural network-based automatic fault detection and repair integrated circuit design method. DETAILED DESCRIPTION

[0076] The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic diagrams, which only illustrate the basic structure of the present invention in a schematic manner, and therefore only show the components related to the present invention.

[0077] refer to Figure 1-2 , a method for designing an integrated circuit for automatic fault detection and repair based on a neural network, comprising the following steps:

[0078] S1. Obtaining operation data of the integrated circuit and preprocessing the operation data;

[0079] S2. Analyze the preprocessed data using a trained neural network model, wherein the neural network model is dynamically optimized through an adaptive weight pruning algorithm to remove redundant neurons;

[0080] S3, inputting the circuit operation data acquired in real time into the optimized neural network model, automatically identifying the fault type and its location in the circuit through the signal output by the model, and storing the fault information;

[0081] S4. Based on the stored fault information, the automatic repair mechanism is started, and a multi-objective collaborative optimization algorithm is used to generate a repair strategy by comprehensively considering the repair time, resource utilization and repair success rate;

[0082] S5. Perform repair operations on the integrated circuit according to the generated repair strategy, wherein the repair operations include logic reconstruction, enabling redundant circuits, and adjusting circuit parameters. At the same time, the repair path is dynamically adjusted through a repair path optimization algorithm based on deep reinforcement learning to optimize the order and parameters of the repair operations.

[0083] S6. After the repair operation is completed, the repaired circuit is re-tested using the neural network model to verify the repair effect;

[0084] S7. After the repair verification is passed, the repair results and related information are updated to the fault history database.

[0085] In this implementation, S2 specifically includes:

[0086] S21, perform feature vector X=[x1,x2,,x n ], the feature vector X is composed of the normalized input data, and each feature x i A specific parameter that indicates the operating status of an integrated circuit;

[0087] S22, input the feature vector X into the trained neural network model. The neural network model consists of multiple layers, including an input layer, several hidden layers and an output layer. Each neuron in the hidden layer is activated by an activation function Perform nonlinear transformations;

[0088] S23, dynamically optimizing the neural network model, adjusting the network weight matrix W by an adaptive weight pruning algorithm, wherein the adaptive weight pruning algorithm removes weights whose absolute values ​​are lower than a threshold value ∈ in the weight matrix according to the feature importance of the current running data;

[0089] S24, update the adjusted weight matrix W, using the back propagation algorithm according to the loss function By minimizing the loss function, the weight matrix W is iteratively updated until the loss function converges to a predetermined threshold, where Y is the true label, is the model output;

[0090] S25. Apply the final optimized weight matrix W' to the neural network model.

[0091] In this implementation manner, the S23 specifically includes:

[0092] S231, calculate each weight w based on the feature importance of the current running data ij Contribution to the loss function L and weight w ij The relationship between is weighted:

[0093]

[0094] Among them, G ij is the weighted gradient value, reflecting the weight w ij Importance in fault detection, p k represents the probability distribution of the kth feature, is the loss function L for the weight w ij The conventional gradient of represents the influence of the weight on the final fault detection result, K is the total number of features, which represents the number of all circuit parameters involved in the detection;

[0095] S232, based on the weighted gradient value G ij , determine the weight w ij To improve the effectiveness of pruning, an improved threshold function is used:

[0096]

[0097] Among them, η is the pruning sensitivity factor, which reflects the model's ability to adjust the sensitivity of low weights in different fault detection scenarios, and σ w is the standard deviation of the weights;

[0098] S233, generating an adjusted weight matrix W', optimizing the complexity of the neural network model by removing low-importance weights and retaining high-influence weights;

[0099] S234, further optimize the retained weights, combine local search and global optimization strategies, iteratively update the weights based on the weight matrix W', and finally make the loss function L converge to the adaptive threshold.

[0100] In this implementation, S4 specifically includes:

[0101] S41. Based on the fault information, define a multi-objective optimization function F(x), which comprehensively considers the repair time T(x), resource utilization R(x), repair success rate S(x), and circuit complexity change C(x):

[0102]

[0103] Among them, α, β, γ and δ are the weight coefficients of repair time, resource utilization, repair success rate and circuit complexity change, respectively. T(x) represents the time required for repair, R(x) represents the amount of resources used in the repair process, S(x) represents the repair success rate, and ΔC(x) represents the change in circuit complexity after repair, which is used to measure the impact of the repair operation on the circuit structure.

[0104] S42, taking the optimization function F(x) as the objective function, evaluating and ranking the candidate solutions of multiple repair strategies through a multi-objective collaborative optimization algorithm, and selecting the repair strategy with the best optimization result as the implementation plan;

[0105] S43, in the selected optimal repair strategy, specifically planning the steps of the repair operation, including logic reconstruction, enabling redundant circuits and adjusting circuit parameters, and adjusting the logic structure and parameter configuration of the corresponding circuit module according to the type and location of the fault;

[0106] S44, real-time monitoring and dynamic adjustment of the repair strategy. During the repair process, if a new fault or abnormal change in the circuit state is detected, the parameters α, β, γ and δ in the optimization function F(x) are updated in real time, the repair strategy is re-evaluated, and the repair steps are adjusted in a timely manner;

[0107] S45, applying the repair operation to the integrated circuit, and performing logic reconstruction, redundant circuit enabling, and circuit parameter adjustment operations.

[0108] In this implementation manner, the S42 specifically includes:

[0109] S421, using the multi-objective collaborative optimization algorithm, evaluate multiple candidate solutions for the repair strategy, use the improved Pareto frontier optimization algorithm, define the fuzzy decision domain P d (x) = {x|μ(F(x))≥θ}, where μ(F(x)) is a fuzzy membership function used to evaluate the satisfaction of the multi-objective optimization function F(x), and θ is the satisfaction threshold;

[0110] S422, in the fuzzy decision domain P d In (x), a nonlinear dynamic weight adjustment mechanism is introduced and the logarithmic decay function is used to adjust the values ​​of the weight coefficients α, β, γ, and δ in the objective function, so that the optimization process can adaptively respond to changes in fault scenarios:

[0111]

[0112] Among them, α(t) is the dynamic weight at time t, α0 is the initial weight, λ is the adjustment factor, f(t) is the fault influencing factor, α, β, γ and δ are the weight coefficients of repair time, resource utilization, repair success rate and circuit complexity change respectively;

[0113] S423, selecting a repair strategy suitable for the current circuit operation state in the fuzzy decision domain, comprehensively considering the balance between the repair success rate S(x) and the repair time T(x), and determining a repair plan for implementation;

[0114] S424: Apply the selected repair solution to the actual fault repair operation.

[0115] In this implementation manner, S5 specifically includes:

[0116] S51, according to the generated repair strategy, first perform the logic reconstruction operation and define the logic reconstruction matrix L r , used to represent the adjustment process of the logic unit in the circuit, the matrix L r Each element l ij Represents the connection status between the i-th logic unit and the j-th logic unit. After the logic reconstruction, the matrix is ​​updated to L' r =L r M, where M is a logic adjustment matrix used to achieve logic reconstruction of the fault location;

[0117] S52: After the logic reconstruction, enable the redundant circuit, activate the redundant circuit unit, and define the redundant circuit activation vector R a , where each element r i Indicates the rth i The activation status of a redundant unit. The activation conditions are:

[0118]

[0119] Among them, E(f i ) represents the severity of the fault covered by the i-th redundant unit, and τ is the activation threshold;

[0120] S53, adjusting circuit parameters, defining a nonlinear adaptive parameter adjustment function P(x), where x is the characteristic vector of the current circuit state, and the goal of parameter adjustment is to minimize the circuit failure risk and maintain the stability of the system:

[0121]

[0122] in, P '(x) is the adjusted circuit parameter, η is the learning rate, and controls the sensitivity of parameter adjustment. is the gradient of the loss function C(x) with respect to the parameters, indicating the impact of parameter changes on circuit performance. λ 1 is the gradient normalization factor;

[0123] S54, after completing logic reconstruction, redundant circuit activation and parameter adjustment, dynamically adjust the repair path through a repair path optimization algorithm based on deep reinforcement learning;

[0124] S55. Apply the finalized repair path and operation to the integrated circuit, perform logic reconstruction, redundant circuit enabling and parameter adjustment operations, and conduct preliminary verification of the repair effect.

[0125] In this implementation manner, the S54 specifically includes:

[0126] S541, initializing the repair path strategy, setting the initial path to π0, the path strategy consists of an initial path set and the confidence distribution of each path, and the initial confidence is set to a uniform distribution;

[0127] S542. During the repair process, collect environmental feedback R(t) in real time, where the environmental feedback includes the execution results of the repair steps, resource consumption, and repair success rate parameters. The feedback value R(t) is calculated by the following weighted nonlinear combination formula:

[0128]

[0129] Among them, S(t) is the repair success rate at time t, which measures the effectiveness of the current repair operation. ref is the reference success rate, which is the expected effect benchmark of the repair operation. γ1 is the smoothing factor, which is used to control the sensitivity of the success rate to feedback. C(t) is the repair cost, which represents the resource consumption and time consumption at time t. δ1 is the cost adjustment coefficient, which is used to dynamically adjust the sensitivity of feedback. α1 and β1 are weight coefficients, which respectively adjust the influence of the repair effect and cost in the feedback.

[0130] S543. Based on the collected environmental feedback R(t) and the confidence of the path selection, the path selection strategy is updated, and the path update formula based on generalized entropy optimization is used:

[0131]

[0132] Among them, π t is the path selection strategy at time t, which represents the selection probability distribution of the current repair step. α2 is the generalized entropy parameter used to adjust the sensitivity of the path selection strategy. i represents the selection probability of the i-th path in the current strategy, β2 is the path update rate, which controls the adjustment range of the path selection strategy, R (t) is the immediate reward of environmental feedback, which is used to measure the effectiveness of the current strategy;

[0133] S544: Introduce a dynamic strategy correction mechanism. When a significant strategy deviation is detected during the path selection process or the repair effect does not meet the expected standard, the path selection strategy is corrected through a nonlinear dynamic adjustment formula:

[0134]

[0135] Among them, λ2 is the correction rate factor, which controls the speed and amplitude of path strategy adjustment, ΔR(t) is the change in environmental feedback at time t, which is used to dynamically adjust the response speed of path selection strategy, and δ2 is the adjustment factor, which is used to control the smoothness of the adjustment process;

[0136] S545. After each path update, the execution result of the repair path is evaluated and the repair effect is fed back to the neural network.

[0137] Embodiment 1:

[0138] The neural network-based automatic fault detection and repair integrated circuit design method of the present invention is deployed in Company B, a company engaged in high-end integrated circuit design and manufacturing located in China. Company B produces tens of millions of integrated circuits each year, and its products are widely used in consumer electronics, communication equipment, automotive electronics and other fields. With the complexity of product functions, integrated circuit fault detection and repair has become a vital part of the production process. Traditional methods rely on rule sets and test vectors to detect circuit faults, but with the improvement of circuit integration, this method has gradually revealed the problems of low efficiency and poor flexibility.

[0139] In this context, Company B decided to introduce the method of the present invention to optimize its fault detection and repair process. The system integrated with the present invention was first deployed on one of the company's production lines, which is mainly responsible for the production of high-performance computing chips, with a monthly output of about 1 million chips. The integrated circuits in this production line have extremely high requirements for the accuracy of fault detection and the timeliness of repair due to their complex design and high-density integration characteristics.

[0140] During the implementation process, the system obtains the circuit operation data in real time at multiple key nodes of chip production and performs preprocessing. The preprocessed data is input into the trained neural network model, which automatically identifies the fault type and its specific location in the circuit. Through the adaptive weight pruning algorithm, the neural network model can be dynamically optimized during the analysis process to remove redundant neurons, thereby improving the accuracy and efficiency of detection. Whenever a fault is detected, the system automatically generates a repair strategy based on the stored fault information, and comprehensively considers the repair time, resource utilization and repair success rate through a multi-objective collaborative optimization algorithm to generate the optimal repair plan.

[0141] During the 6-month test and application period, Company B conducted fault detection and repair on a total of 6 million integrated circuits. The types of integrated circuit failures on the production line mainly include short circuit, open circuit, leakage, etc. Table 1 shows the data comparison between the traditional detection method and the system of the present invention after implementation:

[0142] Table 1 Comparison of integrated circuit fault detection and repair data

[0143]

[0144] As shown in Table 1 above, the average detection time for each integrated circuit using the traditional method is about 2.5 minutes, while the average detection time of the system of the present invention is shortened to 45 seconds. Through real-time analysis and optimization of the neural network model, the overall detection efficiency of the production line has been increased by 3 times, and the repair success rate has been increased from 87% to 96.5%. In terms of false alarm rate and missed alarm rate, the system of the present invention also performs better, reducing to 0.9% and 0.5% respectively, which means that the accuracy and sensitivity of detection have been significantly improved. Because the system of the present invention can quickly detect and automatically repair faults, the downtime of the production line has been reduced by 70.3%, from 320 hours to 95 hours, greatly improving the continuity and overall efficiency of production.

[0145] The repair data and results generated by the system of the present invention will be automatically stored in the fault history database, and the subsequent system will use this data to optimize the neural network model and repair strategy to further improve the accuracy and efficiency of detection and repair. This data-driven adaptive optimization mechanism provides long-term optimization potential for the production line of Company B.

[0146] In summary, by implementing the automatic fault detection and repair system of the present invention on the high-performance computing chip production line of Company B, the efficiency of detection and repair has been significantly improved, the downtime of the production line has been reduced, and the product quality and the overall operational efficiency of the production line have been improved. As a result, the company has gained stronger competitiveness in the high-end integrated circuit market, and has also laid a solid foundation for further intelligent production in the future.

[0147] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A method for designing integrated circuits for automatic fault detection and repair based on a neural network, characterized in that: The following steps are involved: S1. Obtaining operation data of the integrated circuit and preprocessing the operation data; S2. Analyze the preprocessed data using a trained neural network model, wherein the neural network model is dynamically optimized through an adaptive weight pruning algorithm to remove redundant neurons; S3, inputting the circuit operation data acquired in real time into the optimized neural network model, automatically identifying the fault type and its location in the circuit through the signal output by the model, and storing the fault information; S4. Based on the stored fault information, the automatic repair mechanism is started, and a multi-objective collaborative optimization algorithm is used to generate a repair strategy by comprehensively considering the repair time, resource utilization and repair success rate; S5. Perform repair operations on the integrated circuit according to the generated repair strategy, wherein the repair operations include logic reconstruction, enabling redundant circuits, and adjusting circuit parameters. At the same time, the repair path is dynamically adjusted through a repair path optimization algorithm based on deep reinforcement learning to optimize the order and parameters of the repair operations. S6. After the repair operation is completed, the repaired circuit is re-tested using the neural network model to verify the repair effect; S7. After the repair verification is passed, the repair results and related information are updated to the fault history database.

2. The method for designing an integrated circuit for automatic fault detection and repair based on a neural network according to claim 1, characterized in that: The S2 specifically includes: S21, perform feature vector X=[x1,x2,,x n ], the feature vector X is composed of the normalized input data, and each feature x i A specific parameter that indicates the operating status of an integrated circuit; S22, input the feature vector X into the trained neural network model. The neural network model consists of multiple layers, including an input layer, several hidden layers and an output layer. Each neuron in the hidden layer is activated by an activation function Perform nonlinear transformations; S23, dynamically optimizing the neural network model, adjusting the network weight matrix W by an adaptive weight pruning algorithm, wherein the adaptive weight pruning algorithm removes weights whose absolute values ​​are lower than a threshold value ∈ in the weight matrix according to the feature importance of the current running data; S24, update the adjusted weight matrix W, using the back propagation algorithm according to the loss function By minimizing the loss function, the weight matrix W is iteratively updated until the loss function converges to a predetermined threshold, where Y is the true label, is the model output; S25. Apply the final optimized weight matrix W' to the neural network model.

3. The method for designing an integrated circuit for automatic fault detection and repair based on a neural network according to claim 2, characterized in that: The S23 specifically includes: S231, calculate each weight w based on the feature importance of the current running data ij Contribution to the loss function L and weight w ij The relationship between is weighted: Among them, G ij is the weighted gradient value, reflecting the weight w ij Importance in fault detection, p k represents the probability distribution of the kth feature, is the loss function L for the weight w ij The conventional gradient of represents the influence of the weight on the final fault detection result, K is the total number of features, which represents the number of all circuit parameters involved in the detection; S232, based on the weighted gradient value G ij , determine the weight w ij To improve the effectiveness of pruning, an improved threshold function is used: Among them, η is the pruning sensitivity factor, which reflects the model's ability to adjust the sensitivity of low weights in different fault detection scenarios, and σ w is the standard deviation of the weights; S233, generating an adjusted weight matrix W', optimizing the complexity of the neural network model by removing low-importance weights and retaining high-influence weights; S234, further optimize the retained weights, combine local search and global optimization strategies, iteratively update the weights based on the weight matrix W', and finally make the loss function L converge to the adaptive threshold.

4. The method for designing an integrated circuit for automatic fault detection and repair based on a neural network according to claim 1, characterized in that: The S4 specifically includes: S41. Based on the fault information, define a multi-objective optimization function F(x), which comprehensively considers the repair time T(x), resource utilization R(x), repair success rate S(x), and circuit complexity change C(x): Among them, α, β, γ and δ are the weight coefficients of repair time, resource utilization, repair success rate and circuit complexity change, respectively. T(x) represents the time required for repair, R(x) represents the amount of resources used in the repair process, S(x) represents the repair success rate, and ΔC(x) represents the change in circuit complexity after repair, which is used to measure the impact of the repair operation on the circuit structure. S42, taking the optimization function F(x) as the objective function, evaluating and ranking the candidate solutions of multiple repair strategies through a multi-objective collaborative optimization algorithm, and selecting the repair strategy with the best optimization result as the implementation plan; S43, in the selected optimal repair strategy, specifically planning the steps of the repair operation, including logic reconstruction, enabling redundant circuits and adjusting circuit parameters, and adjusting the logic structure and parameter configuration of the corresponding circuit module according to the type and location of the fault; S44, real-time monitoring and dynamic adjustment of the repair strategy. During the repair process, if a new fault or abnormal change in the circuit state is detected, the parameters α, β, γ and δ in the optimization function F(x) are updated in real time, the repair strategy is re-evaluated, and the repair steps are adjusted in a timely manner; S45, applying the repair operation to the integrated circuit, and performing logic reconstruction, redundant circuit enabling, and circuit parameter adjustment operations.

5. The method for designing an integrated circuit for automatic fault detection and repair based on a neural network according to claim 4, characterized in that: The S42 specifically includes: S421, using the multi-objective collaborative optimization algorithm, evaluate multiple candidate solutions for the repair strategy, use the improved Pareto frontier optimization algorithm, define the fuzzy decision domain P d (x) = {x|μ(F(x))≥θ}, where μ(F(x)) is a fuzzy membership function used to evaluate the satisfaction of the multi-objective optimization function F(x), and θ is the satisfaction threshold; S422, in the fuzzy decision domain P d In (x), a nonlinear dynamic weight adjustment mechanism is introduced and the logarithmic decay function is used to adjust the values ​​of the weight coefficients α, β, γ, and δ in the objective function, so that the optimization process can adaptively respond to changes in fault scenarios: Among them, α(t) is the dynamic weight at time t, α0 is the initial weight, λ is the adjustment factor, f(t) is the fault influencing factor, α, β, γ and δ are the weight coefficients of repair time, resource utilization, repair success rate and circuit complexity change respectively; S423, selecting a repair strategy suitable for the current circuit operation state in the fuzzy decision domain, comprehensively considering the balance between the repair success rate S(x) and the repair time T(x), and determining a repair plan for implementation; S424: Apply the selected repair solution to the actual fault repair operation.

6. The method for designing an integrated circuit for automatic fault detection and repair based on a neural network according to claim 1, characterized in that: The S5 specifically includes: S51, according to the generated repair strategy, first perform the logic reconstruction operation and define the logic reconstruction matrix L r , used to represent the adjustment process of the logic unit in the circuit, the matrix L r Each element l ij Represents the connection status between the i-th logic unit and the j-th logic unit. After the logic reconstruction, the matrix is ​​updated to L' r =L r M, where M is a logic adjustment matrix used to achieve logic reconstruction of the fault location; S52, after the logic reconstruction, enable the redundant circuit, activate the redundant circuit unit, and define the redundant circuit activation vector R a , where each element r i Indicates the rth i The activation status of a redundant unit. The activation conditions are: Among them, E(f i ) represents the severity of the fault covered by the i-th redundant unit, and τ is the activation threshold; S53, adjusting circuit parameters, defining a nonlinear adaptive parameter adjustment function P(x), where x is the characteristic vector of the current circuit state, and the goal of parameter adjustment is to minimize the circuit failure risk and maintain the stability of the system: Where P'(x) is the adjusted circuit parameter, η is the learning rate, and controls the sensitivity of parameter adjustment. is the gradient of the loss function C(x) with respect to the parameter, indicating the impact of parameter changes on circuit performance, and λ1 is the gradient normalization factor; S54, after completing logic reconstruction, redundant circuit activation and parameter adjustment, dynamically adjust the repair path through a repair path optimization algorithm based on deep reinforcement learning; S55. Apply the finalized repair path and operation to the integrated circuit, perform logic reconstruction, redundant circuit enabling and parameter adjustment operations, and conduct preliminary verification of the repair effect.

7. The method for designing an integrated circuit for automatic fault detection and repair based on a neural network according to claim 6, characterized in that: The S54 specifically includes: S541, initializing the repair path strategy, setting the initial path to π0, the path strategy consists of an initial path set and the confidence distribution of each path, and the initial confidence is set to a uniform distribution; S542. During the repair process, collect environmental feedback R(t) in real time, where the environmental feedback includes the execution results of the repair steps, resource consumption, and repair success rate parameters. The feedback value R(t) is calculated by the following weighted nonlinear combination formula: Among them, S(t) is the repair success rate at time t, which measures the effectiveness of the current repair operation. ref is the reference success rate, which is the expected effect benchmark of the repair operation. γ1 is the smoothing factor, which is used to control the sensitivity of the success rate to feedback. C(t) is the repair cost, which represents the resource consumption and time consumption at time t. δ1 is the cost adjustment coefficient, which is used to dynamically adjust the sensitivity of feedback. α1 and β1 are weight coefficients, which respectively adjust the influence of the repair effect and cost in the feedback. S543. Based on the collected environmental feedback R(t) and the confidence of the path selection, the path selection strategy is updated, and the path update formula based on generalized entropy optimization is used: Among them, π t is the path selection strategy at time t, which represents the selection probability distribution of the current repair step. α2 is the generalized entropy parameter used to adjust the sensitivity of the path selection strategy. i represents the probability of selecting the i-th path in the current strategy, β2 is the path update rate, which controls the adjustment amplitude of the path selection strategy, and R(t) is the immediate reward of environmental feedback, which is used to measure the effectiveness of the current strategy; S544: Introduce a dynamic strategy correction mechanism. When a significant strategy deviation is detected during the path selection process or the repair effect does not meet the expected standard, the path selection strategy is corrected through a nonlinear dynamic adjustment formula: Among them, λ2 is the correction rate factor, which controls the speed and amplitude of path strategy adjustment, ΔR(t) is the change in environmental feedback at time t, which is used to dynamically adjust the response speed of path selection strategy, and δ2 is the adjustment factor, which is used to control the smoothness of the adjustment process; S545. After each path update, the execution result of the repair path is evaluated and the repair effect is fed back to the neural network.

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