Semiconductor structure and forming method thereof

Abstract

The invention discloses a semiconductor structure and a forming method thereof. The method comprises the following steps: forming a mask structure on a substrate; forming a first opening in the mask structure; at least one second opening is formed in the first opening, the bottom of the second opening is lower than the bottom of the first opening, and the at least one second opening is communicated with the first opening to form an isolation pattern; transferring the isolation pattern into the substrate, and forming an isolation groove in the substrate; and filling the isolation groove to form an isolation structure. In the isolation trench, the depth of the region corresponding to the second opening is greater than the depth of the region corresponding to the non-second opening. And filling the isolation groove, and when the isolation structure is formed, the depth of the isolation structure in a region corresponding to the second opening is greater than the depth of the isolation structure in a region not corresponding to the second opening. When the electrons flow out of the source electrode, the circulation path of the electrons flowing out along the area not corresponding to the second opening is shorter than the circulation path of the electrons flowing out along the area corresponding to the second opening, so that the characteristic on-resistance of the device is reduced.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing, and in particular to a semiconductor structure and a forming method thereof. Background Art

[0002] By replacing the lateral width with the longitudinal depth, the Deep Trench Isolation (DTI) structure effectively reduces the relative occupied area of ​​the device and increases the effective length of the drift region compared to the Shallow Trench Isolation (STI), providing a higher breakdown voltage for high-voltage devices while making the characteristic on-resistance relatively high. By optimizing the internal structure of the deep trench and introducing a deep trench structure design with segmented depth, an additional low-resistance current path can be created inside the device isolation structure.

[0003] However, there are currently many challenges in etching deep trench structures with height differences. Summary of the invention

[0004] The problem solved by the present invention is how to etch a deep groove structure with a height difference, and utilize an additional low-resistance current path so that the isolation structure has a smaller characteristic on-resistance while providing a higher breakdown voltage for the high-voltage device.

[0005] To solve the above problems, the present invention provides a method for forming a semiconductor structure, comprising: providing a substrate; forming a mask structure on the substrate; forming a first opening in the mask structure, wherein the first opening is used to define the position of an isolation structure; forming at least one second opening inside the first opening, wherein the bottom of the second opening is lower than the bottom of the first opening, and at least one second opening is connected to the first opening to form an isolation pattern; transferring the isolation pattern into the substrate to form an isolation trench in the substrate; and filling the isolation trench to form an isolation structure.

[0006] Optionally, the mask structure includes: a buffer layer located on the substrate, a first mask layer located on the buffer layer, and a second mask layer located on the first mask layer.

[0007] Optionally, the first opening exposes the first mask layer.

[0008] Optionally, the second opening exposes the buffer layer.

[0009] Optionally, the second opening exposes the substrate.

[0010] Optionally, the base includes a substrate, an insulating layer located on the substrate, and a semiconductor layer located on the insulating layer, and the isolation structure is located in the semiconductor layer.

[0011] Optionally, the material of the mask structure is different from the material of the semiconductor layer.

[0012] Optionally, the material of the mask structure includes at least one of silicon nitride and silicon oxide.

[0013] Optionally, the step of forming a first opening in the mask structure includes: forming a first anti-reflection layer on the surface of the mask structure and a first photoresist layer located on the surface of the first anti-reflection layer; exposing and developing the first photoresist layer and the first anti-reflection layer; after exposing and developing the first photoresist layer and the first anti-reflection layer, etching the mask structure to form the first opening.

[0014] Optionally, the step of forming at least one second opening inside the first opening includes: forming a second anti-reflection layer filling the first opening inside the first opening; forming a second photoresist layer on the surface of the second anti-reflection layer; exposing and developing the second photoresist layer and the second anti-reflection layer; after exposing and developing the second photoresist layer and the second anti-reflection layer, etching the mask structure to form the second opening.

[0015] Optionally, the step of transferring the isolation pattern into the substrate and forming an isolation trench in the substrate includes: using a mask structure having the first opening and the second opening as a mask, etching the substrate to form an isolation trench in the substrate.

[0016] Optionally, in the step of forming the isolation trench, the isolation trench includes a first region and a second region, the first region and the second region are alternately arranged along a first direction, the isolation trench of the second region corresponds to the second opening, the isolation trench of the second region is connected to the isolation trench of the first region, and the first direction is parallel to the surface of the substrate; in the step of filling the isolation trench to form an isolation structure, a dielectric material is filled into the isolation trench, the dielectric material filled in the isolation trench of the first region is suitable for forming a first division of the isolation structure, and the dielectric material filled in the isolation trench of the second region is suitable for forming a second division of the isolation structure.

[0017] Optionally, after forming the isolation structure, it also includes: forming a source and a drain, wherein the source and the drain are respectively located on both sides of the isolation structure along a second direction, and the second direction is perpendicular to the first direction and parallel to the surface of the substrate.

[0018] Correspondingly, an embodiment of the present invention further provides a semiconductor structure, wherein the semiconductor structure is formed by any of the above-mentioned methods for forming a semiconductor structure.

[0019] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0020] In the method for forming a semiconductor structure of the technical solution of the present invention, the first opening is first formed to define the position of the isolation structure, and then the second opening is formed in the first opening, and the isolation pattern formed by connecting the second opening with the first opening is transferred to the substrate, and an isolation groove is formed in the substrate. Since the bottom of the second opening is lower than the bottom of the first opening, the isolation pattern formed by connecting the second opening with the first opening is transferred to the isolation groove formed in the substrate, and the depth of the area corresponding to the second opening is greater than the area corresponding to the non-second opening. When the isolation groove is filled to form the isolation structure, the depth of the isolation structure in the area corresponding to the second opening is greater than the depth of the isolation structure in the area corresponding to the non-second opening. When electrons flow out from the source, a part of the electrons do not need to move down to the bottom along the side wall surface of the isolation structure in the area corresponding to the second opening and then flow to the drain, but move to the bottom along the side wall surface of the isolation structure in the area corresponding to the non-second opening and then flow to the drain. The flow path of the electrons flowing out along the area corresponding to the non-second opening is shorter than the flow path of the electrons flowing out along the area corresponding to the second opening, so that the characteristic on-resistance of the device is reduced. Furthermore, compared with the method of etching different regions of the substrate step by step to form segmented isolation trenches, the method of using the isolation pattern as an etching mask to simultaneously form segmented isolation trenches in the substrate ensures the etching morphology of the isolation trenches. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figures 1 to 3 is a schematic structural diagram of a semiconductor structure according to an embodiment;

[0022] Figures 4 to 25 is a schematic structural diagram of each step of a process for forming a semiconductor structure according to an embodiment of the present invention;

[0023] Fig.26 is a three-dimensional diagram of a semiconductor structure according to an embodiment of the present invention;

[0024] Fig. 27 is a three-dimensional diagram of a semiconductor structure according to another embodiment of the present invention;

[0025] Fig.28 is a three-dimensional diagram of a semiconductor structure according to another embodiment of the present invention. DETAILED DESCRIPTION

[0026] As can be seen from the background technology, the characteristic on-resistance of the lateral metal oxide semiconductor field effect transistor with deep trench isolation structure in the prior art is relatively large. Now, the reason for the problem is analyzed in combination with a semiconductor structure: please refer to Figures 1 to 3 , Figure 2 and Figure 3 They are Figure 1 In the cross-sectional view at the AA1 position and the BB1 ​​position, the semiconductor structure comprises:

[0027] Base 100;

[0028] The isolation structure 101 is located in the substrate 100 , and the isolation structure 101 has a first size h along a direction from the top surface of the substrate 100 to the bottom surface of the substrate 100 .

[0029] The semiconductor structure further includes: a source (not shown) and a drain (not shown). Along the first direction Y, the source and the drain are respectively located at two sides of the isolation structure 101 .

[0030] The ratio of the first dimension h of the isolation structure 101 along the top surface of the substrate 100 pointing to the bottom surface of the substrate 100 to the dimension of the isolation structure 101 along the first direction Y is greater than a first threshold value. The first threshold value is 5:1, and the first dimension h is greater than 1 μm.

[0031] By replacing the lateral width with the vertical depth, the isolation structure with a high aspect ratio effectively reduces the relative occupied area of ​​the device and increases the effective length of the drift region, providing a higher breakdown voltage for high-voltage devices. However, the increase in the device breakdown voltage often increases the characteristic on-resistance of the device, resulting in an increase in the characteristic conductive resistance of the device.

[0032] To solve the technical problem, the present invention provides a method for forming a semiconductor structure, comprising: providing a substrate; forming a mask structure on the substrate; forming a first opening in the mask structure, wherein the first opening is used to define the position of an isolation structure; forming at least one second opening inside the first opening, wherein the bottom of the second opening is lower than the bottom of the first opening, and at least one second opening is connected to the first opening to form an isolation pattern; transferring the isolation pattern into the substrate to form an isolation trench in the substrate; and filling the isolation trench to form an isolation structure.

[0033] In the method for forming a semiconductor structure of the technical solution of the present invention, the first opening is first formed to define the position of the isolation structure, and then the second opening is formed in the first opening, and the isolation pattern formed by connecting the second opening with the first opening is transferred to the substrate, and an isolation groove is formed in the substrate. Since the bottom of the second opening is lower than the bottom of the first opening, the isolation pattern formed by connecting the second opening with the first opening is transferred to the isolation groove formed in the substrate, and the depth of the area corresponding to the second opening is greater than the area corresponding to the non-second opening. When the isolation groove is filled to form the isolation structure, the depth of the isolation structure in the area corresponding to the second opening is greater than the depth of the isolation structure in the area corresponding to the non-second opening. When electrons flow out from the source, a part of the electrons do not need to move down to the bottom along the side wall surface of the isolation structure in the area corresponding to the second opening and then flow to the drain, but move to the bottom along the side wall surface of the isolation structure in the area corresponding to the non-second opening and then flow to the drain. The flow path of the electrons flowing out along the area corresponding to the non-second opening is shorter than the flow path of the electrons flowing out along the area corresponding to the second opening, so that the characteristic on-resistance of the device is reduced. Furthermore, compared with the method of etching different regions of the substrate step by step to form segmented isolation trenches, the method of using the isolation pattern as an etching mask to simultaneously form segmented isolation trenches in the substrate ensures the etching morphology of the isolation trenches.

[0034] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0035] Figures 4 to 25 It is a structural schematic diagram of each step of a process for forming a semiconductor structure according to an embodiment of the present invention. Fig.26 FIG. 4 is a three-dimensional diagram of a semiconductor structure according to an embodiment of the present invention.

[0036] Please refer to Figure 4 and Figure 5 , Figure 5 yes Figure 4 A cross-sectional view at position CC1 is provided of a substrate 200 .

[0037] The base 200 includes a substrate (not labeled), an insulating layer (not labeled) located on the substrate, and a semiconductor layer (not labeled) located on the insulating layer. The isolation structure 211 formed subsequently is located in the semiconductor layer.

[0038] The material of the substrate includes silicon. The material of the insulating layer includes silicon oxide. The material of the semiconductor layer includes silicon.

[0039] The semiconductor layer provides a structural basis for the subsequent formation of an isolation structure 211 .

[0040] In other embodiments, the base includes a substrate and an epitaxial layer on the substrate, wherein the epitaxial layer provides a structural basis for forming an isolation structure. The material of the substrate includes silicon, and the material of the epitaxial layer includes silicon.

[0041] Please refer to Figure 6 and Figure 7 , Figure 7 yes Figure 6 In the cross-sectional view at position CC1 , a mask structure is formed on the substrate 200 .

[0042] In the mask structure, the material of at least one layer closest to the substrate 200 is different from the material of the semiconductor layer. Specifically, in some embodiments of the present invention, the mask structure is a multi-layer stacked structure, and the mask structure includes: a buffer layer 201 located on the substrate 200, a first mask layer 202 located on the buffer layer 201, and a second mask layer 203 located on the first mask layer 202. The material of the first mask layer 202 is different from the material of the semiconductor layer.

[0043] The material of the mask structure includes at least one of silicon nitride and silicon oxide.

[0044] Specifically, in some embodiments of the present invention, the material of the buffer layer 201 includes silicon oxide, the material of the first mask layer 202 includes silicon nitride, and the material of the second mask layer 203 includes silicon nitride.

[0045] Please refer to Figures 8 to 13 , a first opening 206 is formed in the mask structure, and the first opening 206 is used to define the position of the isolation structure 211.

[0046] The size of the first opening 206 in the first direction X defines the isolation trench 210 (eg, Fig.23 The sum of the sizes of the first zone I and the second zone II in the first direction X (as shown).

[0047] The step of forming the first opening 206 in the mask structure includes: Figures 8 to 10 As shown, Fig. 9 yes Figure 8 Cross-sectional view at CC1 position, Fig.10 yes Figure 8 In the cross-sectional view at position DD1, a first anti-reflection layer 204 and a first photoresist layer 205 located on the surface of the first anti-reflection layer 204 are formed on the surface of the mask structure; Figures 11 to 13 As shown, Fig.12 yes Fig.11 Cross-sectional view at CC1 position, Fig.13 yes Fig.11In the cross-sectional view at position DD1, the first photoresist layer 205 and the first anti-reflection layer 204 are exposed and developed; after the first photoresist layer 205 and the first anti-reflection layer 204 are exposed and developed, the mask structure is etched to form the first opening 206 .

[0048] The first opening 206 provides a structural basis for forming an isolation pattern.

[0049] Specifically, in some embodiments of the present invention, the first opening 206 exposes the first mask layer 202 .

[0050] Please refer to Fig.14 and Fig.15 , Fig.15 yes Fig.14 In the cross-sectional view at position CC1, after the first opening 206 is formed, the first anti-reflection layer 204 and the first photoresist layer 205 are removed.

[0051] The materials of the first anti-reflection layer 204 and the first photoresist layer 205 include organic compounds.

[0052] The method of removing the first anti-reflection layer 204 and the first photoresist layer 205 includes: ashing treatment.

[0053] Please refer to Figures 16 to 19 At least one second opening 209 is formed inside the first opening 206 , the bottom of the second opening 209 is lower than the bottom of the first opening 206 , and at least one second opening 209 is connected to the first opening 206 to form an isolation pattern.

[0054] The step of forming at least one second opening 209 inside the first opening 206 includes: Fig.16 and Fig.17 As shown, Fig.17 yes Fig.16 In the cross-sectional view at the CC1 position, a second anti-reflection layer 207 is formed in the first opening 206 to fill the first opening 206; a second photoresist layer 208 is formed on the surface of the second anti-reflection layer 207; Fig.18 and Fig.19 As shown, Fig.19 yes Fig.18 In the cross-sectional view at position CC1, the second photoresist layer 208 and the second anti-reflection layer 207 are exposed and developed; after the second photoresist layer 208 and the second anti-reflection layer 207 are exposed and developed, the mask structure is etched to form the second opening 209.

[0055] The second opening 209 provides a structural basis for the subsequent formation of an isolation pattern. The second opening 209 is parallel to the surface of the substrate 200, and defines an isolation groove 210 (such as Fig.23 The position of the second zone II) is shown.

[0056] The depth of the second opening 209 is greater than that of the first opening 206 , so that a first region I and a second region II of the isolation trench 210 formed subsequently have a depth difference, providing a structural basis for forming a first sub-portion and a second sub-portion with different depths.

[0057] Specifically, in some embodiments of the present invention, the second opening 209 exposes the substrate 200 .

[0058] Specifically, in some other embodiments of the present invention, the second opening exposes the buffer layer.

[0059] Please refer to Fig. 20 and Fig.21 , Fig.21 yes Fig. 20 In the cross-sectional view at position CC1, after the second opening 209 is formed, the second photoresist layer 208 and the second anti-reflection layer 207 are removed.

[0060] The materials of the second anti-reflection layer 207 and the second photoresist layer 208 include organic compounds.

[0061] The method of removing the second anti-reflection layer 207 and the second photoresist layer 208 includes: ashing treatment.

[0062] Please refer to Fig. 22 and Fig.23 , Fig.23 yes Fig. 22 In the cross-sectional view at position CC1, the isolation pattern is transferred into the substrate 200, and an isolation trench 210 is formed in the substrate 200.

[0063] The step of transferring the isolation pattern into the substrate 200 and forming the isolation trench 210 in the substrate 200 includes: using the mask structure having the first opening 206 and the second opening 209 as a mask, etching the substrate 200 to form the isolation trench 210 in the substrate 200.

[0064] In the step of forming the isolation trench 210, the isolation trench 210 includes a first region I and a second region II, the first region I and the second region II are alternately arranged along a first direction X, the isolation trench 210 of the second region II corresponds to the second opening 209, the isolation trench 210 of the second region II is connected to the isolation trench 210 of the first region I, and the first direction X is parallel to the surface of the substrate 200.

[0065] The first area I and the second area II are alternately arranged along the first direction X, that is, along the first direction X, the first area I is adjacent to the second area II, and the second area II is adjacent to the first area I.

[0066] Please refer to Fig.24 and Fig.25 , and please join the reference Fig.26 , Fig.25 yes Fig.24 Cross-sectional view at CC1 position, Fig.26 It is a three-dimensional diagram of an embodiment of the present invention, in which the isolation trench 210 is filled to form an isolation structure 211 .

[0067] In the step of filling the isolation trench 210 to form the isolation structure 211, a dielectric material is filled into the isolation trench 210. The dielectric material filled in the isolation trench 210 in the first region I is suitable for forming a first section A of the isolation structure 211, and the dielectric material filled in the isolation trench 210 in the second region II is suitable for forming a second section B of the isolation structure 211.

[0068] The isolation structure 211 has a first section A and a second section B of different depths. When electrons flow out from the source, a portion of the electrons do not need to move downward along the side wall surface of the second section B to the bottom of the second section B and then flow to the drain, but move along the side wall surface of the first section A to the bottom of the first section A and then flow to the drain. The flow path of the electrons flowing out along the first section A is shorter than the flow path of the electrons flowing out along the second section B, thereby reducing the characteristic on-resistance of the device.

[0069] The ratio of the size of the second subsection B from the bottom of the substrate 200 to the top of the substrate 200 to the size of the second subsection B along the second direction Y is 1.5 to 8. The size of the second subsection B from the bottom of the substrate 200 to the top of the substrate 200 is greater than 1 μm.

[0070] Specifically, in some embodiments of the present invention, the size range of the first subsection A along the first direction X is: 0.5 μm to 5 μm; the size range of the first subsection A along the second direction Y is: 3 μm to 15 μm; the size range of the first subsection A along the bottom of the substrate 200 pointing to the top of the substrate 200 is: 4 μm to 25 μm. The size range of the second subsection B along the first direction X is: 0.5 μm to 3 μm; the size range of the second subsection B along the second direction Y is: 2 μm to 15 μm; the size range of the second subsection B along the bottom of the substrate 200 pointing to the top of the substrate 200 is: 3 μm to 20 μm.

[0071] The isolation structure 211 is made of an insulating material, and the insulating material includes silicon oxide.

[0072] Please continue to refer to Fig.26 After forming the isolation structure 211, it also includes: forming a source 212 and a drain 213, along a second direction Y, the source 212 and the drain 213 are respectively located on both sides of the isolation structure 211, the second direction Y is perpendicular to the first direction X, and the second direction Y is parallel to the surface of the substrate 200.

[0073] Fig. 27 is a three-dimensional diagram of a semiconductor structure according to another embodiment of the present invention.

[0074] The same as the above embodiment, the present disclosure will not repeat it here. The difference from the above embodiment is that please continue to refer to Figures 4 to 25 Please refer to Fig. 27 , after forming the first opening 206 and before forming the second opening 209, it also includes: forming a third opening (not shown) inside the first opening 206, the bottom of the third opening is lower than the bottom of the first opening 206; forming an isolation pattern with the first opening 206, the second opening 209 and the third opening; transferring the isolation pattern into the substrate 200 to form an isolation trench in the substrate 200; filling the isolation trench to form an isolation structure.

[0075] The dimension of the third opening in the second direction Y is smaller than the dimension of the second opening in the second direction Y. The bottom of the third opening is not lower than the bottom of the second opening. Specifically, in an embodiment of the present invention, the bottom of the bottom of the second opening is lower than the bottom of the third opening.

[0076] The isolation trench includes a first area, a second area and a third area, the first area and the second area are alternately arranged along a first direction, the third area is located between the substrate 200 and the second area along a direction from the bottom of the substrate 200 to the top of the substrate 200, the isolation trench of the second area corresponds to the second opening, the isolation trench of the third area corresponds to the third opening, the isolation trench of the second area is connected to the isolation trench of the first area, the isolation trench of the first area is connected to the isolation trench of the third area, and the first direction X is parallel to the surface of the substrate.

[0077] In the step of filling the isolation trench to form the isolation structure, the isolation trench is filled with a dielectric material, the dielectric material filled in the isolation trench in the first region is suitable for forming a first subdivision A of the isolation structure, the dielectric material filled in the isolation trench in the second region is suitable for forming a second subdivision B of the isolation structure, and the dielectric material filled in the isolation trench in the third region is suitable for forming a third subdivision C of the isolation structure. The sum of the dimensions of the third subdivision C and the first subdivision A along the bottom of the substrate 200 pointing to the top of the substrate 200 is smaller than the dimension of the second subdivision B along the bottom of the substrate 200 pointing to the top of the substrate 200.

[0078] Fig.28 is a three-dimensional diagram of a semiconductor structure according to another embodiment of the present invention.

[0079] The same as the above embodiment, the present disclosure will not repeat it here. The difference from the above embodiment is that please refer to Fig.28 The sum of the dimensions of the third section C and the first section A along the bottom of the substrate 200 pointing to the top of the substrate 200 is equal to the dimension of the second section B along the bottom of the substrate 200 pointing to the top of the substrate 200.

[0080] Correspondingly, an embodiment of the present invention further provides a semiconductor structure, which is formed by the above-mentioned method for forming a semiconductor structure, and will not be described in detail herein.

[0081] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that: include: providing a substrate; forming a mask structure on the substrate; forming a first opening in the mask structure, wherein the first opening is used to define a position of an isolation structure; At least one second opening is formed inside the first opening, the bottom of the second opening is lower than the bottom of the first opening, and at least one second opening is connected to the first opening to form an isolation pattern; transferring the isolation pattern into the substrate to form an isolation trench in the substrate; The isolation trench is filled to form an isolation structure.

2. The method for forming a semiconductor structure according to claim 1, wherein: The mask structure includes: a buffer layer located on the substrate, a first mask layer located on the buffer layer, and a second mask layer located on the first mask layer.

3. The method for forming a semiconductor structure according to claim 2, wherein: The first opening exposes the first mask layer.

4. The method for forming a semiconductor structure according to claim 2, wherein: The second opening exposes the buffer layer.

5. The method for forming a semiconductor structure according to claim 1 or 2, wherein: The second opening exposes the substrate.

6. The method for forming a semiconductor structure according to claim 1, wherein: The base comprises a substrate, an insulating layer located on the substrate and a semiconductor layer located on the insulating layer, and the isolation structure is located in the semiconductor layer.

7. The method for forming a semiconductor structure according to claim 6, wherein: The material of the mask structure is different from that of the semiconductor layer.

8. The method for forming a semiconductor structure according to claim 7, wherein: The material of the mask structure includes at least one of silicon nitride and silicon oxide.

9. The method for forming a semiconductor structure according to claim 1, wherein: The step of forming a first opening in the mask structure includes: forming a first anti-reflection layer on the surface of the mask structure and a first photoresist layer located on the surface of the first anti-reflection layer; exposing and developing the first photoresist layer and the first anti-reflection layer; after exposing and developing the first photoresist layer and the first anti-reflection layer, etching the mask structure to form the first opening.

10. The method for forming a semiconductor structure according to claim 1, wherein: The step of forming at least one second opening inside the first opening includes: forming a second anti-reflection layer filling the first opening inside the first opening; forming a second photoresist layer on the surface of the second anti-reflection layer; exposing and developing the second photoresist layer and the second anti-reflection layer; after exposing and developing the second photoresist layer and the second anti-reflection layer, etching the mask structure to form the second opening.

11. The method for forming a semiconductor structure according to claim 1, wherein: The step of transferring the isolation pattern into the substrate and forming an isolation trench in the substrate includes: using the mask structure having the first opening and the second opening as a mask, etching the substrate to form an isolation trench in the substrate.

12. The method for forming a semiconductor structure according to claim 1, wherein: In the step of forming the isolation trench, the isolation trench includes a first region and a second region, the first region and the second region are alternately arranged along a first direction, the isolation trench of the second region corresponds to the second opening, the isolation trench of the second region is connected to the isolation trench of the first region, and the first direction is parallel to the surface of the substrate; In the step of filling the isolation trench to form an isolation structure, a dielectric material is filled into the isolation trench. The dielectric material filled in the isolation trench in the first region is suitable for forming a first section of the isolation structure, and the dielectric material filled in the isolation trench in the second region is suitable for forming a second section of the isolation structure.

13. The method for forming a semiconductor structure according to claim 12, wherein: After forming the isolation structure, the method further includes: forming a source and a drain, wherein the source and the drain are respectively located on both sides of the isolation structure along a second direction, wherein the second direction is perpendicular to the first direction and parallel to the surface of the substrate.

14. A semiconductor structure, characterized in that: The semiconductor structure is formed by the method for forming a semiconductor structure according to any one of claims 1 to 13.

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