Photon counting detector and photon counting method

Abstract

The invention relates to a photon counting detector and a method. The detector comprises: a scintillator (21) configured to convert incident gamma radiation into optical photons; a pixelated photodetector (20, 30) configured to detect a flux of optical photons, where the pixelated photodetector is a silicon photomultiplier, SiPM, detector, where each photodetector pixel comprises an array of silicon avalanche photodiodes, SPAD; and circuitry (23, 90) configured to perform, for each photodetector pixel: control a stop timing to stop one or more functions of the photodetector pixel; determining a first photon count by accumulating the number of optical photons detected by the SPAD of a corresponding photodetector pixel from the start of an integration period up to the stop timing; and estimating a second photon count based on the first photon count and the stop timing, the second photon count representing an estimation of the photon count for a total integration period.

Description

Technical Field

[0001] The present invention relates to a photon counting detector, a corresponding photon counting method and an imaging device comprising a photon counting detector for detecting radiation, in particular gamma radiation and X-ray radiation. Background Art

[0002] Photon counting is typically performed using a photomultiplier tube (PMT) detector, which includes a photosensitive photocathode and a set of "multiplier" anode terminals. The photocathode emits at least one electron in response to the impact of a photon, and the electron(s) then strike successive anode terminals, each such event causing the emission of cascade electrons, thereby creating a multiplication effect that causes a measurable electrical pulse. PMTs are capable of high-speed photon counting. Disadvantages of PMT detectors include: being relatively bulky discrete devices with large optical windows operating at high voltages; and being susceptible to failure due to the vacuum tube design and high operating voltages.

[0003] Silicon photomultiplier (SiPM) devices have been developed to overcome some of these shortcomings and provide photon counting detectors that are easily integrated with silicon-based signal / data processing circuits. In some embodiments, SiPM devices use avalanche photodiodes as light sensors. When biased above its breakdown voltage, the avalanche diode breaks down in response to the collision of a single photon. Such devices are sometimes referred to as single-photon avalanche diode (SPAD) detectors. In a typical SPAD detector, the avalanche photodiode is reverse biased above its breakdown voltage and connected in series with a quenching resistor. The collision of a single photon causes the pn junction to break down in the multiplied (i.e., "avalanche") cascade electrons, which flow in the SPAD detector as a measurable current. Since the voltage generated by the current flow on the resistor reduces the reverse bias voltage across the avalanche diode to a level below its breakdown voltage, the current is quenched relatively quickly. Additionally or alternatively, an active quenching subcircuit including (for example) one or more diodes, resistors, and / or transistors can provide faster quenching. Some illustrative examples of SiPM detector arrays are disclosed in US9268033B2 and US10078141B2.

[0004] The analog SiPM adds together all the SPAD signals of the matrix (forming a pixel), and the ASIC is able to digitize these added signals to obtain individual energy estimates for each gamma quantum. The pulse response of the analog SiPM is mainly determined by the passive quenching resistor and the SPAD capacity (RC component), which can lead to uncontrolled recharging, nonlinear behavior (incomplete recharging) and excessive power consumption under high optical flux from the scintillator (or ambient light). Therefore, the pulse integration from the gamma energy estimate may suffer from these nonlinearities. In addition, secondary effects such as local temperature rise caused by high power consumption may cause gain drift due to changes in the breakdown voltage.

[0005] Digital silicon photomultipliers (dSiPMs) consisting of a matrix of single-photon avalanche detectors (SPADs) are used as photon counting detectors (sometimes also called photon detectors) in high-performance PET / CT systems to detect single gamma quanta. The fast trigger logic of the digital SiPMs is coupled to a time-of-flight-enabled scintillator, which enables temporal resolution in the range of 100ps-200ps. The temporal resolution of these systems is particularly limited by the temporal spread of the scintillation process. New detector concepts using prompt photons have been proposed, which potentially provide significant improvements in temporal resolution below 100ps.

[0006] However, high count rates limit the dynamic range, especially in low attenuation direct beams or in the body periphery.Thus, for high count rates, the pulses overlap in time (optical pile-up), significantly degrading the received energy resolution. Summary of the invention

[0007] It is an object of the present invention to solve or at least reduce the problem of detector pixel pile-up.

[0008] In a first aspect of the present invention, a photon counting detector is provided, comprising:

[0009] a scintillator configured to convert incident gamma radiation into optical photons;

[0010] a pixelated photodetector configured to detect a flux of optical photons, wherein the pixelated photodetector is a silicon photomultiplier (SiPM) detector, wherein each photodetector pixel comprises an array of silicon avalanche photodiodes (SPADs); and

[0011] A circuit configured to perform the following steps for each photodetector pixel:

[0012] - controlling the timing of stopping one or more functions of the photodetector pixel;

[0013] - determining a first photon count by accumulating the number of optical photons detected by said SPAD of the corresponding photodetector pixel from the start of an integration period until said stop timing; and

[0014] - estimating a second photon count based on the first photon count and the stop timing, the second photon count representing an estimated result of the photon count for a total integration period.

[0015] In a further aspect of the invention, a corresponding photon counting method is proposed.

[0016] In yet a further aspect of the invention, an imaging device comprising a photon counting detector as disclosed herein is presented.

[0017] Preferred embodiments of the invention are defined in the dependent claims.

[0018] High count rates limit the dynamic range, especially in low attenuation direct beams or in the body periphery. Because the light yield of very fast scintillators is usually very low, it is not beneficial to use very short integration times (lower than the decay time of the scintillator), which will lead to poor energy resolution and loss of spectral information. Therefore, a compromise should be found to balance spectral separation with count rate capability, which is usually determined by design and cannot be dynamically adjusted for individual scans. In addition, for high count rates, pulses overlap in time and lead to optical pile-up, which deteriorates the received energy resolution.

[0019] The present invention overcomes or at least reduces this disadvantage by performing the following operations for each photodetector pixel: providing individual control to stop one or more functions of the pixel to stop operation and thus avoid optical pile-up and additionally save power. The one or more functions may generally be any operating function of the pixel (e.g., pixel logic, any (one or more) logic circuits, (one or more) adders, (one or more) state machines, etc.) that avoids (if stopped) high (undesirable) count rates. In embodiments, even the entire pixel (including all functions and units) may be stopped.

[0020] To ensure that the photon count within the full integration period is correct, even if the operation of the pixel is stopped before the end of the integration period, an estimate can be provided for the full integration period based on the photon count from the beginning of the integration period until the stop timing. The estimate can be based on an interpolation, for example.

[0021] In a preferred embodiment, the circuit is configured to: for each SPAD or SPAD group, apply a recharge signal to the corresponding one or more SPADs in response to the impact of an optical photon for recharging after breakdown; and for each photodetector pixel, control the recharge stop timing of stopping the application of the recharge signal to the corresponding one or more SPADs as the stop timing. For example, in an implementation of this embodiment, a fully digital SPAD matrix with individual recharge control for each SPAD array (photodetector pixel) can be used to prevent saturation of the energy histogram and limit power consumption within the integration period. The programmable recharge control logic can conditionally stop the recharging of the pixel.

[0022] In another implementation of this embodiment, a fully digital SPAD matrix with active quenching for each SPAD can be provided, which includes static enable / disable and dynamic recharge control. The pulses are summed digitally, which avoids analog drift and thresholds to provide linearity and stability over time and temperature. In such an implementation, each pixel of the pixelated photodetector includes multiple cells, wherein each cell may include:

[0023] a SPAD reverse biased above a breakdown voltage of the SPAD;

[0024] a trigger logic connected to the SPAD and configured to output a trigger signal indicating whether the SPAD is in a breakdown state; and

[0025] A conditional recharge circuit is configured to recharge the SPAD when both of the following conditions are met: (i) the recharge circuit applies the recharge signal to the cell, and (ii) the trigger signal output by the trigger logic of the cell indicates that the SPAD of the cell is in a breakdown state.

[0026] There are different options for how to estimate the second photon count. In one embodiment, the circuit is configured to estimate the second photon count based on the first photon count and a time ratio of a non-measurement time period from the stop timing to the end of the integration period divided by a measurement time period from the start of the integration period to the stop timing. For example, the circuit can estimate the second photon count by adding the product of the first photon count and the time ratio to the first photon count.

[0027] In another embodiment, the circuit includes a time counter configured to count a time period from the start of the integration period until the stop timing, wherein the circuit is configured to use the time period to estimate the second photon count. Thus, in such an embodiment, the integration counter (which provides an actual and accurate integration time (e.g., in the ns range) to accurately calculate the radiance estimation result) can store the integration time from the start of the integration period until the individual stop. Thus, the circuit can function like a pixel-based exposure control, thereby preventing any overexposure at any time, thereby providing 100% useful acquisition data for image reconstruction.

[0028] In another embodiment, the circuit includes a system counter configured to oversample the integration period and count the number of sub-sampling periods from the beginning of the integration period until the stop timing, wherein the circuit is configured to use the time period to estimate the second photon count. This embodiment does not use individual counters, but rather uses an additional system clock that oversamples the integration period to provide a fixed number of possible integration times. This embodiment reduces the complexity of data processing because no individual counter values ​​need to be stored and processed. In addition, the expected count rate for each pixel can be effectively interpolated using a fixed number of oversampled integration periods (preferably by sampling 2 times the higher power as the integration period).

[0029] In another embodiment, the circuit is configured to predict the position of the inspection object relative to the photon counting detector in a subsequent integration period, and control the stop timing based on the predicted position. For example, the stop timing can be controlled based on the predicted position by stopping the operation and / or recharging of the SPAD of the photodetector pixel predicted not to be partially covered by the inspection object earlier than the SPAD of the photodetector pixel predicted to be partially covered by the inspection object. Thus, in an embodiment, the circuit can be configured to predict the position of the inspection object relative to the photon counting detector in the subsequent integration period based on the positioning scan or image information.

[0030] Such an embodiment may be combined with an exposure control factor that may be used with an embodiment using a system counter to control the duty cycle of the oversampling clock based on a region of interest prediction model. A prediction model may be built using a standard camera and machine learning algorithms to handle edge detection of an object of interest or projection of an object of interest on the detector (depending on its angular position). In a simple implementation, such a prediction model can be used to switch off (by deactivation) pixels in a specific portion of the detector area, where the pixels in this specific portion are exposed to the direct beam and do not contribute to any post-processing.

[0031] In yet another embodiment, the circuit is configured to control the stop timing based on a stop condition for each photodetector pixel. Different conditions may be used as stop conditions. For example, in an embodiment, the stop condition may be represented by the detection that one or more energy bins of the corresponding photodetector pixel have exceeded a corresponding counting threshold. In another embodiment, the stop condition may be represented by the number of optical photons of the corresponding photodetector pixel having exceeded a corresponding photon threshold. For example, the pixel may then include an accumulator next to the energy bins, which counts the number of optical photons detected since the beginning of the integration period. When this accumulator reaches a user-defined threshold, the operation and / or recharging of the pixel may be stopped, since it can be assumed that sufficient statistical data have been collected.

[0032] The circuit may be further configured to integrate the optical flux and determine an integrated value until the stop timing. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] These and other aspects of the invention will become apparent and elucidated with reference to the embodiment(s) described hereinafter. In the accompanying drawings:

[0034] FIG. 1 shows a diagram of a typical decay curve and an integral curve (depending on the integration time) of a conventional photon counting detector.

[0035] Figure 2 A schematic diagram of a first embodiment of a photon counting detector according to the present invention is shown.

[0036] FIG. 3 shows a diagram of a logical integration period signal, a photon counting signal, and a stop control signal that may be used in a first embodiment of a photon counting detector.

[0037] Figure 4 A schematic diagram showing a second embodiment of a photon counting detector according to the present invention is shown.

[0038] Figure 5 A circuit diagram of an embodiment of a detector unit of a photon counting detector according to the present invention is shown.

[0039] FIG6 shows a time chart of the recharging operation.

[0040] 7 shows a diagram of a logic integration period signal, a logic oversampling signal, a photon counting signal, and a stop control signal that may be used in another, more simplified embodiment of a photon counting detector.

[0041] Figure 8 FIG. 1 is a schematic diagram showing a third embodiment of a photon counting detector according to the present invention. DETAILED DESCRIPTION

[0042] A diagram of typical decay curves and integral curves (depending on integration time) of a conventional photon counting detector is shown in Figure 1. Fast scintillators usually exhibit two or more decay components with different weightings (depending on material properties including chemical composition, energy bands, excitation phase, doping and co-doping profiles, etc.). Figure 1A A typical scintillator decay curve 10 is shown, which consists of a short decay component 11 and a long decay component 12 . Figure 1B The integration of this example with different integration times (also referred to as integration lengths) is shown.

[0043] In the case of single gamma counting, the spectral separation strongly depends on the amount of light collected by the pixelated photodetector (e.g., by a SPAD matrix). For example, a short (e.g., 20 ns) integration ( Figure 1B Curve E in FIG. 1 can, for example, collect about 63% of the light, while a longer (eg, 40 ns) integration ( Figure 1B Curve C) in FIG. 4 can for example collect approximately 86% of the light, resulting in an improved energy resolution, with the disadvantage that the counting losses are higher at high counting rates. The present invention describes how to overcome this trade-off.

[0044] The detection system of CT usually rotates with the source, and the curved detector is usually composed of multiple individual modules, each of which includes multiple sensor tiles. Each sensor tile is electrically, mechanically and thermally connected to a module to provide power, clock, signals, etc. The sensor tile consists of multiple silicon dies, each with multiple pixels, aligned with the scintillation array pixel pitch.

[0045] Figure 2 A schematic diagram of a first embodiment of a photon counting detector 20 according to the present invention is shown. The detector 20 generally comprises a scintillator 21 configured to convert incident gamma radiation into optical photons, a pixelated photodetector (represented as a SPAD matrix 22) configured to detect a flux of optical photons, and a circuit 23 (or a corresponding unit) configured to further process / evaluate the detected optical photons.

[0046] In more detail, Figure 2A single pixel of a sensor die is shown which in this embodiment comprises on the one hand a SPAD matrix 22 and on the other hand a link 24 to an IO (input / output) module. The IO module is provided, for example, for input / output of data, clock, integration period control, commands, power etc. The SPAD matrix 22 collects the scintillation light from the gamma rays. A programmable photon accumulator 25 (also referred to as an integrator) calculates the sum of each acquired pulse (in particular a programmable number of samples) and stores it in a histogram cell 26 using a suitable (optionally programmable) threshold. Thus, the state of the SPAD can be read out synchronously with a reference clock and an addition operation performed by the accumulator 25. A programmable number of samples are added to generate an energy estimate of the absorbed radiation quanta and store it in an energy histogram. In parallel, a true integration mode ( Figure 2 (not shown), this integration mode is typically used for CT detection.

[0047] The controller 28 (or processor) is responsible for several aspects. The controller 28 (or processor) can control the accumulator 25, the histogram unit 26, and the logic circuit 27 (e.g., pixel logic for addressing or controlling the pixels of the SPAD matrix 22). In addition, at the beginning of an integration period (also indicating the end of the previous integration period), the histogram data is buffered and sent downstream towards the IO module into the downstream data link 24, which is then reset to initialize the histogram data for the next integration period.

[0048] During the integration period, the histogram counts increase and the SPAD is active until a stop condition is reached. For example, if one or more energy bins have exceeded a given number of counts, the stop condition can be derived, for example, by controller logic (e.g., controller 28). The controller logic can be programmable, optionally including several energy bins and programmable thresholds for each bin, and / or the controller logic can be a combination of "OR" logic and / or "AND" logic of different sub-conditions. The logic can also be overridden by a setting from a command interface (e.g., a command interface of an IO module) (which can be controlled by the acquisition system).

[0049] Whenever a stop condition occurs, one or more functions or operations of the pixel are disabled / stopped so that photons are no longer actually counted. For example, the operation of the accumulator 25 and / or the histogram unit 26 and / or the logic circuit 27 may be disabled or controlled to stop counting or integrating photons at a controlled stop timing. Optionally, the true integral value from the beginning of the integration period may be stored in the integral sum until the stop signal.

[0050] To determine the correct photon count, although counting has been stopped before the end of the integration period, a first photon count can be determined by accumulating the number of optical photons detected by the SPAD of the corresponding photodetector pixel from the beginning of the integration period until the stop timing. This is the actual measurement result when the pixel (or its (one or more) functions) has been enabled. Then, a second photon count can be estimated based on the first photon count and the stop timing, so that the second photon count represents an estimate of the photon count for the total integration period.

[0051] The integration period is typically in the range of 100 μs, and may be, for example, in the range of 50 μs to 500 μs. Depending on the radiation flux (e.g., gamma flux), the time to stop integration can be significantly earlier than the end of the integration period would imply. This often happens during direct beam exposures, when the histogram counters can easily saturate. The present invention ensures pixel-based stopping, preferably for each integration period in the entire detection system.

[0052] The logic for the stop condition can be defined dynamically, such definition being dependent, for example, on the angle and position of the detector, and also including a priori knowledge (e.g. of the positioning scan) to reduce the integration time of certain areas in advance, as described in more detail below. In case a real integration mode is implemented, the integration is stopped and corrected. Since most of the power consumption of the detector depends linearly on the incoming light flux, the proposed control of the stop timing can reduce the power consumption by performing the following operations during acquisition: for example, reducing the power consumption in magnitude by stopping one or more functions of one or more pixels, or reducing the power consumption by limiting the recharging in unused areas of the detector. Reducing the power consumption simplifies the thermal design and inherently improves the gain stability.

[0053] FIG. 3 shows a logic integration period signal 100 ( Figure 3A ), photon counting signal 101( Figure 3B ) and stop control signal 102 ( Figure 3C ). The integration period enables the collection of photon counts in a histogram. When a specific stop condition is met, the integration (and / or other function(s)) is stopped.

[0054] exist Figure 3AAs can be seen in FIG. 1 , an integration period of 100 μs (in this example) enables pulse integration of the pixel and histogram generation with a always rising edge (in this example, at a time of 50 μs). If the radiance is very high, exceeding several thousand hits during the observation time, this is often associated with direct beam exposure. Due to the high angle of incidence, the S / N of this region can be limited without degradation in the reconstructed image. Additionally, energy bin overflow can be avoided with integration (and / or other functionality(ies) disabled) if certain conditions are met. In the example, above a certain threshold (e.g., Figure 3B The energy bin filling of 1024 shown can be used as a stop condition for the next rising edge of the reference clock. Therefore, the total photon count (second photon count) for the complete integration period can then be estimated using the currently measured photon count up to that moment (first photon count) (i.e., predicting the photon count for the remaining time of the integration period). This can be done based on the time ratio between the time period T1 (first part of the integration period) when photon counting is enabled and the time period T2 (second part of the integration period) when photon counting is disabled.

[0055] In an embodiment to be explained in more detail below, a corresponding time counter (which is always reset at the beginning of the integration period) can be latched and copied into the data stream for count rate calculation. In the above example, photon counting is disabled after 30 μs (in the example shown in FIG. 3 , = T1 from 50 μs to 80 μs), which saves considerable power for the remainder of the integration period of 70 μs (= T2 from 80 μs to 150 μs). In the above example, the effective integration period and the incident radiation rate can vary during the operating time and histogram overflow can be avoided at any time. In this example, the integration starts at 50 μs (absolute time) and stops at 80 μs, so that high power consumption is given only during the period of 30 μs (= T1). For the remaining time period (T2 = 70 μs), the power consumption on recharging is zero. Since counting stops after T1 (at 80 μs), the count rate is divided by the collected events (in the histogram counter 26) within T1 (for example, as Figure 4 The count rate is calculated as a ratio of the time T1 measured by the time counter 29. In the case where T1 = 50 μs and the remaining time period is T2 = 50 μs, the count rate is then calculated simply by doubling these values.

[0056] In the diagram shown in Figure 3, normal use cases for medium and low radiances are not shown. In this normal use case, integration is stopped only by the start of the next integration period. The time counter corresponds to the active integration period.

[0057] Figure 4A schematic diagram of a second embodiment of a photon counting detector 30 according to the present invention is shown. Figure 2 In addition to the detector 20 shown, the detector 30 also includes a storage device for storing the effective integration time ( Figure 3C The controller 28 can control the effective integration length (and / or be controlled by the module command to control the effective integration length) to stop counting by manipulating the logic circuit 27 and the time counter 29 using a stop control signal (e.g., according to the filling of the histogram data). For example, the time counter can be latched and the collection of the histogram data can be stopped at the same time. Like the histogram unit 26, the time counter 29 is also reset at the end of the integration period.

[0058] The time counter 29 is able to store the effective integration time precisely, wherein the granularity can be given by the centrally distributed reference clock. Typical values ​​are in the range of 100 MHz to 300 MHz.

[0059] If counting is stopped before the official end of the integration period, the histogram counts for each integration period and pixel can be restored. The correct radiance can be calculated by dividing the histogram counts by the corresponding time counter value. This calculation can be implemented in an FPGA or during post-processing on a processor or computer as follows:

[0060] Corrected technology rate = detected counts × counter time / (integration period × clock frequency)

[0061] In another embodiment, the logic circuit 27 may be implemented as a recharge logic. The recharge logic may be controlled by the controller 28 to be enabled at the beginning of the integration period and disabled at the end of the integration period, or disabled at an earlier stop timing when a stop condition occurs. Therefore, in this embodiment, for each SPAD or SPAD group, a recharge signal may be applied to the corresponding one or more SPADs in response to the impact of an optical photon for recharging after breakdown; and for each photodetector pixel, a recharge stop timing at which the recharge signal is stopped from being applied to the corresponding one or more SPADs may be controlled.

[0062] Figure 5 FIG. 6 shows a timing diagram of a normal SPAD operation. In this context, Fig. 6A shows the logic recharge signal, Figure 6B The SPAD voltage V across the SPAD 91 is shown. spad ,and Figure 6C The SPAD current I through the SPAD 91 is shown spad .

[0063] During operation, the cell electronics 92 applies a local recharge signal (or system recharge signal) to the OR gate 93 to close the first switch 94 (recharge switch) so that the anode A of the SPAD 91 is connected to the ground GND. In addition, the enable signal from the memory 95 closes the second switch 96 (enable switch). The enable switch 96 disconnects the SPAD from the recharge switch 94, i.e., when the memory 95 is set to 0, the SPAD will not be recharged, and when the memory 95 is set to 1, it will close the enable switch 96 and connect the SPAD to the recharge.

[0064] In other embodiments, the enable switch 96 and the memory 95 may be omitted. Additionally, in other embodiments, the OR gate 93 is not provided, and only the local recharge signal or the system recharge signal is used to control the recharge switch 94.

[0065] SPAD voltage V spad (Bias voltage) from breakdown voltage V 击穿 Ramp up to a higher voltage V 击穿 +V 过量 The SPAD is now sensitive to single photons. The photons (events) that reach the SPAD cause a current that is higher than the quiescent current I 静态 The current I through the SPAD spad The short-term increase in the SPAD voltage V spad breakdown and decreases back to (or even below) the breakdown voltage V 击穿 The SPAD is then recharged again to make it sensitive to the arrival of photons.

[0066] According to the invention, recharging can be disabled at the stop timing, which means that for example the recharging switch 94 is controlled (by a local recharging signal or a system (more global; e.g. for each pixel or SPAD group) recharging signal) to remain open for the remainder of the integration period and thus recharging is avoided. The SPAD 91 is thus insensitive to the impinging photons and thus no longer counts them.

[0067] Another embodiment of the disclosed photon counting detector is shown as follows Figure 4A simplified version of the embodiment shown. In this embodiment, no individual time counter is provided, and counting can be significantly simplified, which saves space in the layout and reduces the data bandwidth and reduces the processing time. Such an implementation requires an additional oversampling integration period. This can be, for example, a power of 2, such as implemented by a PLL, to generate sub-periods of equal size. However, subsampling can be implemented at arbitrary intervals for dynamic compression. Therefore, only the sub-sampling period can be counted, stored and sent. Since the counter does not run with a high-speed reference clock, because it is driven by subsampling the integration period, only a few bits are needed for this information: for example, when using an oversampling of 16, only 4 bits can be used, while 16 bits are needed for reference clock synchronous integration stop.

[0068] FIG. 7 shows a logic integration period signal 110 ( Fig. 7A ), logical oversampling signal 111 ( Figure 7B ), photon counting signal 112 ( Figure 7C ) and stop control signal 113 ( Fig.7D ). These signals show an example implementation of an 8x oversampled integration period. After the number of hits in the selected energy bin exceeds a programmable value and the next oversampled integration period begins, recharging and energy estimation are stopped.

[0069] In the example shown in FIG7 , the integration interval ( Figure 7B ) are equidistant, but the integration interval can be arbitrarily defined by a centralized pulse generator with high timing accuracy. The oversampled signal 111 can be derived asynchronously from the variable integration period, but also synchronized with a high-speed given system reference clock (e.g., at a frequency of >100 MHz). The period can be precisely defined and known to further process the correct count rate.

[0070] After a certain condition is met, the integration stops. As described above, signaling can be derived or external signaling can be included based on the filling state of the histogram bins. In the above example, a hit count higher than 1024 in the energy histogram is used to stop the integration at the next rising edge of the oversampled integration period. In the example illustrated in Figure 7, the first integration is stopped after 25μs (2 / 8 of the integration period), and the second integration with a lower count rate is stopped after 37.5μs corresponding to 3 / 8 of the integration period. The count in the energy histogram exceeds the value of 1024 and changes accordingly with the count rate of the input. The counter in the above example requires only three bits (8 times oversampling as the maximum input), which are stored and transmitted to indicate the effective integration time for the correct post-processing, and then a calibrated count rate is obtained based on the raw data stream.

[0071] As in the above embodiment, the normal use case of low emissivity is not explicitly shown. There, the integration is stopped only by the start of the next integration period.

[0072] Another advantage of this embodiment is simplified post-processing: the counts can just be divided by a known set of integration times that are identical within the complete system to get the radiance. Further simplification can be achieved by multiplying with the inverse time period (which can also be stored, for example, in a lookup table) to achieve faster calculations. The sensitive sub-periods can also be spread equally over the acquisition time to prevent possible image artifacts. As an example, recharging can be enabled symmetrically over the integration period, such as in the first 1 / 8 part and the last 1 / 8 part if only 1 / 4 of the integration period is sampled.

[0073] Yet another embodiment of a photon counting detector according to the present invention utilizes a pre-positioned image of an examination object (eg, a patient) to derive specific pixel suppression or exposure control programming parameters for each pixel. Figure 8 A schematic diagram illustrating an imaging device 40 of such an embodiment using a photon counting detector 50 according to the present invention is shown. The imaging device 40 includes a positioning camera 41, a radiation (e.g., gamma ray or X-ray) source 42, a collimator 43, and a detector 50 including a plurality of pixels. Depending on a prediction model created by a positioning image of an inspection object 60 acquired by the positioning camera 41, each pixel can be preprogrammed to its exposure control coefficient.

[0074] exist Figure 8 As is evident from the figure, all pixels 51 (at the outer edges) always remain outside the region of interest and will only be exposed to the direct X-ray beam. Therefore, they can be disabled to save power and increase the dynamic range of the pixels. On the other hand, pixel 53 (in the middle) will be exposed to the most relevant area of ​​the object's body and can therefore be fully exposed to absorb as much radiation signal as possible. Pixel 52, located between pixels 51 and 53 at the edge of the object, receives a relatively high radiation and is relevant to image reconstruction. It can be controlled or programmed to reduce the total exposure by an appropriate exposure control coefficient (ECC). In this example, for pixel 51, the value of the ECC can be 0; for pixel 52, the value of the ECC can be 0.5; and for pixel 53, the value of the ECC can be 1. Then, as described above with reference to the use of a duty cycle of a time counter or an oversampling integration time (as described above with respect to the use of an oversampling integration period), the ECC value can be used to modulate the threshold.

[0075] In general, exposure control need not be a function that is only fully on or off. Depending on the position and time on the detector (i.e., rotational position), in one embodiment, exposure control may be adaptive to optimally save power. The ECC defines the rules by which this exposure control feature can vary, and it imposes limits.

[0076] Parameter ECC is able to define operating modes in which areas are sampled with long exposure times (e.g., >50%, for example, for the center of the body imaged by pixel 53), medium exposure times (e.g., 10%-50%, for example, in the periphery of the body imaged by pixel 52), and very low exposure times (e.g., 10%, for example, for unused areas of direct exposure imaged by pixel 51).

[0077] The control or programming can be adjusted dynamically depending on the rotational position of the detector array and by accessing information of previous rotations. Depending on the region of interest, a large number of linear or non-linear distribution values ​​of ECC (from 0 to 1) can also be utilized to increase the number of regions where pixels can be programmed or controlled.

[0078] In another embodiment, instead of using a scout image to determine or predict the position of the object relative to the detector, other means may be used. For example, based on measurements taken at different rotational positions of the source and detector and the rotational speed, it is possible to predict which pixels will be exposed to direct radiation at subsequent rotational positions.

[0079] In summary, according to the present invention a solution is proposed by which photon counting can be stopped when a stop condition is reached. For example, recharging of the pixel can be conditionally stopped by a programmable recharging control logic. The integration time from the start of the integration period to the individual stop (for example by disabling recharging) can be stored by an integration counter or given by an external signal, thereby providing a practical and accurate integration time (in the ns range) to accurately calculate the radiance estimation result. The detector and method according to the present invention act like a pixel-based exposure control, thereby preventing any overexposure at any time, thereby providing useful acquisition data for image reconstruction.

[0080] The present invention can be used, for example, in scintillator-based photon counting CT, digital PET, digital SPECT, and high energy physics detectors.

[0081] Although the present invention has been described and illustrated in detail in the drawings and the foregoing description, such description and illustration are to be considered illustrative or exemplary rather than restrictive; the present invention is not limited to the disclosed embodiments. Other variations of the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed invention by studying the drawings, the disclosure, and the appended claims.

[0082] In the claims, the word "comprising" does not exclude other elements or steps, and the word "a" or "an" does not exclude a plurality. A single element or other unit may fulfill the functions of several items recited in the claims. The fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.

[0083] Any reference signs in the claims should not be construed as limiting the scope.

Claims

1. A photon counting detector, comprising: a scintillator (21) configured to convert incident gamma radiation into optical photons; A pixelated photodetector (20, 30) configured to detect a flux of optical photons, wherein the pixelated photodetector is a silicon photomultiplier (SiPM) detector, wherein each photodetector pixel comprises an array of silicon avalanche photodiodes (SPADs); and A circuit (23, 90) configured to perform the following steps for each photodetector pixel: controlling a stop timing of stopping one or more functions of the photodetector pixel; determining a first photon count by accumulating the number of optical photons detected by the SPAD of the corresponding photodetector pixel from the beginning of an integration period until the stop timing; and A second photon count is estimated based on the first photon count and the stop timing, the second photon count representing an estimated result of the photon count for a total integration period.

2. The photon counting detector according to claim 1, in, The circuit (90) is configured to: For each SPAD or group of SPADs, applying a recharge signal to the corresponding one or more SPADs in response to an impact of an optical photon for recharging after breakdown; and For each photodetector pixel, a recharge stop timing at which application of a recharge signal to the corresponding one or more SPADs is stopped is controlled as a stop timing.

3. The photon counting detector according to claim 1 or 2, in, The circuit (23, 90) is configured to estimate the second photon count based on the first photon count and a time ratio of a non-measurement time period from the stop timing to the end of the integration period divided by a measurement time period from the start of the integration period to the stop timing.

4. The photon counting detector according to claim 3, in, The circuit (23, 90) is configured to estimate the second photon count by adding a product of the first photon count and the time ratio to the first photon count.

5. A photon counting detector according to any one of the preceding claims, in, The circuit (23, 90) includes a time counter configured to count a time period from the start of the integration period until the stop timing; and Wherein the circuit is configured to use the time period to estimate the second photon count.

6. A photon counting detector according to any one of the preceding claims, in, The circuit (23, 90) includes a system counter configured to: oversample the integration period and count the number of sub-sampling periods from the start of the integration period until the stop timing; and Wherein the circuit is configured to use the time period to estimate the second photon count.

7. A photon counting detector according to any one of the preceding claims, in, The circuit (23, 90) is configured to predict a position of the examination object relative to the photon counting detector in a subsequent integration period and to control the stop timing based on the predicted position.

8. The photon counting detector according to claim 7, in, The circuit (23, 90) is configured to control the stop timing based on the predicted position by stopping operation and / or recharging of the SPAD of photodetector pixels predicted not to be partially covered by the inspection object earlier than the SPAD of photodetector pixels predicted to be partially covered by the inspection object.

9. The photon counting detector according to claim 7, in, The circuit (23, 90) is configured to predict a position of the examination object relative to the photon counting detector in the subsequent integration period based on the scout scan or image information.

10. A photon counting detector according to any one of the preceding claims, in, The circuit (23, 90) is configured to control the stop timing based on a stop condition for each photodetector pixel.

11. The photon counting detector according to claim 10, in, The circuit (23, 90) is configured to control the stop timing for each photodetector pixel based on detecting that one or more energy bins of the corresponding photodetector pixel have exceeded a corresponding counting threshold and / or that the number of optical photons of the corresponding photodetector pixel has exceeded a corresponding photon threshold.

12. A photon counting detector according to any one of the preceding claims, in, The circuit (23, 90) is further configured to integrate the optical flux and determine an integrated value until the stop timing.

13. The photon counting detector according to claim 2, in, Each pixel of the pixelated photodetector comprises a plurality of cells, Each unit includes: a SPAD reverse biased above a breakdown voltage of the SPAD; a trigger logic connected to the SPAD and configured to output a trigger signal indicating whether the SPAD is in a breakdown state; and A conditional recharge circuit is configured to recharge the SPAD when both of the following conditions are met: (i) the recharge circuit applies the recharge signal to the cell, and (ii) the trigger signal output by the trigger logic of the cell indicates that the SPAD of the cell is in a breakdown state.

14. An imaging device comprising a photon counting detector (20, 30) according to any one of the preceding claims.

15. A method of photon counting, comprising performing the following steps for each photodetector pixel of a pixelated photodetector (20, 30): controlling the stopping timing of stopping one or more functions of the photodetector pixel, wherein, The pixelated photodetector is configured to detect a flux of optical photons converted from incident gamma radiation by a scintillator (), wherein each photodetector pixel comprises an array of silicon avalanche photodiodes (SPADs); determining, for each photodetector pixel, a first photon count by accumulating the number of optical photons detected by the SPAD of the corresponding photodetector pixel from the start of an integration period until the stop timing; and For each photodetector pixel, a second photon count is estimated based on the first photon count and the stop timing, the second photon count representing an estimation result of the photon count for a total integration period.

Images