Branch conversion method and device for instruction compiling preprocessing

Abstract

The invention provides a branch conversion method and device for instruction compilation preprocessing. The method comprises the following steps: determining a basic block actually having a control dependency relationship in an IR structure to be processed; converting the conditional branch instruction in the IR structure to be processed into a comparison assignment instruction of a corresponding prediction code; and based on the comparison assignment instruction, lifting the instruction of the basic block actually having the control dependency relationship into a predicate execution instruction. According to the method, the basic blocks actually having the control dependency relationship are determined, and then branch conversion is performed on the function having the control dependency and the data dependency at the same time in the processing process of the rear end of the compiler, so that the control dependency is converted into the data dependency, and more optimization space is provided for a scheduling algorithm for improving instruction level parallelism.

Description

Technical Field

[0001] The present invention relates to the technical field of instruction compilation processing, and in particular to a branch conversion method and device for instruction compilation preprocessing. Background Art

[0002] For common parallel processors such as digital signal processors (DSPs), since there are fewer dependencies between instructions and no long control flow, the compiler usually performs static analysis on the dependencies to achieve instruction-level parallelism of the processor, thereby reducing the execution time of the parallel processor to complete the target code.

[0003] For instruction sets dedicated to digital signal processors, the most common instruction dependencies are data dependencies and control dependencies. The larger the basic block in the compilation process, the more dependencies the scheduling algorithm can handle, and therefore the easier it is to optimize. The size of the basic block is determined by where the conditional branch instructions appear, and the presence of control dependencies prevents the scheduling algorithm within the basic block from making more optimizations.

[0004] In order to improve instruction parallelism, processor designers introduced predicate execution instructions to convert control dependencies into data dependencies for processing. Existing branch conversions usually only support a single predicate, which corresponds to a prediction code in the instruction encoding. However, when multiple conditional predicates are involved, it is difficult to identify the control dependencies between predicates, which affects the processing speed of the scheduling algorithm. Summary of the invention

[0005] The present invention provides a branch conversion method and device for instruction compilation preprocessing, which are used to solve the defect that the limitation of a single predicate in the prior art affects the processing speed of a scheduling algorithm, and realizes a scheduling algorithm with higher operating efficiency through the branch conversion method for instruction compilation preprocessing.

[0006] The present invention provides a branch conversion method for instruction compilation preprocessing, comprising: Determine the basic blocks that actually have control dependencies in the IR structure to be processed; Convert the conditional branch instruction in the IR structure to be processed into a comparison assignment instruction of a corresponding prediction code; The instructions of the basic block that actually has the control dependency are promoted to predicate execution instructions based on the comparison assignment instructions.

[0007] According to a branch conversion method for instruction compilation preprocessing provided by the present invention, the step of determining the basic blocks that actually have control dependencies in the IR structure to be processed specifically includes: Traverse the control flow graph of the IR structure to be processed and generate corresponding control tags for each control branch; Generate a first tag for a basic block that satisfies the conditional jump under each control branch, generate a second tag for a basic block that does not satisfy the conditional jump, and jointly determine the first tag or the second tag generated by each basic block itself and the first tag or the second tag generated by an adjacent basic block in the upstream of the control chain to which it belongs as a block tag of each basic block, wherein the first tag and the second tag are a set of complementary tags corresponding to each control tag; The complementary mark in the block mark of each basic block is eliminated, and the basic block that still has the block mark is determined as the basic block that actually has the control dependency relationship.

[0008] According to a branch conversion method for instruction compilation preprocessing provided by the present invention, the control mark is a one-bit prediction code corresponding to each control branch, the first mark is the control mark corresponding to itself, and the second mark is the logical negation mark of the control mark corresponding to itself.

[0009] According to a branch conversion method for instruction compilation preprocessing provided by the present invention, the step of eliminating the complementary mark in the block mark of each basic block specifically includes: After determining the block tags of all basic blocks, traverse the block tags of all basic blocks in the control flow graph, and if the complementary tag exists in the block tags, eliminate the complementary tag and update the block tags.

[0010] According to a branch conversion method for instruction compilation preprocessing provided by the present invention, the step of eliminating the complementary mark in the block mark of each basic block specifically includes: After determining a block tag of a basic block, detecting whether the complementary tag exists in the block tag of the basic block; When the complementary flag exists in the block flag of the one basic block, the complementary flag is deleted and the block flag is updated.

[0011] According to a branch conversion method for instruction compilation preprocessing provided by the present invention, the step of determining the basic blocks that actually have control dependencies in the IR structure to be processed specifically includes: When the compiler provides compilation analysis preprocessing of the control relationship, the basic blocks that actually have the control dependency relationship are directly obtained.

[0012] The present invention also provides a branch conversion device for instruction compilation preprocessing, comprising: A determination module, used for determining the basic blocks that actually have control dependencies in the IR structure to be processed; A conversion module, used for converting the conditional branch instruction of the basic block in the IR structure to be processed into a comparison assignment instruction of the corresponding prediction code; A promotion module is used to promote the instructions of the basic block that actually has a control dependency relationship to predicate execution instructions based on the comparison assignment instruction.

[0013] The present invention also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the branch conversion method of instruction compilation preprocessing as described above is implemented.

[0014] The present invention also provides a non-transitory computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the branch conversion method of instruction compilation preprocessing as described in any one of the above is implemented.

[0015] The present invention also provides a computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the branch conversion method of instruction compilation preprocessing as described above is implemented.

[0016] The branch conversion method and device for instruction compilation preprocessing provided by the present invention determine the basic blocks that actually have control dependencies by searching the dependencies in the IR structure to be processed, and then perform branch conversion on functions that have both control dependencies and data dependencies during the processing of the compiler backend, thereby converting the control dependencies into data dependencies, providing more optimization space for scheduling algorithms that improve instruction-level parallelism. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0018] Figure 1 It is one of the flow charts of the branch conversion method of instruction compilation preprocessing provided by the present invention; Figure 2 It is one of the control flow diagrams in the branch conversion method of instruction compilation preprocessing provided by the present invention; Figure 3 This is the second control flow diagram in the branch conversion method of instruction compilation preprocessing provided by the present invention; Figure 4 This is the third control flow diagram in the branch conversion method for instruction compilation preprocessing provided by the present invention; Figure 5 This is the second flow chart of the branch conversion method of instruction compilation preprocessing provided by the present invention; Figure 6It is a structural schematic diagram of a branch conversion device for instruction compilation preprocessing provided by the present invention; Figure 7 It is a structural schematic diagram of the electronic device provided by the present invention. DETAILED DESCRIPTION

[0019] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0020] Combine the following Figures 1 to 5 Introduce the branch conversion method of the instruction compilation preprocessing of this application, such as Figure 1 As shown, including: Step 101, determining the basic blocks that actually have control dependency relationships in the IR structure to be processed; The IR (Intermediate Representation) structure to be processed is the intermediate representation structure that needs to be processed in the compiler.

[0021] Among the basic blocks of the IR structure, some basic blocks have predecessor instructions that have control dependencies but are not controlled by the predecessor instructions.

[0022] For example, refer to Figure 2 A control flow graph is provided. In the existing predicate compilation method, basic block BB4 will be affected by the predecessor instruction corresponding to the first control branch after basic block BB1, but according to the control dependency determined by the overall control flow, basic block BB4 will be executed regardless of the choice corresponding to basic block BB1. In other words, there is actually no control dependency between basic block BB4 and the first control branch after basic block BB1, and the content of basic block BB4 can be processed in parallel with the content of basic block BB1.

[0023] Therefore, by traversing the control flow graph of the IR structure to be processed, the actual control dependency relationship between the basic blocks can be determined, so that during the processing of the compiler backend, branch conversion can be performed on the functions that actually have control dependencies and data dependencies, thereby converting the control dependencies of the basic blocks that actually have control dependencies into data dependencies, providing more optimization space for the scheduling algorithm to improve instruction-level parallelism.

[0024] Step 102, converting the conditional branch instruction in the IR structure to be processed into a comparison assignment instruction of the corresponding prediction code; Furthermore, the branch conversion converts all conditional branch instructions in the IR structure to be processed into comparison assignment instructions of corresponding prediction codes, so as to realize the conversion from control dependency to data dependency.

[0025] Step 103: Promote the instructions of the basic block that actually has the control dependency relationship to predicate execution instructions based on the comparison assignment instructions.

[0026] Furthermore, based on the comparison assignment instructions determined in advance for each conditional branch instruction and the actual existing control dependencies of each basic block, the instructions in the basic blocks that actually have control dependencies are promoted to nested predicate execution instructions of the corresponding prediction codes.

[0027] On this basis, the IR after branch conversion is completed can be provided to the compiler's subsequent compilation process.

[0028] The present invention searches for dependencies in the IR structure to be processed to determine the basic blocks that actually have control dependencies, and then performs branch conversion on functions that have both control dependencies and data dependencies during the processing of the compiler backend, thereby converting control dependencies into data dependencies, providing more optimization space for scheduling algorithms that improve instruction-level parallelism.

[0029] In the branch conversion method for instruction compilation preprocessing of the present invention, the step of determining the basic blocks that actually have control dependencies in the IR structure to be processed specifically includes: Traverse the control flow graph of the IR structure to be processed and generate corresponding control tags for each control branch; In order to conveniently determine the actual control dependencies in the IR structure to be processed, the control flow graph (CFG) of the IR structure to be processed is first traversed, and a control tag uniquely corresponding to each control branch is generated.

[0030] Optionally, the control mark may be a prediction code corresponding to each control branch, or may be a mark in any other form, such as letters, numbers, other special symbols, and combinations thereof.

[0031] For example, refer to Figure 3 In the control flow graph shown, the three control branches are marked as A, B and C respectively.

[0032] Generate a first tag for a basic block that satisfies the conditional jump under each control branch, generate a second tag for a basic block that does not satisfy the conditional jump, and jointly determine the first tag or the second tag generated by each basic block itself and the first tag or the second tag generated by an adjacent basic block in the upstream of the control chain to which it belongs as a block tag of each basic block, wherein the first tag and the second tag are a set of complementary tags corresponding to each control tag; Furthermore, a block label of each basic block in the control flow graph is determined according to a condition corresponding to each control branch.

[0033] Specifically, for each basic block satisfying the conditional jump under a control branch, a first tag corresponding to the control tag of the control branch is generated; otherwise, a second tag corresponding to the control tag of the control branch is generated.

[0034] Optionally, the first mark and the second mark may be marks in any form, as long as the first mark and the second mark corresponding to each control branch can correspond to the control mark of the control branch.

[0035] Continue with Figure 3 Taking the control flow graph shown in the figure as an example, by adding the number 1 as the first mark after the control mark, it indicates the basic block that meets the conditional jump; by adding the number 2 as the second mark after the control mark, it indicates the basic block that does not meet the conditional jump. On this basis, the intermediate mark corresponding to the basic block BB2 is A1; the intermediate mark corresponding to the basic block BB3 is A2B2; the intermediate mark corresponding to the basic block BB4 is B1C2; the intermediate mark corresponding to the basic block BB5 is C1. Among them, the intermediate mark is the first mark or the second mark generated in the process of determining the block mark of each basic block.

[0036] On this basis, the block tag of each block needs to be determined together with the first tag or the second tag generated by the upstream adjacent basic block in the control chain to which each basic block belongs. The adjacent means that there is no other basic block between the upstream of the control chain and the current basic block.

[0037] Continue with Figure 3 Taking the control flow graph shown as an example, the neighboring basic block BB1 of the basic block BB2 and the basic block BB3 is the initial basic block of the control flow graph, and there is no intermediate mark, so only the basic block BB4 and the basic block BB5 need to be considered.

[0038] For basic block BB4, there are adjacent basic blocks BB1 and BB3 upstream of its control chain. Basic block BB1 generates an intermediate tag A1 according to its corresponding control branch, and basic block BB3 generates an intermediate tag A2B2 according to its corresponding control branch. Therefore, the block tag of basic block BB4 is determined to be B1C2A1A2B2.

[0039] For basic block BB5, there is an adjacent basic block BB3 upstream of the control chain to which it belongs, and basic block BB3 generates an intermediate label A2B2 according to its corresponding control branch. Therefore, the block label of basic block BB5 is determined to be C1A2B2.

[0040] The complementary mark in the block mark of each basic block is eliminated, and the basic block that still has the block mark is determined as the basic block that actually has the control dependency relationship.

[0041] On this basis, the block tags of each basic block are traversed to Figure 3 Taking the control flow graph shown as an example, it can be found that at this time there are two sets of complementary marks in the block mark of the basic block BB4, which are A1A2 and B1B2 respectively. Therefore, the complementary marks in the block mark of the basic block BB4 are eliminated and the block mark of the basic block BB4 is updated to C2.

[0042] Therefore, after eliminating the complementary mark in the block mark of each block, Figure 3 The basic blocks that still have block marks in the control flow graph shown are basic block BB2, basic block BB3, basic block BB4, and basic block BB5. At this time, the actual control dependency of each basic block can be determined at the same time according to the block mark finally determined for each basic block, and then according to the actual control dependency and the comparison assignment instruction of each control branch, the instruction of each basic block is promoted to a predicate execution instruction, realizing the conversion of the branch from control dependency to data dependency.

[0043] In the branch conversion method of instruction compilation preprocessing of the present invention, the control mark is a one-bit prediction code corresponding to each control branch, the first mark is the control mark corresponding to itself, and the second mark is the logical negation mark of the control mark corresponding to itself.

[0044] Optionally, the prediction code of each control branch may also be directly determined as the control tag of each control branch. At the same time, the first tag is the control tag corresponding to itself, and the second tag is the logical negation tag of the control tag corresponding to itself.

[0045] It should be noted that although the existing branch conversion usually only supports a single predicate, which corresponds to a one-bit prediction code in the instruction encoding, for architectures designed based on instructions of special lengths, such as the DSA architecture (Domain Specific Architecture), the prediction code can be multi-bit, so that the compiler can perform multi-predicate nested branch conversion preprocessing to further eliminate control dependencies and increase optimization space. Therefore, this method is particularly suitable for digital signal processors that commonly use the DSA architecture.

[0046] Reference Figure 4 In the control flow graph shown, the prediction codes of the three control branches are P0, P1 and P2 respectively, so the corresponding first and second labels are P0 and !P0, P1 and !P1, and P2 and !P2 respectively. On this basis, the block label of the basic block BB2 determined in the above manner is P0, the block label of the basic block BB3 is !P0!P1, the block label of the basic block BB4 is P0P1!P0!P1P2, and the block label of the basic block BB5 is P2!P0!P1.

[0047] After the block tag of each block is finally determined, the two pairs of complementary tags P0!P0 and P1!P1 in the block tag of the basic block BB4 are eliminated, and the block tag of the basic block BB4 is updated to P2. Finally, the predicate execution instruction of each block is determined based on this. The method of determining the control tag as a prediction code can further improve the processing speed of the process of determining the predicate execution instruction for each basic block.

[0048] In the branch conversion method of instruction compilation preprocessing of the present invention, the step of eliminating the complementary mark in the block mark of each basic block specifically includes: After determining the block tags of all basic blocks, traverse the block tags of all basic blocks in the control flow graph, and if the complementary tag exists in the block tags, eliminate the complementary tag and update the block tags.

[0049] Alternatively, if Figure 5 As shown, after the block marks of all basic blocks are determined, the block mark of each basic block is processed in turn.

[0050] Specifically, during the block tag detection process of each basic block, if a complementary tag is detected in the block tag, the complementary tag is eliminated and then the next step is executed; otherwise, the next step is directly executed, that is, the branch instruction in the basic block is converted into a comparison assignment instruction of the prediction code, and then the instruction in the basic block marked with the prediction code is promoted to a predicate execution instruction of the corresponding prediction code.

[0051] It should be noted that, when the control tag is not a prediction code, the block tag needs to be converted into a corresponding prediction code format according to the corresponding relationship among the control branch, the control tag and the prediction code.

[0052] In the branch conversion method of instruction compilation preprocessing of the present invention, the step of eliminating the complementary mark in the block mark of each basic block specifically includes: After determining a block tag of a basic block, detecting whether the complementary tag exists in the block tag of the basic block; When the complementary flag exists in the block flag of the one basic block, the complementary flag is deleted and the block flag is updated.

[0053] The only difference between this embodiment and the above embodiment is that after determining the block mark of a basic block, this embodiment detects whether there is a complementary mark in the block mark. If so, the complementary mark is eliminated, thereby reducing the block mark length of subsequent basic blocks, so it is not repeated here.

[0054] In the branch conversion method for instruction compilation preprocessing of the present invention, the step of determining the basic blocks that actually have control dependencies in the IR structure to be processed specifically includes: When the compiler provides compilation analysis preprocessing of the control relationship, the basic blocks that actually have the control dependency relationship are directly obtained.

[0055] Optionally, for some compilers, the compiler may directly provide compilation analysis preprocessing of the dominance relationship. Therefore, the basic blocks that actually have control dependency relationships and the control dependency relationship of each basic block may be directly obtained according to the dominance relationship directly provided by the compiler.

[0056] The branch conversion device for instruction compile preprocessing provided by the present invention is described below. The branch conversion device for instruction compile preprocessing described below and the branch conversion method for instruction compile preprocessing described above can be referred to each other.

[0057] like Figure 6 As shown, the branch conversion device for instruction compilation preprocessing includes a determination module 601, a conversion module 602 and a promotion module 603; A determination module 601 is used to determine the basic blocks that actually have control dependency relationships in the IR structure to be processed; The IR (Intermediate Representation) structure to be processed is the intermediate representation structure that needs to be processed in the compiler.

[0058] Among the basic blocks of the IR structure, some basic blocks have predecessor instructions that have control dependencies but are not controlled by the predecessor instructions.

[0059] For example, refer to Figure 2 A control flow graph is provided. In the existing predicate compilation method, basic block BB4 will be affected by the predecessor instruction corresponding to the first control branch after basic block BB1, but according to the control dependency determined by the overall control flow, basic block BB4 will be executed regardless of the choice corresponding to basic block BB1. In other words, there is actually no control dependency between basic block BB4 and the first control branch after basic block BB1, and the content of basic block BB4 can be processed in parallel with the content of basic block BB1.

[0060] Therefore, by traversing the control flow graph of the IR structure to be processed, the actual control dependency relationship between the basic blocks can be determined, so that during the processing of the compiler backend, branch conversion can be performed on the functions that actually have control dependencies and data dependencies, thereby converting the control dependencies of the basic blocks that actually have control dependencies into data dependencies, thereby providing more optimization space for the scheduling algorithm to improve instruction-level parallelism.

[0061] A conversion module 602, configured to convert the conditional branch instruction in the IR structure to be processed into a comparison assignment instruction of a corresponding prediction code; Furthermore, the branch conversion converts all conditional branch instructions in the IR structure to be processed into comparison assignment instructions of corresponding prediction codes, so as to realize the conversion from control dependency to data dependency.

[0062] The promotion module 603 is used to promote the instructions of the basic block that actually has the control dependency relationship to predicate execution instructions based on the comparison assignment instructions.

[0063] Furthermore, based on the comparison assignment instructions determined in advance for each conditional branch instruction and the actual existing control dependencies of each basic block, the instructions in the basic blocks that actually have control dependencies are promoted to nested predicate execution instructions of the corresponding prediction codes.

[0064] On this basis, the IR after branch conversion is completed can be provided to the compiler's subsequent compilation process.

[0065] The present invention searches for dependencies in the IR structure to be processed to determine the basic blocks that actually have control dependencies, and then performs branch conversion on functions that have both control dependencies and data dependencies during the processing of the compiler backend, thereby converting control dependencies into data dependencies, providing more optimization space for scheduling algorithms that improve instruction-level parallelism.

[0066] Figure 7 An example of a physical structure diagram of an electronic device is shown in FIG. Figure 7 As shown, the electronic device may include: a processor 710, a communication interface 720, a memory 730 and a communication bus 740, wherein the processor 710, the communication interface 720 and the memory 730 communicate with each other through the communication bus 740. The processor 710 may call the logic instructions in the memory 730 to execute the branch conversion method of instruction compilation preprocessing, the method comprising: determining the basic block that actually has a control dependency relationship in the IR structure to be processed; converting the conditional branch instruction in the IR structure to be processed into a comparison assignment instruction of the corresponding prediction code; and promoting the instruction of the basic block that actually has a control dependency relationship to a predicate execution instruction based on the comparison assignment instruction.

[0067] In addition, the logic instructions in the above-mentioned memory 730 can be implemented in the form of a software functional unit and can be stored in a computer-readable storage medium when it is sold or used as an independent product. Based on this understanding, the technical solution of the present invention can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium, including several instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.

[0068] On the other hand, the present invention also provides a computer program product, which includes a computer program, which can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the branch conversion method of instruction compilation preprocessing provided by the above methods, and the method includes: determining the basic blocks that actually have control dependencies in the IR structure to be processed; converting the conditional branch instructions in the IR structure to be processed into comparison assignment instructions of corresponding prediction codes; and based on the comparison assignment instructions, promoting the instructions of the basic blocks that actually have control dependencies to predicate execution instructions.

[0069] On the other hand, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, it is implemented to execute the branch conversion method of instruction compilation preprocessing provided by the above-mentioned methods. The method includes: determining the basic blocks that actually have control dependencies in the IR structure to be processed; converting the conditional branch instructions in the IR structure to be processed into comparison assignment instructions of corresponding prediction codes; and promoting the instructions of the basic blocks that actually have control dependencies to predicate execution instructions based on the comparison assignment instructions.

[0070] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0071] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, can also be implemented by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the prior art can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0072] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A branch conversion method for instruction compilation preprocessing, characterized in that: include: Determine the basic blocks that actually have control dependencies in the IR structure to be processed; Convert the conditional branch instruction in the IR structure to be processed into a comparison assignment instruction of a corresponding prediction code; The instructions of the basic block that actually has the control dependency are promoted to predicate execution instructions based on the comparison assignment instructions.

2. The branch conversion method for instruction compilation preprocessing according to claim 1, characterized in that: The step of determining the basic blocks that actually have control dependencies in the IR structure to be processed specifically includes: Traverse the control flow graph of the IR structure to be processed and generate corresponding control tags for each control branch; Generate a first tag for a basic block that satisfies the conditional jump under each control branch, generate a second tag for a basic block that does not satisfy the conditional jump, and jointly determine the first tag or the second tag generated by each basic block itself and the first tag or the second tag generated by an adjacent basic block in the upstream of the control chain to which it belongs as a block tag of each basic block, wherein the first tag and the second tag are a set of complementary tags corresponding to each control tag; The complementary mark in the block mark of each basic block is eliminated, and the basic block that still has the block mark is determined as the basic block that actually has the control dependency relationship.

3. The branch conversion method for instruction compilation preprocessing according to claim 2, characterized in that: The control mark is a one-bit prediction code corresponding to each control branch, the first mark is the control mark corresponding to itself, and the second mark is the logical negation mark of the control mark corresponding to itself.

4. The branch conversion method for instruction compilation preprocessing according to claim 2, characterized in that: The step of eliminating the complementary mark in the block mark of each basic block specifically includes: After determining the block tags of all basic blocks, traverse the block tags of all basic blocks in the control flow graph, and if the complementary tag exists in the block tags, eliminate the complementary tag and update the block tags.

5. The branch conversion method for instruction compilation preprocessing according to claim 2, characterized in that: The step of eliminating the complementary mark in the block mark of each basic block specifically includes: After determining a block tag of a basic block, detecting whether the complementary tag exists in the block tag of the basic block; When the complementary flag exists in the block flag of the one basic block, the complementary flag is deleted and the block flag is updated.

6. The branch conversion method for instruction compilation preprocessing according to claim 1, characterized in that: The step of determining the basic blocks that actually have control dependencies in the IR structure to be processed specifically includes: When the compiler provides compilation analysis preprocessing of the control relationship, the basic blocks that actually have the control dependency relationship are directly obtained.

7. A branch conversion device for instruction compilation preprocessing, characterized in that: include: A determination module, used for determining the basic blocks that actually have control dependencies in the IR structure to be processed; A conversion module, used for converting the conditional branch instruction of the basic block in the IR structure to be processed into a comparison assignment instruction of the corresponding prediction code; A promotion module is used to promote the instructions of the basic block that actually has a control dependency relationship to predicate execution instructions based on the comparison assignment instruction.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the program, the branch conversion method for instruction compilation preprocessing according to any one of claims 1 to 6 is implemented.

9. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the branch conversion method for instruction compilation preprocessing according to any one of claims 1 to 6 is implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the branch conversion method for instruction compilation preprocessing according to any one of claims 1 to 6 is implemented.

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