OpenCL parallel defect detection method and device based on static analysis and storage medium

Abstract

The invention discloses an OpenCL parallel defect detection method and device based on static analysis and a storage medium, relates to the field of computer compilation, and aims to discover parallel defects of OpenCL, improve code quality and automatically detect potential data conflicts and deadlock defects by processing specific keywords of OpenCL and analyzing on the basis of parallel grammar features of OpenCL. According to the method, problems can be found in the early stage of code development, compared with a dynamic detection method, the problems can be found before executable codes are generated by analyzing code files of OpenCL, the executable codes do not need to be modified and run, and the production environment and data cannot be affected. Compared with an analysis method based on a control flow diagram, the method has the advantages that the mode based on symbolic execution is adopted, the expansion diagram with the fence nodes is constructed, and branch information loss at branch instructions in a program is avoided.

Description

Technical Field

[0001] The present invention relates to the field of computer compilation, and in particular to an OpenCL parallel defect detection method, device and storage medium based on static analysis. Background Art

[0002] OpenCL (Open Computing Language) is a framework for writing programs for heterogeneous platforms. Its architecture consists of a host and a device. The host is the computer or processor that runs the OpenCL application, responsible for program scheduling, memory management, and communication with the device. The device is the processor that executes the OpenCL kernel code, which is often a highly parallel, compute-intensive task. OpenCL provides two different parallel computing modes for the host: data parallelism and task parallelism. It allows developers to utilize the parallel computing capabilities of multiple processors such as CPU, GPU, FPGA, etc. through programming, thereby accelerating the execution of applications.

[0003] Due to the complexity of parallel programming, in OpenCL parallel programming, some parallel defects are easy to appear in its programming code, such as data competition, deadlock, synchronization overhead, etc. These defects may affect the correctness and performance of parallel programs. The problem is essentially the classic data race detection problem in parallel programming, which requires identifying and preventing data inconsistency or program behavior uncertainty caused by multiple threads or processes accessing shared resources at the same time. Classic data race detection methods can be divided into two categories: static analysis and dynamic detection. For example, the Race Detector in the Go language can insert additional code during the compilation process to record the details of all memory accesses, including the time and method of accessing memory. These accesses are then monitored at runtime to detect whether there is unsynchronized shared access, that is, race conditions. The ThreadSanitizer in Clang also dynamically detects race conditions based on a similar binary code stub method.

[0004] Compared with dynamic detection, static analysis technology is an important means of software testing and program analysis. It can analyze the source code or intermediate code of the program without executing the program, so as to discover potential defects, errors, security vulnerabilities or performance bottlenecks in the early stage of the development cycle, avoiding the harm that may be caused by runtime vulnerabilities. Static analysis is mainly carried out by symbolic analysis. It simulates the execution of the program by using abstract symbols instead of specific values. When encountering a branch statement, it will explore each branch and add the branch condition to the corresponding path constraint. If the constraint is solvable, it means that the path is reachable. This method avoids the limitation that data flow analysis must merge data, and improves the accuracy and precision of the analysis. Existing static analysis technology is widely used in the detection of defects such as memory leaks and array out-of-bounds.

[0005] Existing related technologies are not suitable for parallel defect detection in OpenCL due to problems such as programming language, parallel framework and detection cost. Dynamic detection methods can only issue problems at runtime and perform a lot of tracking and recording work, so it will have a certain impact on program performance.

[0006] Static analysis methods analyze source code to find defects. In order to effectively parse and utilize semantic information, static analysis methods are often bound to specific languages ​​or parallel frameworks. In terms of language, OpenCL uses an extended subset of the ISO C99 standard, commonly known as the OpenCL C programming language. It uses concepts such as work items, work groups, and NDRanges to abstractly represent thread parallelism, and uses built-in functions to implement a relatively loose synchronization mechanism. Limited by language features and parallel syntax, existing static analysis methods are not very effective in detecting OpenCL parallel defects. Summary of the invention

[0007] In order to overcome the deficiencies of the above technologies, the present invention provides an OpenCL parallel defect detection method, device and storage medium based on static analysis for automatically detecting potential data conflicts and deadlock defects.

[0008] The technical solution adopted by the present invention to overcome the technical problems is: As attached Figure 1 As shown, an OpenCL parallel defect detection method based on static analysis includes: S1. Preprocess the OpenCL kernel code to be analyzed; S2. Use finite automata to identify different types of lexical units, including keywords, identifiers, operators, and values, convert the original code into tokens, and complete lexical analysis; S3. Determine whether a word sequence can be combined into a grammatical phrase structure according to grammatical rules, generate an abstract syntax tree for a sequence that conforms to grammatical rules, and complete grammatical analysis; S4. Establish a symbol table for collecting record identifier attribute information, and check whether there are semantic problems based on the symbol table, including type mismatch, undefined variables, duplicate definition of variables, undefined functions, and duplicate definition of functions; S5. Build an intermediate representation, extract the control flow information of the program from the intermediate representation, and build a control flow graph. The control flow graph consists of several basic blocks. Each basic block contains instructions that are executed sequentially. The basic blocks are connected by control flow edges. S6. Construct an expansion graph based on the control flow graph.

[0009] Furthermore, the preprocessing in step S1 includes processing macro definitions, file inclusion, conditional compilation, comments, inserting codes from included files, removing specific code blocks, and removing all comments.

[0010] Furthermore, in step S2, four address space modifiers and a pre-modifier _kernel of a kernel function in OpenCL are identified.

[0011] The above four address space modifiers include _global corresponding to global memory, _local corresponding to local memory, _constant corresponding to constant memory, and _private corresponding to private memory.

[0012] Furthermore, during the syntax analysis in step S3, it is determined whether the address space modifier in OpenCL is located in front of the identifier declaration statement for modification and whether the prefix modifier of the kernel function is located in front of the kernel function definition statement for modification.

[0013] Furthermore, it also includes checking in step S4 whether the kernel function return value type is a void type, and checking whether the work item variables, work group functions, and synchronization functions have duplicate definitions other than the default definitions.

[0014] Furthermore, in step S5, redundant grammatical information of the programming language is discarded when constructing the intermediate representation, and the expanded diagram is an expanded diagram with fence information.

[0015] Furthermore, each node of the expanded graph with fence information stores program state and program point. Program point is defined as the node before and after the code block. The program state includes the values ​​of all variables and related constraints at the current program point. The fence node is located between a specific code block and the entry program point of the code block.

[0016] Furthermore, the method for constructing the expanded graph by symbolic execution is: S6-1. Create an empty work queue from the program entry and create an initial state; S6-2. Add the entry node of the OpenCL kernel program to the work queue; S6-3. Iterate and access the work queue to determine if the work queue is empty, if not, execute step S6-4; S6-4 determines whether the program point of the node is located between two program blocks, if so, remove the program point after the target basic block access count, if otherwise, execute step S6-5; S6-5. Determine whether the node type is a terminal statement and use the SMT solver to determine the conjunction Is it satisfied? For the nodes, , is the number of nodes, is the jump condition of the branch statement, if it is satisfied, execute step S6-6; S6-6. Generate the entry node of the branch block and add the entry node to the work queue; S6-7. When a memory access statement is encountered, the memory access program information and the current status information are saved to the memory access information table; S6-8. When the access index is a variable, the conditional constraint information stored in different states is used to determine the satisfiability of the conjunction; S6-9. When the node type is a fence instruction, the memory access information in the memory access information table is set to a synchronization program point and the status of the current synchronization program point is recorded, and the next program point position is generated as an extended node and added to the work queue; S6-10. When the work queue is empty, complete the traversal of all program points in a symbolic execution manner and record potential data conflict points.

[0017] Furthermore, in step S6-4, if the number of accesses does not exceed the upper limit of the preset value, an access node for the first program point in the target basic block is generated and the node is added to the work queue; in step S6-7, the program information accessed and the current status information are compared with the existing information in the access information table.

[0018] The beneficial effects of the present invention are: discovering parallel defects of OpenCL, improving code quality, and automatically detecting potential data conflicts and deadlock defects by processing OpenCL-specific keywords and analyzing based on OpenCL's parallel syntax features. Problems can be discovered in the early stages of code development. Compared with dynamic detection methods, by analyzing OpenCL code files, problems can be discovered before executable code is generated. There is no need to modify or run the executable code, and there is no impact on the production environment and data. The detection accuracy is high. Compared with the analysis method based on the control flow graph, a symbolic execution-based approach is adopted to construct an extended graph with fence nodes, avoiding the loss of branch information at branch instructions in the program. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] One or more embodiments are exemplarily described by corresponding drawings, which do not limit the embodiments. Elements with the same reference numerals in the drawings are shown as similar elements, and the drawings do not constitute a scale limitation, and wherein: Figure 1 is a flow chart of the method of the present invention; Figure 2 It is an expanded view with fence information of the present invention; Figure 3 Constructing an expansion graph for the symbolic execution of the present invention; Figure 4 An example diagram of data conflict defect detection of the present invention; Figure 5 This is an example diagram of deadlock defect detection of the present invention. DETAILED DESCRIPTION

[0020] The following is combined with Figure 1 To Attachment Figure 5 The preferred embodiments of the present invention are described in detail so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby making a clearer and more definite definition of the protection scope of the present invention.

[0021] In the description of the present invention, it should be noted that the embodiments described in the present invention are only part of the embodiments of the present invention, rather than all of the embodiments; based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present invention.

[0022] The terms "first", "second", etc. in the specification and claims of this article and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of this article described here can be implemented in an order other than those illustrated or described here. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, device, product or equipment that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or equipment.

[0023] An OpenCL parallel defect detection method based on static analysis, comprising: S1. Preprocess the OpenCL kernel code to be analyzed.

[0024] S2. Use finite automaton (FA) to identify different types of lexical units, including keywords, identifiers, operators, and values, convert the original code into tokens, and complete lexical analysis.

[0025] S3. Determine whether a word sequence can be combined into a grammatical phrase structure according to the grammatical rules, generate an Abstract Syntax Tree (AST) for the sequence that conforms to the grammatical rules, and complete the grammatical analysis.

[0026] S4. In the semantic analysis phase, a symbol table is established to collect and record identifier attribute information. Based on the symbol table, it is checked whether there are semantic problems, including type mismatch, undefined variables, repeated definition of variables, undefined functions, and repeated definition of functions. For OpenCL, unlike C syntax, the return value type of the kernel function defined can only be void type, and OpenCL contains many built-in functions, such as work item and work group functions and synchronization functions. The OpenCL syntax stipulates that they can be used in the kernel code without the need for additional link library files or special header files. Therefore, the compiler needs to perform special processing in the semantic analysis phase to avoid judging it as an undefined function because the function definition cannot be found in the symbol table.

[0027] S5. After completing the above steps, an AST with basically correct semantic information can be obtained. In order to further discover more potential semantic problems, such as parallel defects, the abstract syntax tree needs to be further processed. Construct an intermediate representation (IR). In this process, the redundant syntax information of the specific programming language will be discarded, and the control flow information of the program will be extracted from the intermediate representation to construct a control flow graph (CFG). The control flow graph consists of several basic blocks. Each basic block contains instructions to be executed sequentially, and each basic block is connected by control flow edges.

[0028] S6. Construct an expansion graph based on the control flow graph.

[0029] In one embodiment of the present invention, the preprocessing in step S1 includes processing macro definitions, file inclusion, conditional compilation, comments, inserting code from included files, removing specific code blocks, and removing all comments.

[0030] In one embodiment of the present invention, in step S2, four address space modifiers and a pre-modifier _kernel of a kernel function in OpenCL are identified.

[0031] In one embodiment of the present invention, the four address space modifiers include _global corresponding to global memory, _local corresponding to local memory, _constant corresponding to constant memory, and _private corresponding to private memory, which correspond to global memory, local memory, constant memory, and private memory respectively, and have different visibility and sharing scopes.

[0032] In one embodiment of the present invention, in the syntax analysis stage, compared with the compilation process of C language, during the syntax analysis in step S3, it is determined whether the address space modifier in OpenCL is located in front of the identifier declaration statement for modification and whether the prefix modifier of the kernel function is located in front of the kernel function definition statement for modification.

[0033] In one embodiment of the present invention, it also includes checking in step S4 whether the kernel function return value type is void type, and checking whether the work item variables, work group functions, and synchronization functions have duplicate definitions except for the default definitions.

[0034] In one embodiment of the present invention, when constructing the intermediate representation in step S5, redundant grammatical information of the programming language is discarded, and the expanded diagram is an expanded diagram with fence information.

[0035] In one embodiment of the present invention, the key step of analyzing synchronization defects is to perform symbolic execution on the control flow graph and construct an exploded graph with barrier nodes. Figure 2 As shown in the figure, Entry represents the entry point of the program, Exit represents the exit point of the program, and Block represents a block of code executed sequentially. The square nodes represent different program running state nodes. Each state node contains a program state (State) and a program point (Program Point). The program point is defined as the node position before and after the code block. The program state contains the values ​​of all variables at the current program point and related constraints. The elliptical nodes represent fence nodes in parallel programs. The fence nodes are located between a specific code block and the entry program point of the code block. The connection relationship between nodes represents the jump caused by an unconditional jump instruction or a conditional branch instruction. It is likely that different state information will be generated when reaching the same program point along different branch paths. The expansion graph retains the constraint information of different paths of the branch node in the form of symbolic constraints, thereby avoiding the information loss caused by the flow-sensitive analysis merging the states of different branches at the program point where the control flow converges. Since there can be multiple program states when reaching the fence program point and exiting the program point, there may also be multiple corresponding fence nodes and exit nodes in the expansion graph.

[0036] In one embodiment of the present invention, as shown in the attached Figure 3 As shown in the figure, the construction method of the symbolic execution expansion graph is: S6-1. Create an empty work queue from the program entry and create an initial state.

[0037] S6-2. Add the entry node of the OpenCL kernel program to the work queue.

[0038] S6-3. Continuously iterate and access the work queue to determine whether the work queue is empty. If not, execute step S6-4.

[0039] S6-4. Determine whether the program point of the node is located between two program blocks. If so, remove the program point and count the number of visits to the target basic block. If not, execute step S6-5.

[0040] S6-5. Determine whether the node type is an end statement, that is, a branch statement, and use the SMT solver (Satisfiability Modulo Theories) to determine the conjunction Is it satisfied? For the nodes, , is the number of nodes, is the jump condition of the branch statement. If it is met, execute step S6-6.

[0041] S6-6. Generate the entry node of the branch block and add the entry node to the work queue. If the branch is unreachable, it does not need to be generated.

[0042] S6-7. When a memory access statement is encountered, the memory access program information and current status information are saved in the memory access information table.

[0043] S6-8. When the memory access index is a variable, the conditional constraint information stored in different states is used to determine the satisfiability of the conjunction, thereby discovering potential data conflicts.

[0044] S6-9. When the node type is a fence instruction, the memory access information in the memory access information table is set to a synchronization program point and the status of the current synchronization program point is recorded. There is no data conflict between work items at different synchronization points. Finally, the program node may be of other types without the risk of data conflict. At this time, an extension node is generated at the next program point position and added to the work queue.

[0045] S6-10. When the work queue is empty, complete the traversal of all program points in a symbolic execution manner and record potential data conflict points.

[0046] In one embodiment of the present invention, if the number of accesses does not exceed the upper limit of a preset value in step S6-4, an access node for the first program point in the target basic block is generated and the node is added to the work queue; in step S6-7, the program information to be accessed and the current status information are compared with the existing information in the memory access information table to determine whether there is any potential memory access conflict and record it.

[0047] As attached Figure 4 As shown in FIG. 1 , the OpenCL parallel defect detection method based on static analysis of the present invention is applied to a common data conflict example of multithreading under OpenCL. Figure 4 The unsynchronized code shows a section of code that reduces and sums a vector, where i is the work item index. For ease of description, this is a simplified example. The actual operation scale and complexity will be higher. In the example, it is assumed that the number of elements in the vector is 4. The expected operation flow is that thread 0 calculates the elements at positions A[0] and A[1] and saves them at position A[0]. At the same time, thread 2 calculates the elements at positions A[2] and A[3] and saves them at position A[2]. After both are completed, thread 0 accumulates the elements at positions A[0] and A[2] to obtain the final result. However, since the running speed between threads is uncontrollable, in the absence of fences, errors may occur. Figure 4In the case of data conflict, thread 0 needs to calculate the sum of A[0] and A[2] before thread 2 calculates the sum of A[2] and A[3]. In this case, the value of A[2] is 3, which is incorrect, instead of the summed value of 7. In the scenario with a fence, thread 0 will wait for threads in the same work group after encountering the fence, and will not continue execution until all threads in the work group reach the fence at the same time, thus avoiding thread 0 reading the wrong value from A[2].

[0048] During the analysis process, array A is accessed using a work item index. Although it is a variable and not a constant, the symbolic execution method will record the variable and its current state, which includes the variable's range constraint information. In the second round of iterative traversal, the analyzer detects access to array A. By judging the range constraint satisfiability of the two accesses, it can be known that the two range constraints can occur at the same time, which means that there is a possibility of data conflict between the two accesses. At the same time, for Figure 4 When analyzing to the fence position, the analyzer can mark all nodes before the fence, so that it can be identified that the access to array A is distributed before and after the fence position, thereby determining that there is no data conflict between them.

[0049] As attached Figure 5 As shown in the figure, the OpenCL parallel defect detection method based on static analysis of the present invention is applied to a possible deadlock scenario under OpenCL. For the convenience of description, a simple vector reduction is still used as an example. The scale and complexity of the actual operation will be higher. Figure 5 In the deadlock code example, the position of the Barrier is within the interval where the condition is true, while the right side is outside the condition statement. Threads 0 and 3 in the deadlock code will wait at the fence, while the remaining threads will not encounter the fence, which will result in undefined behavior, and often means deadlock in specific hardware. For this deadlock scenario, the symbolic execution method is used to record symbolic constraints for each branch path. For each reachable fence node, the analyzer records the path constraint conditions to reach the program point. When the traversal is completed, for each fence node, determine whether the conjunction of the symbolic constraints of each reachable path implies the work item requirement to reach the fence. (all work items in the work group), By equivalently proving that the negation of the proposition is unsatisfiable, SMT can be used to solve it, ultimately ensuring that all threads in the work item can reach the fence. It should also be understood that in the embodiments of this document, the term "and / or" is only a description of the association relationship of the associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this document generally indicates that the associated objects before and after are in an "or" relationship.

[0050] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in terms of function in the above description. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this article.

[0051] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0052] In the several embodiments provided herein, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of the units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, or can be electrical, mechanical or other forms of connection.

[0053] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the embodiments of this article.

[0054] In addition, each functional unit in each embodiment of this invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above integrated unit may be implemented in the form of hardware or in the form of software functional unit.

[0055] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this article is essentially or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of this article. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk and other media that can store program codes.

[0056] Finally, it should be noted that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions described in the aforementioned embodiments or replace some of the technical features therein by equivalents. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. An OpenCL parallel defect detection method based on static analysis, characterized in that: include: S1. Preprocess the OpenCL kernel code to be analyzed; S2. Use finite automata to identify different types of lexical units, including keywords, identifiers, operators, and values, convert the original code into tokens, and complete lexical analysis; S3. Determine whether a word sequence can be combined into a grammatical phrase structure according to grammatical rules, generate an abstract syntax tree for a sequence that conforms to grammatical rules, and complete grammatical analysis; S4. Establish a symbol table for collecting record identifier attribute information, and check whether there are semantic problems based on the symbol table, including type mismatch, undefined variables, duplicate variable definitions, undefined functions, and duplicate function definitions; S5. Build an intermediate representation, extract the control flow information of the program from the intermediate representation, and build a control flow graph. The control flow graph consists of several basic blocks. Each basic block contains instructions that are executed sequentially. The basic blocks are connected by control flow edges. S6. Construct an expansion graph based on the control flow graph.

2. The OpenCL parallel defect detection method based on static analysis according to claim 1, characterized in that: The preprocessing in step S1 includes processing macro definitions, file inclusion, conditional compilation, comments, inserting code from included files, removing specific code blocks, and removing all comments.

3. The OpenCL parallel defect detection method based on static analysis according to claim 1, characterized in that: In step S2, four address space modifiers and a pre-modifier _kernel of a kernel function in OpenCL are identified.

4. The OpenCL parallel defect detection method based on static analysis according to claim 3, characterized in that: The four address space modifiers include _global corresponding to global memory, _local corresponding to local memory, _constant corresponding to constant memory, and _private corresponding to private memory.

5. The OpenCL parallel defect detection method based on static analysis according to claim 1, characterized in that: In step S3, during syntax analysis, it is determined whether the address space modifier in OpenCL is located in front of the identifier declaration statement for modification and whether the prefix modifier of the kernel function is located in front of the kernel function definition statement for modification.

6. The OpenCL parallel defect detection method based on static analysis according to claim 1, characterized in that: It also includes checking in step S4 whether the kernel function return value type is void type, and checking whether the work item variables, work group functions, and synchronization functions have duplicate definitions except for the default definitions.

7. The OpenCL parallel defect detection method based on static analysis according to claim 1, characterized in that: In step S5, redundant grammatical information of the programming language is discarded when constructing the intermediate representation, and in step S6, the expanded diagram is an expanded diagram with fence information.

8. The OpenCL parallel defect detection method based on static analysis according to claim 7, characterized in that: Each node of the expanded graph with fence information stores the program state and program point. The program point is defined as the node before and after the code block. The program state contains the values ​​of all variables and related constraints at the current program point. The fence node is located between a specific code block and the entry program point of the code block.

9. The OpenCL parallel defect detection method based on static analysis according to claim 1, characterized in that: The construction method of symbolic execution construction expansion graph is: S6-1. Create an empty work queue from the program entry and create an initial state; S6-2. Add the entry node of the OpenCL kernel program to the work queue; S6-3. Iterate and access the work queue to determine if the work queue is empty, if not, execute step S6-4; S6-4 determines whether the program point of the node is located between two program blocks, if so, remove the program point after the target basic block access count, if otherwise, execute step S6-5; S6-5. Determine whether the node type is a terminal statement and use the SMT solver to determine the conjunction Is it satisfied? For the nodes, , is the number of nodes, is the jump condition of the branch statement, if it is satisfied, execute step S6-6; S6-6. Generate the entry node of the branch block and add the entry node to the work queue; S6-7. When a memory access statement is encountered, the memory access program information and the current status information are saved to the memory access information table; S6-8. When the access index is a variable, the conditional constraint information stored in different states is used to determine the satisfiability of the conjunction; S6-9. When the node type is a fence instruction, the memory access information in the memory access information table is set to a synchronization program point and the status of the current synchronization program point is recorded, and the next program point position is generated as an extended node and added to the work queue; S6-10. When the work queue is empty, complete the traversal of all program points in a symbolic execution manner and record potential data conflict points.

10. The OpenCL parallel defect detection method based on static analysis according to claim 9, characterized in that: In step S6-4, if the number of accesses does not exceed the upper limit of the preset value, an access node for the first program point in the target basic block is generated, and the node is added to the work queue; In step S6-7, the accessed program information and current status information are compared with the existing information in the access information table.

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