Dynamic key encryption device and method based on key check code
By introducing parity check of key check code and key change check in dynamic key encryption, the multi-key solution problem caused by loop code is solved, delaying the cracking speed, and improving the applicability and security of encryption .
Patent Information
- Application Number
- CN202411300612.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-18
- Publication Date
- 2025-02-07
- Estimated Expiration
- 2044-09-18
AI Technical Summary
The existing dynamic key encryption method has problems with multiple key solutions based on loop codes, resulting in the circuit still working normally when the externally inputted key is not the expected seed signal, thereby speeding up the cracking speed.
Using a dynamic key encryption device and method based on a key verification code, the dynamic key generation module, the trigger signal generation module and the dynamic key inspection module are used to perform parity checking and Key change check to ensure the validity of the dynamic key.
Through the constraints of the check bits and the bit width expansion, the key is avoided to be directly cracked, the solution space of the solver is increased, the cracking speed of reverse engineering is delayed, and it is suitable for different circuits and has strong applicability.
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Figure CN119402176A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of integrated circuit hardware security, and in particular relates to a dynamic key encryption device and method based on a key verification code. Background Art
[0002] With the development of the integrated circuit industry, IP design companies are increasingly strengthening the protection of self-developed circuits. In contrast, the number of attack methods against such self-developed circuits has also increased. An encryption method based on logic locking has been widely studied due to its efficient protection performance and strong anti-attack ability, such as combinational logic locking and sequential logic locking. The logic locking encryption method inserts a key gate into the original circuit, and the original circuit can only work normally when the input key signal is correct.
[0003] However, most of the existing logic locking technologies are based on static keys. The characteristics of static keys make another attack method - probe detection of logic levels, effective. In reverse engineering, the probe can be used to read the level of the key location to obtain key information, thereby accelerating the cracking of confidentiality circuits and causing losses to IP design companies.
[0004] In order to solve the problems caused by static keys, there is an existing dynamic key encryption method, which is to change the key information input to the circuit when the circuit is in a certain state during the operation of the circuit, and use the corresponding key check logic to check whether the changed key meets the expectations. If it does not meet the expectations, it proves that the key is wrong, which will further damage the signal of the original circuit, causing circuit malfunction and IP failure. The dynamic key generation logic is based on cyclic codes, and its key check logic determines whether the circuit is damaged based on the parity check results of specific bits and the information of whether the key has changed.
[0005] However, the above method still has problems. Since the dynamic key is a key group based on a cyclic code, the cyclic code will actually result in multiple key solutions, that is, each key in the sequence can meet the expectations of the key check circuit. Therefore, even if the external input key is not the expected seed signal, the circuit can still work normally. This situation will increase the number of feasible keys and the number of feasible solutions of the circuit solver, which is equivalent to reducing the solution space, thereby speeding up the circuit cracking speed. Summary of the invention
[0006] The object of the present invention is to provide a dynamic key encryption device and method based on a key verification code to solve the above-mentioned technical problems.
[0007] In order to solve the above technical problems, the specific technical solutions of a dynamic key encryption device and method based on a key verification code of the present invention are as follows: A dynamic key encryption device based on a key verification code comprises a dynamic key generation module, a trigger signal generation module and a dynamic key checking module, wherein an initial key signal is input into the dynamic key generation module, the dynamic key generation module outputs a dynamic key signal to the dynamic key checking module, the dynamic key checking module obtains an original circuit signal from an original circuit and outputs an encrypted circuit signal to the original circuit, the trigger signal generation module obtains an original circuit state machine signal from the original circuit, and outputs a trigger signal to the dynamic key generation module and the dynamic key checking module; The dynamic key generation module is used to generate a dynamic key signal; The dynamic key checking module is used to perform parity check and key change check on the dynamic key output by the dynamic key generating module and the previous key signal and determine whether the result meets expectations. If it does not meet expectations, the encrypted circuit signal is destroyed; The trigger signal generating module is used to generate a corresponding trigger signal each time the state machine in the original circuit jumps to a specified state.
[0008] Furthermore, the dynamic key generation module includes an initial key checking module and a key generation module, the key generation module is used to generate a dynamic key, the key generation module input is an initial key signal, a trigger signal and a generation enable signal, and the output is a dynamic key signal; the initial key checking module is used to regenerate the check bit of the input key, and compare the original check bit with the newly generated check bit to obtain a comparison result for an enable signal of a subsequent key generation module, the initial key checking module input is an initial key signal, and the output is a generation enable signal.
[0009] Furthermore, the initial key check module includes a check bit generation module and a comparison module, the check bit generation module is used to generate a check bit signal, the input of the check bit generation module is the initial key signal, and the output is a generated check bit signal; the comparison module is used to compare the generated check bit signal output by the check bit generation module and the initial check bit signal, the input of the comparison module is the initial check bit signal and the generated check bit signal, and the output is a generation enable signal.
[0010] Furthermore, the key generation module includes an enable module and an LFSR module, the enable module is used to output an enable signal, the enable module input is a trigger signal, generates an enable signal, and outputs an enable signal, the LFSR module is used to generate a new key, the LFSR module input is an initial key signal, and outputs a dynamic key signal.
[0011] The present invention also discloses a dynamic key encryption method of a dynamic key encryption device based on a key verification code, comprising the following steps: Step 1: The initial key signal input from outside includes the check bit of the initial key signal, that is, the key and the check bit of the key are used together as the initial input signal of the dynamic key generation module; Step 2: The initial key check module in the dynamic key generation module regenerates the check digit of the input key, and compares the original check digit with the newly generated check digit, and obtains the comparison result for the enable signal of the subsequent key generation module; Step 3: The key generation module in the dynamic key generation module generates a dynamic key sequence through the LFSR module, and the dynamic key signal generation is started only when the enable signal from the initial key check module is valid; Step 4: The trigger signal generation module generates a corresponding trigger signal each time the state machine in the original circuit jumps to a specified state. The trigger signal is simultaneously given to the dynamic key generation module for generating a new key and the dynamic key checking module for checking whether the new key meets expectations; Step 5: The dynamic key check module performs parity check and key change check on the output dynamic key and the previous key signal and determines whether the result meets expectations. If not, the encrypted circuit signal is destroyed; Furthermore, in step 2, if the regenerated key check bit does not match the check bit in the initial key signal, the enable signal of the subsequent key generation module will always remain at a low level.
[0012] Furthermore, the specified state described in step 4 refers to a rarely reachable state in the state machine, that is, a state in the state machine that requires the longest clock cycle to jump from the reset state to the target state.
[0013] Furthermore, the parity check in the dynamic key checking module includes an unchanged odd check result, an unchanged even check result and a parity check conversion result for some bits pre-selected in the dynamic key, that is, there are the following three situations for the parity check of the selected bits: the partial bit check results of the current dynamic key and the previous dynamic key are both odd; the partial bit check results of the current dynamic key and the previous dynamic key are both even; the partial bit check results of the current dynamic key and the previous dynamic key are different, if the previous one is odd, then the current one is even, if the previous one is even, then the current one is odd.
[0014] Furthermore, when the initial key signal does not match the check bit, the circuit will produce the following behavior: The generation enable signal of the initial key check module will remain in an invalid state; Even if the key generation module receives a trigger signal from the outside, it will be shielded by the invalid generation enable signal, that is, the LFSR module cannot work normally to generate a new key; The dynamic key checking module receives a trigger signal and starts to check the dynamic key. It either checks that the parity check of the key does not meet expectations, or checks that the key has not changed, and then destroys the encrypted signal output to the original circuit, causing the original circuit to fail to work properly.
[0015] The present invention provides a dynamic key encryption device and method based on a key verification code, which has the following advantages: First, by using check bits to constrain the original key and expand its bit width, the solver is prevented from directly solving a code in the cyclic code, which would cause the key to be directly cracked. This increases the solver's solution space and slows down the reverse engineering cracking speed.
[0016] Second, the initial key check module only adds a verification code check and enable module, the overall area cost is relatively small, and it is only related to the initial key of the circuit but not to the specific original circuit function. Therefore, it is widely applicable to different circuits and has strong applicability.
[0017] Third, the existence of the check bit makes each code system in the cyclic code sequence not only independently become a set of keys and cannot be easily cracked, but also makes it possible to use different key groups in the same batch of encryption circuits, which increases the obfuscation to a certain extent. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 The overall circuit diagram of the method of the present invention; Figure 2 Circuit diagram of dynamic key generation module of the method of the present invention; Figure 3 The circuit block diagram of the initial key checking module of the method of the present invention; Figure 4 Circuit block diagram of the key generation module of the method of the present invention. DETAILED DESCRIPTION
[0019] In order to better understand the purpose, structure and function of the present invention, the following is a further detailed description of a dynamic key encryption device and method based on a key verification code of the present invention in conjunction with the accompanying drawings.
[0020] like Figure 1 As shown, a dynamic key encryption device based on a key verification code of the present invention includes a dynamic key generation module, a trigger signal generation module, and a dynamic key checking module. The initial key signal is input into the dynamic key generation module, the dynamic key generation module outputs the dynamic key signal to the dynamic key checking module, the dynamic key checking module obtains the original circuit signal from the original circuit and outputs the encrypted circuit signal to the original circuit, and the trigger signal generation module obtains the original circuit state machine signal from the original circuit, and outputs the trigger signal to the dynamic key generation module and the dynamic key checking module.
[0021] The dynamic key generation module is used to generate a dynamic key signal. Specifically, Figure 2 As shown, the dynamic key generation module includes an initial key check module and a key generation module. The key generation module is used to generate dynamic keys. The input of the key generation module is the initial key signal, the trigger signal and the generation enable signal, and the output is the dynamic key signal. The initial key check module is used to regenerate the check digit of the input key, and compare the original check digit with the newly generated check digit to obtain the comparison result for the enable signal of the subsequent key generation module. The input of the initial key check module is the initial key signal, and the output is the generation enable signal. Figure 3 As shown, the initial key check module includes a check bit generation module and a comparison module. The check bit generation module is used to generate a check bit signal. The check bit generation module inputs the initial key signal and outputs a generated check bit signal. The comparison module is used to compare the generated check bit signal output by the check bit generation module with the initial check bit signal. The comparison module inputs the initial check bit signal and the generated check bit signal and outputs a generation enable signal. Figure 4 As shown, the key generation module includes an enable module and a LFSR module. The enable module is used to output an enable signal. The enable module inputs a trigger signal, generates an enable signal, and outputs an enable signal. The LFSR module is used to generate a new key. The LFSR module inputs an initial key signal and outputs a dynamic key signal.
[0022] The dynamic key checking module is used to perform parity check and key change check on the dynamic key output by the dynamic key generating module and the previous key signal and determine whether the result is as expected. If it is not as expected, the encrypted circuit signal is destroyed.
[0023] The trigger signal generation module is used to generate a corresponding trigger signal each time the state machine in the original circuit jumps to a specified state.
[0024] A dynamic key encryption method based on a key verification code of the present invention comprises the following steps: Step 1: The externally input initial key signal includes the check bit of the initial key signal, that is, the key and the check bit of the key are used together as the initial input signal of the dynamic key generation module.
[0025] Step 2: The initial key check module in the dynamic key generation module regenerates the check digit of the input key, and compares the original check digit with the newly generated check digit, and obtains the comparison result for the enable signal of the subsequent key generation module.
[0026] If the regenerated key check bit does not match the check bit in the initial key signal, the enable signal of the subsequent key generation module will remain at a low level.
[0027] Step 3: The key generation module in the dynamic key generation module generates a dynamic key sequence through the LFSR (Linear Feedback Shift Register) module, and the dynamic key signal generation is started only when the enable signal from the initial key check module is valid.
[0028] Step 4: The trigger signal generation module generates a corresponding trigger signal each time the state machine in the original circuit jumps to a specified state. The trigger signal is simultaneously given to the dynamic key generation module for generating a new key and the dynamic key checking module for checking whether the new key meets expectations.
[0029] The specified state in this method refers to a rare reachable state in the state machine, that is, a state in the state machine that requires the longest clock cycle to jump from the reset state to the target state.
[0030] Step 5: The dynamic key check module performs parity check and key change check on the output dynamic key and the previous key signal and determines whether the result meets expectations. If not, the encrypted circuit signal is destroyed.
[0031] The parity check in the dynamic key check module includes the unchanged odd check result, unchanged even check result and parity check conversion result for some pre-selected bits in the dynamic key. That is, there can be three situations for the selected bit parity check: the partial bit check results of the current dynamic key and the previous dynamic key are both odd; the partial bit check results of the current dynamic key and the previous dynamic key are both even; the partial bit check results of the current dynamic key and the previous dynamic key are different, if the previous one is odd, then the current one is even, if the previous one is even, then the current one is odd. The specific selected check algorithm can be configured. Example:
[0032] ① When storing a key, this method not only stores the original key information, but also needs to calculate the check code of the key through a check code algorithm and store it together with the key.
[0033] ② The specified state of the state machine selected by this method is a rare state. It can be directly specified according to the spec, or a random input simulation can be performed on the circuit, and the state transitions of the state machine are counted. The state with the longest arrival time after the reset state is selected as the specified rare state.
[0034] ③ When inputting the circuit key information, the key information and the verification code information need to be input into the dynamic key generation module together, such as Figure 2 After the initial key is input into the key generation module as a seed key, it also needs to be transmitted into the initial key checking module, and the check bit signal of the initial key needs to be input into the initial key checking module.
[0035] ④In the initial key check module, such as Figure 3 As shown, a new check bit is first generated for the initial key signal, and then the newly generated check bit is compared with the initial check bit signal. If they are the same, the generation enable signal is pulled high, otherwise the generation enable signal will remain unchanged.
[0036] ⑤Trigger signal generation module (such as Figure 1 As shown), when it is detected that the state machine selected in the original circuit jumps to the specified state (described in ②), a pulse trigger signal is generated and output to the dynamic key generation module for generating a new dynamic key. It is also output to the dynamic key checking module for checking whether the dynamically generated key meets the expectations.
[0037] ⑥When the generation enable signal is valid, the key generation module (such as Figure 4 As shown in the figure), the LFSR module will be enabled when the input trigger signal is valid, and the LFSR module generates a new key (belonging to the cyclic code key sequence) and outputs it to the dynamic key checking module.
[0038] ⑦ Dynamic key checking module (such as Figure 1 As shown in the figure, each time the trigger signal is valid, a parity check will be performed on some bits in the generated new key to check whether the check result is as expected, and it is necessary to compare whether the newly generated key is the same as the previous key signal. Only when the parity check is passed and the key signal changes will the signal logic of the original circuit input be kept working normally. Otherwise, the signal of the original circuit input will be destroyed and output to the original circuit, making the original circuit unable to work normally.
[0039] When the initial key signal does not match the check bit, the circuit will behave as follows: ① The generation enable signal of the initial key check module will remain invalid.
[0040] ② Even if the key generation module receives a trigger signal from the outside, it will be shielded by the invalid generation enable signal, that is, the LFSR module cannot work normally to generate a new key.
[0041] ③ The dynamic key check module receives a trigger signal and starts to check the dynamic key. It either checks that the parity check of the key does not meet expectations, or checks that the key has not changed, and then destroys the encrypted signal output to the original circuit, causing the original circuit to fail to work properly.
[0042] It is to be understood that the present invention is described by some embodiments, and it is known to those skilled in the art that various changes or equivalent substitutions may be made to these features and embodiments without departing from the spirit and scope of the present invention. In addition, under the teachings of the present invention, these features and embodiments may be modified to adapt to specific circumstances and materials without departing from the spirit and scope of the present invention. Therefore, the present invention is not limited by the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application are within the scope of protection of the present invention.
Claims
1. A dynamic key encryption device based on a key check code, characterized in that: It includes a dynamic key generation module, a trigger signal generation module and a dynamic key checking module, wherein the initial key signal is input into the dynamic key generation module, the dynamic key generation module outputs the dynamic key signal to the dynamic key checking module, the dynamic key checking module obtains the original circuit signal from the original circuit and outputs the encrypted circuit signal to the original circuit, the trigger signal generation module obtains the original circuit state machine signal from the original circuit, and outputs the trigger signal to the dynamic key generation module and the dynamic key checking module; The dynamic key generation module is used to generate a dynamic key signal; The dynamic key checking module is used to perform parity check and key change check on the dynamic key output by the dynamic key generating module and the previous key signal and determine whether the result meets expectations. If it does not meet expectations, the encrypted circuit signal is destroyed; The trigger signal generating module is used to generate a corresponding trigger signal each time the state machine in the original circuit jumps to a specified state.
2. The dynamic key encryption device based on the key verification code according to claim 1 is characterized in that: The dynamic key generation module includes an initial key check module and a key generation module. The key generation module is used to generate a dynamic key. The key generation module inputs an initial key signal, a trigger signal and a generation enable signal, and outputs a dynamic key signal. The initial key check module is used to regenerate the check bit of the input key, and compare the original check bit with the newly generated check bit to obtain a comparison result for an enable signal of a subsequent key generation module. The initial key check module inputs an initial key signal, and outputs a generation enable signal.
3. The dynamic key encryption device based on the key verification code according to claim 2 is characterized in that: The initial key check module includes a check bit generation module and a comparison module. The check bit generation module is used to generate a check bit signal. The input of the check bit generation module is the initial key signal, and the output is a generated check bit signal. The comparison module is used to compare the generated check bit signal output by the check bit generation module with the initial check bit signal. The input of the comparison module is the initial check bit signal and the generated check bit signal, and the output is a generation enable signal.
4. The dynamic key encryption device based on the key verification code according to claim 2 is characterized in that: The key generation module includes an enable module and a LFSR module. The enable module is used to output an enable signal. The enable module inputs a trigger signal, generates an enable signal, and outputs an enable signal. The LFSR module is used to generate a new key. The LFSR module inputs an initial key signal and outputs a dynamic key signal.
5. A dynamic key encryption method of a dynamic key encryption device based on a key verification code according to any one of claims 1 to 4, characterized in that: The steps include: Step 1: The initial key signal input from outside includes the check bit of the initial key signal, that is, the key and the check bit of the key are used together as the initial input signal of the dynamic key generation module; Step 2: The initial key check module in the dynamic key generation module regenerates the check digit of the input key, and compares the original check digit with the newly generated check digit, and obtains the comparison result for the enable signal of the subsequent key generation module; Step 3: The key generation module in the dynamic key generation module generates a dynamic key sequence through the LFSR module, and the dynamic key signal generation is started only when the enable signal from the initial key check module is valid; Step 4: The trigger signal generation module generates a corresponding trigger signal each time the state machine in the original circuit jumps to a specified state. The trigger signal is simultaneously given to the dynamic key generation module for generating a new key and the dynamic key checking module for checking whether the new key meets expectations; Step 5: The dynamic key check module performs parity check and key change check on the output dynamic key and the previous key signal and determines whether the result meets expectations. If not, the encrypted circuit signal is destroyed.
6. The dynamic key encryption method according to claim 5, characterized in that: In step 2, if the regenerated key check bit does not match the check bit in the initial key signal, the enable signal of the subsequent key generation module will remain at a low level.
7. The dynamic key encryption method according to claim 5, characterized in that: The designated state described in step 4 refers to a rarely reachable state in the state machine, that is, a state in the state machine that requires the longest clock cycle to jump from the reset state to the target state.
8. The dynamic key encryption method according to claim 5, characterized in that: The parity check in the dynamic key check module includes an unchanged odd check result, an unchanged even check result and a parity check conversion result for some bits pre-selected in the dynamic key, that is, there are three situations for the parity check of the selected bits: the partial bit check results of the current dynamic key and the previous dynamic key are both odd; the partial bit check results of the current dynamic key and the previous dynamic key are both even; the partial bit check results of the current dynamic key and the previous dynamic key are different, if the previous one is odd, then the current one is even, if the previous one is even, then the current one is odd.
9. The dynamic key encryption method according to claim 6, characterized in that: When the initial key signal does not match the check bit, the circuit will behave as follows: The generation enable signal of the initial key check module will remain in an invalid state; Even if the key generation module receives a trigger signal from the outside, it will be shielded by the invalid generation enable signal, that is, the LFSR module cannot work normally to generate a new key; The dynamic key checking module receives a trigger signal and starts to check the dynamic key. It either checks that the parity check of the key does not meet expectations, or checks that the key has not changed, and then destroys the encrypted signal output to the original circuit, causing the original circuit to fail to work properly.
Citation Information
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